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Mon, 05 Apr 2021 18:33:56 -0700 (PDT) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Cc: Adam Ford , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] arm64: dts: imx8mn: Add spba1 bus Date: Mon, 5 Apr 2021 20:33:42 -0500 Message-Id: <20210406013344.124255-1-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210406_023402_049866_04AC4121 X-CRM114-Status: GOOD ( 10.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX8MN has an SPBA bus which covers much of the audio, but there is a second SPBA bus which covers many of the serial interfaces like SPI and UARTs currently missing from the device tree. The reference manual calls the bus handling the audio peripherals SPBA2, and the bus handling the serial peripherals is called SPBA1. Rename the existing spba bus to spba2 and add spba1. Signed-off-by: Adam Ford diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index 4dac4da38f4c..e961acd237a8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -255,7 +255,7 @@ aips1: bus@30000000 { #size-cells = <1>; ranges; - spba: spba-bus@30000000 { + spba2: spba-bus@30000000 { compatible = "fsl,spba-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -681,80 +681,88 @@ aips3: bus@30800000 { #size-cells = <1>; ranges; - ecspi1: spi@30820000 { - compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi"; + spba1: spba-bus@30800000 { + compatible = "fsl,spba-bus", "simple-bus"; #address-cells = <1>; - #size-cells = <0>; - reg = <0x30820000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MN_CLK_ECSPI1_ROOT>, - <&clk IMX8MN_CLK_ECSPI1_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + #size-cells = <1>; + reg = <0x30800000 0x100000>; + ranges; - ecspi2: spi@30830000 { - compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x30830000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MN_CLK_ECSPI2_ROOT>, - <&clk IMX8MN_CLK_ECSPI2_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + ecspi1: spi@30820000 { + compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30820000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MN_CLK_ECSPI1_ROOT>, + <&clk IMX8MN_CLK_ECSPI1_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - ecspi3: spi@30840000 { - compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x30840000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MN_CLK_ECSPI3_ROOT>, - <&clk IMX8MN_CLK_ECSPI3_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + ecspi2: spi@30830000 { + compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30830000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MN_CLK_ECSPI2_ROOT>, + <&clk IMX8MN_CLK_ECSPI2_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - uart1: serial@30860000 { - compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart"; - reg = <0x30860000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MN_CLK_UART1_ROOT>, - <&clk IMX8MN_CLK_UART1_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + ecspi3: spi@30840000 { + compatible = "fsl,imx8mn-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30840000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MN_CLK_ECSPI3_ROOT>, + <&clk IMX8MN_CLK_ECSPI3_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - uart3: serial@30880000 { - compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart"; - reg = <0x30880000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MN_CLK_UART3_ROOT>, - <&clk IMX8MN_CLK_UART3_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + uart1: serial@30860000 { + compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart"; + reg = <0x30860000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MN_CLK_UART1_ROOT>, + <&clk IMX8MN_CLK_UART1_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - uart2: serial@30890000 { - compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart"; - reg = <0x30890000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MN_CLK_UART2_ROOT>, - <&clk IMX8MN_CLK_UART2_ROOT>; - clock-names = "ipg", "per"; - status = "disabled"; + uart3: serial@30880000 { + compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart"; + reg = <0x30880000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MN_CLK_UART3_ROOT>, + <&clk IMX8MN_CLK_UART3_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart2: serial@30890000 { + compatible = "fsl,imx8mn-uart", "fsl,imx6q-uart"; + reg = <0x30890000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MN_CLK_UART2_ROOT>, + <&clk IMX8MN_CLK_UART2_ROOT>; + clock-names = "ipg", "per"; + status = "disabled"; + }; }; crypto: crypto@30900000 { From patchwork Tue Apr 6 01:33:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12183913 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0295C433ED for ; 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Mon, 05 Apr 2021 18:33:59 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:987f:5ec9:b10c:df19]) by smtp.gmail.com with ESMTPSA id s16sm11821167ilq.87.2021.04.05.18.33.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Apr 2021 18:33:58 -0700 (PDT) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Cc: Adam Ford , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] arm64: dts: imx8mm: Add spba1 and spba2 buses Date: Mon, 5 Apr 2021 20:33:43 -0500 Message-Id: <20210406013344.124255-2-aford173@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210406013344.124255-1-aford173@gmail.com> References: <20210406013344.124255-1-aford173@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210406_023402_375268_C58D6E11 X-CRM114-Status: GOOD ( 10.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX8MM reference manual shows there are two spba busses. SPBA1 handles much of the serial interfaces, and SPBA2 covers much of the audio. Add both of them. Signed-off-by: Adam Ford diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index a27e02bee6b4..64aa38fd2b6e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -271,117 +271,125 @@ aips1: bus@30000000 { #size-cells = <1>; ranges = <0x30000000 0x30000000 0x400000>; - sai1: sai@30010000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; - reg = <0x30010000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_SAI1_IPG>, - <&clk IMX8MM_CLK_SAI1_ROOT>, - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + spba2: spba-bus@30000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x30000000 0x100000>; + ranges; + + sai1: sai@30010000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; + reg = <0x30010000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI1_IPG>, + <&clk IMX8MM_CLK_SAI1_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - sai2: sai@30020000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; - reg = <0x30020000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_SAI2_IPG>, - <&clk IMX8MM_CLK_SAI2_ROOT>, - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + sai2: sai@30020000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; + reg = <0x30020000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI2_IPG>, + <&clk IMX8MM_CLK_SAI2_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - sai3: sai@30030000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; - reg = <0x30030000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_SAI3_IPG>, - <&clk IMX8MM_CLK_SAI3_ROOT>, - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + sai3: sai@30030000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; + reg = <0x30030000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI3_IPG>, + <&clk IMX8MM_CLK_SAI3_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - sai5: sai@30050000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; - reg = <0x30050000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_SAI5_IPG>, - <&clk IMX8MM_CLK_SAI5_ROOT>, - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + sai5: sai@30050000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; + reg = <0x30050000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI5_IPG>, + <&clk IMX8MM_CLK_SAI5_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - sai6: sai@30060000 { - #sound-dai-cells = <0>; - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; - reg = <0x30060000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_SAI6_IPG>, - <&clk IMX8MM_CLK_SAI6_ROOT>, - <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + sai6: sai@30060000 { + #sound-dai-cells = <0>; + compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; + reg = <0x30060000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_SAI6_IPG>, + <&clk IMX8MM_CLK_SAI6_ROOT>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>; + clock-names = "bus", "mclk1", "mclk2", "mclk3"; + dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - micfil: audio-controller@30080000 { - compatible = "fsl,imx8mm-micfil"; - reg = <0x30080000 0x10000>; - interrupts = , - , - , - ; - clocks = <&clk IMX8MM_CLK_PDM_IPG>, - <&clk IMX8MM_CLK_PDM_ROOT>, - <&clk IMX8MM_AUDIO_PLL1_OUT>, - <&clk IMX8MM_AUDIO_PLL2_OUT>, - <&clk IMX8MM_CLK_EXT3>; - clock-names = "ipg_clk", "ipg_clk_app", - "pll8k", "pll11k", "clkext3"; - dmas = <&sdma2 24 25 0x80000000>; - dma-names = "rx"; - status = "disabled"; - }; + micfil: audio-controller@30080000 { + compatible = "fsl,imx8mm-micfil"; + reg = <0x30080000 0x10000>; + interrupts = , + , + , + ; + clocks = <&clk IMX8MM_CLK_PDM_IPG>, + <&clk IMX8MM_CLK_PDM_ROOT>, + <&clk IMX8MM_AUDIO_PLL1_OUT>, + <&clk IMX8MM_AUDIO_PLL2_OUT>, + <&clk IMX8MM_CLK_EXT3>; + clock-names = "ipg_clk", "ipg_clk_app", + "pll8k", "pll11k", "clkext3"; + dmas = <&sdma2 24 25 0x80000000>; + dma-names = "rx"; + status = "disabled"; + }; - spdif1: spdif@30090000 { - compatible = "fsl,imx35-spdif"; - reg = <0x30090000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */ - <&clk IMX8MM_CLK_24M>, /* rxtx0 */ - <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */ - <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */ - <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */ - <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */ - <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */ - <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */ - <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */ - <&clk IMX8MM_CLK_DUMMY>; /* spba */ - clock-names = "core", "rxtx0", - "rxtx1", "rxtx2", - "rxtx3", "rxtx4", - "rxtx5", "rxtx6", - "rxtx7", "spba"; - dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>; - dma-names = "rx", "tx"; - status = "disabled"; + spdif1: spdif@30090000 { + compatible = "fsl,imx35-spdif"; + reg = <0x30090000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, /* core */ + <&clk IMX8MM_CLK_24M>, /* rxtx0 */ + <&clk IMX8MM_CLK_SPDIF1>, /* rxtx1 */ + <&clk IMX8MM_CLK_DUMMY>, /* rxtx2 */ + <&clk IMX8MM_CLK_DUMMY>, /* rxtx3 */ + <&clk IMX8MM_CLK_DUMMY>, /* rxtx4 */ + <&clk IMX8MM_CLK_AUDIO_AHB>, /* rxtx5 */ + <&clk IMX8MM_CLK_DUMMY>, /* rxtx6 */ + <&clk IMX8MM_CLK_DUMMY>, /* rxtx7 */ + <&clk IMX8MM_CLK_DUMMY>; /* spba */ + clock-names = "core", "rxtx0", + "rxtx1", "rxtx2", + "rxtx3", "rxtx4", + "rxtx5", "rxtx6", + "rxtx7", "spba"; + dmas = <&sdma2 28 18 0>, <&sdma2 29 18 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; }; gpio1: gpio@30200000 { @@ -670,80 +678,88 @@ aips3: bus@30800000 { ranges = <0x30800000 0x30800000 0x400000>, <0x8000000 0x8000000 0x10000000>; - ecspi1: spi@30820000 { - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; + spba1: spba-bus@30800000 { + compatible = "fsl,spba-bus", "simple-bus"; #address-cells = <1>; - #size-cells = <0>; - reg = <0x30820000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>, - <&clk IMX8MM_CLK_ECSPI1_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + #size-cells = <1>; + reg = <0x30800000 0x100000>; + ranges; + + ecspi1: spi@30820000 { + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30820000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>, + <&clk IMX8MM_CLK_ECSPI1_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - ecspi2: spi@30830000 { - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x30830000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>, - <&clk IMX8MM_CLK_ECSPI2_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + ecspi2: spi@30830000 { + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30830000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>, + <&clk IMX8MM_CLK_ECSPI2_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - ecspi3: spi@30840000 { - compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x30840000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>, - <&clk IMX8MM_CLK_ECSPI3_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + ecspi3: spi@30840000 { + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30840000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>, + <&clk IMX8MM_CLK_ECSPI3_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - uart1: serial@30860000 { - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; - reg = <0x30860000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_UART1_ROOT>, - <&clk IMX8MM_CLK_UART1_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + uart1: serial@30860000 { + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; + reg = <0x30860000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_UART1_ROOT>, + <&clk IMX8MM_CLK_UART1_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - uart3: serial@30880000 { - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; - reg = <0x30880000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_UART3_ROOT>, - <&clk IMX8MM_CLK_UART3_ROOT>; - clock-names = "ipg", "per"; - dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; + uart3: serial@30880000 { + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; + reg = <0x30880000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_UART3_ROOT>, + <&clk IMX8MM_CLK_UART3_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; - uart2: serial@30890000 { - compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; - reg = <0x30890000 0x10000>; - interrupts = ; - clocks = <&clk IMX8MM_CLK_UART2_ROOT>, - <&clk IMX8MM_CLK_UART2_ROOT>; - clock-names = "ipg", "per"; - status = "disabled"; + uart2: serial@30890000 { + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; + reg = <0x30890000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_UART2_ROOT>, + <&clk IMX8MM_CLK_UART2_ROOT>; + clock-names = "ipg", "per"; + status = "disabled"; + }; }; crypto: crypto@30900000 {