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Thu, 22 Nov 2018 05:14:31 +0000 From: Yogesh Narayan Gaur To: "linux-mtd@lists.infradead.org" , "boris.brezillon@bootlin.com" , "broonie@kernel.org" , "marek.vasut@gmail.com" , "vigneshr@ti.com" , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: [PATCH v4 1/7] spi: add support for octo mode I/O data transfer Thread-Topic: [PATCH v4 1/7] spi: add support for octo mode I/O data transfer Thread-Index: AQHUgiJAcEpOMRHFo0C5hsFrjEN72A== Date: Thu, 22 Nov 2018 05:14:31 +0000 Message-ID: <1542863544-21257-2-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> In-Reply-To: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SG2PR01CA0106.apcprd01.prod.exchangelabs.com (2603:1096:3:15::32) To VI1PR04MB5726.eurprd04.prod.outlook.com (2603:10a6:803:e4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yogeshnarayan.gaur@nxp.com; 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SPI_TX_OCTO: transmit with 8 wires SPI_RX_OCTO: receive with 8 wires Signed-off-by: Yogesh Gaur Reviewed-by: Boris Brezillon --- Changes for v4: - Rebase on top of v4.20-rc2 Changes for v3: - Modified string 'octal' with 'octo'. - Add octo mode support in spi_setup(). Changes for v2: - Incorporated review comments of Boris. --- drivers/spi/spi.c | 12 ++++++++++-- include/linux/spi/spi.h | 4 +++- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 6ca5940..af4e4c6 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -1617,6 +1617,9 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, case 4: spi->mode |= SPI_TX_QUAD; break; + case 8: + spi->mode |= SPI_TX_OCTO; + break; default: dev_warn(&ctlr->dev, "spi-tx-bus-width %d not supported\n", @@ -1635,6 +1638,9 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, case 4: spi->mode |= SPI_RX_QUAD; break; + case 8: + spi->mode |= SPI_RX_OCTO; + break; default: dev_warn(&ctlr->dev, "spi-rx-bus-width %d not supported\n", @@ -2823,7 +2829,8 @@ int spi_setup(struct spi_device *spi) /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden */ if ((spi->mode & SPI_3WIRE) && (spi->mode & - (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD))) + (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTO | + SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTO))) return -EINVAL; /* help drivers fail *cleanly* when they need options * that aren't supported with their current controller @@ -2832,7 +2839,8 @@ int spi_setup(struct spi_device *spi) */ bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD); ugly_bits = bad_bits & - (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD); + (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTO | + SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTO); if (ugly_bits) { dev_warn(&spi->dev, "setup: ignoring unsupported mode bits %x\n", diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 6be77fa..e2d69eb 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -154,7 +154,9 @@ struct spi_device { #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ #define SPI_RX_DUAL 0x400 /* receive with 2 wires */ #define SPI_RX_QUAD 0x800 /* receive with 4 wires */ -#define SPI_CS_WORD 0x1000 /* toggle cs after each word */ +#define SPI_CS_WORD 0x1000 /* toggle cs after each word */ +#define SPI_TX_OCTO 0x2000 /* transmit with 8 wires */ +#define SPI_RX_OCTO 0x4000 /* receive with 8 wires */ int irq; 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Thu, 22 Nov 2018 05:14:37 +0000 From: Yogesh Narayan Gaur To: "linux-mtd@lists.infradead.org" , "boris.brezillon@bootlin.com" , "broonie@kernel.org" , "marek.vasut@gmail.com" , "vigneshr@ti.com" , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: [PATCH v4 2/7] spi: spi-mem: add support for octo mode I/O data transfer Thread-Topic: [PATCH v4 2/7] spi: spi-mem: add support for octo mode I/O data transfer Thread-Index: AQHUgiJDzVTsDPXnB0mQxujUB5Eyqg== Date: Thu, 22 Nov 2018 05:14:37 +0000 Message-ID: <1542863544-21257-3-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> In-Reply-To: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SG2PR01CA0106.apcprd01.prod.exchangelabs.com (2603:1096:3:15::32) To VI1PR04MB5726.eurprd04.prod.outlook.com (2603:10a6:803:e4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yogeshnarayan.gaur@nxp.com; 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Signed-off-by: Yogesh Gaur Reviewed-by: Boris Brezillon --- Changes for v4: - None Changes for v3: - Modified string 'octal' with 'octo'. Changes for v2: - Patch added in v2 version. drivers/spi/spi-mem.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 62a7b80..388f849 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -12,7 +12,7 @@ #include "internals.h" -#define SPI_MEM_MAX_BUSWIDTH 4 +#define SPI_MEM_MAX_BUSWIDTH 8 /** * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a @@ -121,6 +121,13 @@ static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx) break; + case 8: + if ((tx && (mode & SPI_TX_OCTO)) || + (!tx && (mode & SPI_RX_OCTO))) + return 0; + + break; + default: break; } From patchwork Thu Nov 22 05:14:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yogesh Narayan Gaur X-Patchwork-Id: 10693525 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0F92C14DE for ; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR04MB3055; H:VI1PR04MB5726.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: OqpzdqS4FZdP6mezQzqRivnGO45eaIn781yyAbmqlQi5QxrQaH/fXdufILfmoAicHErQeC4UDemW/LtRNxHu5DPRMmt1H7T5cdlDtMHJloUC57tIo2zXJczxfDKZGdyNxbkXgOPMD5PdGCzhpbw2PcTmyv8mwCOmcd2r1+RZZFbUAsJA37k0LwtGoHS5zBKpXTa3frG/fXI/OvbbEH6d38WaEPKVU5vwkVVUswui6EMblC2ZgInr5WDebxafA2ZSvJ+KUkzVEzguqpnWXV9md9XG3bE3IuysfXDNmjRQeWFH3YQdeeFp9AdXSnSI/jTfhQyZ+V7CObo3jFymc6JQUOpKhUBJ8XGDzGmHtoLfySM= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f7cbc696-ad09-4441-e5b7-08d65039693b X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Nov 2018 05:14:43.2301 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB3055 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181121_211452_138736_F9F823E9 X-CRM114-Status: GOOD ( 14.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "mark.rutland@arm.com" , "robh@kernel.org" , Yogesh Narayan Gaur , "linux-kernel@vger.kernel.org" , "frieder.schrempf@exceet.de" , "computersforpeace@gmail.com" , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP - Add opcodes for octo I/O commands * Read : 1-1-8 and 1-8-8 protocol * Write : 1-1-8 and 1-8-8 protocol * opcodes for 4-byte address mode command - Entry of macros in _convert_3to4_xxx function - Add flag specifying flash support octo read commands. Signed-off-by: Vignesh R Signed-off-by: Yogesh Gaur --- Changes for v4: - None Changes for v3: - Modified string 'octal' with 'octo'. Changes for v2: - Incorporated review comments of Boris and Vignesh drivers/mtd/spi-nor/spi-nor.c | 12 ++++++++++++ include/linux/mtd/spi-nor.h | 8 ++++++++ 2 files changed, 20 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 398d273..356ac5d 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -90,6 +90,7 @@ struct flash_info { #define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */ #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */ #define USE_CLSR BIT(14) /* use CLSR command */ +#define SPI_NOR_OCTO_READ BIT(15) /* Flash supports Octal Read */ int (*quad_enable)(struct spi_nor *nor); }; @@ -209,6 +210,8 @@ static inline u8 spi_nor_convert_3to4_read(u8 opcode) { SPINOR_OP_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B }, { SPINOR_OP_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B }, { SPINOR_OP_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B }, + { SPINOR_OP_READ_1_1_8, SPINOR_OP_READ_1_1_8_4B }, + { SPINOR_OP_READ_1_8_8, SPINOR_OP_READ_1_8_8_4B }, { SPINOR_OP_READ_1_1_1_DTR, SPINOR_OP_READ_1_1_1_DTR_4B }, { SPINOR_OP_READ_1_2_2_DTR, SPINOR_OP_READ_1_2_2_DTR_4B }, @@ -225,6 +228,8 @@ static inline u8 spi_nor_convert_3to4_program(u8 opcode) { SPINOR_OP_PP, SPINOR_OP_PP_4B }, { SPINOR_OP_PP_1_1_4, SPINOR_OP_PP_1_1_4_4B }, { SPINOR_OP_PP_1_4_4, SPINOR_OP_PP_1_4_4_4B }, + { SPINOR_OP_PP_1_1_8, SPINOR_OP_PP_1_1_8_4B }, + { SPINOR_OP_PP_1_8_8, SPINOR_OP_PP_1_8_8_4B }, }; return spi_nor_convert_opcode(opcode, spi_nor_3to4_program, @@ -3195,6 +3200,13 @@ static int spi_nor_init_params(struct spi_nor *nor, SNOR_PROTO_1_1_4); } + if (info->flags & SPI_NOR_OCTO_READ) { + params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8; + spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_1_8], + 0, 8, SPINOR_OP_READ_1_1_8, + SNOR_PROTO_1_1_8); + } + /* Page Program settings. */ params->hwcaps.mask |= SNOR_HWCAPS_PP; spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP], diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 8b1acf6..019f534 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -50,9 +50,13 @@ #define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */ #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */ #define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */ +#define SPINOR_OP_READ_1_1_8 0x8b /* Read data bytes (Octal Output SPI) */ +#define SPINOR_OP_READ_1_8_8 0xcb /* Read data bytes (Octal I/O SPI) */ #define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */ #define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */ #define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */ +#define SPINOR_OP_PP_1_1_8 0x82 /* Octal page program */ +#define SPINOR_OP_PP_1_8_8 0xc2 /* Octal page program */ #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */ @@ -73,9 +77,13 @@ #define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */ #define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */ #define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */ +#define SPINOR_OP_READ_1_1_8_4B 0x7c /* Read data bytes (Octal Output SPI) */ +#define SPINOR_OP_READ_1_8_8_4B 0xcc /* Read data bytes (Octal I/O SPI) */ #define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */ #define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */ #define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */ +#define SPINOR_OP_PP_1_1_8_4B 0x84 /* Octal page program */ +#define SPINOR_OP_PP_1_8_8_4B 0x8e /* Octal page program */ #define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */ #define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */ #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */ From patchwork Thu Nov 22 05:14:48 2018 Content-Type: text/plain; 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Thu, 22 Nov 2018 05:14:49 +0000 From: Yogesh Narayan Gaur To: "linux-mtd@lists.infradead.org" , "boris.brezillon@bootlin.com" , "broonie@kernel.org" , "marek.vasut@gmail.com" , "vigneshr@ti.com" , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: [PATCH v4 4/7] mtd: spi-nor: add octo read flag for flash mt35xu512aba Thread-Topic: [PATCH v4 4/7] mtd: spi-nor: add octo read flag for flash mt35xu512aba Thread-Index: AQHUgiJKOabH5QrebUa55cHJjfKX3g== Date: Thu, 22 Nov 2018 05:14:48 +0000 Message-ID: <1542863544-21257-5-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> In-Reply-To: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SG2PR01CA0106.apcprd01.prod.exchangelabs.com (2603:1096:3:15::32) To VI1PR04MB5726.eurprd04.prod.outlook.com (2603:10a6:803:e4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yogeshnarayan.gaur@nxp.com; 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This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does not seem to support newer JESD216C standard that provides auto detection of Octal mode capabilities and opcodes. Therefore, this capability is manually added using new SPI_NOR_OCTO_READ flag. Signed-off-by: Vignesh R Signed-off-by: Yogesh Gaur --- Changes for v4: - None Changes for v3: - Modified string 'octal' with 'octo'. Changes for v2: - Incorporated review comments of Boris and Vignesh drivers/mtd/spi-nor/spi-nor.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 356ac5d..347f17f 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1413,7 +1413,8 @@ static const struct flash_info spi_nor_ids[] = { /* Micron */ { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512, - SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES) + SECT_4K | USE_FSR | SPI_NOR_OCTO_READ | + SPI_NOR_4B_OPCODES) }, /* PMC */ From patchwork Thu Nov 22 05:14:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yogesh Narayan Gaur X-Patchwork-Id: 10693529 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 281F01709 for ; Thu, 22 Nov 2018 05:16:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 160542BDAA for ; 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Assign hw-capability mask bits for octo transfer. Signed-off-by: Yogesh Gaur --- Changes for v4: - None Changes for v3: - Modified string 'octal' with 'octo'. Changes for v2: - Incorporated review comments of Boris. drivers/mtd/devices/m25p80.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index c4a1d04..6f3c280 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -195,7 +195,14 @@ static int m25p_probe(struct spi_mem *spimem) spi_mem_set_drvdata(spimem, flash); flash->spimem = spimem; - if (spi->mode & SPI_RX_QUAD) { + if (spi->mode & SPI_RX_OCTO) { + hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8; + + if (spi->mode & SPI_TX_OCTO) + hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 | + SNOR_HWCAPS_PP_1_1_8 | + SNOR_HWCAPS_PP_1_8_8); + } else if (spi->mode & SPI_RX_QUAD) { hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4; if (spi->mode & SPI_TX_QUAD) From patchwork Thu Nov 22 05:15:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yogesh Narayan Gaur X-Patchwork-Id: 10693531 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0950714DE for ; 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NXP FlexSPI controller supports 8 lines Rx/Tx data transfer. Signed-off-by: Yogesh Gaur --- Changes for v4: - None Changes for v3: - Modified string 'octal' with 'octo'. Changes for v2: - None drivers/spi/spi-nxp-fspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index a35013b..f0d37e0 100644 --- a/drivers/spi/spi-nxp-fspi.c +++ b/drivers/spi/spi-nxp-fspi.c @@ -995,8 +995,8 @@ static int nxp_fspi_probe(struct platform_device *pdev) if (!ctlr) return -ENOMEM; - ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | - SPI_TX_DUAL | SPI_TX_QUAD; + ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTO | + SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTO; f = spi_controller_get_devdata(ctlr); f->dev = dev; From patchwork Thu Nov 22 05:15:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yogesh Narayan Gaur X-Patchwork-Id: 10693541 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB0291709 for ; Thu, 22 Nov 2018 05:32:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8CC9B2CC4E for ; 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Thu, 22 Nov 2018 05:15:06 +0000 Received: from VI1PR04MB5726.eurprd04.prod.outlook.com ([fe80::595a:9890:8397:5d51]) by VI1PR04MB5726.eurprd04.prod.outlook.com ([fe80::595a:9890:8397:5d51%3]) with mapi id 15.20.1361.016; Thu, 22 Nov 2018 05:15:06 +0000 From: Yogesh Narayan Gaur To: "linux-mtd@lists.infradead.org" , "boris.brezillon@bootlin.com" , "broonie@kernel.org" , "marek.vasut@gmail.com" , "vigneshr@ti.com" , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: [PATCH v4 7/7] arm64: dts: lx2160a: update fspi node Thread-Topic: [PATCH v4 7/7] arm64: dts: lx2160a: update fspi node Thread-Index: AQHUgiJUXC1eycPwL0i53LplGbKuaQ== Date: Thu, 22 Nov 2018 05:15:06 +0000 Message-ID: <1542863544-21257-8-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> In-Reply-To: <1542863544-21257-1-git-send-email-yogeshnarayan.gaur@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SG2PR01CA0106.apcprd01.prod.exchangelabs.com (2603:1096:3:15::32) To VI1PR04MB5726.eurprd04.prod.outlook.com (2603:10a6:803:e4::24) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yogeshnarayan.gaur@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR04MB3055; H:VI1PR04MB5726.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: L95/OZvekS7WJ1YLCfRbVF7nEbTqHkC77dkamJ2sfNufVaVKRq749e3jkYEoa7RfFy8Gwb1iDFqsn+M8YF/QIn0wqijAAYgc45daSoH9xk7Z2MvH61Wfw5/PAiIjw2bz442VciCQ4B/4ioQiELQGqmLueLGdZDlMuMT6FM2rEFcprpncWPC2AdC0mgBQI+TBNLQa0yR7Uv5sPAvkGFAqmOdItOxBwQ3HwMYpj7uZvbaa1HdJwLjcsHwceEOKiiXdIgGrvKeoWRN1TPaz7zo4ZWhJBIaOliTtUo3CgjcWAHeriBrTIvxINyUAZuUoZpLGHH1WtUJnZjZaPTugq0LhHcKogTTW4S3luIWPJr8YIF4= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 71fe3128-614c-499e-85b8-08d650397704 X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Nov 2018 05:15:06.3240 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB3055 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181122_001559_729100_ED94E230 X-CRM114-Status: GOOD ( 11.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "mark.rutland@arm.com" , "robh@kernel.org" , Yogesh Narayan Gaur , "linux-kernel@vger.kernel.org" , "frieder.schrempf@exceet.de" , "computersforpeace@gmail.com" , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Flash mt35xu512aba connected to FlexSPI controller supports 1-1-8/1-8-8 protocol. Added flag spi-rx-bus-width and spi-tx-bus-width with values as 8 and 8 respectively for both flashes connected at CS0 and CS1. Signed-off-by: Yogesh Gaur --- Changes for v4: - None Changes for v3: - None Changes for v2: - None arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 3b20c97..24cc41c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -45,6 +45,8 @@ m25p,fast-read; spi-max-frequency = <20000000>; reg = <0>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <8>; }; mt35xu512aba1: flash@1 { @@ -54,6 +56,8 @@ m25p,fast-read; spi-max-frequency = <20000000>; reg = <1>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <8>; }; };