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mx.microsoft.com 1; spf=pass smtp.mailfrom=nutanix.com; dmarc=pass action=none header.from=nutanix.com; dkim=pass header.d=nutanix.com; arc=none Received: from SN6PR02MB4543.namprd02.prod.outlook.com (2603:10b6:805:b1::24) by SN6PR02MB5567.namprd02.prod.outlook.com (2603:10b6:805:e5::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3999.29; Thu, 8 Apr 2021 19:05:28 +0000 Received: from SN6PR02MB4543.namprd02.prod.outlook.com ([fe80::7139:d6a4:cf94:c4b1]) by SN6PR02MB4543.namprd02.prod.outlook.com ([fe80::7139:d6a4:cf94:c4b1%4]) with mapi id 15.20.3999.034; Thu, 8 Apr 2021 19:05:28 +0000 From: Raphael Norwitz To: "bhelgaas@google.com" CC: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "alex.williamson@redhat.com" , "ameynarkhede03@gmail.com" , Raphael Norwitz , Alay Shah , Suresh Gumpula Subject: [PATCH] PCI: Delay after FLR of Intel DC P4510 NVMe Thread-Topic: [PATCH] PCI: Delay after FLR of Intel DC P4510 NVMe Thread-Index: AQHXLKojWkVUrTJNYkajdTXZJRXXcQ== Date: Thu, 8 Apr 2021 19:05:27 +0000 Message-ID: <20210408190521.16897-1-raphael.norwitz@nutanix.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.20.1 authentication-results: google.com; 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The same reset quirk the P3700 uses also resolves the failure for the P4510, so this change introduces the same reset quirk for the P4510. Reviewed-by: Alex Williamson Signed-off-by: Alay Shah Signed-off-by: Suresh Gumpula Signed-off-by: Raphael Norwitz --- drivers/pci/quirks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 653660e3ba9e..5a8c059b848d 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3922,6 +3922,7 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { reset_ivb_igd }, { PCI_VENDOR_ID_SAMSUNG, 0xa804, nvme_disable_and_flr }, { PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr }, + { PCI_VENDOR_ID_INTEL, 0x0a54, delay_250ms_after_flr }, { PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, reset_chelsio_generic_dev }, { 0 }