From patchwork Fri Apr 9 15:05:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 12194333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0519C433B4 for ; Fri, 9 Apr 2021 15:08:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 94166610A7 for ; Fri, 9 Apr 2021 15:08:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 94166610A7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53636 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lUskM-0006B5-Kb for qemu-devel@archiver.kernel.org; Fri, 09 Apr 2021 11:08:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60216) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lUshS-0002Zp-B0 for qemu-devel@nongnu.org; Fri, 09 Apr 2021 11:05:34 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:38626) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lUshP-0004Qv-Ry for qemu-devel@nongnu.org; Fri, 09 Apr 2021 11:05:34 -0400 Received: by mail-wr1-x42c.google.com with SMTP id w4so2216638wrt.5 for ; Fri, 09 Apr 2021 08:05:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=ZLG8bwrpw0+l/goPl94UIiaUdFIfsALImfUpgHbYc3M=; b=Dn3GJHLhS9rwcgNusmHMGrbzTyjMON/VJsK32/EmRUYIBaMMRiQ13Pwngspnkb2oVi EmTlvFSyFMR4Zd6Zga6CoCEBPV66JyizLoK4YQPP+FfaR73xtzTwljRlbyBo0ef9fTSe u66xLMFc3uXUqkmVQ/eLa+ftqUUUcBI47V7fkwQ31BG9e0UFFKoit3GBTuTFgZJV9Cri lHzpz3CNHpT2d1hgXFtsOiNvxdbmeL8FI+/6TmPw8fNVxSy7Jb7C4t4GKF9djqASYQ0u OeBdUSstbzxxydIo4juPkPqb63iGRcx81q+f6qkqjJt/evzvNr11o+RkicO5D/t519Vs K9EA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZLG8bwrpw0+l/goPl94UIiaUdFIfsALImfUpgHbYc3M=; b=Zj4ekLDYJjusy5pdI3NUnvMPWFMk5VpJQsEWczDYe1O09CJToZyFcf5Z3woGYWHD7c 2HAX6gsIEVzKklWJNyrSSiGTm3HS1TNtCs0nGY3hUm831pxYXOYInV/djV7q2u6WomOc ij041zZXkB7/j9Vbitsq/u5TZZlEQ5d5FW+O/05n41rxZebEoQZxgR1CzqlxZvXlPGmd /ZPUoqkqxnbh5UtkqQjlFBlzM4zIXAR7SY9S35CppWvynowpJMf1QVWo3c+BTFLM6XrD hKaFdgtB5qfUT56wIdXCPFYfuqgvO2jrxCHAloezWpnMjJ2qkmCUNgHLkPE0vIMazvjk WMjg== X-Gm-Message-State: AOAM531MSQQQHd4CIyvG3h+8uzI9yDdko/H61zkjPDBU+C8TzhBqYPmi BsjlXfAcPVjFnfNCHsiMmpHGhxDi8WKYaY5H X-Google-Smtp-Source: ABdhPJzx3QOfdu0YIw/vkjzXULia26dv2thKa1OaMYX1zc65ao9rvuFZClur3kGq8wpDQ7dGoEcj6g== X-Received: by 2002:adf:ee03:: with SMTP id y3mr17549843wrn.323.1617980730383; Fri, 09 Apr 2021 08:05:30 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id c18sm5048094wrp.33.2021.04.09.08.05.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 08:05:30 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-6.0 1/2] hw/arm/mps2-tz: Fix MPC setting for AN524 SRAM block Date: Fri, 9 Apr 2021 16:05:26 +0100 Message-Id: <20210409150527.15053-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210409150527.15053-1-peter.maydell@linaro.org> References: <20210409150527.15053-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The AN524 has three MPCs: one for the BRAM, one for the QSPI flash, and one for the DDR. We incorrectly set the .mpc field in the RAMInfo struct for the SRAM block to 1, giving it the same MPC we are using for the QSPI. The effect of this was that the QSPI didn't get mapped into the system address space at all, via an MPC or otherwise, and guest programs which tried to read from the QSPI would get a bus error. Correct the SRAM RAMInfo to indicate that it does not have an associated MPC. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/mps2-tz.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 3fbe3d29f95..5ebd671bf83 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -238,7 +238,7 @@ static const RAMInfo an524_raminfo[] = { { .name = "sram", .base = 0x20000000, .size = 32 * 4 * KiB, - .mpc = 1, + .mpc = -1, .mrindex = 1, }, { /* We don't model QSPI flash yet; for now expose it as simple ROM */ From patchwork Fri Apr 9 15:05:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 12194331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CB8DC433ED for ; Fri, 9 Apr 2021 15:07:54 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D351E61056 for ; Fri, 9 Apr 2021 15:07:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D351E61056 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:51618 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lUsjh-0005Bx-0S for qemu-devel@archiver.kernel.org; Fri, 09 Apr 2021 11:07:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60224) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lUshT-0002b2-4n for qemu-devel@nongnu.org; Fri, 09 Apr 2021 11:05:35 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:43837) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lUshR-0004TU-Ed for qemu-devel@nongnu.org; Fri, 09 Apr 2021 11:05:34 -0400 Received: by mail-wr1-x42f.google.com with SMTP id x7so5943629wrw.10 for ; Fri, 09 Apr 2021 08:05:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=reJEPf1Ear5sT/gFdxp/wDkAg24YTHHfbcML4QVdPq8=; b=yxbsFrt4Rh/ZBiGQX4zsAuiagmjzYX5B3PzpupcWwaPlG2bOkU7aFuiP4F5DqOzN7h 7+vih3S/9oQAyLiyZMy61SyVGaLHYfYMM4NGJHFJ/mo+xgFIr4O6v/a3f5TfJm2GdQy9 Rcdat3JtW2lbenyVOtQbZrSFEELq51tMbOjCswh0NbtZBumgUVYP3yP1pqpKbHVOWN74 4SH/PjPTJEXji/PHcV06ceFWN9DdGJxIr1shMNu7Pfn8SX1/zi5uclZs/KVls9cMLN+B NkZK97vyVF6I5eiiQjx2scnl6cRnmcMe9wgJeYv0yRykEgCnXwz3iORYauOzxPOCC/zv +o7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=reJEPf1Ear5sT/gFdxp/wDkAg24YTHHfbcML4QVdPq8=; b=JP53nOdRz8MggrWuQ7EjYcFWsWQCZwmxzURPVTOq/l/HTgnTdOcTfq/4j05J5/i1b4 5+Ynsjirh7o/XakJ0Fk4N/E9M1pqmI0yhoDoXRIsHcd6F4we9dzJPgASYM0stTViHLCT ccDylK65YVljk5iKi5ZPeLmWSeMM/Rx81L5CyKvutGq/+T/Rn2b+qBAMmLEvjUjnkiRf Kfp4FiZuC7W77a9HRt5Fg1n+hEDXz6OjgX3nbv6bF7NOvhRBQ03jnqlKQsn1AvIQrlgM PXcFfB/6hGLvpHhElC058sDWXWcMR1rwXpFRKowNCyDLgJWUf2+CFa46v0SM+aLTrwRg /CXg== X-Gm-Message-State: AOAM530Qk3HVwK/nf4f8ZyOdqte0qSUP2YmJa78xmTWLXAjih7JgVvCV ERT4AS35jfmvx3+t/QiK0KZsxj5lmLSIn9KY X-Google-Smtp-Source: ABdhPJzrnDg7CKpf6ovTGvGILLA+zPR2yCueeO8Ao9cKBPwQfbuyIIY6hlDR9/T01m8Mmcx8aHTQ6w== X-Received: by 2002:a5d:4579:: with SMTP id a25mr9947609wrc.160.1617980732166; Fri, 09 Apr 2021 08:05:32 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id c18sm5048094wrp.33.2021.04.09.08.05.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 08:05:30 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH for-6.0 2/2] hw/arm/mps2-tz: Assert if more than one RAM is attached to an MPC Date: Fri, 9 Apr 2021 16:05:27 +0100 Message-Id: <20210409150527.15053-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210409150527.15053-1-peter.maydell@linaro.org> References: <20210409150527.15053-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Each board in mps2-tz.c specifies a RAMInfo[] array providing information about each RAM in the board. The .mpc field of the RAMInfo struct specifies which MPC, if any, the RAM is attached to. We already assert if the array doesn't have any entry for an MPC, but we don't diagnose the error of using the same MPC number twice (which is quite easy to do by accident if copy-and-pasting structure entries). Enhance find_raminfo_for_mpc() so that it detects multiple entries for the MPC as well as missing entries. Signed-off-by: Peter Maydell --- hw/arm/mps2-tz.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 5ebd671bf83..25016e464d9 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -306,14 +306,18 @@ static const RAMInfo *find_raminfo_for_mpc(MPS2TZMachineState *mms, int mpc) { MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms); const RAMInfo *p; + const RAMInfo *found = NULL; for (p = mmc->raminfo; p->name; p++) { if (p->mpc == mpc && !(p->flags & IS_ALIAS)) { - return p; + /* There should only be one entry in the array for this MPC */ + g_assert(!found); + found = p; } } /* if raminfo array doesn't have an entry for each MPC this is a bug */ - g_assert_not_reached(); + assert(found); + return found; } static MemoryRegion *mr_for_raminfo(MPS2TZMachineState *mms,