From patchwork Fri Apr 9 19:23:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amey Narkhede X-Patchwork-Id: 12194967 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F24AC433ED for ; Fri, 9 Apr 2021 19:25:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 72FB8610C8 for ; Fri, 9 Apr 2021 19:25:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234955AbhDITZL (ORCPT ); Fri, 9 Apr 2021 15:25:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234695AbhDITZL (ORCPT ); Fri, 9 Apr 2021 15:25:11 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AACDC061763; Fri, 9 Apr 2021 12:24:57 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id s7so6541671wru.6; Fri, 09 Apr 2021 12:24:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=saGJ8MOGoMsUyv5kls1YdVGYFyRu0m+lWIn5KG+KbKE=; b=Bf3qXx8McRkiJzeQlYuOimN5oXnsdZnkSA5dPptUOe+H5ck09dUofAMZGLH+yeSf5H BxPJFnQp8A4CQvUARQG/YsgWISZgzTtl7TXrvLMb2EpiqF9sPPH712qZxpE6A7prtybs SyxqRv5JwCLC5E6SCFatnrvTuULQLxyJtpgMlpTI70LmA7hOHysVwBZABRCmb6bGnzh4 1ZtQH+jluZ4o/BhluN4/jtPaTYvDKHrl3lqohyb2bT0NZKMyzCTC2spZ3jdUURDwvgmz iraknqVec+VWGQa3WDTcW6GJb43zOG/tUGr5pDTsSyFWkclWqgGX0b0NBjkjzSHKCI5l Gb4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=saGJ8MOGoMsUyv5kls1YdVGYFyRu0m+lWIn5KG+KbKE=; b=GOC1vW2qlzaXbx9jYIUJgzJeBYhgvfhSeXJVRVuuZNzkf+Sxlcbnf7Kn5DAbUX7+9L 4u/b8e1isxf4zOiXALM8WL0MXqtn5izKgNOAW8upB0zyeWgbPLCGZUW7u+f6tYJKLZ4B 2nyVKbiCVNp1lWUdBHNmBmamN3YxuIu1UKZ4bAPQchnduzPI7F7wFa8Zdj0WtXO1bob8 /5fTAxCcIVOSNnqvNyt9v0MIP6mLIbhrZRknh8jNWW8uHkbXo8J5iS23E9uy2WCCc607 WCA6bvtIAZz6eVH+TdQqj/KXoJq/T56fGkVR9BR0a7N7uEGY/6cy9PThI1KfxT4klEH+ PPPA== X-Gm-Message-State: AOAM531Z0zmGsMJOx/FfIZ+Ea3gFsThoGbHJlVG1ZH/lAO6c5Tyf+HcA 7sv8TM9E8I5U9HXj+TLvkkI= X-Google-Smtp-Source: ABdhPJwSayyyxESgwpcEKZg78pOTgXetdGmwYeTMPx48o3h1qNuAc9AeFQKUiw0eSofr9U/+O6cUMg== X-Received: by 2002:a5d:5308:: with SMTP id e8mr4215921wrv.41.1617996296458; Fri, 09 Apr 2021 12:24:56 -0700 (PDT) Received: from localhost.localdomain ([103.248.31.176]) by smtp.googlemail.com with ESMTPSA id j6sm6618573wru.18.2021.04.09.12.24.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 12:24:56 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, raphael.norwitz@nutanix.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Amey Narkhede Subject: [PATCH v2 1/5] PCI: merge slot and bus reset implementations Date: Sat, 10 Apr 2021 00:53:20 +0530 Message-Id: <20210409192324.30080-2-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210409192324.30080-1-ameynarkhede03@gmail.com> References: <20210409192324.30080-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Raphael Norwitz Slot resets are bus resets with additional logic to prevent a device from being removed during the reset. Currently slot and bus resets have separate implementations in pci.c, complicating higher level logic. As discussed on the mailing list, they should be combined into a generic function which performs an SBR. This change adds a function, pci_reset_bus_function(), which first attempts a slot reset and then attempts a bus reset if -ENOTTY is returned, such that there is now a single device agnostic function to perform an SBR. This new function is also needed to add SBR reset quirks and therefore is exposed in pci.h. Link: https://lkml.org/lkml/2021/3/23/911 Suggested-by: Alex Williamson Signed-off-by: Amey Narkhede Signed-off-by: Raphael Norwitz --- drivers/pci/pci.c | 19 +++++++++++-------- include/linux/pci.h | 1 + 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 16a17215f..a8f8dd588 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4982,6 +4982,15 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe) return pci_reset_hotplug_slot(dev->slot->hotplug, probe); } +int pci_reset_bus_function(struct pci_dev *dev, int probe) +{ + int rc = pci_dev_reset_slot_function(dev, probe); + + if (rc != -ENOTTY) + return rc; + return pci_parent_bus_reset(dev, probe); +} + static void pci_dev_lock(struct pci_dev *dev) { pci_cfg_access_lock(dev); @@ -5102,10 +5111,7 @@ int __pci_reset_function_locked(struct pci_dev *dev) rc = pci_pm_reset(dev, 0); if (rc != -ENOTTY) return rc; - rc = pci_dev_reset_slot_function(dev, 0); - if (rc != -ENOTTY) - return rc; - return pci_parent_bus_reset(dev, 0); + return pci_reset_bus_function(dev, 0); } EXPORT_SYMBOL_GPL(__pci_reset_function_locked); @@ -5135,13 +5141,10 @@ int pci_probe_reset_function(struct pci_dev *dev) if (rc != -ENOTTY) return rc; rc = pci_pm_reset(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_dev_reset_slot_function(dev, 1); if (rc != -ENOTTY) return rc; - return pci_parent_bus_reset(dev, 1); + return pci_reset_bus_function(dev, 1); } /** diff --git a/include/linux/pci.h b/include/linux/pci.h index 86c799c97..979d54335 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1228,6 +1228,7 @@ int pci_probe_reset_bus(struct pci_bus *bus); int pci_reset_bus(struct pci_dev *dev); void pci_reset_secondary_bus(struct pci_dev *dev); void pcibios_reset_secondary_bus(struct pci_dev *dev); +int pci_reset_bus_function(struct pci_dev *dev, int probe); void pci_update_resource(struct pci_dev *dev, int resno); int __must_check pci_assign_resource(struct pci_dev *dev, int i); int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); From patchwork Fri Apr 9 19:23:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amey Narkhede X-Patchwork-Id: 12194969 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B522EC433ED for ; Fri, 9 Apr 2021 19:25:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 88BF361178 for ; Fri, 9 Apr 2021 19:25:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235026AbhDITZT (ORCPT ); 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Fri, 09 Apr 2021 12:25:01 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, raphael.norwitz@nutanix.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Amey Narkhede Subject: [PATCH v2 2/5] PCI: Add pcie_reset_flr to follow calling convention of other reset methods Date: Sat, 10 Apr 2021 00:53:21 +0530 Message-Id: <20210409192324.30080-3-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210409192324.30080-1-ameynarkhede03@gmail.com> References: <20210409192324.30080-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently there is separate function pcie_has_flr to probe if pcie flr is supported by the device which does not match the calling convention followed by reset methods which use second function argument to decide whether to probe or not. Add new function pcie_reset_flr that follows the calling convention of reset methods. Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz Co-developed-by: Alex Williamson Signed-off-by: Alex Williamson Signed-off-by: Amey Narkhede --- drivers/crypto/cavium/nitrox/nitrox_main.c | 4 +- drivers/pci/pci.c | 62 ++++++++++++---------- drivers/pci/pcie/aer.c | 12 ++--- drivers/pci/quirks.c | 9 ++-- include/linux/pci.h | 2 +- 5 files changed, 43 insertions(+), 46 deletions(-) diff --git a/drivers/crypto/cavium/nitrox/nitrox_main.c b/drivers/crypto/cavium/nitrox/nitrox_main.c index facc8e6bc..15d6c8452 100644 --- a/drivers/crypto/cavium/nitrox/nitrox_main.c +++ b/drivers/crypto/cavium/nitrox/nitrox_main.c @@ -306,9 +306,7 @@ static int nitrox_device_flr(struct pci_dev *pdev) return -ENOMEM; } - /* check flr support */ - if (pcie_has_flr(pdev)) - pcie_flr(pdev); + pcie_reset_flr(pdev, 0); pci_restore_state(pdev); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index a8f8dd588..b998d6ad3 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4573,32 +4573,12 @@ int pci_wait_for_pending_transaction(struct pci_dev *dev) } EXPORT_SYMBOL(pci_wait_for_pending_transaction); -/** - * pcie_has_flr - check if a device supports function level resets - * @dev: device to check - * - * Returns true if the device advertises support for PCIe function level - * resets. - */ -bool pcie_has_flr(struct pci_dev *dev) -{ - u32 cap; - - if (dev->dev_flags & PCI_DEV_FLAGS_NO_FLR_RESET) - return false; - - pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap); - return cap & PCI_EXP_DEVCAP_FLR; -} -EXPORT_SYMBOL_GPL(pcie_has_flr); - /** * pcie_flr - initiate a PCIe function level reset * @dev: device to reset * - * Initiate a function level reset on @dev. The caller should ensure the - * device supports FLR before calling this function, e.g. by using the - * pcie_has_flr() helper. + * Initiate a function level reset unconditionally on @dev without + * checking any flags and DEVCAP */ int pcie_flr(struct pci_dev *dev) { @@ -4621,6 +4601,31 @@ int pcie_flr(struct pci_dev *dev) } EXPORT_SYMBOL_GPL(pcie_flr); +/** + * pcie_reset_flr - initiate a PCIe function level reset + * @dev: device to reset + * @probe: If set, only check if the device can be reset this way. + * + * Initiate a function level reset on @dev. + */ +int pcie_reset_flr(struct pci_dev *dev, int probe) +{ + u32 cap; + + if (dev->dev_flags & PCI_DEV_FLAGS_NO_FLR_RESET) + return -ENOTTY; + + pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap); + if (!(cap & PCI_EXP_DEVCAP_FLR)) + return -ENOTTY; + + if (probe) + return 0; + + return pcie_flr(dev); +} +EXPORT_SYMBOL_GPL(pcie_reset_flr); + static int pci_af_flr(struct pci_dev *dev, int probe) { int pos; @@ -5100,11 +5105,9 @@ int __pci_reset_function_locked(struct pci_dev *dev) rc = pci_dev_specific_reset(dev, 0); if (rc != -ENOTTY) return rc; - if (pcie_has_flr(dev)) { - rc = pcie_flr(dev); - if (rc != -ENOTTY) - return rc; - } + rc = pcie_reset_flr(dev, 0); + if (rc != -ENOTTY) + return rc; rc = pci_af_flr(dev, 0); if (rc != -ENOTTY) return rc; @@ -5135,8 +5138,9 @@ int pci_probe_reset_function(struct pci_dev *dev) rc = pci_dev_specific_reset(dev, 1); if (rc != -ENOTTY) return rc; - if (pcie_has_flr(dev)) - return 0; + rc = pcie_reset_flr(dev, 1); + if (rc != -ENOTTY) + return rc; rc = pci_af_flr(dev, 1); if (rc != -ENOTTY) return rc; diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index ba2238834..f4e891bd5 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1405,13 +1405,11 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) } if (type == PCI_EXP_TYPE_RC_EC || type == PCI_EXP_TYPE_RC_END) { - if (pcie_has_flr(dev)) { - rc = pcie_flr(dev); - pci_info(dev, "has been reset (%d)\n", rc); - } else { - pci_info(dev, "not reset (no FLR support)\n"); - rc = -ENOTTY; - } + rc = pcie_reset_flr(dev, 0); + if (!rc) + pci_info(dev, "has been reset\n"); + else + pci_info(dev, "not reset (no FLR support: %d)\n", rc); } else { rc = pci_bus_error_reset(dev); pci_info(dev, "%s Port link has been reset (%d)\n", diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 653660e3b..5318833f3 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3831,7 +3831,7 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) u32 cfg; if (dev->class != PCI_CLASS_STORAGE_EXPRESS || - !pcie_has_flr(dev) || !pci_resource_start(dev, 0)) + pcie_reset_flr(dev, 1) || !pci_resource_start(dev, 0)) return -ENOTTY; if (probe) @@ -3900,13 +3900,10 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) */ static int delay_250ms_after_flr(struct pci_dev *dev, int probe) { - if (!pcie_has_flr(dev)) - return -ENOTTY; + int ret = pcie_reset_flr(dev, probe); if (probe) - return 0; - - pcie_flr(dev); + return ret; msleep(250); diff --git a/include/linux/pci.h b/include/linux/pci.h index 979d54335..8d20e51ab 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1217,7 +1217,7 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev, enum pci_bus_speed *speed, enum pcie_link_width *width); void pcie_print_link_status(struct pci_dev *dev); -bool pcie_has_flr(struct pci_dev *dev); +int pcie_reset_flr(struct pci_dev *dev, int probe); int pcie_flr(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); From patchwork Fri Apr 9 19:23:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amey Narkhede X-Patchwork-Id: 12194971 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E6F4C433ED for ; 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Fri, 09 Apr 2021 12:25:05 -0700 (PDT) Received: from localhost.localdomain ([103.248.31.176]) by smtp.googlemail.com with ESMTPSA id j6sm6618573wru.18.2021.04.09.12.25.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 12:25:05 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, raphael.norwitz@nutanix.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Amey Narkhede Subject: [PATCH v2 3/5] PCI: Add new array for keeping track of ordering of reset methods Date: Sat, 10 Apr 2021 00:53:22 +0530 Message-Id: <20210409192324.30080-4-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210409192324.30080-1-ameynarkhede03@gmail.com> References: <20210409192324.30080-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Introduce a new array reset_methods in struct pci_dev to keep track of reset mechanisms supported by the device and their ordering. Also refactor probing and reset functions to take advantage of calling convention of reset functions. Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz Co-developed-by: Alex Williamson Signed-off-by: Alex Williamson Signed-off-by: Amey Narkhede --- drivers/pci/pci.c | 107 ++++++++++++++++++++++++++------------------ drivers/pci/pci.h | 10 ++++- drivers/pci/probe.c | 5 +-- include/linux/pci.h | 7 +++ 4 files changed, 82 insertions(+), 47 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b998d6ad3..ca46a55c7 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -72,6 +72,14 @@ static void pci_dev_d3_sleep(struct pci_dev *dev) msleep(delay); } +bool pci_reset_supported(struct pci_dev *dev) +{ + u8 null_reset_methods[PCI_RESET_FN_METHODS] = { 0 }; + + return memcmp(null_reset_methods, + dev->reset_methods, PCI_RESET_FN_METHODS); +} + #ifdef CONFIG_PCI_DOMAINS int pci_domains_supported = 1; #endif @@ -5068,6 +5076,19 @@ static void pci_dev_restore(struct pci_dev *dev) err_handler->reset_done(dev); } +/* + * The ordering for functions in pci_reset_fn_methods + * is required for reset_methods byte array defined + * in struct pci_dev + */ +const struct pci_reset_fn_method pci_reset_fn_methods[] = { + { .reset_fn = &pci_dev_specific_reset, .name = "device_specific" }, + { .reset_fn = &pcie_reset_flr, .name = "flr" }, + { .reset_fn = &pci_af_flr, .name = "af_flr" }, + { .reset_fn = &pci_pm_reset, .name = "pm" }, + { .reset_fn = &pci_reset_bus_function, .name = "bus" }, +}; + /** * __pci_reset_function_locked - reset a PCI device function while holding * the @dev mutex lock. @@ -5090,65 +5111,65 @@ static void pci_dev_restore(struct pci_dev *dev) */ int __pci_reset_function_locked(struct pci_dev *dev) { - int rc; + int i, rc = -ENOTTY; + u8 prio; might_sleep(); - /* - * A reset method returns -ENOTTY if it doesn't support this device - * and we should try the next method. - * - * If it returns 0 (success), we're finished. If it returns any - * other error, we're also finished: this indicates that further - * reset mechanisms might be broken on the device. - */ - rc = pci_dev_specific_reset(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pcie_reset_flr(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pci_af_flr(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pci_pm_reset(dev, 0); - if (rc != -ENOTTY) - return rc; - return pci_reset_bus_function(dev, 0); + for (prio = PCI_RESET_FN_METHODS; prio; prio--) { + for (i = 0; i < PCI_RESET_FN_METHODS; i++) { + if (dev->reset_methods[i] == prio) { + /* + * A reset method returns -ENOTTY if it doesn't support this device + * and we should try the next method. + * + * If it returns 0 (success), we're finished. If it returns any + * other error, we're also finished: this indicates that further + * reset mechanisms might be broken on the device. + */ + rc = pci_reset_fn_methods[i].reset_fn(dev, 0); + if (rc != -ENOTTY) + return rc; + break; + } + } + if (i == PCI_RESET_FN_METHODS) + break; + } + return rc; } EXPORT_SYMBOL_GPL(__pci_reset_function_locked); /** - * pci_probe_reset_function - check whether the device can be safely reset - * @dev: PCI device to reset + * pci_init_reset_methods - check whether device can be safely reset + * and store supported reset mechanisms. + * @dev: PCI device to check for reset mechanisms * * Some devices allow an individual function to be reset without affecting * other functions in the same device. The PCI device must be responsive - * to PCI config space in order to use this function. + * to reads and writes to its PCI config space in order to use this function. * - * Returns 0 if the device function can be reset or negative if the - * device doesn't support resetting a single function. + * Stores reset mechanisms supported by device in reset_methods byte array + * which is a member of struct pci_dev */ -int pci_probe_reset_function(struct pci_dev *dev) +void pci_init_reset_methods(struct pci_dev *dev) { - int rc; + int i, rc; + u8 prio = PCI_RESET_FN_METHODS; + u8 reset_methods[PCI_RESET_FN_METHODS] = { 0 }; - might_sleep(); + BUILD_BUG_ON(ARRAY_SIZE(pci_reset_fn_methods) != PCI_RESET_FN_METHODS); - rc = pci_dev_specific_reset(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pcie_reset_flr(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_af_flr(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_pm_reset(dev, 1); - if (rc != -ENOTTY) - return rc; + might_sleep(); - return pci_reset_bus_function(dev, 1); + for (i = 0; i < PCI_RESET_FN_METHODS; i++) { + rc = pci_reset_fn_methods[i].reset_fn(dev, 1); + if (!rc) + reset_methods[i] = prio--; + else if (rc != -ENOTTY) + break; + } + memcpy(dev->reset_methods, reset_methods, sizeof(reset_methods)); } /** diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index ef7c46613..61d09e4dd 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -39,7 +39,7 @@ enum pci_mmap_api { int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, enum pci_mmap_api mmap_api); -int pci_probe_reset_function(struct pci_dev *dev); +void pci_init_reset_methods(struct pci_dev *dev); int pci_bridge_secondary_bus_reset(struct pci_dev *dev); int pci_bus_error_reset(struct pci_dev *dev); @@ -612,6 +612,14 @@ struct pci_dev_reset_methods { int (*reset)(struct pci_dev *dev, int probe); }; +typedef int (*pci_reset_fn_t)(struct pci_dev *, int); + +struct pci_reset_fn_method { + pci_reset_fn_t reset_fn; + char *name; +}; + +extern const struct pci_reset_fn_method pci_reset_fn_methods[]; #ifdef CONFIG_PCI_QUIRKS int pci_dev_specific_reset(struct pci_dev *dev, int probe); #else diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 953f15abc..c5cfdd239 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2403,9 +2403,8 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_rcec_init(dev); /* Root Complex Event Collector */ pcie_report_downtraining(dev); - - if (pci_probe_reset_function(dev) == 0) - dev->reset_fn = 1; + pci_init_reset_methods(dev); + dev->reset_fn = pci_reset_supported(dev); } /* diff --git a/include/linux/pci.h b/include/linux/pci.h index 8d20e51ab..5c5925ecf 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -49,6 +49,8 @@ PCI_STATUS_SIG_TARGET_ABORT | \ PCI_STATUS_PARITY) +#define PCI_RESET_FN_METHODS 5 + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded @@ -506,6 +508,10 @@ struct pci_dev { char *driver_override; /* Driver name to force a match */ unsigned long priv_flags; /* Private flags for the PCI driver */ + /* + * See pci_reset_fn_methods array in pci.c for ordering + */ + u8 reset_methods[PCI_RESET_FN_METHODS]; /* Array for storing ordering of reset methods */ }; static inline struct pci_dev *pci_physfn(struct pci_dev *dev) @@ -1219,6 +1225,7 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev, void pcie_print_link_status(struct pci_dev *dev); int pcie_reset_flr(struct pci_dev *dev, int probe); int pcie_flr(struct pci_dev *dev); +bool pci_reset_supported(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); int pci_reset_function_locked(struct pci_dev *dev); From patchwork Fri Apr 9 19:23:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amey Narkhede X-Patchwork-Id: 12194973 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E857C433B4 for ; Fri, 9 Apr 2021 19:25:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 260DF61182 for ; Fri, 9 Apr 2021 19:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235058AbhDITZ3 (ORCPT ); Fri, 9 Apr 2021 15:25:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235051AbhDITZ0 (ORCPT ); Fri, 9 Apr 2021 15:25:26 -0400 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78BD4C061762; Fri, 9 Apr 2021 12:25:12 -0700 (PDT) Received: by mail-wr1-x42f.google.com with SMTP id q26so6647632wrz.9; Fri, 09 Apr 2021 12:25:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=j3+Y0zXhw6oRbh1m+BJ3zWP7Qr31tk01wHFVmcRZ4wE=; b=mkQSThEZfyeAPw06c7DMzM5EEgibhy4V9KCNpQCte2cTJc6YpLNFBJjL6L0X7a75yL 4cjtkHzDUlDlIx0HuQzG57PmIgvAhAw8x17eWVyRMfbSJZzZJivOPxDKmiLRtCZ+6tL8 eEhloqeTUzquHW7A8jwkAx0ssutjAfzZsUt0Oj6m04xj8kSWl7XrnckjgHUyKJN54db+ CxqgqMmdROZMknWJoqH0ot2F3H9NYoyfQwrNTMXG3rmkn6aRyOAVs2DMtT8zqUNJJr+U mfGD4W5dLAVW5xI7omqDAdfVLrYCdU7ULPpI9Fwp1IJadOy4H6gmx3KpLDaerGg5DQ+F DP8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=j3+Y0zXhw6oRbh1m+BJ3zWP7Qr31tk01wHFVmcRZ4wE=; b=KnZAtDm8NO1+tTzZ6v1YHQyCpkB/D6Ia5+OoEEAD8r4lcw2qyKmwyDV2VMffUsZQDJ 9eZZNhnwBp0tNtU0FHFL+V0GCj9g85j6/EFRiquSzMyPKLV7VBkN4YmsIXAUifG/ejT8 LdPPXD1fiTFlxCsM87UkTL0smiWPMeEx0nP+NY7PXM3MxsXnCA7WhMSP/YWImfeQhrYK cRLU5UoL9fsb94ywUpeQX3MfIvcbL8wLSkxlf3Db7qqybIetd+SgSvNQYEORcE2YXTM2 YMcyZqLRlrId6iqLMlA1v7BuZz0yZhvDARAGE7pk6c1QtRCKhtr8XRFzpOaL7rO5sXEs +P7Q== X-Gm-Message-State: AOAM531Vnqx0y9phEriYU5xGB0vppFBpn+NJTqe2jCpnjsPYvS9hOIOW GX7WdrpjSNED4NA86CVduLY= X-Google-Smtp-Source: ABdhPJwUr1d7mwgqrnSmxAZgy3rcozEGbA8mSu6OKy7mdU9+MeyjfnBBix2fO98wLrRBJuIfqYZkGw== X-Received: by 2002:adf:f40f:: with SMTP id g15mr2274414wro.46.1617996311306; Fri, 09 Apr 2021 12:25:11 -0700 (PDT) Received: from localhost.localdomain ([103.248.31.176]) by smtp.googlemail.com with ESMTPSA id j6sm6618573wru.18.2021.04.09.12.25.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 12:25:11 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, raphael.norwitz@nutanix.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Amey Narkhede Subject: [PATCH v2 4/5] PCI: Remove reset_fn field from pci_dev Date: Sat, 10 Apr 2021 00:53:23 +0530 Message-Id: <20210409192324.30080-5-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210409192324.30080-1-ameynarkhede03@gmail.com> References: <20210409192324.30080-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org reset_fn field is used to indicate whether the device supports any reset mechanism or not. Deprecate use of reset_fn in favor of new reset_methods array which can be used to keep track of all supported reset mechanisms of a device and their ordering. The octeon driver is incorrectly using reset_fn field to detect if the device supports FLR or not. Use pcie_reset_flr to probe whether it supports FLR or not. Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz Co-developed-by: Alex Williamson Signed-off-by: Alex Williamson Signed-off-by: Amey Narkhede --- drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 2 +- drivers/pci/pci-sysfs.c | 6 ++---- drivers/pci/pci.c | 6 +++--- drivers/pci/probe.c | 1 - drivers/pci/quirks.c | 2 +- include/linux/pci.h | 1 - 6 files changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c index 516f166ce..336d149ee 100644 --- a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c +++ b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c @@ -526,7 +526,7 @@ static void octeon_destroy_resources(struct octeon_device *oct) oct->irq_name_storage = NULL; } /* Soft reset the octeon device before exiting */ - if (oct->pci_dev->reset_fn) + if (!pcie_reset_flr(oct->pci_dev, 1)) octeon_pci_flr(oct); else cn23xx_vf_ask_pf_to_do_flr(oct); diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index f8afd54ca..388895099 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -1334,7 +1334,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev) pcie_vpd_create_sysfs_dev_files(dev); - if (dev->reset_fn) { + if (pci_reset_supported(dev)) { retval = device_create_file(&dev->dev, &dev_attr_reset); if (retval) goto error; @@ -1417,10 +1417,8 @@ int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) static void pci_remove_capabilities_sysfs(struct pci_dev *dev) { pcie_vpd_remove_sysfs_dev_files(dev); - if (dev->reset_fn) { + if (pci_reset_supported(dev)) device_remove_file(&dev->dev, &dev_attr_reset); - dev->reset_fn = 0; - } } /** diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index ca46a55c7..664cf2d35 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5192,7 +5192,7 @@ int pci_reset_function(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!pci_reset_supported(dev)) return -ENOTTY; pci_dev_lock(dev); @@ -5228,7 +5228,7 @@ int pci_reset_function_locked(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!pci_reset_supported(dev)) return -ENOTTY; pci_dev_save_and_disable(dev); @@ -5251,7 +5251,7 @@ int pci_try_reset_function(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!pci_reset_supported(dev)) return -ENOTTY; if (!pci_dev_trylock(dev)) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index c5cfdd239..4764e031a 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2404,7 +2404,6 @@ static void pci_init_capabilities(struct pci_dev *dev) pcie_report_downtraining(dev); pci_init_reset_methods(dev); - dev->reset_fn = pci_reset_supported(dev); } /* diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 5318833f3..8f47d139c 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5535,7 +5535,7 @@ static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev) if (pdev->subsystem_vendor != PCI_VENDOR_ID_LENOVO || pdev->subsystem_device != 0x222e || - !pdev->reset_fn) + !pci_reset_supported(pdev)) return; if (pci_enable_device_mem(pdev)) diff --git a/include/linux/pci.h b/include/linux/pci.h index 5c5925ecf..9f8347799 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -429,7 +429,6 @@ struct pci_dev { unsigned int state_saved:1; unsigned int is_physfn:1; unsigned int is_virtfn:1; - unsigned int reset_fn:1; unsigned int is_hotplug_bridge:1; unsigned int shpc_managed:1; /* SHPC owned by shpchp */ unsigned int is_thunderbolt:1; /* Thunderbolt controller */ From patchwork Fri Apr 9 19:23:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amey Narkhede X-Patchwork-Id: 12194975 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 796FFC433ED for ; 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Fri, 09 Apr 2021 12:25:15 -0700 (PDT) Received: from localhost.localdomain ([103.248.31.176]) by smtp.googlemail.com with ESMTPSA id j6sm6618573wru.18.2021.04.09.12.25.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 12:25:15 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, raphael.norwitz@nutanix.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Amey Narkhede Subject: [PATCH v2 5/5] PCI/sysfs: Allow userspace to query and set device reset mechanism Date: Sat, 10 Apr 2021 00:53:24 +0530 Message-Id: <20210409192324.30080-6-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210409192324.30080-1-ameynarkhede03@gmail.com> References: <20210409192324.30080-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add reset_method sysfs attribute to enable user to query and set user preferred device reset methods and their ordering. Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz Co-developed-by: Alex Williamson Signed-off-by: Alex Williamson Signed-off-by: Amey Narkhede --- Documentation/ABI/testing/sysfs-bus-pci | 16 +++++ drivers/pci/pci-sysfs.c | 91 ++++++++++++++++++++++++- 2 files changed, 104 insertions(+), 3 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index 25c9c3977..36fba7ebf 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -121,6 +121,22 @@ Description: child buses, and re-discover devices removed earlier from this part of the device tree. +What: /sys/bus/pci/devices/.../reset_method +Date: March 2021 +Contact: Amey Narkhede +Description: + Some devices allow an individual function to be reset + without affecting other functions in the same slot. + For devices that have this support, a file named reset_method + will be present in sysfs. Reading this file will give names + of the device supported reset methods and their ordering. + Writing the name or comma separated list of names of any of + the device supported reset methods to this file will set the + reset methods and their ordering to be used when resetting + the device. Writing empty string to this file will disable + ability to reset the device and writing "default" will return + to the original value. + What: /sys/bus/pci/devices/.../reset Date: July 2009 Contact: Michael S. Tsirkin diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 388895099..cf2f66270 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -1304,6 +1304,84 @@ static const struct bin_attribute pcie_config_attr = { .write = pci_write_config, }; +static ssize_t reset_method_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct pci_dev *pdev = to_pci_dev(dev); + ssize_t len = 0; + int i, prio; + + for (prio = PCI_RESET_FN_METHODS; prio; prio--) { + for (i = 0; i < PCI_RESET_FN_METHODS; i++) { + if (prio == pdev->reset_methods[i]) { + len += sysfs_emit_at(buf, len, "%s%s", + len ? "," : "", + pci_reset_fn_methods[i].name); + break; + } + } + + if (i == PCI_RESET_FN_METHODS) + break; + } + + return len; +} + +static ssize_t reset_method_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + u8 reset_methods[PCI_RESET_FN_METHODS]; + struct pci_dev *pdev = to_pci_dev(dev); + u8 prio = PCI_RESET_FN_METHODS; + char *name; + int i; + + /* + * Initialize reset_method such that 0xff indicates + * supported but not currently enabled reset methods + * as we only use priority values which are within + * the range of PCI_RESET_FN_METHODS array size + */ + for (i = 0; i < PCI_RESET_FN_METHODS; i++) + reset_methods[i] = pdev->reset_methods[i] ? 0xff : 0; + + if (sysfs_streq(buf, "")) { + pci_warn(pdev, "All device reset methods disabled by user"); + goto set_reset_methods; + } + + if (sysfs_streq(buf, "default")) { + for (i = 0; i < PCI_RESET_FN_METHODS; i++) + reset_methods[i] = reset_methods[i] ? prio-- : 0; + goto set_reset_methods; + } + + while ((name = strsep((char **)&buf, ",")) != NULL) { + for (i = 0; i < PCI_RESET_FN_METHODS; i++) { + if (reset_methods[i] && + sysfs_streq(name, pci_reset_fn_methods[i].name)) { + reset_methods[i] = prio--; + break; + } + } + if (i == PCI_RESET_FN_METHODS) + return -EINVAL; + } + + if (reset_methods[0] && + reset_methods[0] != PCI_RESET_FN_METHODS) + pci_warn(pdev, "Device specific reset disabled/de-prioritized by user"); + +set_reset_methods: + memcpy(pdev->reset_methods, reset_methods, sizeof(reset_methods)); + return count; +} + +static DEVICE_ATTR_RW(reset_method); + static ssize_t reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { @@ -1337,11 +1415,16 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev) if (pci_reset_supported(dev)) { retval = device_create_file(&dev->dev, &dev_attr_reset); if (retval) - goto error; + goto err_reset; + retval = device_create_file(&dev->dev, &dev_attr_reset_method); + if (retval) + goto err_method; } return 0; -error: +err_method: + device_remove_file(&dev->dev, &dev_attr_reset); +err_reset: pcie_vpd_remove_sysfs_dev_files(dev); return retval; } @@ -1417,8 +1500,10 @@ int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) static void pci_remove_capabilities_sysfs(struct pci_dev *dev) { pcie_vpd_remove_sysfs_dev_files(dev); - if (pci_reset_supported(dev)) + if (pci_reset_supported(dev)) { device_remove_file(&dev->dev, &dev_attr_reset); + device_remove_file(&dev->dev, &dev_attr_reset_method); + } } /**