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Thu, 22 Apr 2021 04:10:10 -0700 (PDT) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:daa5:b736:ed85:e08d]) by smtp.gmail.com with ESMTPSA id 1sm2004045pjx.46.2021.04.22.04.10.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Apr 2021 04:10:10 -0700 (PDT) From: Hsin-Yi Wang To: Chun-Kuang Hu Cc: Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , Dennis YC Hsieh , Jassi Brar , CK Hu , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/mediatek: clear pending flag when cmdq packet is done. Date: Thu, 22 Apr 2021 19:10:04 +0800 Message-Id: <20210422111004.1338867-1-hsinyi@chromium.org> X-Mailer: git-send-email 2.31.1.498.g6c1eba8ee3d-goog MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210422_041012_470503_C0999E94 X-CRM114-Status: GOOD ( 16.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: CK Hu In cmdq mode, packet may be flushed before it is executed, so the pending flag should be cleared after cmdq packet is done. Signed-off-by: CK Hu Signed-off-by: Hsin-Yi Wang --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 56 +++++++++++++++++++++--- include/linux/mailbox/mtk-cmdq-mailbox.h | 1 + 2 files changed, 51 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index 40df2c823187..051bf0eb00d3 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -224,6 +224,45 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc, #if IS_REACHABLE(CONFIG_MTK_CMDQ) static void ddp_cmdq_cb(struct cmdq_cb_data data) { + struct cmdq_pkt *pkt = (struct cmdq_pkt *)data.data; + struct mtk_drm_crtc *mtk_crtc = (struct mtk_drm_crtc *)pkt->crtc; + struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); + unsigned int i; + + if (data.sta == CMDQ_CB_ERROR) + goto destroy_pkt; + + if (state->pending_config) { + state->pending_config = false; + } + + if (mtk_crtc->pending_planes) { + for (i = 0; i < mtk_crtc->layer_nr; i++) { + struct drm_plane *plane = &mtk_crtc->planes[i]; + struct mtk_plane_state *plane_state; + + plane_state = to_mtk_plane_state(plane->state); + + if (plane_state->pending.config) + plane_state->pending.config = false; + } + mtk_crtc->pending_planes = false; + } + + if (mtk_crtc->pending_async_planes) { + for (i = 0; i < mtk_crtc->layer_nr; i++) { + struct drm_plane *plane = &mtk_crtc->planes[i]; + struct mtk_plane_state *plane_state; + + plane_state = to_mtk_plane_state(plane->state); + + if (plane_state->pending.async_config) + plane_state->pending.async_config = false; + } + mtk_crtc->pending_async_planes = false; + } + +destroy_pkt: cmdq_pkt_destroy(data.data); } #endif @@ -377,8 +416,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, state->pending_height, state->pending_vrefresh, 0, cmdq_handle); - - state->pending_config = false; + if (!cmdq_handle) + state->pending_config = false; } if (mtk_crtc->pending_planes) { @@ -398,9 +437,11 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, mtk_ddp_comp_layer_config(comp, local_layer, plane_state, cmdq_handle); - plane_state->pending.config = false; + if (!cmdq_handle) + plane_state->pending.config = false; } - mtk_crtc->pending_planes = false; + if (!cmdq_handle) + mtk_crtc->pending_planes = false; } if (mtk_crtc->pending_async_planes) { @@ -420,9 +461,11 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc, mtk_ddp_comp_layer_config(comp, local_layer, plane_state, cmdq_handle); - plane_state->pending.async_config = false; + if (!cmdq_handle) + plane_state->pending.async_config = false; } - mtk_crtc->pending_async_planes = false; + if (!cmdq_handle) + mtk_crtc->pending_async_planes = false; } } @@ -475,6 +518,7 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc, cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false); mtk_crtc_ddp_config(crtc, cmdq_handle); cmdq_pkt_finalize(cmdq_handle); + cmdq_handle->crtc = mtk_crtc; cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle); } #endif diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h index d5a983d65f05..c06b14ec03e5 100644 --- a/include/linux/mailbox/mtk-cmdq-mailbox.h +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h @@ -90,6 +90,7 @@ struct cmdq_pkt { struct cmdq_task_cb cb; struct cmdq_task_cb async_cb; void *cl; + void *crtc; }; u8 cmdq_get_shift_pa(struct mbox_chan *chan);