From patchwork Fri Apr 23 09:51:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 843BAC433B4 for ; Fri, 23 Apr 2021 09:54:35 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 32044613E4 for ; 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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsTl-00EIdI-GE for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:06 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7F48513A1; Fri, 23 Apr 2021 02:52:03 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DB7363F774; Fri, 23 Apr 2021 02:51:58 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam , Alex Williamson , Lorenzo Pieralisi Subject: [PATCH RFC v1 01/11] uapi/virtio-iommu: Add page request grp-id and flags information Date: Fri, 23 Apr 2021 15:21:37 +0530 Message-Id: <20210423095147.27922-2-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025205_601288_9998FF3D X-CRM114-Status: GOOD ( 10.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add fault information for group-id and necessary flags for page request faults that can be handled by page fault handler in virtio-iommu driver. Signed-off-by: Vivek Gautam Cc: Joerg Roedel Cc: Will Deacon Cc: Robin Murphy Cc: Jean-Philippe Brucker Cc: Eric Auger Cc: Alex Williamson Cc: Kevin Tian Cc: Jacob Pan Cc: Liu Yi L Cc: Lorenzo Pieralisi Cc: Shameerali Kolothum Thodi --- include/uapi/linux/virtio_iommu.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/uapi/linux/virtio_iommu.h b/include/uapi/linux/virtio_iommu.h index f8bf927a0689..accc3318ce46 100644 --- a/include/uapi/linux/virtio_iommu.h +++ b/include/uapi/linux/virtio_iommu.h @@ -307,14 +307,27 @@ struct virtio_iommu_req_invalidate { #define VIRTIO_IOMMU_FAULT_F_DMA_UNRECOV 1 #define VIRTIO_IOMMU_FAULT_F_PAGE_REQ 2 +#define VIRTIO_IOMMU_FAULT_PRQ_F_PASID_VALID (1 << 0) +#define VIRTIO_IOMMU_FAULT_PRQ_F_LAST_PAGE (1 << 1) +#define VIRTIO_IOMMU_FAULT_PRQ_F_PRIV_DATA (1 << 2) +#define VIRTIO_IOMMU_FAULT_PRQ_F_NEEDS_PASID (1 << 3) + +#define VIRTIO_IOMMU_FAULT_UNREC_F_PASID_VALID (1 << 0) +#define VIRTIO_IOMMU_FAULT_UNREC_F_ADDR_VALID (1 << 1) +#define VIRTIO_IOMMU_FAULT_UNREC_F_FETCH_ADDR_VALID (1 << 2) + struct virtio_iommu_fault { __u8 reason; __u8 reserved[3]; __le16 flt_type; __u8 reserved2[2]; + /* flags is actually permission flags */ __le32 flags; + /* flags for PASID and Page request handling info */ + __le32 pr_evt_flags; __le32 endpoint; __le32 pasid; + __le32 grpid; __u8 reserved3[4]; __le64 address; __u8 reserved4[8]; From patchwork Fri Apr 23 09:51:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4717AC433B4 for ; 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bh=VfSv4MWF12y0vhQM1fGd3LxjoQRwi+VYCLvx5pmW68g=; b=AbwVkV4hhM+B5I7yUEW9BQdgVc TfwreSWqiVU0R2Td8K56NWXoBp/43+OVSCKuK5jX8xscFmAUps4ZE7EjasZtUIZDnnDYSFWpGEjTM 7UenX8Yb1b2/ugxC6GjnG1/ZFU+BQeG26P1X4MNwiiRSTLL+0UMjsXcwm8nL/QIjTGebncmm8jFw5 +eFG9XYKfALNXG1vBuLin6h9blmnnWhs8JKOb154g6kE0glWV2tOya6dpOjBE2MZohXenj4hAq8Sx BoNCrax5d2SlR/c0NODMcaEctP3FPSO8SQl5rf4nsEZabbVfeu+SlXQcUGIVSTixfhfIJqNopz7aA 4HZogRBw==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsTq-00EIe0-Bp for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:11 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1FAEE1474; Fri, 23 Apr 2021 02:52:08 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EBF283F774; Fri, 23 Apr 2021 02:52:03 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 02/11] iommu/virtio: Maintain a list of endpoints served by viommu_dev Date: Fri, 23 Apr 2021 15:21:38 +0530 Message-Id: <20210423095147.27922-3-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025210_481618_2DDCE6E0 X-CRM114-Status: GOOD ( 11.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Keeping a record of list of endpoints that are served by the virtio-iommu device would help in redirecting the requests of page faults to the correct endpoint device to handle such requests. Signed-off-by: Vivek Gautam --- drivers/iommu/virtio-iommu.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 50039070e2aa..c970f386f031 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -48,6 +48,7 @@ struct viommu_dev { spinlock_t request_lock; struct list_head requests; void *evts; + struct list_head endpoints; /* Device configuration */ struct iommu_domain_geometry geometry; @@ -115,6 +116,12 @@ struct viommu_endpoint { void *pgtf; }; +struct viommu_ep_entry { + u32 eid; + struct viommu_endpoint *vdev; + struct list_head list; +}; + struct viommu_request { struct list_head list; void *writeback; @@ -573,6 +580,7 @@ static int viommu_probe_endpoint(struct viommu_dev *viommu, struct device *dev) size_t probe_len; struct virtio_iommu_req_probe *probe; struct virtio_iommu_probe_property *prop; + struct viommu_ep_entry *ep; struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct viommu_endpoint *vdev = dev_iommu_priv_get(dev); @@ -640,6 +648,18 @@ static int viommu_probe_endpoint(struct viommu_dev *viommu, struct device *dev) prop = (void *)probe->properties + cur; type = le16_to_cpu(prop->type) & VIRTIO_IOMMU_PROBE_T_MASK; } + if (ret) + goto out_free; + + ep = kzalloc(sizeof(*ep), GFP_KERNEL); + if (!ep) { + ret = -ENOMEM; + goto out_free; + } + ep->eid = probe->endpoint; + ep->vdev = vdev; + + list_add(&ep->list, &viommu->endpoints); out_free: kfree(probe); @@ -1649,6 +1669,7 @@ static int viommu_probe(struct virtio_device *vdev) viommu->dev = dev; viommu->vdev = vdev; INIT_LIST_HEAD(&viommu->requests); + INIT_LIST_HEAD(&viommu->endpoints); ret = viommu_init_vqs(viommu); if (ret) From patchwork Fri Apr 23 09:51:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3473C433ED for ; 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bh=NNPPPqB2c/dEC57x6zUAiv6Ja2LQ/amPOhojqqQaohs=; b=R66NxxKfhuCggoHPrWJTd6OgOh mFGwQ40u4mg5Ap4Z0E2cxAhr6xEKU+YZW0YqXTbMmucYsQ2DPmb0FSXGcsxyNoF/mwUpo9+HpG2Px vZqaSCLpBknXgdWowkCyW2ugfklYw2cSXTIgN4cufN3Osg8ECNo5eu4QdpcpBKYbLhROB+SZ3EXZm yQH4ubWFRKPTeRqsbYxYMRecrkV0lqKmMkuL5w88iCThZ8IVpRRB8atqTuVs6KYWdrfHNqScu+bmY PopYBrjtFbc9m+ejO5fjax3xGFgMUjsQTRt658ZxexF6xaQDt+S5w3i8UJsyUIDk/0smyeQa0HAYy 95XoxouQ==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsTu-00EIfT-Ek for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B3D45152B; Fri, 23 Apr 2021 02:52:12 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8C3533F774; Fri, 23 Apr 2021 02:52:08 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 03/11] iommu/virtio: Handle incoming page faults Date: Fri, 23 Apr 2021 15:21:39 +0530 Message-Id: <20210423095147.27922-4-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025214_608031_814F2F67 X-CRM114-Status: GOOD ( 15.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Redirect the incoming page faults to the registered fault handler that can take the fault information such as, pasid, page request group-id, address and pasid flags. Signed-off-by: Vivek Gautam --- drivers/iommu/virtio-iommu.c | 80 ++++++++++++++++++++++++++++++- include/uapi/linux/virtio_iommu.h | 1 + 2 files changed, 80 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index c970f386f031..fd237cad1ce5 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -37,6 +37,13 @@ /* Some architectures need an Address Space ID for each page table */ DEFINE_XARRAY_ALLOC1(viommu_asid_xa); +struct viommu_dev_pri_work { + struct work_struct work; + struct viommu_dev *dev; + struct virtio_iommu_fault *vfault; + u32 endpoint; +}; + struct viommu_dev { struct iommu_device iommu; struct device *dev; @@ -49,6 +56,8 @@ struct viommu_dev { struct list_head requests; void *evts; struct list_head endpoints; + struct workqueue_struct *pri_wq; + struct viommu_dev_pri_work *pri_work; /* Device configuration */ struct iommu_domain_geometry geometry; @@ -666,6 +675,58 @@ static int viommu_probe_endpoint(struct viommu_dev *viommu, struct device *dev) return ret; } +static void viommu_handle_ppr(struct work_struct *work) +{ + struct viommu_dev_pri_work *pwork = + container_of(work, struct viommu_dev_pri_work, work); + struct viommu_dev *viommu = pwork->dev; + struct virtio_iommu_fault *vfault = pwork->vfault; + struct viommu_endpoint *vdev; + struct viommu_ep_entry *ep; + struct iommu_fault_event fault_evt = { + .fault.type = IOMMU_FAULT_PAGE_REQ, + }; + struct iommu_fault_page_request *prq = &fault_evt.fault.prm; + + u32 flags = le32_to_cpu(vfault->flags); + u32 prq_flags = le32_to_cpu(vfault->pr_evt_flags); + u32 endpoint = pwork->endpoint; + + memset(prq, 0, sizeof(struct iommu_fault_page_request)); + prq->addr = le64_to_cpu(vfault->address); + + if (prq_flags & VIRTIO_IOMMU_FAULT_PRQ_F_LAST_PAGE) + prq->flags |= IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE; + if (prq_flags & VIRTIO_IOMMU_FAULT_PRQ_F_PASID_VALID) { + prq->flags |= IOMMU_FAULT_PAGE_REQUEST_PASID_VALID; + prq->pasid = le32_to_cpu(vfault->pasid); + prq->grpid = le32_to_cpu(vfault->grpid); + } + + if (flags & VIRTIO_IOMMU_FAULT_F_READ) + prq->perm |= IOMMU_FAULT_PERM_READ; + if (flags & VIRTIO_IOMMU_FAULT_F_WRITE) + prq->perm |= IOMMU_FAULT_PERM_WRITE; + if (flags & VIRTIO_IOMMU_FAULT_F_EXEC) + prq->perm |= IOMMU_FAULT_PERM_EXEC; + if (flags & VIRTIO_IOMMU_FAULT_F_PRIV) + prq->perm |= IOMMU_FAULT_PERM_PRIV; + + list_for_each_entry(ep, &viommu->endpoints, list) { + if (ep->eid == endpoint) { + vdev = ep->vdev; + break; + } + } + + if ((prq_flags & VIRTIO_IOMMU_FAULT_PRQ_F_PASID_VALID) && + (prq_flags & VIRTIO_IOMMU_FAULT_PRQ_F_NEEDS_PASID)) + prq->flags |= IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID; + + if (iommu_report_device_fault(vdev->dev, &fault_evt)) + dev_err(vdev->dev, "Couldn't handle page request\n"); +} + static int viommu_fault_handler(struct viommu_dev *viommu, struct virtio_iommu_fault *fault) { @@ -679,7 +740,13 @@ static int viommu_fault_handler(struct viommu_dev *viommu, u32 pasid = le32_to_cpu(fault->pasid); if (type == VIRTIO_IOMMU_FAULT_F_PAGE_REQ) { - dev_info(viommu->dev, "Page request fault - unhandled\n"); + dev_info_ratelimited(viommu->dev, + "Page request fault from EP %u\n", + endpoint); + + viommu->pri_work->vfault = fault; + viommu->pri_work->endpoint = endpoint; + queue_work(viommu->pri_wq, &viommu->pri_work->work); return 0; } @@ -1683,6 +1750,17 @@ static int viommu_probe(struct virtio_device *vdev) goto err_free_vqs; } + viommu->pri_work = kzalloc(sizeof(*viommu->pri_work), GFP_KERNEL); + if (!viommu->pri_work) + return -ENOMEM; + + viommu->pri_work->dev = viommu; + + INIT_WORK(&viommu->pri_work->work, viommu_handle_ppr); + viommu->pri_wq = create_singlethread_workqueue("viommu-pri-wq"); + if (!viommu->pri_wq) + return -ENOMEM; + viommu->map_flags = VIRTIO_IOMMU_MAP_F_READ | VIRTIO_IOMMU_MAP_F_WRITE; viommu->last_domain = ~0U; diff --git a/include/uapi/linux/virtio_iommu.h b/include/uapi/linux/virtio_iommu.h index accc3318ce46..53aa88e6b077 100644 --- a/include/uapi/linux/virtio_iommu.h +++ b/include/uapi/linux/virtio_iommu.h @@ -302,6 +302,7 @@ struct virtio_iommu_req_invalidate { #define VIRTIO_IOMMU_FAULT_F_READ (1 << 0) #define VIRTIO_IOMMU_FAULT_F_WRITE (1 << 1) #define VIRTIO_IOMMU_FAULT_F_EXEC (1 << 2) +#define VIRTIO_IOMMU_FAULT_F_PRIV (1 << 3) #define VIRTIO_IOMMU_FAULT_F_ADDRESS (1 << 8) #define VIRTIO_IOMMU_FAULT_F_DMA_UNRECOV 1 From patchwork Fri Apr 23 09:51:40 2021 Content-Type: text/plain; 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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsTy-00EIfw-Nv for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 542591596; Fri, 23 Apr 2021 02:52:17 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2C41B3F774; Fri, 23 Apr 2021 02:52:12 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 04/11] iommu/virtio: Add a io page fault queue Date: Fri, 23 Apr 2021 15:21:40 +0530 Message-Id: <20210423095147.27922-5-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025218_845980_5E9FCC56 X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a io page fault queue to the driver so that it can be used to redirect faults to the handler. Signed-off-by: Vivek Gautam --- drivers/iommu/virtio-iommu.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index fd237cad1ce5..3da5f0807711 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -58,6 +58,7 @@ struct viommu_dev { struct list_head endpoints; struct workqueue_struct *pri_wq; struct viommu_dev_pri_work *pri_work; + struct iopf_queue *iopf_pri; /* Device configuration */ struct iommu_domain_geometry geometry; @@ -581,6 +582,15 @@ static int viommu_add_pstf(struct viommu_endpoint *vdev, void *pstf, size_t len) return 0; } +static int viommu_init_queues(struct viommu_dev *viommu) +{ + viommu->iopf_pri = iopf_queue_alloc(dev_name(viommu->dev)); + if (!viommu->iopf_pri) + return -ENOMEM; + + return 0; +} + static int viommu_probe_endpoint(struct viommu_dev *viommu, struct device *dev) { int ret; @@ -670,6 +680,15 @@ static int viommu_probe_endpoint(struct viommu_dev *viommu, struct device *dev) list_add(&ep->list, &viommu->endpoints); + ret = viommu_init_queues(viommu); + if (ret) + goto out_free_eps; + + kfree(probe); + return 0; + +out_free_eps: + kfree(ep); out_free: kfree(probe); return ret; From patchwork Fri Apr 23 09:51:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED493C433B4 for ; Fri, 23 Apr 2021 09:54:57 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 566AC613E4 for ; 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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsU3-00EIgv-6T for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:25 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E92FD1597; Fri, 23 Apr 2021 02:52:21 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C0CA23F774; Fri, 23 Apr 2021 02:52:17 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 05/11] iommu/virtio: Add SVA feature and related enable/disable callbacks Date: Fri, 23 Apr 2021 15:21:41 +0530 Message-Id: <20210423095147.27922-6-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025223_365505_3528458B X-CRM114-Status: GOOD ( 17.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a feature flag to virtio iommu for Shared virtual addressing (SVA). This feature would indicate the availablily path for handling device page faults, and the provision for sending page response. Also add necessary methods to enable and disable SVA so that the masters can enable the SVA path. This also requires enabling the PRI capability on the device. Signed-off-by: Vivek Gautam --- drivers/iommu/virtio-iommu.c | 268 ++++++++++++++++++++++++++++++ include/uapi/linux/virtio_iommu.h | 1 + 2 files changed, 269 insertions(+) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 3da5f0807711..250c137a211b 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -26,6 +27,7 @@ #include #include "iommu-pasid-table.h" +#include "iommu-sva-lib.h" #define MSI_IOVA_BASE 0x8000000 #define MSI_IOVA_LENGTH 0x100000 @@ -37,6 +39,9 @@ /* Some architectures need an Address Space ID for each page table */ DEFINE_XARRAY_ALLOC1(viommu_asid_xa); +static DEFINE_MUTEX(sva_lock); +static DEFINE_MUTEX(iopf_lock); + struct viommu_dev_pri_work { struct work_struct work; struct viommu_dev *dev; @@ -71,6 +76,7 @@ struct viommu_dev { bool has_map:1; bool has_table:1; + bool has_sva:1; }; struct viommu_mapping { @@ -124,6 +130,12 @@ struct viommu_endpoint { void *pstf; /* Preferred page table format */ void *pgtf; + + /* sva */ + bool ats_supported; + bool pri_supported; + bool sva_enabled; + bool iopf_enabled; }; struct viommu_ep_entry { @@ -582,6 +594,64 @@ static int viommu_add_pstf(struct viommu_endpoint *vdev, void *pstf, size_t len) return 0; } +static int viommu_init_ats_pri(struct viommu_endpoint *vdev) +{ + struct device *dev = vdev->dev; + struct pci_dev *pdev = to_pci_dev(dev); + + if (!dev_is_pci(vdev->dev)) + return -EINVAL; + + if (pci_ats_supported(pdev)) + vdev->ats_supported = true; + + if (pci_pri_supported(pdev)) + vdev->pri_supported = true; + + return 0; +} + +static int viommu_enable_pri(struct viommu_endpoint *vdev) +{ + int ret; + struct pci_dev *pdev; + + /* Let's allow only 4 requests for PRI right now */ + size_t max_inflight_pprs = 4; + + if (!vdev->pri_supported || !vdev->ats_supported) + return -ENODEV; + + pdev = to_pci_dev(vdev->dev); + + ret = pci_reset_pri(pdev); + if (ret) + return ret; + + ret = pci_enable_pri(pdev, max_inflight_pprs); + if (ret) { + dev_err(vdev->dev, "cannot enable PRI: %d\n", ret); + return ret; + } + + return 0; +} + +static void viommu_disable_pri(struct viommu_endpoint *vdev) +{ + struct pci_dev *pdev; + + if (!dev_is_pci(vdev->dev)) + return; + + pdev = to_pci_dev(vdev->dev); + + if (!pdev->pri_enabled) + return; + + pci_disable_pri(pdev); +} + static int viommu_init_queues(struct viommu_dev *viommu) { viommu->iopf_pri = iopf_queue_alloc(dev_name(viommu->dev)); @@ -684,6 +754,10 @@ static int viommu_probe_endpoint(struct viommu_dev *viommu, struct device *dev) if (ret) goto out_free_eps; + ret = viommu_init_ats_pri(vdev); + if (ret) + goto out_free_eps; + kfree(probe); return 0; @@ -1681,6 +1755,194 @@ static int viommu_of_xlate(struct device *dev, struct of_phandle_args *args) return iommu_fwspec_add_ids(dev, args->args, 1); } +static bool viommu_endpoint_iopf_supported(struct viommu_endpoint *vdev) +{ + /* TODO: support Stall model later */ + return vdev->pri_supported; +} + +bool viommu_endpoint_sva_supported(struct viommu_endpoint *vdev) +{ + struct viommu_dev *viommu = vdev->viommu; + + if (!viommu->has_sva) + return false; + + return vdev->pasid_bits; +} + +bool viommu_endpoint_sva_enabled(struct viommu_endpoint *vdev) +{ + bool enabled; + + mutex_lock(&sva_lock); + enabled = vdev->sva_enabled; + mutex_unlock(&sva_lock); + return enabled; +} + +static int viommu_endpoint_sva_enable_iopf(struct viommu_endpoint *vdev) +{ + int ret; + struct device *dev = vdev->dev; + + if (!viommu_endpoint_iopf_supported(vdev)) + return 0; + + if (!vdev->iopf_enabled) + return -EINVAL; + + if (vdev->pri_supported) { + ret = iopf_queue_add_device(vdev->viommu->iopf_pri, dev); + if (ret) + return ret; + } else { + /* No other way to handle io page fault then */ + return -EINVAL; + } + + ret = iommu_register_device_fault_handler(dev, iommu_queue_iopf, dev); + if (ret) + iopf_queue_remove_device(vdev->viommu->iopf_pri, dev); + + return ret; +} + +static void viommu_endpoint_sva_disable_iopf(struct viommu_endpoint *vdev) +{ + struct device *dev = vdev->dev; + + if (!vdev->iopf_enabled) + return; + + iommu_unregister_device_fault_handler(dev); + iopf_queue_remove_device(vdev->viommu->iopf_pri, dev); +} + +static int viommu_endpoint_enable_sva(struct viommu_endpoint *vdev) +{ + int ret; + + mutex_lock(&sva_lock); + ret = viommu_endpoint_sva_enable_iopf(vdev); + if (!ret) + vdev->sva_enabled = true; + mutex_unlock(&sva_lock); + + return ret; +} + +static int viommu_endpoint_disable_sva(struct viommu_endpoint *vdev) +{ + mutex_lock(&sva_lock); + viommu_endpoint_sva_disable_iopf(vdev); + vdev->sva_enabled = false; + mutex_unlock(&sva_lock); + + return 0; +} + +int viommu_endpoint_enable_iopf(struct viommu_endpoint *vdev) +{ + int ret; + + mutex_lock(&iopf_lock); + if (vdev->pri_supported) { + ret = viommu_enable_pri(vdev); + if (ret) + return ret; + } + vdev->iopf_enabled = true; + mutex_unlock(&iopf_lock); + return 0; +} + +int viommu_endpoint_disable_iopf(struct viommu_endpoint *vdev) +{ + if (vdev->sva_enabled) + return -EBUSY; + + mutex_lock(&iopf_lock); + viommu_disable_pri(vdev); + vdev->iopf_enabled = false; + mutex_unlock(&iopf_lock); + return 0; +} + +static bool viommu_dev_has_feature(struct device *dev, + enum iommu_dev_features feat) +{ + struct viommu_endpoint *vdev = dev_iommu_priv_get(dev); + + if (!vdev) + return false; + + switch (feat) { + case IOMMU_DEV_FEAT_IOPF: + return viommu_endpoint_iopf_supported(vdev); + case IOMMU_DEV_FEAT_SVA: + return viommu_endpoint_sva_supported(vdev); + default: + return false; + } +} + +static bool viommu_dev_feature_enabled(struct device *dev, + enum iommu_dev_features feat) +{ + struct viommu_endpoint *vdev = dev_iommu_priv_get(dev); + + if (!vdev) + return false; + + switch (feat) { + case IOMMU_DEV_FEAT_IOPF: + return vdev->iopf_enabled; + case IOMMU_DEV_FEAT_SVA: + return viommu_endpoint_sva_enabled(vdev); + default: + return false; + } +} + +static int viommu_dev_enable_feature(struct device *dev, + enum iommu_dev_features feat) +{ + struct viommu_endpoint *vdev = dev_iommu_priv_get(dev); + + if (!viommu_dev_has_feature(dev, feat)) + return -ENODEV; + + if (viommu_dev_feature_enabled(dev, feat)) + return -EBUSY; + + switch (feat) { + case IOMMU_DEV_FEAT_IOPF: + return viommu_endpoint_enable_iopf(vdev); + case IOMMU_DEV_FEAT_SVA: + return viommu_endpoint_enable_sva(vdev); + default: + return -EINVAL; + } +} + +static int viommu_dev_disable_feature(struct device *dev, + enum iommu_dev_features feat) +{ + struct viommu_endpoint *vdev = dev_iommu_priv_get(dev); + + if (!viommu_dev_feature_enabled(dev, feat)) + return -EINVAL; + + switch (feat) { + case IOMMU_DEV_FEAT_IOPF: + return viommu_endpoint_disable_iopf(vdev); + case IOMMU_DEV_FEAT_SVA: + return viommu_endpoint_disable_sva(vdev); + default: + return -EINVAL; + } +} static struct iommu_ops viommu_ops = { .domain_alloc = viommu_domain_alloc, .domain_free = viommu_domain_free, @@ -1695,6 +1957,9 @@ static struct iommu_ops viommu_ops = { .get_resv_regions = viommu_get_resv_regions, .put_resv_regions = generic_iommu_put_resv_regions, .of_xlate = viommu_of_xlate, + .dev_feat_enabled = viommu_dev_feature_enabled, + .dev_enable_feat = viommu_dev_enable_feature, + .dev_disable_feat = viommu_dev_disable_feature, }; static int viommu_init_vqs(struct viommu_dev *viommu) @@ -1811,6 +2076,8 @@ static int viommu_probe(struct virtio_device *vdev) goto err_free_vqs; } + viommu->has_sva = virtio_has_feature(vdev, VIRTIO_IOMMU_F_SVA); + viommu->geometry = (struct iommu_domain_geometry) { .aperture_start = input_start, .aperture_end = input_end, @@ -1902,6 +2169,7 @@ static unsigned int features[] = { VIRTIO_IOMMU_F_PROBE, VIRTIO_IOMMU_F_MMIO, VIRTIO_IOMMU_F_ATTACH_TABLE, + VIRTIO_IOMMU_F_SVA, }; static struct virtio_device_id id_table[] = { diff --git a/include/uapi/linux/virtio_iommu.h b/include/uapi/linux/virtio_iommu.h index 53aa88e6b077..88a3db493108 100644 --- a/include/uapi/linux/virtio_iommu.h +++ b/include/uapi/linux/virtio_iommu.h @@ -17,6 +17,7 @@ #define VIRTIO_IOMMU_F_PROBE 4 #define VIRTIO_IOMMU_F_MMIO 5 #define VIRTIO_IOMMU_F_ATTACH_TABLE 6 +#define VIRTIO_IOMMU_F_SVA 7 struct virtio_iommu_range_64 { __le64 start; From patchwork Fri Apr 23 09:51:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D204C433B4 for ; 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bh=PUJYixPAwj1S8FDk8iPZwx5gqfglg3OpCwcwbLco6Tg=; b=JkYxST00GMT6zOZ1Tc3jgEY12a hXR4MMAcoRFf4Jmfb4iRcnjoUto8lDy59I38wdsHNXBGlCyo4xUXWqVI62Yt7VVW1os/+GlHryQDp 0B3Kp0U+jVhDwuzxig9566sKpAgbEOgQCn40p3HZxTw3Ksq712hfB1V4xYHmNVg6JjVKgb/tDqblJ Hrjxuv06jLefJOSC2F5mZ1G9RjTywp6wVakwP6RGsBmKnFeQ0aI+qUhazvAjmNM1N2LFfHc/PTa+U kY4velTwJ5bSp01cQfakvdEzTpUvHlrRllf6VCQDs3U5WwQGOMLQ17VWDUPL+2gymdhwQj8iZNvXv 3GutSmOQ==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsU8-00EIhd-OQ for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:30 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8A00615EC; Fri, 23 Apr 2021 02:52:26 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 623793F774; Fri, 23 Apr 2021 02:52:22 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 06/11] iommu/pasid-table: Add pasid table ops for shared context management Date: Fri, 23 Apr 2021 15:21:42 +0530 Message-Id: <20210423095147.27922-7-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025228_908925_B94E90BD X-CRM114-Status: GOOD ( 13.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add pasid table ops to allocate and free shared contexts. These helpers interact using mmu notifiers, so add a mmu notifier implementation structure in pasid tables as well. This change can help pull out the shared pasid (context-descriptor) implementation out of arm-smmu-v3. Signed-off-by: Vivek Gautam --- .../arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c | 1 + drivers/iommu/iommu-pasid-table.h | 42 +++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c index fa1a6a632559..ea94f57ad261 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c @@ -299,6 +299,7 @@ arm_smmu_register_cd_table(struct device *dev, void *cookie, tbl->cookie = cookie; tbl->ops = &arm_cd_table_ops; tbl->cfg.sync = sync_ops; + INIT_LIST_HEAD(&tbl->mmu_notifiers); return tbl; } diff --git a/drivers/iommu/iommu-pasid-table.h b/drivers/iommu/iommu-pasid-table.h index 00b1c66e6a9e..4d6590e60f9b 100644 --- a/drivers/iommu/iommu-pasid-table.h +++ b/drivers/iommu/iommu-pasid-table.h @@ -8,6 +8,7 @@ #define __IOMMU_PASID_TABLE_H #include +#include #include "arm/arm-smmu-v3/arm-smmu-v3.h" @@ -52,6 +53,21 @@ struct iommu_vendor_psdtable_cfg { struct iommu_vendor_psdtable_ops; +/* In-line with 'struct arm_smmu_mmu_notifier' */ +struct iommu_psdtable_mmu_notifier { + struct mmu_notifier mn; + bool cleared; + refcount_t refs; + struct list_head list; + /* cookie captures the domain implementation */ + void *cookie; + union { + struct arm_smmu_ctx_desc *cd; + } vendor; +}; +#define mn_to_pstiommu(mn) \ + container_of(mn, struct iommu_psdtable_mmu_notifier, mn) + /** * struct iommu_pasid_table - describes a set of PASID tables * @@ -64,6 +80,7 @@ struct iommu_pasid_table { void *cookie; struct iommu_vendor_psdtable_cfg cfg; const struct iommu_vendor_psdtable_ops *ops; + struct list_head mmu_notifiers; }; #define pasid_table_cfg_to_table(pst_cfg) \ @@ -77,6 +94,11 @@ struct iommu_vendor_psdtable_ops { int (*write)(struct iommu_vendor_psdtable_cfg *cfg, int ssid, void *cookie); bool (*free_asid)(struct xarray *xa, void *cookie_cd); + struct iommu_psdtable_mmu_notifier * + (*alloc_shared)(struct iommu_pasid_table *tbl, struct mm_struct *mm, + struct xarray *xa, u32 asid_bits); + void (*free_shared)(struct iommu_pasid_table *tbl, struct xarray *xa, + void *cookie_cd); }; /* CD manipulation ops */ @@ -129,6 +151,26 @@ static inline bool iommu_psdtable_free_asid(struct iommu_pasid_table *tbl, return tbl->ops->free_asid(xa, cookie_cd); } +static inline struct iommu_psdtable_mmu_notifier * +iommu_psdtable_alloc_shared(struct iommu_pasid_table *tbl, + struct mm_struct *mm, struct xarray *xa, + u32 asid_bits) +{ + if (!tbl->ops->alloc_shared) + return false; + + return tbl->ops->alloc_shared(tbl, mm, xa, asid_bits); +} + +static inline void iommu_psdtable_free_shared(struct iommu_pasid_table *tbl, + struct xarray *xa, void *cookie) +{ + if (!tbl->ops->free_shared) + return; + + tbl->ops->free_shared(tbl, xa, cookie); +} + /* Sync ops for CD cfg or tlb */ static inline void iommu_psdtable_flush(struct iommu_pasid_table *tbl, void *cookie, int ssid, bool leaf) From patchwork Fri Apr 23 09:51:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220029 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B21BC433ED for ; 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bh=QYvt3gMGtjtge1RA+CB4KiGB3/g77ZX8A8fk4SNdQ34=; b=d++KYfrFo9MwQm6BaX5mHqAj1D 9DaJ7ZmzCJLYWYPXaZBRd0jWWBaCUnTPh3izl0DIpkcTGgHF4FvUV6tVTTXLLV6KDU+hQ691XorHO l4AtN+I64iTR5K1kBlV/QD49BmD2FbCBNhzoLE7eKIs3VfsBrYBksM7bsE4cr1ZFYucCjuINd1CDU 5XqYSjbPP4yQbeb42lzx8CgBczxD0tviS9ZGW5md1WdYcahRwBJAFiS6hIGd1srqVzH69/gJcNR4o 9BjX3EcIUmQD6lQ18bJdW7ZNGo2b0jag0fuSVPS1I3NtnbKt7bGijxiUXJ9yZP66c9tLG4QVmtskU 8kcbuVOg==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsUB-00EIiF-Mx for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2AA06161B; Fri, 23 Apr 2021 02:52:31 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 030173F774; Fri, 23 Apr 2021 02:52:26 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 07/11] iommu/arm-smmu-v3: Move shared context descriptor code to cd-lib Date: Fri, 23 Apr 2021 15:21:43 +0530 Message-Id: <20210423095147.27922-8-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025231_868601_269E71CC X-CRM114-Status: GOOD ( 22.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation to adding shared descriptor allocation and free pasid table ops, pull out the alloc_shared_cd and free_shared_cd helpers from arm-smmu-v3 and place them in arm-smmu-v3-cd-lib library driver. Signed-off-by: Vivek Gautam --- .../arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c | 149 ++++++++++++++++++ .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 147 ----------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 12 ++ drivers/iommu/iommu-pasid-table.h | 1 + 4 files changed, 162 insertions(+), 147 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c index ea94f57ad261..537b7c784d40 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c @@ -6,9 +6,11 @@ */ #include +#include #include "arm-smmu-v3.h" #include "../../iommu-pasid-table.h" +#include "../../io-pgtable-arm.h" static int arm_smmu_alloc_cd_leaf_table(struct device *dev, struct arm_smmu_l1_ctx_desc *l1_desc) @@ -278,6 +280,153 @@ static bool arm_smmu_free_asid(struct xarray *xa, void *cookie_cd) return free; } +/* + * Check if the CPU ASID is available on the SMMU side. If a private context + * descriptor is using it, try to replace it. + */ +static struct arm_smmu_ctx_desc * +arm_smmu_share_asid(struct mm_struct *mm, u16 asid) +{ + int ret; + u32 new_asid; + struct arm_smmu_ctx_desc *cd; + struct arm_smmu_device *smmu; + struct arm_smmu_domain *smmu_domain; + struct iommu_pasid_table *tbl; + + cd = xa_load(&arm_smmu_asid_xa, asid); + if (!cd) + return NULL; + + if (cd->mm) { + if (WARN_ON(cd->mm != mm)) + return ERR_PTR(-EINVAL); + /* All devices bound to this mm use the same cd struct. */ + refcount_inc(&cd->refs); + return cd; + } + + smmu_domain = container_of(cd, struct arm_smmu_domain, s1_cfg.cd); + smmu = smmu_domain->smmu; + tbl = smmu_domain->tbl; + + ret = xa_alloc(&arm_smmu_asid_xa, &new_asid, cd, + XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); + if (ret) + return ERR_PTR(-ENOSPC); + /* + * Race with unmap: TLB invalidations will start targeting the new ASID, + * which isn't assigned yet. We'll do an invalidate-all on the old ASID + * later, so it doesn't matter. + */ + cd->asid = new_asid; + /* + * Update ASID and invalidate CD in all associated masters. There will + * be some overlap between use of both ASIDs, until we invalidate the + * TLB. + */ + ret = iommu_psdtable_write(tbl, &tbl->cfg, 0, cd); + if (ret) + return ERR_PTR(-ENOSYS); + + /* Invalidate TLB entries previously associated with that context */ + iommu_psdtable_flush_tlb(tbl, smmu_domain, asid); + + xa_erase(&arm_smmu_asid_xa, asid); + return NULL; +} + +struct arm_smmu_ctx_desc * +arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm) +{ + u16 asid; + int err = 0; + u64 tcr, par, reg; + struct arm_smmu_ctx_desc *cd; + struct arm_smmu_ctx_desc *ret = NULL; + + asid = arm64_mm_context_get(mm); + if (!asid) + return ERR_PTR(-ESRCH); + + cd = kzalloc(sizeof(*cd), GFP_KERNEL); + if (!cd) { + err = -ENOMEM; + goto out_put_context; + } + + refcount_set(&cd->refs, 1); + + mutex_lock(&arm_smmu_asid_lock); + ret = arm_smmu_share_asid(mm, asid); + if (ret) { + mutex_unlock(&arm_smmu_asid_lock); + goto out_free_cd; + } + + err = xa_insert(&arm_smmu_asid_xa, asid, cd, GFP_KERNEL); + mutex_unlock(&arm_smmu_asid_lock); + + if (err) + goto out_free_asid; + + tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, 64ULL - vabits_actual) | + FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, ARM_LPAE_TCR_RGN_WBWA) | + FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, ARM_LPAE_TCR_RGN_WBWA) | + FIELD_PREP(CTXDESC_CD_0_TCR_SH0, ARM_LPAE_TCR_SH_IS) | + CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64; + + switch (PAGE_SIZE) { + case SZ_4K: + tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_4K); + break; + case SZ_16K: + tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_16K); + break; + case SZ_64K: + tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_64K); + break; + default: + WARN_ON(1); + err = -EINVAL; + goto out_free_asid; + } + + reg = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); + par = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_PARANGE_SHIFT); + tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_IPS, par); + + cd->ttbr = virt_to_phys(mm->pgd); + cd->tcr = tcr; + /* + * MAIR value is pretty much constant and global, so we can just get it + * from the current CPU register + */ + cd->mair = read_sysreg(mair_el1); + cd->asid = asid; + cd->mm = mm; + + return cd; + +out_free_asid: + iommu_psdtable_free_asid(tbl, &arm_smmu_asid_xa, cd); +out_free_cd: + kfree(cd); +out_put_context: + arm64_mm_context_put(mm); + return err < 0 ? ERR_PTR(err) : ret; +} + +void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, + struct arm_smmu_ctx_desc *cd) +{ + if (iommu_psdtable_free_asid(tbl, &arm_smmu_asid_xa, cd)) { + /* Unpin ASID */ + arm64_mm_context_put(cd->mm); + kfree(cd); + } +} + struct iommu_vendor_psdtable_ops arm_cd_table_ops = { .alloc = arm_smmu_alloc_cd_tables, .free = arm_smmu_free_cd_tables, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 775c34899935..da35d4cc0c1e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -37,153 +37,6 @@ struct arm_smmu_bond { static DEFINE_MUTEX(sva_lock); -/* - * Check if the CPU ASID is available on the SMMU side. If a private context - * descriptor is using it, try to replace it. - */ -static struct arm_smmu_ctx_desc * -arm_smmu_share_asid(struct mm_struct *mm, u16 asid) -{ - int ret; - u32 new_asid; - struct arm_smmu_ctx_desc *cd; - struct arm_smmu_device *smmu; - struct arm_smmu_domain *smmu_domain; - struct iommu_pasid_table *tbl; - - cd = xa_load(&arm_smmu_asid_xa, asid); - if (!cd) - return NULL; - - if (cd->mm) { - if (WARN_ON(cd->mm != mm)) - return ERR_PTR(-EINVAL); - /* All devices bound to this mm use the same cd struct. */ - refcount_inc(&cd->refs); - return cd; - } - - smmu_domain = container_of(cd, struct arm_smmu_domain, s1_cfg.cd); - smmu = smmu_domain->smmu; - tbl = smmu_domain->tbl; - - ret = xa_alloc(&arm_smmu_asid_xa, &new_asid, cd, - XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); - if (ret) - return ERR_PTR(-ENOSPC); - /* - * Race with unmap: TLB invalidations will start targeting the new ASID, - * which isn't assigned yet. We'll do an invalidate-all on the old ASID - * later, so it doesn't matter. - */ - cd->asid = new_asid; - /* - * Update ASID and invalidate CD in all associated masters. There will - * be some overlap between use of both ASIDs, until we invalidate the - * TLB. - */ - ret = iommu_psdtable_write(tbl, &tbl->cfg, 0, cd); - if (ret) - return ERR_PTR(-ENOSYS); - - /* Invalidate TLB entries previously associated with that context */ - iommu_psdtable_flush_tlb(tbl, smmu_domain, asid); - - xa_erase(&arm_smmu_asid_xa, asid); - return NULL; -} - -static struct arm_smmu_ctx_desc * -arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm) -{ - u16 asid; - int err = 0; - u64 tcr, par, reg; - struct arm_smmu_ctx_desc *cd; - struct arm_smmu_ctx_desc *ret = NULL; - - asid = arm64_mm_context_get(mm); - if (!asid) - return ERR_PTR(-ESRCH); - - cd = kzalloc(sizeof(*cd), GFP_KERNEL); - if (!cd) { - err = -ENOMEM; - goto out_put_context; - } - - refcount_set(&cd->refs, 1); - - mutex_lock(&arm_smmu_asid_lock); - ret = arm_smmu_share_asid(mm, asid); - if (ret) { - mutex_unlock(&arm_smmu_asid_lock); - goto out_free_cd; - } - - err = xa_insert(&arm_smmu_asid_xa, asid, cd, GFP_KERNEL); - mutex_unlock(&arm_smmu_asid_lock); - - if (err) - goto out_free_asid; - - tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, 64ULL - vabits_actual) | - FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, ARM_LPAE_TCR_RGN_WBWA) | - FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, ARM_LPAE_TCR_RGN_WBWA) | - FIELD_PREP(CTXDESC_CD_0_TCR_SH0, ARM_LPAE_TCR_SH_IS) | - CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64; - - switch (PAGE_SIZE) { - case SZ_4K: - tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_4K); - break; - case SZ_16K: - tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_16K); - break; - case SZ_64K: - tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_TG0, ARM_LPAE_TCR_TG0_64K); - break; - default: - WARN_ON(1); - err = -EINVAL; - goto out_free_asid; - } - - reg = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); - par = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_PARANGE_SHIFT); - tcr |= FIELD_PREP(CTXDESC_CD_0_TCR_IPS, par); - - cd->ttbr = virt_to_phys(mm->pgd); - cd->tcr = tcr; - /* - * MAIR value is pretty much constant and global, so we can just get it - * from the current CPU register - */ - cd->mair = read_sysreg(mair_el1); - cd->asid = asid; - cd->mm = mm; - - return cd; - -out_free_asid: - iommu_psdtable_free_asid(tbl, &arm_smmu_asid_xa, cd); -out_free_cd: - kfree(cd); -out_put_context: - arm64_mm_context_put(mm); - return err < 0 ? ERR_PTR(err) : ret; -} - -static void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, - struct arm_smmu_ctx_desc *cd) -{ - if (iommu_psdtable_free_asid(tbl, &arm_smmu_asid_xa, cd)) { - /* Unpin ASID */ - arm64_mm_context_put(cd->mm); - kfree(cd); - } -} - static void arm_smmu_mm_invalidate_range(struct mmu_notifier *mn, struct mm_struct *mm, unsigned long start, unsigned long end) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index d5cf2d521c29..13ff024ab0d5 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -773,6 +773,10 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, void arm_smmu_sva_unbind(struct iommu_sva *handle); u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); void arm_smmu_sva_notifier_synchronize(void); +struct arm_smmu_ctx_desc * +arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm); +void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, + struct arm_smmu_ctx_desc *cd); #else /* CONFIG_ARM_SMMU_V3_SVA */ static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) { @@ -828,5 +832,13 @@ static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle) } static inline void arm_smmu_sva_notifier_synchronize(void) {} +struct arm_smmu_ctx_desc * +arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm) +{ + return ERR_PTR(-EINVAL); +} + +static inline void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, + struct arm_smmu_ctx_desc *cd) {} #endif /* CONFIG_ARM_SMMU_V3_SVA */ #endif /* _ARM_SMMU_V3_H */ diff --git a/drivers/iommu/iommu-pasid-table.h b/drivers/iommu/iommu-pasid-table.h index 4d6590e60f9b..0e774ae6682a 100644 --- a/drivers/iommu/iommu-pasid-table.h +++ b/drivers/iommu/iommu-pasid-table.h @@ -8,6 +8,7 @@ #define __IOMMU_PASID_TABLE_H #include +#include #include #include "arm/arm-smmu-v3/arm-smmu-v3.h" From patchwork Fri Apr 23 09:51:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEE1CC433B4 for ; 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bh=TTovfrXP+MjEHp8yurUYeQ2B8QTrbX+r/Ujny5vlHbI=; b=C7YYNxC3NNMcFZ23EmxJHcBhim aSPEsd2q9J0qPB7nqx+gQvFCz+0gnkCYL/oiPgCt79AkGjkgatA3wfyWAvTPogdf3BJsp00ylbaZW i9Lfa6hB8Akl219g2jJoc2fzil8/twhE0zuX/nJ7Z2FK6K1+qfFH58zu5uJ5QVn3i+ySvcgJhlaqL hnz1KSETJXdEZ/bDG+1YcyQqBMnJgK6FFjdZCOmFVQdHWNGPFYhxuMq5Jceb6bHS9f3fI7XYGeO5x JU0iIPa06z1f0Ava5L6o+v2nGAaAT7pGkcFMd/Zf4RVRSIDSIt8asHEiRzymWGK+i6K9WC2rY//FY ywpeof8A==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsUG-00EIio-NW for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BEF041655; Fri, 23 Apr 2021 02:52:35 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9746C3F774; Fri, 23 Apr 2021 02:52:31 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 08/11] iommu/arm-smmu-v3: Implement shared context alloc and free ops Date: Fri, 23 Apr 2021 15:21:44 +0530 Message-Id: <20210423095147.27922-9-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025236_886579_58D7D782 X-CRM114-Status: GOOD ( 19.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Implementing the alloc_shared_cd and free_shared_cd in cd-lib, and start using them for arm-smmu-v3-sva implementation. Signed-off-by: Vivek Gautam --- .../arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c | 71 ++++++++-------- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 83 ++++++++----------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 - drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 14 ---- 4 files changed, 73 insertions(+), 96 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c index 537b7c784d40..b87829796596 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-cd-lib.c @@ -285,16 +285,14 @@ static bool arm_smmu_free_asid(struct xarray *xa, void *cookie_cd) * descriptor is using it, try to replace it. */ static struct arm_smmu_ctx_desc * -arm_smmu_share_asid(struct mm_struct *mm, u16 asid) +arm_smmu_share_asid(struct iommu_pasid_table *tbl, struct mm_struct *mm, + struct xarray *xa, u16 asid, u32 asid_bits) { int ret; u32 new_asid; struct arm_smmu_ctx_desc *cd; - struct arm_smmu_device *smmu; - struct arm_smmu_domain *smmu_domain; - struct iommu_pasid_table *tbl; - cd = xa_load(&arm_smmu_asid_xa, asid); + cd = xa_load(xa, asid); if (!cd) return NULL; @@ -306,12 +304,8 @@ arm_smmu_share_asid(struct mm_struct *mm, u16 asid) return cd; } - smmu_domain = container_of(cd, struct arm_smmu_domain, s1_cfg.cd); - smmu = smmu_domain->smmu; - tbl = smmu_domain->tbl; - - ret = xa_alloc(&arm_smmu_asid_xa, &new_asid, cd, - XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); + ret = xa_alloc(xa, &new_asid, cd, XA_LIMIT(1, (1 << asid_bits) - 1), + GFP_KERNEL); if (ret) return ERR_PTR(-ENOSPC); /* @@ -325,48 +319,52 @@ arm_smmu_share_asid(struct mm_struct *mm, u16 asid) * be some overlap between use of both ASIDs, until we invalidate the * TLB. */ - ret = iommu_psdtable_write(tbl, &tbl->cfg, 0, cd); + ret = arm_smmu_write_ctx_desc(&tbl->cfg, 0, cd); if (ret) return ERR_PTR(-ENOSYS); /* Invalidate TLB entries previously associated with that context */ - iommu_psdtable_flush_tlb(tbl, smmu_domain, asid); + iommu_psdtable_flush_tlb(tbl, tbl->cookie, asid); - xa_erase(&arm_smmu_asid_xa, asid); + xa_erase(xa, asid); return NULL; } -struct arm_smmu_ctx_desc * -arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm) +static struct iommu_psdtable_mmu_notifier * +arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm, + struct xarray *xa, u32 asid_bits) { u16 asid; int err = 0; u64 tcr, par, reg; struct arm_smmu_ctx_desc *cd; struct arm_smmu_ctx_desc *ret = NULL; + struct iommu_psdtable_mmu_notifier *pst_mn; asid = arm64_mm_context_get(mm); if (!asid) return ERR_PTR(-ESRCH); + pst_mn = kzalloc(sizeof(*pst_mn), GFP_KERNEL); + if (!pst_mn) { + err = -ENOMEM; + goto out_put_context; + } + cd = kzalloc(sizeof(*cd), GFP_KERNEL); if (!cd) { err = -ENOMEM; - goto out_put_context; + goto out_free_mn; } refcount_set(&cd->refs, 1); - mutex_lock(&arm_smmu_asid_lock); - ret = arm_smmu_share_asid(mm, asid); + ret = arm_smmu_share_asid(tbl, mm, xa, asid, asid_bits); if (ret) { - mutex_unlock(&arm_smmu_asid_lock); goto out_free_cd; } - err = xa_insert(&arm_smmu_asid_xa, asid, cd, GFP_KERNEL); - mutex_unlock(&arm_smmu_asid_lock); - + err = xa_insert(xa, asid, cd, GFP_KERNEL); if (err) goto out_free_asid; @@ -406,21 +404,26 @@ arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm) cd->asid = asid; cd->mm = mm; - return cd; + pst_mn->vendor.cd = cd; + return pst_mn; out_free_asid: - iommu_psdtable_free_asid(tbl, &arm_smmu_asid_xa, cd); + arm_smmu_free_asid(xa, cd); out_free_cd: kfree(cd); +out_free_mn: + kfree(pst_mn); out_put_context: arm64_mm_context_put(mm); return err < 0 ? ERR_PTR(err) : ret; } -void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, - struct arm_smmu_ctx_desc *cd) +static void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, + struct xarray *xa, void *cookie) { - if (iommu_psdtable_free_asid(tbl, &arm_smmu_asid_xa, cd)) { + struct arm_smmu_ctx_desc *cd = cookie; + + if (iommu_psdtable_free_asid(tbl, xa, cd)) { /* Unpin ASID */ arm64_mm_context_put(cd->mm); kfree(cd); @@ -428,11 +431,13 @@ void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, } struct iommu_vendor_psdtable_ops arm_cd_table_ops = { - .alloc = arm_smmu_alloc_cd_tables, - .free = arm_smmu_free_cd_tables, - .prepare = arm_smmu_prepare_cd, - .write = arm_smmu_write_ctx_desc, - .free_asid = arm_smmu_free_asid, + .alloc = arm_smmu_alloc_cd_tables, + .free = arm_smmu_free_cd_tables, + .prepare = arm_smmu_prepare_cd, + .write = arm_smmu_write_ctx_desc, + .free_asid = arm_smmu_free_asid, + .alloc_shared = arm_smmu_alloc_shared_cd, + .free_shared = arm_smmu_free_shared_cd, }; struct iommu_pasid_table * diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index da35d4cc0c1e..ef28d0c409da 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -13,23 +13,12 @@ #include "../../io-pgtable-arm.h" #include "../../iommu-pasid-table.h" -struct arm_smmu_mmu_notifier { - struct mmu_notifier mn; - struct arm_smmu_ctx_desc *cd; - bool cleared; - refcount_t refs; - struct list_head list; - struct arm_smmu_domain *domain; -}; - -#define mn_to_smmu(mn) container_of(mn, struct arm_smmu_mmu_notifier, mn) - struct arm_smmu_bond { - struct iommu_sva sva; - struct mm_struct *mm; - struct arm_smmu_mmu_notifier *smmu_mn; - struct list_head list; - refcount_t refs; + struct iommu_sva sva; + struct mm_struct *mm; + struct iommu_psdtable_mmu_notifier *smmu_mn; + struct list_head list; + refcount_t refs; }; #define sva_to_bond(handle) \ @@ -41,20 +30,22 @@ static void arm_smmu_mm_invalidate_range(struct mmu_notifier *mn, struct mm_struct *mm, unsigned long start, unsigned long end) { - struct arm_smmu_mmu_notifier *smmu_mn = mn_to_smmu(mn); - struct arm_smmu_domain *smmu_domain = smmu_mn->domain; + struct iommu_psdtable_mmu_notifier *smmu_mn = mn_to_pstiommu(mn); + struct arm_smmu_domain *smmu_domain = smmu_mn->cookie; + struct arm_smmu_ctx_desc *cd = smmu_mn->vendor.cd; size_t size = end - start + 1; if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) - arm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid, + arm_smmu_tlb_inv_range_asid(start, size, cd->asid, PAGE_SIZE, false, smmu_domain); arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, start, size); } static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) { - struct arm_smmu_mmu_notifier *smmu_mn = mn_to_smmu(mn); - struct arm_smmu_domain *smmu_domain = smmu_mn->domain; + struct iommu_psdtable_mmu_notifier *smmu_mn = mn_to_pstiommu(mn); + struct arm_smmu_domain *smmu_domain = smmu_mn->cookie; + struct arm_smmu_ctx_desc *cd = smmu_mn->vendor.cd; struct iommu_pasid_table *tbl = smmu_domain->tbl; mutex_lock(&sva_lock); @@ -69,7 +60,7 @@ static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) */ iommu_psdtable_write(tbl, &tbl->cfg, mm->pasid, &quiet_cd); - iommu_psdtable_flush_tlb(tbl, smmu_domain, smmu_mn->cd->asid); + iommu_psdtable_flush_tlb(tbl, smmu_domain, cd->asid); arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); smmu_mn->cleared = true; @@ -78,7 +69,7 @@ static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) static void arm_smmu_mmu_notifier_free(struct mmu_notifier *mn) { - kfree(mn_to_smmu(mn)); + kfree(mn_to_pstiommu(mn)); } static struct mmu_notifier_ops arm_smmu_mmu_notifier_ops = { @@ -88,63 +79,59 @@ static struct mmu_notifier_ops arm_smmu_mmu_notifier_ops = { }; /* Allocate or get existing MMU notifier for this {domain, mm} pair */ -static struct arm_smmu_mmu_notifier * +static struct iommu_psdtable_mmu_notifier * arm_smmu_mmu_notifier_get(struct arm_smmu_domain *smmu_domain, struct mm_struct *mm) { int ret; - struct arm_smmu_ctx_desc *cd; - struct arm_smmu_mmu_notifier *smmu_mn; + struct iommu_psdtable_mmu_notifier *smmu_mn; + struct arm_smmu_device *smmu = smmu_domain->smmu; struct iommu_pasid_table *tbl = smmu_domain->tbl; - list_for_each_entry(smmu_mn, &smmu_domain->mmu_notifiers, list) { + list_for_each_entry(smmu_mn, &tbl->mmu_notifiers, list) { if (smmu_mn->mn.mm == mm) { refcount_inc(&smmu_mn->refs); return smmu_mn; } } - cd = arm_smmu_alloc_shared_cd(tbl, mm); - if (IS_ERR(cd)) - return ERR_CAST(cd); - - smmu_mn = kzalloc(sizeof(*smmu_mn), GFP_KERNEL); - if (!smmu_mn) { - ret = -ENOMEM; - goto err_free_cd; - } + mutex_lock(&arm_smmu_asid_lock); + smmu_mn = iommu_psdtable_alloc_shared(tbl, mm, &arm_smmu_asid_xa, + smmu->asid_bits); + mutex_unlock(&arm_smmu_asid_lock); + if (IS_ERR(smmu_mn)) + return ERR_CAST(smmu_mn); refcount_set(&smmu_mn->refs, 1); - smmu_mn->cd = cd; - smmu_mn->domain = smmu_domain; + smmu_mn->cookie = smmu_domain; smmu_mn->mn.ops = &arm_smmu_mmu_notifier_ops; ret = mmu_notifier_register(&smmu_mn->mn, mm); - if (ret) { - kfree(smmu_mn); + if (ret) goto err_free_cd; - } - ret = iommu_psdtable_write(tbl, &tbl->cfg, mm->pasid, cd); + ret = iommu_psdtable_write(tbl, &tbl->cfg, mm->pasid, + smmu_mn->vendor.cd); if (ret) goto err_put_notifier; - list_add(&smmu_mn->list, &smmu_domain->mmu_notifiers); + list_add(&smmu_mn->list, &tbl->mmu_notifiers); return smmu_mn; err_put_notifier: /* Frees smmu_mn */ mmu_notifier_put(&smmu_mn->mn); err_free_cd: - arm_smmu_free_shared_cd(tbl, cd); + iommu_psdtable_free_shared(tbl, &arm_smmu_asid_xa, smmu_mn->vendor.cd); return ERR_PTR(ret); } -static void arm_smmu_mmu_notifier_put(struct arm_smmu_mmu_notifier *smmu_mn) +static void +arm_smmu_mmu_notifier_put(struct iommu_psdtable_mmu_notifier *smmu_mn) { struct mm_struct *mm = smmu_mn->mn.mm; - struct arm_smmu_ctx_desc *cd = smmu_mn->cd; - struct arm_smmu_domain *smmu_domain = smmu_mn->domain; + struct arm_smmu_ctx_desc *cd = smmu_mn->vendor.cd; + struct arm_smmu_domain *smmu_domain = smmu_mn->cookie; struct iommu_pasid_table *tbl = smmu_domain->tbl; if (!refcount_dec_and_test(&smmu_mn->refs)) @@ -164,7 +151,7 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_mmu_notifier *smmu_mn) /* Frees smmu_mn */ mmu_notifier_put(&smmu_mn->mn); - arm_smmu_free_shared_cd(tbl, cd); + iommu_psdtable_free_shared(tbl, &arm_smmu_asid_xa, cd); } static struct iommu_sva * diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index bbc4dc75de72..e55567b4d2f4 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1987,7 +1987,6 @@ static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) mutex_init(&smmu_domain->init_mutex); INIT_LIST_HEAD(&smmu_domain->devices); spin_lock_init(&smmu_domain->devices_lock); - INIT_LIST_HEAD(&smmu_domain->mmu_notifiers); return &smmu_domain->domain; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 13ff024ab0d5..8a689b4316ac 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -737,8 +737,6 @@ struct arm_smmu_domain { struct list_head devices; spinlock_t devices_lock; - - struct list_head mmu_notifiers; }; static inline struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom) @@ -773,10 +771,6 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, void arm_smmu_sva_unbind(struct iommu_sva *handle); u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); void arm_smmu_sva_notifier_synchronize(void); -struct arm_smmu_ctx_desc * -arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm); -void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, - struct arm_smmu_ctx_desc *cd); #else /* CONFIG_ARM_SMMU_V3_SVA */ static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) { @@ -832,13 +826,5 @@ static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle) } static inline void arm_smmu_sva_notifier_synchronize(void) {} -struct arm_smmu_ctx_desc * -arm_smmu_alloc_shared_cd(struct iommu_pasid_table *tbl, struct mm_struct *mm) -{ - return ERR_PTR(-EINVAL); -} - -static inline void arm_smmu_free_shared_cd(struct iommu_pasid_table *tbl, - struct arm_smmu_ctx_desc *cd) {} #endif /* CONFIG_ARM_SMMU_V3_SVA */ #endif /* _ARM_SMMU_V3_H */ From patchwork Fri Apr 23 09:51:45 2021 Content-Type: text/plain; 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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsUL-00EIjS-8I for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5FC83165C; Fri, 23 Apr 2021 02:52:40 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 37B5E3F774; Fri, 23 Apr 2021 02:52:35 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 09/11] iommu/virtio: Implement sva bind/unbind calls Date: Fri, 23 Apr 2021 15:21:45 +0530 Message-Id: <20210423095147.27922-10-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025241_414305_B2842B02 X-CRM114-Status: GOOD ( 18.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SVA bind and unbind implementations will allow to prepare translation context with CPU page tables that can be programmed into host iommu hardware to realize shared address space utilization between the CPU and virtualized devices using virtio-iommu. Signed-off-by: Vivek Gautam --- drivers/iommu/virtio-iommu.c | 199 +++++++++++++++++++++++++++++- include/uapi/linux/virtio_iommu.h | 2 + 2 files changed, 199 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 250c137a211b..08f1294baeab 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -14,6 +14,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -28,6 +31,7 @@ #include #include "iommu-pasid-table.h" #include "iommu-sva-lib.h" +#include "io-pgtable-arm.h" #define MSI_IOVA_BASE 0x8000000 #define MSI_IOVA_LENGTH 0x100000 @@ -41,6 +45,7 @@ DEFINE_XARRAY_ALLOC1(viommu_asid_xa); static DEFINE_MUTEX(sva_lock); static DEFINE_MUTEX(iopf_lock); +static DEFINE_MUTEX(viommu_asid_lock); struct viommu_dev_pri_work { struct work_struct work; @@ -88,10 +93,22 @@ struct viommu_mapping { struct viommu_mm { int pasid; u64 archid; + struct viommu_sva_bond *bond; struct io_pgtable_ops *ops; struct viommu_domain *domain; }; +struct viommu_sva_bond { + struct iommu_sva sva; + struct mm_struct *mm; + struct iommu_psdtable_mmu_notifier *viommu_mn; + struct list_head list; + refcount_t refs; +}; + +#define sva_to_viommu_bond(handle) \ + container_of(handle, struct viommu_sva_bond, sva) + struct viommu_domain { struct iommu_domain domain; struct viommu_dev *viommu; @@ -136,6 +153,7 @@ struct viommu_endpoint { bool pri_supported; bool sva_enabled; bool iopf_enabled; + struct list_head bonds; }; struct viommu_ep_entry { @@ -1423,14 +1441,15 @@ static int viommu_attach_pasid_table(struct viommu_endpoint *vdev, pst_cfg->iommu_dev = viommu->dev->parent; + mutex_lock(&viommu_asid_lock); /* Prepare PASID tables info to allocate a new table */ ret = viommu_prepare_pst(vdev, pst_cfg, fmt); if (ret) - return ret; + goto err_out_unlock; ret = iommu_psdtable_alloc(tbl, pst_cfg); if (ret) - return ret; + goto err_out_unlock; pst_cfg->iommu_dev = viommu->dev->parent; pst_cfg->fmt = PASID_TABLE_ARM_SMMU_V3; @@ -1452,6 +1471,7 @@ static int viommu_attach_pasid_table(struct viommu_endpoint *vdev, if (ret) goto err_free_ops; } + mutex_unlock(&viommu_asid_lock); } else { /* TODO: otherwise, check for compatibility with vdev. */ return -ENOSYS; @@ -1467,6 +1487,8 @@ static int viommu_attach_pasid_table(struct viommu_endpoint *vdev, err_free_psdtable: iommu_psdtable_free(tbl, &tbl->cfg); +err_out_unlock: + mutex_unlock(&viommu_asid_lock); return ret; } @@ -1706,6 +1728,7 @@ static struct iommu_device *viommu_probe_device(struct device *dev) vdev->dev = dev; vdev->viommu = viommu; INIT_LIST_HEAD(&vdev->resv_regions); + INIT_LIST_HEAD(&vdev->bonds); dev_iommu_priv_set(dev, vdev); if (viommu->probe_size) { @@ -1755,6 +1778,175 @@ static int viommu_of_xlate(struct device *dev, struct of_phandle_args *args) return iommu_fwspec_add_ids(dev, args->args, 1); } +static u32 viommu_sva_get_pasid(struct iommu_sva *handle) +{ + struct viommu_sva_bond *bond = sva_to_viommu_bond(handle); + + return bond->mm->pasid; +} + +static void viommu_mmu_notifier_free(struct mmu_notifier *mn) +{ + kfree(mn_to_pstiommu(mn)); +} + +static struct mmu_notifier_ops viommu_mmu_notifier_ops = { + .free_notifier = viommu_mmu_notifier_free, +}; + +/* Allocate or get existing MMU notifier for this {domain, mm} pair */ +static struct iommu_psdtable_mmu_notifier * +viommu_mmu_notifier_get(struct viommu_domain *vdomain, struct mm_struct *mm, + u32 asid_bits) +{ + int ret; + struct iommu_psdtable_mmu_notifier *viommu_mn; + struct iommu_pasid_table *tbl = vdomain->pasid_tbl; + + list_for_each_entry(viommu_mn, &tbl->mmu_notifiers, list) { + if (viommu_mn->mn.mm == mm) { + refcount_inc(&viommu_mn->refs); + return viommu_mn; + } + } + + mutex_lock(&viommu_asid_lock); + viommu_mn = iommu_psdtable_alloc_shared(tbl, mm, &viommu_asid_xa, + asid_bits); + mutex_unlock(&viommu_asid_lock); + if (IS_ERR(viommu_mn)) + return ERR_CAST(viommu_mn); + + refcount_set(&viommu_mn->refs, 1); + viommu_mn->cookie = vdomain; + viommu_mn->mn.ops = &viommu_mmu_notifier_ops; + + ret = mmu_notifier_register(&viommu_mn->mn, mm); + if (ret) + goto err_free_cd; + + ret = iommu_psdtable_write(tbl, &tbl->cfg, mm->pasid, + viommu_mn->vendor.cd); + if (ret) + goto err_put_notifier; + + list_add(&viommu_mn->list, &tbl->mmu_notifiers); + return viommu_mn; + +err_put_notifier: + /* Frees viommu_mn */ + mmu_notifier_put(&viommu_mn->mn); +err_free_cd: + iommu_psdtable_free_shared(tbl, &viommu_asid_xa, viommu_mn->vendor.cd); + return ERR_PTR(ret); +} + +static void +viommu_mmu_notifier_put(struct iommu_psdtable_mmu_notifier *viommu_mn) +{ + struct mm_struct *mm = viommu_mn->mn.mm; + struct viommu_domain *vdomain = viommu_mn->cookie; + struct iommu_pasid_table *tbl = vdomain->pasid_tbl; + u16 asid = viommu_mn->vendor.cd->asid; + + if (!refcount_dec_and_test(&viommu_mn->refs)) + return; + + list_del(&viommu_mn->list); + iommu_psdtable_write(tbl, &tbl->cfg, mm->pasid, NULL); + + /* + * If we went through clear(), we've already invalidated, and no + * new TLB entry can have been formed. + */ + if (!viommu_mn->cleared) + iommu_psdtable_flush_tlb(tbl, vdomain, asid); + + /* Frees smmu_mn */ + mmu_notifier_put(&viommu_mn->mn); + iommu_psdtable_free_shared(tbl, &viommu_asid_xa, viommu_mn->vendor.cd); +} + +static struct iommu_sva * +__viommu_sva_bind(struct device *dev, struct mm_struct *mm) +{ + int ret; + struct viommu_sva_bond *bond; + struct iommu_domain *domain = iommu_get_domain_for_dev(dev); + struct viommu_domain *vdomain = to_viommu_domain(domain); + struct viommu_endpoint *vdev = dev_iommu_priv_get(dev); + struct virtio_iommu_probe_table_format *desc = vdev->pgtf; + + if (!vdev || !vdev->sva_enabled) + return ERR_PTR(-ENODEV); + + /* If bind() was already called for this {dev, mm} pair, reuse it. */ + list_for_each_entry(bond, &vdev->bonds, list) { + if (bond->mm == mm) { + refcount_inc(&bond->refs); + return &bond->sva; + } + } + + bond = kzalloc(sizeof(*bond), GFP_KERNEL); + if (!bond) + return ERR_PTR(-ENOMEM); + + /* Allocate a PASID for this mm if necessary */ + ret = iommu_sva_alloc_pasid(mm, 1, (1U << vdev->pasid_bits) - 1); + if (ret) + goto err_free_bond; + + bond->mm = mm; + bond->sva.dev = dev; + refcount_set(&bond->refs, 1); + + bond->viommu_mn = viommu_mmu_notifier_get(vdomain, mm, desc->asid_bits); + if (IS_ERR(bond->viommu_mn)) { + ret = PTR_ERR(bond->viommu_mn); + goto err_free_pasid; + } + + list_add(&bond->list, &vdev->bonds); + return &bond->sva; + +err_free_pasid: + iommu_sva_free_pasid(mm); +err_free_bond: + kfree(bond); + return ERR_PTR(ret); +} + +/* closely follows arm_smmu_sva_bind() */ +static struct iommu_sva *viommu_sva_bind(struct device *dev, + struct mm_struct *mm, void *drvdata) +{ + struct iommu_sva *handle; + + mutex_lock(&sva_lock); + handle = __viommu_sva_bind(dev, mm); + mutex_unlock(&sva_lock); + return handle; +} + +void viommu_sva_unbind(struct iommu_sva *handle) +{ + struct viommu_sva_bond *bond = sva_to_viommu_bond(handle); + struct viommu_endpoint *vdev = dev_iommu_priv_get(handle->dev); + + if (vdev->pri_supported) + iopf_queue_flush_dev(handle->dev); + + mutex_lock(&sva_lock); + if (refcount_dec_and_test(&bond->refs)) { + list_del(&bond->list); + viommu_mmu_notifier_put(bond->viommu_mn); + iommu_sva_free_pasid(bond->mm); + kfree(bond); + } + mutex_unlock(&sva_lock); +} + static bool viommu_endpoint_iopf_supported(struct viommu_endpoint *vdev) { /* TODO: support Stall model later */ @@ -1960,6 +2152,9 @@ static struct iommu_ops viommu_ops = { .dev_feat_enabled = viommu_dev_feature_enabled, .dev_enable_feat = viommu_dev_enable_feature, .dev_disable_feat = viommu_dev_disable_feature, + .sva_bind = viommu_sva_bind, + .sva_unbind = viommu_sva_unbind, + .sva_get_pasid = viommu_sva_get_pasid, }; static int viommu_init_vqs(struct viommu_dev *viommu) diff --git a/include/uapi/linux/virtio_iommu.h b/include/uapi/linux/virtio_iommu.h index 88a3db493108..c12d9b6a7243 100644 --- a/include/uapi/linux/virtio_iommu.h +++ b/include/uapi/linux/virtio_iommu.h @@ -122,6 +122,8 @@ struct virtio_iommu_req_attach_pst_arm { #define VIRTIO_IOMMU_PGTF_ARM_HPD0 (1ULL << 41) #define VIRTIO_IOMMU_PGTF_ARM_EPD1 (1 << 23) +#define VIRTIO_IOMMU_PGTF_ARM_IPS_SHIFT 32 +#define VIRTIO_IOMMU_PGTF_ARM_IPS_MASK 0x7 #define VIRTIO_IOMMU_PGTF_ARM_TG0_SHIFT 14 #define VIRTIO_IOMMU_PGTF_ARM_TG0_MASK 0x3 #define VIRTIO_IOMMU_PGTF_ARM_SH0_SHIFT 12 From patchwork Fri Apr 23 09:51:46 2021 Content-Type: text/plain; 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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsUP-00EIkc-UY for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:48 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 009CB1682; Fri, 23 Apr 2021 02:52:45 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CD2393F774; Fri, 23 Apr 2021 02:52:40 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 10/11] uapi/virtio-iommu: Add a new request type to send page response Date: Fri, 23 Apr 2021 15:21:46 +0530 Message-Id: <20210423095147.27922-11-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025246_049460_EBC416EC X-CRM114-Status: UNSURE ( 9.15 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Once the page faults are handled, the response has to be sent to virtio-iommu backend, from where it can be sent to the host to prepare the response to a generated io page fault by the device. Add a new virt-queue request type to handle this. Signed-off-by: Vivek Gautam --- include/uapi/linux/virtio_iommu.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/uapi/linux/virtio_iommu.h b/include/uapi/linux/virtio_iommu.h index c12d9b6a7243..1b174b98663a 100644 --- a/include/uapi/linux/virtio_iommu.h +++ b/include/uapi/linux/virtio_iommu.h @@ -48,6 +48,7 @@ struct virtio_iommu_config { #define VIRTIO_IOMMU_T_PROBE 0x05 #define VIRTIO_IOMMU_T_ATTACH_TABLE 0x06 #define VIRTIO_IOMMU_T_INVALIDATE 0x07 +#define VIRTIO_IOMMU_T_PAGE_RESP 0x08 /* Status types */ #define VIRTIO_IOMMU_S_OK 0x00 @@ -70,6 +71,23 @@ struct virtio_iommu_req_tail { __u8 reserved[3]; }; +struct virtio_iommu_req_page_resp { + struct virtio_iommu_req_head head; + __le32 domain; + __le32 endpoint; +#define VIRTIO_IOMMU_PAGE_RESP_PASID_VALID (1 << 0) + __le32 flags; + __le32 pasid; + __le32 grpid; +#define VIRTIO_IOMMU_PAGE_RESP_SUCCESS (0x0) +#define VIRTIO_IOMMU_PAGE_RESP_INVALID (0x1) +#define VIRTIO_IOMMU_PAGE_RESP_FAILURE (0x2) + __le16 resp_code; + __u8 pasid_valid; + __u8 reserved[9]; + struct virtio_iommu_req_tail tail; +}; + struct virtio_iommu_req_attach { struct virtio_iommu_req_head head; __le32 domain; From patchwork Fri Apr 23 09:51:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Kumar Gautam X-Patchwork-Id: 12220037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB953C433ED for ; Fri, 23 Apr 2021 09:56:41 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2CDF9613BE for ; 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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lZsUU-00EIlU-6f for linux-arm-kernel@lists.infradead.org; Fri, 23 Apr 2021 09:52:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 94D261684; Fri, 23 Apr 2021 02:52:49 -0700 (PDT) Received: from usa.arm.com (a074945.blr.arm.com [10.162.16.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6D48D3F774; Fri, 23 Apr 2021 02:52:45 -0700 (PDT) From: Vivek Gautam To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, virtualization@lists.linux-foundation.org Cc: joro@8bytes.org, will.deacon@arm.com, mst@redhat.com, robin.murphy@arm.com, jean-philippe@linaro.org, eric.auger@redhat.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, Lorenzo.Pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, Vivek Gautam Subject: [PATCH RFC v1 11/11] iommu/virtio: Add support to send page response Date: Fri, 23 Apr 2021 15:21:47 +0530 Message-Id: <20210423095147.27922-12-vivek.gautam@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210423095147.27922-1-vivek.gautam@arm.com> References: <20210423095147.27922-1-vivek.gautam@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_025250_307460_9E8BB336 X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add page_response iommu ops callback to send page response to the device that generated io page fault. Signed-off-by: Vivek Gautam --- drivers/iommu/virtio-iommu.c | 47 ++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 08f1294baeab..6d62d9eae452 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -1778,6 +1778,52 @@ static int viommu_of_xlate(struct device *dev, struct of_phandle_args *args) return iommu_fwspec_add_ids(dev, args->args, 1); } +static int viommu_page_response(struct device *dev, + struct iommu_fault_event *evt, + struct iommu_page_response *resp) +{ + struct iommu_domain *domain = iommu_get_domain_for_dev(dev); + struct viommu_domain *vdomain = to_viommu_domain(domain); + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + struct viommu_endpoint *vdev = dev_iommu_priv_get(dev); + struct viommu_dev *viommu = vdev->viommu; + bool pasid_valid = resp->flags & IOMMU_PAGE_RESP_PASID_VALID; + struct virtio_iommu_req_page_resp req = { + .head.type = VIRTIO_IOMMU_T_PAGE_RESP, + .domain = cpu_to_le32(vdomain->id), + .endpoint = cpu_to_le32(fwspec->ids[0]), + }; + + if (vdev->pri_supported) { + bool needs_pasid = (evt->fault.prm.flags & + IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID); + + req.pasid_valid = needs_pasid && pasid_valid; + req.flags = cpu_to_le32((needs_pasid && pasid_valid) ? + VIRTIO_IOMMU_PAGE_RESP_PASID_VALID : 0); + req.pasid = cpu_to_le32(resp->pasid); + req.grpid = cpu_to_le32(resp->grpid); + + switch (resp->code) { + case IOMMU_PAGE_RESP_FAILURE: + req.resp_code = cpu_to_le16(VIRTIO_IOMMU_PAGE_RESP_FAILURE); + break; + case IOMMU_PAGE_RESP_INVALID: + req.resp_code = cpu_to_le16(VIRTIO_IOMMU_PAGE_RESP_INVALID); + break; + case IOMMU_PAGE_RESP_SUCCESS: + req.resp_code = cpu_to_le16(VIRTIO_IOMMU_PAGE_RESP_SUCCESS); + break; + default: + return -EINVAL; + } + } else { + return -ENODEV; + } + + return viommu_send_req_sync(viommu, &req, sizeof(req)); +} + static u32 viommu_sva_get_pasid(struct iommu_sva *handle) { struct viommu_sva_bond *bond = sva_to_viommu_bond(handle); @@ -2155,6 +2201,7 @@ static struct iommu_ops viommu_ops = { .sva_bind = viommu_sva_bind, .sva_unbind = viommu_sva_unbind, .sva_get_pasid = viommu_sva_get_pasid, + .page_response = viommu_page_response, }; static int viommu_init_vqs(struct viommu_dev *viommu)