From patchwork Sat Apr 24 20:51:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12222789 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B29C6C433B4 for ; Sat, 24 Apr 2021 20:51:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 91DDA61249 for ; Sat, 24 Apr 2021 20:51:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235872AbhDXUw2 (ORCPT ); Sat, 24 Apr 2021 16:52:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40740 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233485AbhDXUw2 (ORCPT ); Sat, 24 Apr 2021 16:52:28 -0400 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92B59C06174A; Sat, 24 Apr 2021 13:51:49 -0700 (PDT) Received: by mail-pg1-x52d.google.com with SMTP id f29so428316pgm.8; Sat, 24 Apr 2021 13:51:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=7btaIOfsoPEdYOBosrv9eDASHGVgDcN6WbpmphUXOvk=; b=JtX3VxayhXXYHKH7K5xpU/XvccJioa4farjJv2Oy4dFep7ZCOIwsk8iFdRRKfXfoTO L23kj3NZKgWBrOna78Jdp2a6JWjQ0AkRLBPmeEvB022MHlvbPMRZPrZ2b2eKoDadNe5a //b3TXcO/l015lhb7Wej+zhJVgDrcCOl/5ohIVSCTGWKwlMQ1rLhbyPEvQT++i8y38EN FvLVnnbsHlRyUMM+s/uiCkMmBZDoODqt1upalhEC6uVqLYTetsQ28EQ9iNy+ASyq2u2Q Hlnh9wE6ZzxEM3UPXswFqbjMumaCF8pOIFkBcBjTT8L2a5OlEC/bjtFcMOUM6M/69LNF VwBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7btaIOfsoPEdYOBosrv9eDASHGVgDcN6WbpmphUXOvk=; b=cUjtMZGv/szUr4z2xSojWGRdWu430kyZtmCdPIDyhD4yG1MlMgcLBpsJXsLl5jKBf6 q2VF5cXikB7DT8+V/0Tta6ssPB6a1tFI+alAQCN/oz/vC/dsCwt9qDI6WUXq853RtPKC COWS2eftzvTXg8DhCyr6d8Uv/twYA9vJkfRIpc1dcq3NJwGHneOkN8hS6cwnDkHioKFw 0atCkr0kU/lxXKiozKB73uDShOB6LI/E2NGpwo8qfc0NWhlbsaGoJjDHvFWdSV4FArqP xJf+LP8nfQn4Sxo6bx4Tj5jFvkMvTz3s7H7eIs40cZJHtQpiT1vqFptmDIYBI4Thv/Ok 91pg== X-Gm-Message-State: AOAM532vAFNOAQfc4/lsmAtsiQNHe4CMGu0Lh2ZwB7/ZGyc5SR+HoCfy gCyLXwy5kEmak40xxcplDA1/snmekvfqP2Dj X-Google-Smtp-Source: ABdhPJy2hLtZchvAod3QBxvsOX0rxdvNteJx33NDV1iMxUSd7E/LM3MPyF5J+tj6qgHeE/VNiTqO/Q== X-Received: by 2002:a62:7f84:0:b029:25f:b701:38e5 with SMTP id a126-20020a627f840000b029025fb70138e5mr10240375pfd.5.1619297508862; Sat, 24 Apr 2021 13:51:48 -0700 (PDT) Received: from z640-arch.lan ([2602:61:7344:f100::678]) by smtp.gmail.com with ESMTPSA id w9sm7584489pfn.213.2021.04.24.13.51.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Apr 2021 13:51:48 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Ilya Lipnitskiy , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] MIPS: kernel: proc: fix trivial style errors Date: Sat, 24 Apr 2021 13:51:25 -0700 Message-Id: <20210424205127.396630-2-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210424205127.396630-1-ilya.lipnitskiy@gmail.com> References: <20210424205127.396630-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Fix the following checkpatch errors - no logic changes: WARNING: Block comments use a trailing */ on a separate line + * */ ERROR: space prohibited before open square bracket '[' + char fmt [64]; ERROR: space prohibited before that ',' (ctx:WxE) + seq_printf(m, "%s0x%04x", i ? ", " : "" , ERROR: trailing whitespace +^Iseq_printf(m, "isa\t\t\t:"); $ ERROR: trailing statements should be on next line Signed-off-by: Ilya Lipnitskiy --- arch/mips/kernel/proc.c | 67 ++++++++++++++++++++++++++--------------- 1 file changed, 43 insertions(+), 24 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 4184d641f05e..053847c0d4cd 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -19,8 +19,8 @@ unsigned int vced_count, vcei_count; /* - * * No lock; only written during early bootup by CPU 0. - * */ + * No lock; only written during early bootup by CPU 0. + */ static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain); int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb) @@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) unsigned long n = (unsigned long) v - 1; unsigned int version = cpu_data[n].processor_id; unsigned int fp_vers = cpu_data[n].fpu_id; - char fmt [64]; + char fmt[64]; int i; #ifdef CONFIG_SMP @@ -78,12 +78,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "count: %d, address/irw mask: [", cpu_data[n].watch_reg_count); for (i = 0; i < cpu_data[n].watch_reg_count; i++) - seq_printf(m, "%s0x%04x", i ? ", " : "" , + seq_printf(m, "%s0x%04x", i ? ", " : "", cpu_data[n].watch_reg_masks[i]); seq_printf(m, "]\n"); } - seq_printf(m, "isa\t\t\t:"); + seq_printf(m, "isa\t\t\t:"); if (cpu_has_mips_1) seq_printf(m, " mips1"); if (cpu_has_mips_2) @@ -113,25 +113,44 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "\n"); seq_printf(m, "ASEs implemented\t:"); - if (cpu_has_mips16) seq_printf(m, "%s", " mips16"); - if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2"); - if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx"); - if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d"); - if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips"); - if (cpu_has_dsp) seq_printf(m, "%s", " dsp"); - if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2"); - if (cpu_has_dsp3) seq_printf(m, "%s", " dsp3"); - if (cpu_has_mipsmt) seq_printf(m, "%s", " mt"); - if (cpu_has_mmips) seq_printf(m, "%s", " micromips"); - if (cpu_has_vz) seq_printf(m, "%s", " vz"); - if (cpu_has_msa) seq_printf(m, "%s", " msa"); - if (cpu_has_eva) seq_printf(m, "%s", " eva"); - if (cpu_has_htw) seq_printf(m, "%s", " htw"); - if (cpu_has_xpa) seq_printf(m, "%s", " xpa"); - if (cpu_has_loongson_mmi) seq_printf(m, "%s", " loongson-mmi"); - if (cpu_has_loongson_cam) seq_printf(m, "%s", " loongson-cam"); - if (cpu_has_loongson_ext) seq_printf(m, "%s", " loongson-ext"); - if (cpu_has_loongson_ext2) seq_printf(m, "%s", " loongson-ext2"); + if (cpu_has_mips16) + seq_printf(m, "%s", " mips16"); + if (cpu_has_mips16e2) + seq_printf(m, "%s", " mips16e2"); + if (cpu_has_mdmx) + seq_printf(m, "%s", " mdmx"); + if (cpu_has_mips3d) + seq_printf(m, "%s", " mips3d"); + if (cpu_has_smartmips) + seq_printf(m, "%s", " smartmips"); + if (cpu_has_dsp) + seq_printf(m, "%s", " dsp"); + if (cpu_has_dsp2) + seq_printf(m, "%s", " dsp2"); + if (cpu_has_dsp3) + seq_printf(m, "%s", " dsp3"); + if (cpu_has_mipsmt) + seq_printf(m, "%s", " mt"); + if (cpu_has_mmips) + seq_printf(m, "%s", " micromips"); + if (cpu_has_vz) + seq_printf(m, "%s", " vz"); + if (cpu_has_msa) + seq_printf(m, "%s", " msa"); + if (cpu_has_eva) + seq_printf(m, "%s", " eva"); + if (cpu_has_htw) + seq_printf(m, "%s", " htw"); + if (cpu_has_xpa) + seq_printf(m, "%s", " xpa"); + if (cpu_has_loongson_mmi) + seq_printf(m, "%s", " loongson-mmi"); + if (cpu_has_loongson_cam) + seq_printf(m, "%s", " loongson-cam"); + if (cpu_has_loongson_ext) + seq_printf(m, "%s", " loongson-ext"); + if (cpu_has_loongson_ext2) + seq_printf(m, "%s", " loongson-ext2"); seq_printf(m, "\n"); if (cpu_has_mmips) { From patchwork Sat Apr 24 20:51:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12222791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF587C43460 for ; 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Sat, 24 Apr 2021 13:51:49 -0700 (PDT) Received: from z640-arch.lan ([2602:61:7344:f100::678]) by smtp.gmail.com with ESMTPSA id w9sm7584489pfn.213.2021.04.24.13.51.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Apr 2021 13:51:49 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Ilya Lipnitskiy , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf Date: Sat, 24 Apr 2021 13:51:26 -0700 Message-Id: <20210424205127.396630-3-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210424205127.396630-1-ilya.lipnitskiy@gmail.com> References: <20210424205127.396630-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Fix checkpatch WARNING: Prefer seq_puts to seq_printf Signed-off-by: Ilya Lipnitskiy --- arch/mips/kernel/proc.c | 76 ++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 053847c0d4cd..7d8481d9acc3 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -80,78 +80,78 @@ static int show_cpuinfo(struct seq_file *m, void *v) for (i = 0; i < cpu_data[n].watch_reg_count; i++) seq_printf(m, "%s0x%04x", i ? ", " : "", cpu_data[n].watch_reg_masks[i]); - seq_printf(m, "]\n"); + seq_puts(m, "]\n"); } - seq_printf(m, "isa\t\t\t:"); + seq_puts(m, "isa\t\t\t:"); if (cpu_has_mips_1) - seq_printf(m, " mips1"); + seq_puts(m, " mips1"); if (cpu_has_mips_2) - seq_printf(m, "%s", " mips2"); + seq_puts(m, " mips2"); if (cpu_has_mips_3) - seq_printf(m, "%s", " mips3"); + seq_puts(m, " mips3"); if (cpu_has_mips_4) - seq_printf(m, "%s", " mips4"); + seq_puts(m, " mips4"); if (cpu_has_mips_5) - seq_printf(m, "%s", " mips5"); + seq_puts(m, " mips5"); if (cpu_has_mips32r1) - seq_printf(m, "%s", " mips32r1"); + seq_puts(m, " mips32r1"); if (cpu_has_mips32r2) - seq_printf(m, "%s", " mips32r2"); + seq_puts(m, " mips32r2"); if (cpu_has_mips32r5) - seq_printf(m, "%s", " mips32r5"); + seq_puts(m, " mips32r5"); if (cpu_has_mips32r6) - seq_printf(m, "%s", " mips32r6"); + seq_puts(m, " mips32r6"); if (cpu_has_mips64r1) - seq_printf(m, "%s", " mips64r1"); + seq_puts(m, " mips64r1"); if (cpu_has_mips64r2) - seq_printf(m, "%s", " mips64r2"); + seq_puts(m, " mips64r2"); if (cpu_has_mips64r5) - seq_printf(m, "%s", " mips64r5"); + seq_puts(m, " mips64r5"); if (cpu_has_mips64r6) - seq_printf(m, "%s", " mips64r6"); - seq_printf(m, "\n"); + seq_puts(m, " mips64r6"); + seq_puts(m, "\n"); - seq_printf(m, "ASEs implemented\t:"); + seq_puts(m, "ASEs implemented\t:"); if (cpu_has_mips16) - seq_printf(m, "%s", " mips16"); + seq_puts(m, " mips16"); if (cpu_has_mips16e2) - seq_printf(m, "%s", " mips16e2"); + seq_puts(m, " mips16e2"); if (cpu_has_mdmx) - seq_printf(m, "%s", " mdmx"); + seq_puts(m, " mdmx"); if (cpu_has_mips3d) - seq_printf(m, "%s", " mips3d"); + seq_puts(m, " mips3d"); if (cpu_has_smartmips) - seq_printf(m, "%s", " smartmips"); + seq_puts(m, " smartmips"); if (cpu_has_dsp) - seq_printf(m, "%s", " dsp"); + seq_puts(m, " dsp"); if (cpu_has_dsp2) - seq_printf(m, "%s", " dsp2"); + seq_puts(m, " dsp2"); if (cpu_has_dsp3) - seq_printf(m, "%s", " dsp3"); + seq_puts(m, " dsp3"); if (cpu_has_mipsmt) - seq_printf(m, "%s", " mt"); + seq_puts(m, " mt"); if (cpu_has_mmips) - seq_printf(m, "%s", " micromips"); + seq_puts(m, " micromips"); if (cpu_has_vz) - seq_printf(m, "%s", " vz"); + seq_puts(m, " vz"); if (cpu_has_msa) - seq_printf(m, "%s", " msa"); + seq_puts(m, " msa"); if (cpu_has_eva) - seq_printf(m, "%s", " eva"); + seq_puts(m, " eva"); if (cpu_has_htw) - seq_printf(m, "%s", " htw"); + seq_puts(m, " htw"); if (cpu_has_xpa) - seq_printf(m, "%s", " xpa"); + seq_puts(m, " xpa"); if (cpu_has_loongson_mmi) - seq_printf(m, "%s", " loongson-mmi"); + seq_puts(m, " loongson-mmi"); if (cpu_has_loongson_cam) - seq_printf(m, "%s", " loongson-cam"); + seq_puts(m, " loongson-cam"); if (cpu_has_loongson_ext) - seq_printf(m, "%s", " loongson-ext"); + seq_puts(m, " loongson-ext"); if (cpu_has_loongson_ext2) - seq_printf(m, "%s", " loongson-ext2"); - seq_printf(m, "\n"); + seq_puts(m, " loongson-ext2"); + seq_puts(m, "\n"); if (cpu_has_mmips) { seq_printf(m, "micromips kernel\t: %s\n", @@ -182,7 +182,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) raw_notifier_call_chain(&proc_cpuinfo_chain, 0, &proc_cpuinfo_notifier_args); - seq_printf(m, "\n"); + seq_puts(m, "\n"); return 0; } From patchwork Sat Apr 24 20:51:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12222793 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4890C433ED for ; Sat, 24 Apr 2021 20:51:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AFE45613BB for ; Sat, 24 Apr 2021 20:51:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237218AbhDXUwa (ORCPT ); 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Sat, 24 Apr 2021 13:51:49 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Ilya Lipnitskiy , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] MIPS: kernel: proc: add CPU option reporting Date: Sat, 24 Apr 2021 13:51:27 -0700 Message-Id: <20210424205127.396630-4-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210424205127.396630-1-ilya.lipnitskiy@gmail.com> References: <20210424205127.396630-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Hauke Mehrtens Many MIPS CPUs have optional CPU features which are not activated for all CPU cores. Print the CPU options, which are implemented in the core, in /proc/cpuinfo. This makes it possible to see which features are supported and which are not supported. This should cover all standard MIPS extensions. Before, it only printed information about the main MIPS ASEs. Signed-off-by: Hauke Mehrtens Changes from original patch[0]: - Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a ("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()") - Use seq_puts instead of seq_printf as suggested by checkpatch. - Minor commit message reword [0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/ Signed-off-by: Ilya Lipnitskiy --- arch/mips/kernel/proc.c | 110 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 7d8481d9acc3..68ad09cc6516 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -157,6 +157,116 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "micromips kernel\t: %s\n", (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no"); } + + seq_puts(m, "Options implemented\t:"); + if (cpu_has_tlb) + seq_puts(m, " tlb"); + if (cpu_has_ftlb) + seq_puts(m, " ftlb"); + if (cpu_has_tlbinv) + seq_puts(m, " tlbinv"); + if (cpu_has_segments) + seq_puts(m, " segments"); + if (cpu_has_rixiex) + seq_puts(m, " rixiex"); + if (cpu_has_ldpte) + seq_puts(m, " ldpte"); + if (cpu_has_maar) + seq_puts(m, " maar"); + if (cpu_has_rw_llb) + seq_puts(m, " rw_llb"); + if (cpu_has_4kex) + seq_puts(m, " 4kex"); + if (cpu_has_3k_cache) + seq_puts(m, " 3k_cache"); + if (cpu_has_4k_cache) + seq_puts(m, " 4k_cache"); + if (cpu_has_tx39_cache) + seq_puts(m, " tx39_cache"); + if (cpu_has_octeon_cache) + seq_puts(m, " octeon_cache"); + if (cpu_has_fpu) + seq_puts(m, " fpu"); + if (cpu_has_32fpr) + seq_puts(m, " 32fpr"); + if (cpu_has_cache_cdex_p) + seq_puts(m, " cache_cdex_p"); + if (cpu_has_cache_cdex_s) + seq_puts(m, " cache_cdex_s"); + if (cpu_has_prefetch) + seq_puts(m, " prefetch"); + if (cpu_has_mcheck) + seq_puts(m, " mcheck"); + if (cpu_has_ejtag) + seq_puts(m, " ejtag"); + if (cpu_has_llsc) + seq_puts(m, " llsc"); + if (cpu_has_guestctl0ext) + seq_puts(m, " guestctl0ext"); + if (cpu_has_guestctl1) + seq_puts(m, " guestctl1"); + if (cpu_has_guestctl2) + seq_puts(m, " guestctl2"); + if (cpu_has_guestid) + seq_puts(m, " guestid"); + if (cpu_has_drg) + seq_puts(m, " drg"); + if (cpu_has_rixi) + seq_puts(m, " rixi"); + if (cpu_has_lpa) + seq_puts(m, " lpa"); + if (cpu_has_mvh) + seq_puts(m, " mvh"); + if (cpu_has_vtag_icache) + seq_puts(m, " vtag_icache"); + if (cpu_has_dc_aliases) + seq_puts(m, " dc_aliases"); + if (cpu_has_ic_fills_f_dc) + seq_puts(m, " ic_fills_f_dc"); + if (cpu_has_pindexed_dcache) + seq_puts(m, " pindexed_dcache"); + if (cpu_has_userlocal) + seq_puts(m, " userlocal"); + if (cpu_has_nofpuex) + seq_puts(m, " nofpuex"); + if (cpu_has_vint) + seq_puts(m, " vint"); + if (cpu_has_veic) + seq_puts(m, " veic"); + if (cpu_has_inclusive_pcaches) + seq_puts(m, " inclusive_pcaches"); + if (cpu_has_perf_cntr_intr_bit) + seq_puts(m, " perf_cntr_intr_bit"); + if (cpu_has_ufr) + seq_puts(m, " ufr"); + if (cpu_has_fre) + seq_puts(m, " fre"); + if (cpu_has_cdmm) + seq_puts(m, " cdmm"); + if (cpu_has_small_pages) + seq_puts(m, " small_pages"); + if (cpu_has_nan_legacy) + seq_puts(m, " nan_legacy"); + if (cpu_has_nan_2008) + seq_puts(m, " nan_2008"); + if (cpu_has_ebase_wg) + seq_puts(m, " ebase_wg"); + if (cpu_has_badinstr) + seq_puts(m, " badinstr"); + if (cpu_has_badinstrp) + seq_puts(m, " badinstrp"); + if (cpu_has_contextconfig) + seq_puts(m, " contextconfig"); + if (cpu_has_perf) + seq_puts(m, " perf"); + if (cpu_has_shared_ftlb_ram) + seq_puts(m, " shared_ftlb_ram"); + if (cpu_has_shared_ftlb_entries) + seq_puts(m, " shared_ftlb_entries"); + if (cpu_has_mipsmt_pertccounters) + seq_puts(m, " mipsmt_pertccounters"); + seq_puts(m, "\n"); + seq_printf(m, "shadow register sets\t: %d\n", cpu_data[n].srsets); seq_printf(m, "kscratch registers\t: %d\n",