From patchwork Sat Apr 24 21:56:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12222821 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16143C433B4 for ; Sat, 24 Apr 2021 21:56:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB6456137D for ; Sat, 24 Apr 2021 21:56:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232482AbhDXV5D (ORCPT ); Sat, 24 Apr 2021 17:57:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231911AbhDXV5C (ORCPT ); Sat, 24 Apr 2021 17:57:02 -0400 Received: from mail-pg1-x533.google.com (mail-pg1-x533.google.com [IPv6:2607:f8b0:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 162CBC061574; Sat, 24 Apr 2021 14:56:22 -0700 (PDT) Received: by mail-pg1-x533.google.com with SMTP id s22so16497844pgk.6; Sat, 24 Apr 2021 14:56:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=7btaIOfsoPEdYOBosrv9eDASHGVgDcN6WbpmphUXOvk=; b=k89O1Qz8tYZgqoSxfukBAp9c/NFk/UPy4AAwdCny6AoQuAPxFnRgrhWa1wwnFMT+gi Ciu09uR4jh8Srr76faLqtCPJRwSGGK18MOd+kEOBKGec56B17BmbuXrVJcLL13tXICxO eW5cZ+yFXWS20LeZqlw8nnCCv3m4PUDK2P+IxrWrIRhu48QoVOJIYiFwHWkmUXQtkhEQ CXxmA8Zms1UeEWimZLjMJX2LdYsIpNL90+Ay+DUvhO8LJeVVwqSfQkG3AGbASBvWphwf B5SkemqmTyiikvuQKsGnE9eHt3c6/bz+kePG/52BdUoDnPknQZSeyCLmBsNyxBEKofc6 DJcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7btaIOfsoPEdYOBosrv9eDASHGVgDcN6WbpmphUXOvk=; b=gBzhraixmbfWLIkpbgPA3K1cPwrOZCsUA7LdNkfbC2ueHcA/533Mul9lBa6qRgdeRS FV9n6PctX4/31xs9H991FPeI5nYZVqFbWEYFYT6Bas9TzD8MCUfzQG/dvG7YeLk3OkRG 2+J1znPx1nLrvaqegxDAdBUaFsj5e6zIHgNVst7vWnul+YUdjCnH236FjnDAlzVF3h4r Y8ZsAOTgNWoKk8bLZvU2N38ERhCxKX9P1h3myrLqu4pujPsP4jixjNOkK8tJreacCGw0 g2Lr75i+aRPVP35w11fGIJ/qH2vR1jtYUppss1rVOtHMsGcUlhv1UId0n2sVB8QZDCTY 7BKg== X-Gm-Message-State: AOAM5317WQgO2OkNl4Y0vuuTnxgDALP9hF4xoQIC5ce5123xFODUDAwD Z+iJY4JP8ZDSHR1Rbap9Ewk= X-Google-Smtp-Source: ABdhPJzaztiKjaedfsJROxFqa76sqKoHykv3QPvJFfr8Bwc0162J5nvaUlv7fniMC4Bhlw4RAxTDmw== X-Received: by 2002:aa7:9108:0:b029:251:7caf:cec with SMTP id 8-20020aa791080000b02902517caf0cecmr10101138pfh.13.1619301380947; Sat, 24 Apr 2021 14:56:20 -0700 (PDT) Received: from z640-arch.lan ([2602:61:7344:f100::678]) by smtp.gmail.com with ESMTPSA id y10sm10344112pjt.22.2021.04.24.14.56.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Apr 2021 14:56:20 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Ilya Lipnitskiy , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] MIPS: kernel: proc: fix trivial style errors Date: Sat, 24 Apr 2021 14:56:16 -0700 Message-Id: <20210424215618.1017539-2-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> References: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Fix the following checkpatch errors - no logic changes: WARNING: Block comments use a trailing */ on a separate line + * */ ERROR: space prohibited before open square bracket '[' + char fmt [64]; ERROR: space prohibited before that ',' (ctx:WxE) + seq_printf(m, "%s0x%04x", i ? ", " : "" , ERROR: trailing whitespace +^Iseq_printf(m, "isa\t\t\t:"); $ ERROR: trailing statements should be on next line Signed-off-by: Ilya Lipnitskiy --- arch/mips/kernel/proc.c | 67 ++++++++++++++++++++++++++--------------- 1 file changed, 43 insertions(+), 24 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 4184d641f05e..053847c0d4cd 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -19,8 +19,8 @@ unsigned int vced_count, vcei_count; /* - * * No lock; only written during early bootup by CPU 0. - * */ + * No lock; only written during early bootup by CPU 0. + */ static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain); int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb) @@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) unsigned long n = (unsigned long) v - 1; unsigned int version = cpu_data[n].processor_id; unsigned int fp_vers = cpu_data[n].fpu_id; - char fmt [64]; + char fmt[64]; int i; #ifdef CONFIG_SMP @@ -78,12 +78,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "count: %d, address/irw mask: [", cpu_data[n].watch_reg_count); for (i = 0; i < cpu_data[n].watch_reg_count; i++) - seq_printf(m, "%s0x%04x", i ? ", " : "" , + seq_printf(m, "%s0x%04x", i ? ", " : "", cpu_data[n].watch_reg_masks[i]); seq_printf(m, "]\n"); } - seq_printf(m, "isa\t\t\t:"); + seq_printf(m, "isa\t\t\t:"); if (cpu_has_mips_1) seq_printf(m, " mips1"); if (cpu_has_mips_2) @@ -113,25 +113,44 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "\n"); seq_printf(m, "ASEs implemented\t:"); - if (cpu_has_mips16) seq_printf(m, "%s", " mips16"); - if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2"); - if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx"); - if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d"); - if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips"); - if (cpu_has_dsp) seq_printf(m, "%s", " dsp"); - if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2"); - if (cpu_has_dsp3) seq_printf(m, "%s", " dsp3"); - if (cpu_has_mipsmt) seq_printf(m, "%s", " mt"); - if (cpu_has_mmips) seq_printf(m, "%s", " micromips"); - if (cpu_has_vz) seq_printf(m, "%s", " vz"); - if (cpu_has_msa) seq_printf(m, "%s", " msa"); - if (cpu_has_eva) seq_printf(m, "%s", " eva"); - if (cpu_has_htw) seq_printf(m, "%s", " htw"); - if (cpu_has_xpa) seq_printf(m, "%s", " xpa"); - if (cpu_has_loongson_mmi) seq_printf(m, "%s", " loongson-mmi"); - if (cpu_has_loongson_cam) seq_printf(m, "%s", " loongson-cam"); - if (cpu_has_loongson_ext) seq_printf(m, "%s", " loongson-ext"); - if (cpu_has_loongson_ext2) seq_printf(m, "%s", " loongson-ext2"); + if (cpu_has_mips16) + seq_printf(m, "%s", " mips16"); + if (cpu_has_mips16e2) + seq_printf(m, "%s", " mips16e2"); + if (cpu_has_mdmx) + seq_printf(m, "%s", " mdmx"); + if (cpu_has_mips3d) + seq_printf(m, "%s", " mips3d"); + if (cpu_has_smartmips) + seq_printf(m, "%s", " smartmips"); + if (cpu_has_dsp) + seq_printf(m, "%s", " dsp"); + if (cpu_has_dsp2) + seq_printf(m, "%s", " dsp2"); + if (cpu_has_dsp3) + seq_printf(m, "%s", " dsp3"); + if (cpu_has_mipsmt) + seq_printf(m, "%s", " mt"); + if (cpu_has_mmips) + seq_printf(m, "%s", " micromips"); + if (cpu_has_vz) + seq_printf(m, "%s", " vz"); + if (cpu_has_msa) + seq_printf(m, "%s", " msa"); + if (cpu_has_eva) + seq_printf(m, "%s", " eva"); + if (cpu_has_htw) + seq_printf(m, "%s", " htw"); + if (cpu_has_xpa) + seq_printf(m, "%s", " xpa"); + if (cpu_has_loongson_mmi) + seq_printf(m, "%s", " loongson-mmi"); + if (cpu_has_loongson_cam) + seq_printf(m, "%s", " loongson-cam"); + if (cpu_has_loongson_ext) + seq_printf(m, "%s", " loongson-ext"); + if (cpu_has_loongson_ext2) + seq_printf(m, "%s", " loongson-ext2"); seq_printf(m, "\n"); if (cpu_has_mmips) { From patchwork Sat Apr 24 21:56:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12222817 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21D36C433B4 for ; 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Sat, 24 Apr 2021 14:56:21 -0700 (PDT) Received: from z640-arch.lan ([2602:61:7344:f100::678]) by smtp.gmail.com with ESMTPSA id y10sm10344112pjt.22.2021.04.24.14.56.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Apr 2021 14:56:21 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Ilya Lipnitskiy , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf Date: Sat, 24 Apr 2021 14:56:17 -0700 Message-Id: <20210424215618.1017539-3-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> References: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Fix checkpatch WARNING: Prefer seq_puts to seq_printf Signed-off-by: Ilya Lipnitskiy --- arch/mips/kernel/proc.c | 76 ++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 053847c0d4cd..7d8481d9acc3 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -80,78 +80,78 @@ static int show_cpuinfo(struct seq_file *m, void *v) for (i = 0; i < cpu_data[n].watch_reg_count; i++) seq_printf(m, "%s0x%04x", i ? ", " : "", cpu_data[n].watch_reg_masks[i]); - seq_printf(m, "]\n"); + seq_puts(m, "]\n"); } - seq_printf(m, "isa\t\t\t:"); + seq_puts(m, "isa\t\t\t:"); if (cpu_has_mips_1) - seq_printf(m, " mips1"); + seq_puts(m, " mips1"); if (cpu_has_mips_2) - seq_printf(m, "%s", " mips2"); + seq_puts(m, " mips2"); if (cpu_has_mips_3) - seq_printf(m, "%s", " mips3"); + seq_puts(m, " mips3"); if (cpu_has_mips_4) - seq_printf(m, "%s", " mips4"); + seq_puts(m, " mips4"); if (cpu_has_mips_5) - seq_printf(m, "%s", " mips5"); + seq_puts(m, " mips5"); if (cpu_has_mips32r1) - seq_printf(m, "%s", " mips32r1"); + seq_puts(m, " mips32r1"); if (cpu_has_mips32r2) - seq_printf(m, "%s", " mips32r2"); + seq_puts(m, " mips32r2"); if (cpu_has_mips32r5) - seq_printf(m, "%s", " mips32r5"); + seq_puts(m, " mips32r5"); if (cpu_has_mips32r6) - seq_printf(m, "%s", " mips32r6"); + seq_puts(m, " mips32r6"); if (cpu_has_mips64r1) - seq_printf(m, "%s", " mips64r1"); + seq_puts(m, " mips64r1"); if (cpu_has_mips64r2) - seq_printf(m, "%s", " mips64r2"); + seq_puts(m, " mips64r2"); if (cpu_has_mips64r5) - seq_printf(m, "%s", " mips64r5"); + seq_puts(m, " mips64r5"); if (cpu_has_mips64r6) - seq_printf(m, "%s", " mips64r6"); - seq_printf(m, "\n"); + seq_puts(m, " mips64r6"); + seq_puts(m, "\n"); - seq_printf(m, "ASEs implemented\t:"); + seq_puts(m, "ASEs implemented\t:"); if (cpu_has_mips16) - seq_printf(m, "%s", " mips16"); + seq_puts(m, " mips16"); if (cpu_has_mips16e2) - seq_printf(m, "%s", " mips16e2"); + seq_puts(m, " mips16e2"); if (cpu_has_mdmx) - seq_printf(m, "%s", " mdmx"); + seq_puts(m, " mdmx"); if (cpu_has_mips3d) - seq_printf(m, "%s", " mips3d"); + seq_puts(m, " mips3d"); if (cpu_has_smartmips) - seq_printf(m, "%s", " smartmips"); + seq_puts(m, " smartmips"); if (cpu_has_dsp) - seq_printf(m, "%s", " dsp"); + seq_puts(m, " dsp"); if (cpu_has_dsp2) - seq_printf(m, "%s", " dsp2"); + seq_puts(m, " dsp2"); if (cpu_has_dsp3) - seq_printf(m, "%s", " dsp3"); + seq_puts(m, " dsp3"); if (cpu_has_mipsmt) - seq_printf(m, "%s", " mt"); + seq_puts(m, " mt"); if (cpu_has_mmips) - seq_printf(m, "%s", " micromips"); + seq_puts(m, " micromips"); if (cpu_has_vz) - seq_printf(m, "%s", " vz"); + seq_puts(m, " vz"); if (cpu_has_msa) - seq_printf(m, "%s", " msa"); + seq_puts(m, " msa"); if (cpu_has_eva) - seq_printf(m, "%s", " eva"); + seq_puts(m, " eva"); if (cpu_has_htw) - seq_printf(m, "%s", " htw"); + seq_puts(m, " htw"); if (cpu_has_xpa) - seq_printf(m, "%s", " xpa"); + seq_puts(m, " xpa"); if (cpu_has_loongson_mmi) - seq_printf(m, "%s", " loongson-mmi"); + seq_puts(m, " loongson-mmi"); if (cpu_has_loongson_cam) - seq_printf(m, "%s", " loongson-cam"); + seq_puts(m, " loongson-cam"); if (cpu_has_loongson_ext) - seq_printf(m, "%s", " loongson-ext"); + seq_puts(m, " loongson-ext"); if (cpu_has_loongson_ext2) - seq_printf(m, "%s", " loongson-ext2"); - seq_printf(m, "\n"); + seq_puts(m, " loongson-ext2"); + seq_puts(m, "\n"); if (cpu_has_mmips) { seq_printf(m, "micromips kernel\t: %s\n", @@ -182,7 +182,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) raw_notifier_call_chain(&proc_cpuinfo_chain, 0, &proc_cpuinfo_notifier_args); - seq_printf(m, "\n"); + seq_puts(m, "\n"); return 0; } From patchwork Sat Apr 24 21:56:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12222819 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA111C433ED for ; Sat, 24 Apr 2021 21:56:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C7AB3613B6 for ; Sat, 24 Apr 2021 21:56:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232382AbhDXV5D (ORCPT ); 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Sat, 24 Apr 2021 14:56:22 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Ilya Lipnitskiy , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] MIPS: kernel: proc: add CPU option reporting Date: Sat, 24 Apr 2021 14:56:18 -0700 Message-Id: <20210424215618.1017539-4-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> References: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Hauke Mehrtens Many MIPS CPUs have optional CPU features which are not activated for all CPU cores. Print the CPU options, which are implemented in the core, in /proc/cpuinfo. This makes it possible to see which features are supported and which are not supported. This should cover all standard MIPS extensions. Before, it only printed information about the main MIPS ASEs. Signed-off-by: Hauke Mehrtens Changes from original patch[0]: - Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a ("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()") - Add new options: mac2008_only, ftlbparex, gsexcex, mmid, mm_sysad, mm_full - Use seq_puts instead of seq_printf as suggested by checkpatch - Minor commit message reword [0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/ Signed-off-by: Ilya Lipnitskiy Acked-by: Hauke Mehrtens --- arch/mips/kernel/proc.c | 122 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 122 insertions(+) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 7d8481d9acc3..376a6e2676e9 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -157,6 +157,128 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "micromips kernel\t: %s\n", (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no"); } + + seq_puts(m, "Options implemented\t:"); + if (cpu_has_tlb) + seq_puts(m, " tlb"); + if (cpu_has_ftlb) + seq_puts(m, " ftlb"); + if (cpu_has_tlbinv) + seq_puts(m, " tlbinv"); + if (cpu_has_segments) + seq_puts(m, " segments"); + if (cpu_has_rixiex) + seq_puts(m, " rixiex"); + if (cpu_has_ldpte) + seq_puts(m, " ldpte"); + if (cpu_has_maar) + seq_puts(m, " maar"); + if (cpu_has_rw_llb) + seq_puts(m, " rw_llb"); + if (cpu_has_4kex) + seq_puts(m, " 4kex"); + if (cpu_has_3k_cache) + seq_puts(m, " 3k_cache"); + if (cpu_has_4k_cache) + seq_puts(m, " 4k_cache"); + if (cpu_has_tx39_cache) + seq_puts(m, " tx39_cache"); + if (cpu_has_octeon_cache) + seq_puts(m, " octeon_cache"); + if (cpu_has_fpu) + seq_puts(m, " fpu"); + if (cpu_has_32fpr) + seq_puts(m, " 32fpr"); + if (cpu_has_cache_cdex_p) + seq_puts(m, " cache_cdex_p"); + if (cpu_has_cache_cdex_s) + seq_puts(m, " cache_cdex_s"); + if (cpu_has_prefetch) + seq_puts(m, " prefetch"); + if (cpu_has_mcheck) + seq_puts(m, " mcheck"); + if (cpu_has_ejtag) + seq_puts(m, " ejtag"); + if (cpu_has_llsc) + seq_puts(m, " llsc"); + if (cpu_has_guestctl0ext) + seq_puts(m, " guestctl0ext"); + if (cpu_has_guestctl1) + seq_puts(m, " guestctl1"); + if (cpu_has_guestctl2) + seq_puts(m, " guestctl2"); + if (cpu_has_guestid) + seq_puts(m, " guestid"); + if (cpu_has_drg) + seq_puts(m, " drg"); + if (cpu_has_rixi) + seq_puts(m, " rixi"); + if (cpu_has_lpa) + seq_puts(m, " lpa"); + if (cpu_has_mvh) + seq_puts(m, " mvh"); + if (cpu_has_vtag_icache) + seq_puts(m, " vtag_icache"); + if (cpu_has_dc_aliases) + seq_puts(m, " dc_aliases"); + if (cpu_has_ic_fills_f_dc) + seq_puts(m, " ic_fills_f_dc"); + if (cpu_has_pindexed_dcache) + seq_puts(m, " pindexed_dcache"); + if (cpu_has_userlocal) + seq_puts(m, " userlocal"); + if (cpu_has_nofpuex) + seq_puts(m, " nofpuex"); + if (cpu_has_vint) + seq_puts(m, " vint"); + if (cpu_has_veic) + seq_puts(m, " veic"); + if (cpu_has_inclusive_pcaches) + seq_puts(m, " inclusive_pcaches"); + if (cpu_has_perf_cntr_intr_bit) + seq_puts(m, " perf_cntr_intr_bit"); + if (cpu_has_ufr) + seq_puts(m, " ufr"); + if (cpu_has_fre) + seq_puts(m, " fre"); + if (cpu_has_cdmm) + seq_puts(m, " cdmm"); + if (cpu_has_small_pages) + seq_puts(m, " small_pages"); + if (cpu_has_nan_legacy) + seq_puts(m, " nan_legacy"); + if (cpu_has_nan_2008) + seq_puts(m, " nan_2008"); + if (cpu_has_ebase_wg) + seq_puts(m, " ebase_wg"); + if (cpu_has_badinstr) + seq_puts(m, " badinstr"); + if (cpu_has_badinstrp) + seq_puts(m, " badinstrp"); + if (cpu_has_contextconfig) + seq_puts(m, " contextconfig"); + if (cpu_has_perf) + seq_puts(m, " perf"); + if (cpu_has_mac2008_only) + seq_puts(m, " mac2008_only"); + if (cpu_has_ftlbparex) + seq_puts(m, " ftlbparex"); + if (cpu_has_gsexcex) + seq_puts(m, " gsexcex"); + if (cpu_has_shared_ftlb_ram) + seq_puts(m, " shared_ftlb_ram"); + if (cpu_has_shared_ftlb_entries) + seq_puts(m, " shared_ftlb_entries"); + if (cpu_has_mipsmt_pertccounters) + seq_puts(m, " mipsmt_pertccounters"); + if (cpu_has_mmid) + seq_puts(m, " mmid"); + if (cpu_has_mm_sysad) + seq_puts(m, " mm_sysad"); + if (cpu_has_mm_full) + seq_puts(m, " mm_full"); + seq_puts(m, "\n"); + seq_printf(m, "shadow register sets\t: %d\n", cpu_data[n].srsets); seq_printf(m, "kscratch registers\t: %d\n",