From patchwork Mon Apr 26 10:08:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Isaev X-Patchwork-Id: 12224103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 889EEC433ED for ; Mon, 26 Apr 2021 10:08:22 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id BDF7D61159 for ; Mon, 26 Apr 2021 10:08:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BDF7D61159 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=synopsys.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 06EF66B006C; Mon, 26 Apr 2021 06:08:21 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 01F586B006E; Mon, 26 Apr 2021 06:08:20 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E028E6B0070; Mon, 26 Apr 2021 06:08:20 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0144.hostedemail.com [216.40.44.144]) by kanga.kvack.org (Postfix) with ESMTP id C25D36B006C for ; Mon, 26 Apr 2021 06:08:20 -0400 (EDT) Received: from smtpin09.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay02.hostedemail.com (Postfix) with ESMTP id 7A73B3648 for ; Mon, 26 Apr 2021 10:08:20 +0000 (UTC) X-FDA: 78074093160.09.C49942D Received: from smtprelay-out1.synopsys.com (smtprelay-out1.synopsys.com [149.117.87.133]) by imf03.hostedemail.com (Postfix) with ESMTP id 24CD0C0007E4 for ; Mon, 26 Apr 2021 10:08:14 +0000 (UTC) Received: from mailhost.synopsys.com (mdc-mailhost2.synopsys.com [10.225.0.210]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 422D6C043E; Mon, 26 Apr 2021 10:08:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1619431697; bh=qDN/qUPHbR2jazBXaOLiYF2dvCU/A8yXaTIGWr7NH4g=; h=From:To:Cc:Subject:Date:From; b=MTdbJ2BbetKq35kjaEx/aeHXyjkrbVvj/WMOCssrSANrusf0p8qnM/ECEihZ80ZeH NXu/92ik15OBSQ2GAT5qXJ20gL+wiv2wBxh6QlnqetnUYZB8ShaGt36BY+7bO+nVsK C6X9GNgYfjcyyVcPYNirGy0Bms4E49gJ/p0hIJuTL2Cy0V3+Le3WWewR2mNkxoCVoO 9cLpJx3csyd90mWYcJFksHFwb++Q2RdNtPsVeAoWDjX/VuQLYQPWS5j8jZLJtvCkOW sRSf6hXCt/Y2LI4dVdSVv7mTh9SQYGZ2IaFAQl/8IQ9DuXuML4QKneuWApaWpmUAg7 vg8banKUhA2ig== Received: from ru20arcgnu1.internal.synopsys.com (ru20arcgnu1.internal.synopsys.com [10.121.9.48]) by mailhost.synopsys.com (Postfix) with ESMTP id AAA13A005E; Mon, 26 Apr 2021 10:08:12 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Vladimir Isaev To: linux-snps-arc@lists.infradead.org Cc: linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, rppt@linux.ibm.com, Vladimir Isaev Subject: [PATCH] ARC: Use 40-bit physical page mask for PAE Date: Mon, 26 Apr 2021 13:08:01 +0300 Message-Id: <20210426100801.41308-1-isaev@synopsys.com> X-Mailer: git-send-email 2.16.2 X-Stat-Signature: xcha69pjzcwtrqr6kj4ahkq3hgpt3axb X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 24CD0C0007E4 Received-SPF: none (synopsys.com>: No applicable sender policy available) receiver=imf03; identity=mailfrom; envelope-from=""; helo=smtprelay-out1.synopsys.com; client-ip=149.117.87.133 X-HE-DKIM-Result: pass/pass X-HE-Tag: 1619431694-677255 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: 32-bit PAGE_MASK can not be used as a mask for physical addresses when PAE is enabled. PHYSICAL_PAGE_MASK must be used for physical addresses instead of PAGE_MASK. Signed-off-by: Vladimir Isaev Reported-by: kernel test robot --- arch/arc/include/asm/pgtable.h | 12 +++--------- arch/arc/include/uapi/asm/page.h | 7 +++++++ arch/arc/mm/ioremap.c | 4 ++-- arch/arc/mm/tlb.c | 2 +- 4 files changed, 13 insertions(+), 12 deletions(-) diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index 163641726a2b..25c95fbc7021 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -107,8 +107,8 @@ #define ___DEF (_PAGE_PRESENT | _PAGE_CACHEABLE) /* Set of bits not changed in pte_modify */ -#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_SPECIAL) - +#define _PAGE_CHG_MASK (PHYSICAL_PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ + _PAGE_SPECIAL) /* More Abbrevaited helpers */ #define PAGE_U_NONE __pgprot(___DEF) #define PAGE_U_R __pgprot(___DEF | _PAGE_READ) @@ -132,13 +132,7 @@ #define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT | _PAGE_HW_SZ) #define PTE_BITS_RWX (_PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ) -#ifdef CONFIG_ARC_HAS_PAE40 -#define PTE_BITS_NON_RWX_IN_PD1 (0xff00000000 | PAGE_MASK | _PAGE_CACHEABLE) -#define MAX_POSSIBLE_PHYSMEM_BITS 40 -#else -#define PTE_BITS_NON_RWX_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE) -#define MAX_POSSIBLE_PHYSMEM_BITS 32 -#endif +#define PTE_BITS_NON_RWX_IN_PD1 (PHYSICAL_PAGE_MASK | _PAGE_CACHEABLE) /************************************************************************** * Mapping of vm_flags (Generic VM) to PTE flags (arch specific) diff --git a/arch/arc/include/uapi/asm/page.h b/arch/arc/include/uapi/asm/page.h index 2a97e2718a21..8fecf2a2b592 100644 --- a/arch/arc/include/uapi/asm/page.h +++ b/arch/arc/include/uapi/asm/page.h @@ -33,5 +33,12 @@ #define PAGE_MASK (~(PAGE_SIZE-1)) +#ifdef CONFIG_ARC_HAS_PAE40 +#define MAX_POSSIBLE_PHYSMEM_BITS 40 +#define PHYSICAL_PAGE_MASK (0xff00000000ull | PAGE_MASK) +#else +#define MAX_POSSIBLE_PHYSMEM_BITS 32 +#define PHYSICAL_PAGE_MASK PAGE_MASK +#endif #endif /* _UAPI__ASM_ARC_PAGE_H */ diff --git a/arch/arc/mm/ioremap.c b/arch/arc/mm/ioremap.c index fac4adc90204..eb109d57d544 100644 --- a/arch/arc/mm/ioremap.c +++ b/arch/arc/mm/ioremap.c @@ -71,8 +71,8 @@ void __iomem *ioremap_prot(phys_addr_t paddr, unsigned long size, prot = pgprot_noncached(prot); /* Mappings have to be page-aligned */ - off = paddr & ~PAGE_MASK; - paddr &= PAGE_MASK; + off = paddr & ~PHYSICAL_PAGE_MASK; + paddr &= PHYSICAL_PAGE_MASK; size = PAGE_ALIGN(end + 1) - paddr; /* diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c index 9bb3c24f3677..15a3b92e9e72 100644 --- a/arch/arc/mm/tlb.c +++ b/arch/arc/mm/tlb.c @@ -576,7 +576,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned, pte_t *ptep) { unsigned long vaddr = vaddr_unaligned & PAGE_MASK; - phys_addr_t paddr = pte_val(*ptep) & PAGE_MASK; + phys_addr_t paddr = pte_val(*ptep) & PHYSICAL_PAGE_MASK; struct page *page = pfn_to_page(pte_pfn(*ptep)); create_tlb(vma, vaddr, ptep);