From patchwork Tue Apr 27 17:51:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 12227077 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25D15C433B4 for ; Tue, 27 Apr 2021 17:51:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DBD3060FD9 for ; Tue, 27 Apr 2021 17:51:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238665AbhD0Rwf (ORCPT ); Tue, 27 Apr 2021 13:52:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230219AbhD0Rwe (ORCPT ); Tue, 27 Apr 2021 13:52:34 -0400 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA1C4C061574; Tue, 27 Apr 2021 10:51:49 -0700 (PDT) Received: by mail-pl1-x634.google.com with SMTP id e2so26995441plh.8; Tue, 27 Apr 2021 10:51:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7XSm6/qzn9duNJgtAGMhBBSTeeaC2tU96ijTiVyfrw0=; b=ORiN/zPxZxhdaqsrIGlBT/ur3WfsLynWgmFPyXBf4D0Bm2D0t1Coryt9rFPBawWXNv X5hp3Ki0fH75da95sE5A/Fe1DZBMEGTWpTrQU6+BGFVujzcoYjHAwjncxp2B8kfZwz9t Ml0tnEqbzAacbRF+flA+YIlbJ6T8hFfea+n4T9KOenJZVmprB2yFehvwtOEfxlQGXm9n X3MkwWBjvRzbytfcS0M8thcVtrkM/kD8/Pp3YCBSJWtGUYAPTiqzKI/fiRvRLEX+32g3 aw9+h+0Q7nQpRjvFi9OAnMsL7hohfAIQuejxsoZqGg+STUagRiRC6lMcaElpBZ7Iettb +KHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7XSm6/qzn9duNJgtAGMhBBSTeeaC2tU96ijTiVyfrw0=; b=sj8DkBeiAjhGYBV55kHW9ZZaN0J5Uf7vkgxZJnosyKwWIReGVYymwwrVVbz7skPH+v kaAXnV1YmFPonX/8r2utjWeXfUO5Ue8EXyNhQxGmcQQYTbaBMWzci065APwrG5raxvUy I+piDLJlmHcYpwFTnLGzCFEolUaeW3S+T3QUKhGfAw0/2tMh78eZ5M2KHRsKTamoAn8z OxFT8GZVt6X89t3XOwr7kLei2ah3t4c1vuRN6ltbfiId6REL/hCFl/1j8O/CBlhcQXA8 LH42BH0x5TUW7Yyz52tIXzN47TvTcdwYu6BPWykMO5FdutcJ4ntBO47wiwq/jQIuv50F Derg== X-Gm-Message-State: AOAM532/c8xZRS63X8db/ZyCXH9AX35rVGFeHHe2Jnsn+jlE1aIMoIW2 HsmgN2q19oqXyuh9AN1n14REzqVb0so= X-Google-Smtp-Source: ABdhPJyT7HZQNUAXFGxWL8hWisHDSfUuIwmbKZqKOedQH2FPNEW8cz8HwMCds+JC8D7s+KhXGY4TOA== X-Received: by 2002:a17:90a:f195:: with SMTP id bv21mr6241676pjb.56.1619545909205; Tue, 27 Apr 2021 10:51:49 -0700 (PDT) Received: from stbsrv-and-01.and.broadcom.net ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id h21sm2456833pfo.211.2021.04.27.10.51.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Apr 2021 10:51:48 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , bcm-kernel-feedback-list@broadcom.com, james.quinlan@broadcom.com Cc: Jim Quinlan , Nicolas Saenz Julienne , Lorenzo Pieralisi , Rob Herring , Florian Fainelli , Jim Quinlan , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v1 1/4] PCI: brcmstb: Check return value of clk_prepare_enable() Date: Tue, 27 Apr 2021 13:51:36 -0400 Message-Id: <20210427175140.17800-2-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210427175140.17800-1-jim2101024@gmail.com> References: <20210427175140.17800-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Check for failure of clk_prepare_enable() on device resume. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Fixes: 8195b7417018 ("PCI: brcmstb: Add suspend and resume pm_ops") --- drivers/pci/controller/pcie-brcmstb.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index e330e6811f0b..4ce1f3a60574 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -1161,7 +1161,9 @@ static int brcm_pcie_resume(struct device *dev) int ret; base = pcie->base; - clk_prepare_enable(pcie->clk); + ret = clk_prepare_enable(pcie->clk); + if (ret) + return ret; ret = brcm_phy_start(pcie); if (ret) From patchwork Tue Apr 27 17:51:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 12227079 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06046C433ED for ; Tue, 27 Apr 2021 17:51:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CDB4461008 for ; Tue, 27 Apr 2021 17:51:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238637AbhD0Rwg (ORCPT ); Tue, 27 Apr 2021 13:52:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238144AbhD0Rwg (ORCPT ); Tue, 27 Apr 2021 13:52:36 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F64EC061756; Tue, 27 Apr 2021 10:51:52 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id lr7so13197450pjb.2; Tue, 27 Apr 2021 10:51:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2TeMQIR29LL2unimARSS4Lts2CWaYP5hnwBOgRuHstg=; b=QdGe6x34JJei2d/ron5yM0DJQaJi1jeLsPy+/ZgW8umuLF/6hL54BgrJOy72zTLBjj SaK5FWmffeSlWH5iOk1FAJzl5PWqPNY0lPgOA5SoFwV0/2U0dVHZ0jjDJkB/LW1qInfS wq2eVemAQ6lsSAsYA3EN1hzrNckL75XUZy/osCJ5UlUQCbmfEpjZZocSlIxOYVBx/mZL U/iMQ+0T33Mgv4wd74WTfR7YUksY5jo7JzL6mJ5MNE6JTiIUTDMIl6zX4PT9PejgPwQR r5nEtNC8rKuUUFqSPLFX40vmF4R558O6AWsl/aBxO/vk9eHCR05ZAIhLcyS83em4fyeA 5xTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2TeMQIR29LL2unimARSS4Lts2CWaYP5hnwBOgRuHstg=; b=HrgyxdGPCW8npNH1vfQOy8JRycTED6Au7dYGbaVpaLoqpQFA6S730qJjnrooq1wQlO y6X6mpoM9oLnVZbkl1JJZT/X+RAnLqn3EJGouMaMET+xxnSxCXOxAdpRsFUafVZFhKnK dWNuu1rF4ovfLzOflsF79T6ndRtsAbrW2wAD/VHI053vUOY2wivnq+BqRs7MuiVTup+M T58kAN0AsO7486q9Dzj3rVeLn3uDgRiHt7/NZgKAM0Bu4zOkuftk0s55haR24rZ72GA4 IzW9ERmLrF/FWFfKW2SQ+4U8H7hz/1iVSA6oGFp1cXE0IC86MjzZbR7JLkRoZnfl1FxK ELZQ== X-Gm-Message-State: AOAM533eLAnIxsgOC3qECDV5RVxSbhTe9yvTre6cz/icKzUL/YrqL1B2 ++Ps4yXPZFEjV7dxXkK+Yflx9vc5hLs= X-Google-Smtp-Source: ABdhPJx3pj84P+TymUJU7/RCESFFoXJOkjgVGHcMsSz22PuKQmBEfFdZP2cdrdcIWYQSdH7bw/9cXg== X-Received: by 2002:a17:90b:e95:: with SMTP id fv21mr13283405pjb.107.1619545911874; Tue, 27 Apr 2021 10:51:51 -0700 (PDT) Received: from stbsrv-and-01.and.broadcom.net ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id h21sm2456833pfo.211.2021.04.27.10.51.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Apr 2021 10:51:51 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , bcm-kernel-feedback-list@broadcom.com, james.quinlan@broadcom.com Cc: Jim Quinlan , Nicolas Saenz Julienne , Lorenzo Pieralisi , Rob Herring , Florian Fainelli , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v1 2/4] PCI: brcmstb: Give 7216 SOCs their own config type Date: Tue, 27 Apr 2021 13:51:37 -0400 Message-Id: <20210427175140.17800-3-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210427175140.17800-1-jim2101024@gmail.com> References: <20210427175140.17800-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This distinction is required for an imminent commit. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli --- drivers/pci/controller/pcie-brcmstb.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 4ce1f3a60574..3b6a62dd2e72 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -257,6 +257,13 @@ static const struct pcie_cfg_data bcm2711_cfg = { .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic, }; +static const struct pcie_cfg_data bcm7216_cfg = { + .offsets = pcie_offset_bcm7278, + .type = BCM7278, + .perst_set = brcm_pcie_perst_set_7278, + .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_7278, +}; + struct brcm_msi { struct device *dev; void __iomem *base; @@ -1220,7 +1227,7 @@ static const struct of_device_id brcm_pcie_match[] = { { .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg }, { .compatible = "brcm,bcm7211-pcie", .data = &generic_cfg }, { .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg }, - { .compatible = "brcm,bcm7216-pcie", .data = &bcm7278_cfg }, + { .compatible = "brcm,bcm7216-pcie", .data = &bcm7216_cfg }, { .compatible = "brcm,bcm7445-pcie", .data = &generic_cfg }, {}, }; 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Tue, 27 Apr 2021 10:51:54 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , bcm-kernel-feedback-list@broadcom.com, james.quinlan@broadcom.com Cc: Jim Quinlan , Nicolas Saenz Julienne , Lorenzo Pieralisi , Rob Herring , Florian Fainelli , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v1 3/4] PCI: brcmstb: Add panic/die handler to RC driver Date: Tue, 27 Apr 2021 13:51:38 -0400 Message-Id: <20210427175140.17800-4-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210427175140.17800-1-jim2101024@gmail.com> References: <20210427175140.17800-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Whereas most PCIe HW returns 0xffffffff on illegal accesses and the like, by default Broadcom's STB PCIe controller effects an abort. This simple handler determines if the PCIe controller was the cause of the abort and if so, prints out diagnostic info. Example output: brcm-pcie 8b20000.pcie: Error: Mem Acc: 32bit, Read, @0x38000000 brcm-pcie 8b20000.pcie: Type: TO=0 Abt=0 UnspReq=1 AccDsble=0 BadAddr=0 Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli --- drivers/pci/controller/pcie-brcmstb.c | 122 ++++++++++++++++++++++++++ 1 file changed, 122 insertions(+) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 3b6a62dd2e72..d3af8d84f0d6 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -12,11 +12,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -184,6 +186,39 @@ #define PCIE_DVT_PMU_PCIE_PHY_CTRL_DAST_PWRDN_MASK 0x1 #define PCIE_DVT_PMU_PCIE_PHY_CTRL_DAST_PWRDN_SHIFT 0x0 +/* Error report regiseters */ +#define PCIE_OUTB_ERR_TREAT 0x6000 +#define PCIE_OUTB_ERR_TREAT_CONFIG_MASK 0x1 +#define PCIE_OUTB_ERR_TREAT_MEM_MASK 0x2 +#define PCIE_OUTB_ERR_VALID 0x6004 +#define PCIE_OUTB_ERR_CLEAR 0x6008 +#define PCIE_OUTB_ERR_ACC_INFO 0x600c +#define PCIE_OUTB_ERR_ACC_INFO_CFG_ERR_MASK 0x01 +#define PCIE_OUTB_ERR_ACC_INFO_MEM_ERR_MASK 0x02 +#define PCIE_OUTB_ERR_ACC_INFO_TYPE_64_MASK 0x04 +#define PCIE_OUTB_ERR_ACC_INFO_DIR_WRITE_MASK 0x10 +#define PCIE_OUTB_ERR_ACC_INFO_BYTE_LANES_MASK 0xff00 +#define PCIE_OUTB_ERR_ACC_ADDR 0x6010 +#define PCIE_OUTB_ERR_ACC_ADDR_BUS_MASK 0xff00000 +#define PCIE_OUTB_ERR_ACC_ADDR_DEV_MASK 0xf8000 +#define PCIE_OUTB_ERR_ACC_ADDR_FUNC_MASK 0x7000 +#define PCIE_OUTB_ERR_ACC_ADDR_REG_MASK 0xfff +#define PCIE_OUTB_ERR_CFG_CAUSE 0x6014 +#define PCIE_OUTB_ERR_CFG_CAUSE_TIMEOUT_MASK 0x40 +#define PCIE_OUTB_ERR_CFG_CAUSE_ABORT_MASK 0x20 +#define PCIE_OUTB_ERR_CFG_CAUSE_UNSUPP_REQ_MASK 0x10 +#define PCIE_OUTB_ERR_CFG_CAUSE_ACC_TIMEOUT_MASK 0x4 +#define PCIE_OUTB_ERR_CFG_CAUSE_ACC_DISABLED_MASK 0x2 +#define PCIE_OUTB_ERR_CFG_CAUSE_ACC_64BIT__MASK 0x1 +#define PCIE_OUTB_ERR_MEM_ADDR_LO 0x6018 +#define PCIE_OUTB_ERR_MEM_ADDR_HI 0x601c +#define PCIE_OUTB_ERR_MEM_CAUSE 0x6020 +#define PCIE_OUTB_ERR_MEM_CAUSE_TIMEOUT_MASK 0x40 +#define PCIE_OUTB_ERR_MEM_CAUSE_ABORT_MASK 0x20 +#define PCIE_OUTB_ERR_MEM_CAUSE_UNSUPP_REQ_MASK 0x10 +#define PCIE_OUTB_ERR_MEM_CAUSE_ACC_DISABLED_MASK 0x2 +#define PCIE_OUTB_ERR_MEM_CAUSE_BAD_ADDR_MASK 0x1 + /* Forward declarations */ struct brcm_pcie; static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val); @@ -215,6 +250,7 @@ struct pcie_cfg_data { const enum pcie_type type; void (*perst_set)(struct brcm_pcie *pcie, u32 val); void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); + const bool has_err_report; }; static const int pcie_offsets[] = { @@ -262,6 +298,7 @@ static const struct pcie_cfg_data bcm7216_cfg = { .type = BCM7278, .perst_set = brcm_pcie_perst_set_7278, .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_7278, + .has_err_report = true, }; struct brcm_msi { @@ -302,8 +339,87 @@ struct brcm_pcie { u32 hw_rev; void (*perst_set)(struct brcm_pcie *pcie, u32 val); void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); + bool has_err_report; + struct notifier_block die_notifier; }; +/* Dump out PCIe errors on die or panic */ +static int dump_pcie_error(struct notifier_block *self, unsigned long v, void *p) +{ + const struct brcm_pcie *pcie = container_of(self, struct brcm_pcie, die_notifier); + void __iomem *base = pcie->base; + int i, is_cfg_err, is_mem_err, lanes; + char *width_str, *direction_str, lanes_str[9]; + u32 info; + + if (readl(base + PCIE_OUTB_ERR_VALID) == 0) + return NOTIFY_DONE; + info = readl(base + PCIE_OUTB_ERR_ACC_INFO); + + + is_cfg_err = !!(info & PCIE_OUTB_ERR_ACC_INFO_CFG_ERR_MASK); + is_mem_err = !!(info & PCIE_OUTB_ERR_ACC_INFO_MEM_ERR_MASK); + width_str = (info & PCIE_OUTB_ERR_ACC_INFO_TYPE_64_MASK) ? "64bit" : "32bit"; + direction_str = (info & PCIE_OUTB_ERR_ACC_INFO_DIR_WRITE_MASK) ? "Write" : "Read"; + lanes = FIELD_GET(PCIE_OUTB_ERR_ACC_INFO_BYTE_LANES_MASK, info); + for (i = 0, lanes_str[8] = 0; i < 8; i++) + lanes_str[i] = (lanes & (1 << i)) ? '1' : '0'; + + if (is_cfg_err) { + u32 cfg_addr = readl(base + PCIE_OUTB_ERR_ACC_ADDR); + u32 cause = readl(base + PCIE_OUTB_ERR_CFG_CAUSE); + int bus = FIELD_GET(PCIE_OUTB_ERR_ACC_ADDR_BUS_MASK, cfg_addr); + int dev = FIELD_GET(PCIE_OUTB_ERR_ACC_ADDR_DEV_MASK, cfg_addr); + int func = FIELD_GET(PCIE_OUTB_ERR_ACC_ADDR_FUNC_MASK, cfg_addr); + int reg = FIELD_GET(PCIE_OUTB_ERR_ACC_ADDR_REG_MASK, cfg_addr); + + dev_err(pcie->dev, "Error: CFG Acc, %s, %s, Bus=%d, Dev=%d, Fun=%d, Reg=0x%x, lanes=%s\n", + width_str, direction_str, bus, dev, func, reg, lanes_str); + dev_err(pcie->dev, " Type: TO=%d Abt=%d UnsupReq=%d AccTO=%d AccDsbld=%d Acc64bit=%d\n", + !!(cause & PCIE_OUTB_ERR_CFG_CAUSE_TIMEOUT_MASK), + !!(cause & PCIE_OUTB_ERR_CFG_CAUSE_ABORT_MASK), + !!(cause & PCIE_OUTB_ERR_CFG_CAUSE_UNSUPP_REQ_MASK), + !!(cause & PCIE_OUTB_ERR_CFG_CAUSE_ACC_TIMEOUT_MASK), + !!(cause & PCIE_OUTB_ERR_CFG_CAUSE_ACC_DISABLED_MASK), + !!(cause & PCIE_OUTB_ERR_CFG_CAUSE_ACC_64BIT__MASK)); + } + + if (is_mem_err) { + u32 cause = readl(base + PCIE_OUTB_ERR_MEM_CAUSE); + u32 lo = readl(base + PCIE_OUTB_ERR_MEM_ADDR_LO); + u32 hi = readl(base + PCIE_OUTB_ERR_MEM_ADDR_HI); + u64 addr = ((u64)hi << 32) | (u64)lo; + + dev_err(pcie->dev, "Error: Mem Acc, %s, %s, @0x%llx, lanes=%s\n", + width_str, direction_str, addr, lanes_str); + dev_err(pcie->dev, " Type: TO=%d Abt=%d UnsupReq=%d AccDsble=%d BadAddr=%d\n", + !!(cause & PCIE_OUTB_ERR_MEM_CAUSE_TIMEOUT_MASK), + !!(cause & PCIE_OUTB_ERR_MEM_CAUSE_ABORT_MASK), + !!(cause & PCIE_OUTB_ERR_MEM_CAUSE_UNSUPP_REQ_MASK), + !!(cause & PCIE_OUTB_ERR_MEM_CAUSE_ACC_DISABLED_MASK), + !!(cause & PCIE_OUTB_ERR_MEM_CAUSE_BAD_ADDR_MASK)); + } + + /* Clear the error */ + writel(1, base + PCIE_OUTB_ERR_CLEAR); + + return NOTIFY_DONE; +} + +static void brcm_register_die_notifiers(struct brcm_pcie *pcie) +{ + pcie->die_notifier.notifier_call = dump_pcie_error; + register_die_notifier(&pcie->die_notifier); + atomic_notifier_chain_register(&panic_notifier_list, &pcie->die_notifier); +} + +static void brcm_unregister_die_notifiers(struct brcm_pcie *pcie) +{ + unregister_die_notifier(&pcie->die_notifier); + atomic_notifier_chain_unregister(&panic_notifier_list, &pcie->die_notifier); + pcie->die_notifier.notifier_call = NULL; +} + /* * This is to convert the size of the inbound "BAR" region to the * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE @@ -1216,6 +1332,8 @@ static int brcm_pcie_remove(struct platform_device *pdev) struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); pci_stop_root_bus(bridge->bus); + if (pcie->has_err_report) + brcm_unregister_die_notifiers(pcie); pci_remove_root_bus(bridge->bus); __brcm_pcie_remove(pcie); @@ -1255,6 +1373,7 @@ static int brcm_pcie_probe(struct platform_device *pdev) pcie->np = np; pcie->reg_offsets = data->offsets; pcie->type = data->type; + pcie->has_err_report = data->has_err_report; pcie->perst_set = data->perst_set; pcie->bridge_sw_init_set = data->bridge_sw_init_set; @@ -1322,6 +1441,9 @@ static int brcm_pcie_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pcie); + if (pcie->has_err_report) + brcm_register_die_notifiers(pcie); + return pci_host_probe(bridge); fail: __brcm_pcie_remove(pcie); From patchwork Tue Apr 27 17:51:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 12227083 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B9A9C433B4 for ; Tue, 27 Apr 2021 17:52:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2540360FD9 for ; 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Tue, 27 Apr 2021 10:51:57 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , bcm-kernel-feedback-list@broadcom.com, james.quinlan@broadcom.com Cc: Jim Quinlan , Nicolas Saenz Julienne , Lorenzo Pieralisi , Rob Herring , Florian Fainelli , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v1 4/4] PCI: brcmstb: add shutdown call to driver Date: Tue, 27 Apr 2021 13:51:39 -0400 Message-Id: <20210427175140.17800-5-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210427175140.17800-1-jim2101024@gmail.com> References: <20210427175140.17800-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The shutdown() call is similar to the remove() call except the former does not need to invoke pci_{stop,remove}_root_bus(), and besides, errors occur if it does. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli --- drivers/pci/controller/pcie-brcmstb.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index d3af8d84f0d6..a1fe1a2ada48 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -1340,6 +1340,15 @@ static int brcm_pcie_remove(struct platform_device *pdev) return 0; } +static void brcm_pcie_shutdown(struct platform_device *pdev) +{ + struct brcm_pcie *pcie = platform_get_drvdata(pdev); + + if (pcie->has_err_report) + brcm_unregister_die_notifiers(pcie); + __brcm_pcie_remove(pcie); +} + static const struct of_device_id brcm_pcie_match[] = { { .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg }, { .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg }, @@ -1460,6 +1469,7 @@ static const struct dev_pm_ops brcm_pcie_pm_ops = { static struct platform_driver brcm_pcie_driver = { .probe = brcm_pcie_probe, .remove = brcm_pcie_remove, + .shutdown = brcm_pcie_shutdown, .driver = { .name = "brcm-pcie", .of_match_table = brcm_pcie_match,