From patchwork Thu May 6 10:32:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98B9EC433ED for ; Thu, 6 May 2021 10:34:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6517060249 for ; Thu, 6 May 2021 10:34:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234540AbhEFKfY (ORCPT ); Thu, 6 May 2021 06:35:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234541AbhEFKfU (ORCPT ); Thu, 6 May 2021 06:35:20 -0400 Received: from mout-p-102.mailbox.org (mout-p-102.mailbox.org [IPv6:2001:67c:2050::465:102]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C2B4C061574 for ; Thu, 6 May 2021 03:34:21 -0700 (PDT) Received: from smtp1.mailbox.org (smtp1.mailbox.org [IPv6:2001:67c:2050:105:465:1:1:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-102.mailbox.org (Postfix) with ESMTPS id 4FbVLh02K8zQjZ5; Thu, 6 May 2021 12:34:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mailbox.org; h= references:in-reply-to:message-id:date:date:subject:subject:from :from:received; s=mail20150812; t=1620297256; bh=O1U40Dm7VUdNCxB xbT9Ep1tJ7ZE9uqMfLstqOCkOmBw=; b=nnw1RoeckY1ckPDC+bqhzcjJQZUrmIL eFraoSGitETnCUrv/LypXHgdnIn0NDALC6KJxVtnf+mVYnOzKOKLQG8mKPGqX6KU QYa6oLXAe/lFzilWSgW44MQbIwKpQe8Y1iaVR0jEuTlYKK6pzp+8SdFbjrSvj5iX DQi+Vy1LTDzUhx1G3VVtXSPn80NtgGvXW1Wt4Nhf4uO5ZnJY0q+j/BUPi6Rbv1Z3 sT8u+6FnMhlgE0Y3q9BaJMRtQPXrtpZ5CwIveMXhooCu9My0ulkkaCBtrENdST6E siSQf6PIrqarRTAfvr5p00CdThvdcicpJScWw6Pf1HXE+nQ1TE/nqPA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1620297258; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:in-reply-to:in-reply-to:references:references; bh=qjOhqsiDQgqlteS3wIV66YcLaaLpsfhzSy7BfJnvIUg=; b=X9l6wEIIAUdLG/AgVDAo62q+JMaWVbb8hfdrOsDKQBzvlkqCIY9ECzSJcomxvW+x1AxgP4 cbbC0s67nwHfDItSzqP5lJrn0Yo+94wrq4VLUwo5Q4bR3X3QGnlOOjBffcnNUA2ssK+Mdo CqqpfoSAnuVPs4eXc5MMIgaVTHh6ja5O9cqqkVC0aU4GcMzu0c9xw78UPrdtwfcuT0howq +/IRxrV/Ywu1RW+LQnC8DRZCu9lbe224gsu22bTPIaNFMFS0Ewfjp17nLOjQnxJ2kgaxRT F1gq1KWR2iLaC0Zoh9R8h/B8cKp1TETjZIA+jwE3utGbxnuUzVpy1eA48b6FPg== X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by spamfilter03.heinlein-hosting.de (spamfilter03.heinlein-hosting.de [80.241.56.117]) (amavisd-new, port 10030) with ESMTP id q8HnZlNLg9YY; Thu, 6 May 2021 12:34:16 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 1/8] KVM: VMX: Add a TSC multiplier field in VMCS12 Date: Thu, 6 May 2021 10:32:21 +0000 Message-Id: <20210506103228.67864-2-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -4.11 / 15.00 / 15.00 X-Rspamd-Queue-Id: F42331891 X-Rspamd-UID: 13f4ac Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis This is required for supporting nested TSC scaling. Signed-off-by: Ilias Stamatis Reported-by: kernel test robot Reviewed-by: Jim Mattson Reviewed-by: Maxim Levitsky --- arch/x86/kvm/vmx/vmcs12.c | 1 + arch/x86/kvm/vmx/vmcs12.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/vmcs12.c b/arch/x86/kvm/vmx/vmcs12.c index 034adb6404dc..d9f5d7c56ae3 100644 --- a/arch/x86/kvm/vmx/vmcs12.c +++ b/arch/x86/kvm/vmx/vmcs12.c @@ -37,6 +37,7 @@ const unsigned short vmcs_field_to_offset_table[] = { FIELD64(VM_ENTRY_MSR_LOAD_ADDR, vm_entry_msr_load_addr), FIELD64(PML_ADDRESS, pml_address), FIELD64(TSC_OFFSET, tsc_offset), + FIELD64(TSC_MULTIPLIER, tsc_multiplier), FIELD64(VIRTUAL_APIC_PAGE_ADDR, virtual_apic_page_addr), FIELD64(APIC_ACCESS_ADDR, apic_access_addr), FIELD64(POSTED_INTR_DESC_ADDR, posted_intr_desc_addr), diff --git a/arch/x86/kvm/vmx/vmcs12.h b/arch/x86/kvm/vmx/vmcs12.h index 13494956d0e9..bb81a23afe89 100644 --- a/arch/x86/kvm/vmx/vmcs12.h +++ b/arch/x86/kvm/vmx/vmcs12.h @@ -70,7 +70,8 @@ struct __packed vmcs12 { u64 eptp_list_address; u64 pml_address; u64 encls_exiting_bitmap; - u64 padding64[2]; /* room for future expansion */ + u64 tsc_multiplier; + u64 padding64[1]; /* room for future expansion */ /* * To allow migration of L1 (complete with its L2 guests) between * machines of different natural widths (32 or 64 bit), we cannot have @@ -258,6 +259,7 @@ static inline void vmx_check_vmcs12_offsets(void) CHECK_OFFSET(eptp_list_address, 304); CHECK_OFFSET(pml_address, 312); CHECK_OFFSET(encls_exiting_bitmap, 320); + CHECK_OFFSET(tsc_multiplier, 328); CHECK_OFFSET(cr0_guest_host_mask, 344); CHECK_OFFSET(cr4_guest_host_mask, 352); CHECK_OFFSET(cr0_read_shadow, 360); From patchwork Thu May 6 10:32:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241983 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93D47C433ED for ; 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Thu, 6 May 2021 12:34:31 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 2/8] KVM: X86: Store L1's TSC scaling ratio in 'struct kvm_vcpu_arch' Date: Thu, 6 May 2021 10:32:22 +0000 Message-Id: <20210506103228.67864-3-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -4.11 / 15.00 / 15.00 X-Rspamd-Queue-Id: 140031891 X-Rspamd-UID: d471ff Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis Store L1's scaling ratio in that struct like we already do for L1's TSC offset. This allows for easy save/restore when we enter and then exit the nested guest. Signed-off-by: Ilias Stamatis Reviewed-by: Maxim Levitsky --- arch/x86/include/asm/kvm_host.h | 5 +++-- arch/x86/kvm/x86.c | 4 +++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index cbbcee0a84f9..132e820525fb 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -705,7 +705,7 @@ struct kvm_vcpu_arch { } st; u64 l1_tsc_offset; - u64 tsc_offset; + u64 tsc_offset; /* current tsc offset */ u64 last_guest_tsc; u64 last_host_tsc; u64 tsc_offset_adjustment; @@ -719,7 +719,8 @@ struct kvm_vcpu_arch { u32 virtual_tsc_khz; s64 ia32_tsc_adjust_msr; u64 msr_ia32_power_ctl; - u64 tsc_scaling_ratio; + u64 l1_tsc_scaling_ratio; + u64 tsc_scaling_ratio; /* current scaling ratio */ atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ unsigned nmi_pending; /* NMI queued after currently running handler */ diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index cebdaa1e3cf5..7bc5155ac6fd 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2119,6 +2119,7 @@ static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale) /* Guest TSC same frequency as host TSC? */ if (!scale) { + vcpu->arch.l1_tsc_scaling_ratio = kvm_default_tsc_scaling_ratio; vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio; return 0; } @@ -2145,7 +2146,7 @@ static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale) return -1; } - vcpu->arch.tsc_scaling_ratio = ratio; + vcpu->arch.l1_tsc_scaling_ratio = vcpu->arch.tsc_scaling_ratio = ratio; return 0; } @@ -2157,6 +2158,7 @@ static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz) /* tsc_khz can be zero if TSC calibration fails */ if (user_tsc_khz == 0) { /* set tsc_scaling_ratio to a safe value */ + vcpu->arch.l1_tsc_scaling_ratio = kvm_default_tsc_scaling_ratio; vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio; return -1; } From patchwork Thu May 6 10:32:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A88B6C433ED for ; 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Thu, 6 May 2021 12:35:08 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 3/8] KVM: X86: Pass an additional 'L1' argument to kvm_scale_tsc() Date: Thu, 6 May 2021 10:32:23 +0000 Message-Id: <20210506103228.67864-4-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -4.11 / 15.00 / 15.00 X-Rspamd-Queue-Id: 7082A1857 X-Rspamd-UID: 6122ac Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis Sometimes kvm_scale_tsc() needs to use the current scaling ratio and other times (like when reading the TSC from user space) it needs to use L1's scaling ratio. Have the caller specify this by passing an additional boolean argument. Signed-off-by: Ilias Stamatis --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/x86.c | 21 +++++++++++++-------- 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 132e820525fb..cdddbf0b1177 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1779,7 +1779,7 @@ int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, void kvm_define_user_return_msr(unsigned index, u32 msr); int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); -u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); +u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, bool l1); u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 7bc5155ac6fd..26a4c0f46f15 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2241,10 +2241,14 @@ static inline u64 __scale_tsc(u64 ratio, u64 tsc) return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits); } -u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc) +/* + * If l1 is true the TSC is scaled using L1's scaling ratio, otherwise + * the current scaling ratio is used. + */ +u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, bool l1) { u64 _tsc = tsc; - u64 ratio = vcpu->arch.tsc_scaling_ratio; + u64 ratio = l1 ? vcpu->arch.l1_tsc_scaling_ratio : vcpu->arch.tsc_scaling_ratio; if (ratio != kvm_default_tsc_scaling_ratio) _tsc = __scale_tsc(ratio, tsc); @@ -2257,14 +2261,14 @@ static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc) { u64 tsc; - tsc = kvm_scale_tsc(vcpu, rdtsc()); + tsc = kvm_scale_tsc(vcpu, rdtsc(), true); return target_tsc - tsc; } u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc) { - return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc); + return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc, true); } EXPORT_SYMBOL_GPL(kvm_read_l1_tsc); @@ -2395,9 +2399,9 @@ static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) { - if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio) + if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio) WARN_ON(adjustment < 0); - adjustment = kvm_scale_tsc(vcpu, (u64) adjustment); + adjustment = kvm_scale_tsc(vcpu, (u64) adjustment, true); adjust_tsc_offset_guest(vcpu, adjustment); } @@ -2780,7 +2784,7 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) /* With all the info we got, fill in the values */ if (kvm_has_tsc_control) - tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz); + tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz, true); if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) { kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL, @@ -3474,7 +3478,8 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset : vcpu->arch.tsc_offset; - msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset; + msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), + msr_info->host_initiated) + tsc_offset; break; } case MSR_MTRRcap: From patchwork Thu May 6 10:32:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E574DC433ED for ; Thu, 6 May 2021 10:35:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B5F2F611AC for ; Thu, 6 May 2021 10:35:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234555AbhEFKgb (ORCPT ); Thu, 6 May 2021 06:36:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234406AbhEFKgb (ORCPT ); Thu, 6 May 2021 06:36:31 -0400 Received: from mout-p-101.mailbox.org (mout-p-101.mailbox.org [IPv6:2001:67c:2050::465:101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42154C061574 for ; Thu, 6 May 2021 03:35:33 -0700 (PDT) Received: from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-101.mailbox.org (Postfix) with ESMTPS id 4FbVN34MRqzQjmP; Thu, 6 May 2021 12:35:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mailbox.org; h= references:in-reply-to:message-id:date:date:subject:subject:from :from:received; s=mail20150812; t=1620297328; bh=9uNWF8Xr0G9/jSz HcgQqOcjiTZHBCs03GQfqI3el7nI=; b=OphBRe6c6zbEuPFTv/L43bzPdz29JxA YU6Myw0IXDWEzjkI1cXu2YqgCoemMWInnKOlrte9qxqtXO5tLMLarB/UAVoJN79e f1Lh9PcpS4KH7Vd0hhArqsam33vD4yz0UZGT4sh1Pz2oqbUPveNx1jbY3EAf6iM6 amSpQLrMwqe2i/FbRXi5867az/V6Ap8n3xzJSUZyaulhTLGipp7uyEwAzML3kd7G pN5d6i8kX/4Mojdqpc5sASmtk6fdnsEZ/F0PN1mwwUbx7/1tFd6BdFD0B7O5WT2m UPJJJv7P6w7XrFb1DVJ+hAq3+DV3VH2E6Vgys5gUawHgBNMW3LAoByg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1620297329; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:in-reply-to:in-reply-to:references:references; bh=m4l+yaalVSjEbiK6O7xAueJFYpP9C6LsbkEmolHF2zc=; b=uBBuXG0UcPOhsiMSOHpa1q7ZBM2y8f0Pg/rS/bl+43t/IJI2TDagvkDpKVpchvnKu589fO DUpLQoktRM0hOgFkG308QgpiYVX+qHy0P26RLGMdMXECV7qhqNciBaxfrkcSwEF53l92Mv tHDPhNiWmamYcVi+NpTrzWf8ndnRCJ0DbqHoSDFZ7q9xDNYTl8oC14ui0WbMwfRE8IF6a0 ovXG2vtK+0DG2hYu3MdML53+OcksKgwLSTTe/P3D6Xag/7BMrATKpQAMm05zUwcm0xA9Da wMx0/oeR26VDer5Wz4I9cE3CWgPiGj9VGPvHvFGMTrfYYUlCEid5lKRVoMCPTg== X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by spamfilter03.heinlein-hosting.de (spamfilter03.heinlein-hosting.de [80.241.56.117]) (amavisd-new, port 10030) with ESMTP id 9CK4h8sfBaTP; Thu, 6 May 2021 12:35:28 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 4/8] KVM: VMX: Adjust the TSC-related VMCS fields on L2 entry and exit Date: Thu, 6 May 2021 10:32:24 +0000 Message-Id: <20210506103228.67864-5-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -4.11 / 15.00 / 15.00 X-Rspamd-Queue-Id: 743A81868 X-Rspamd-UID: 32ff15 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis When L2 is entered we need to "merge" the TSC multiplier and TSC offset values of VMCS01 and VMCS12 and store the result into the current VMCS02. The 02 values are calculated using the following equations: offset_02 = ((offset_01 * mult_12) >> 48) + offset_12 mult_02 = (mult_01 * mult_12) >> 48 Signed-off-by: Ilias Stamatis --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/vmx/nested.c | 26 ++++++++++++++++++++++---- arch/x86/kvm/x86.c | 25 +++++++++++++++++++++++++ 3 files changed, 48 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index cdddbf0b1177..e7a1eb36f95a 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1780,6 +1780,7 @@ void kvm_define_user_return_msr(unsigned index, u32 msr); int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, bool l1); +u64 kvm_compute_02_tsc_offset(u64 l1_offset, u64 l2_multiplier, u64 l2_offset); u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index bced76637823..a1bf28f33837 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -3353,8 +3353,22 @@ enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu, } enter_guest_mode(vcpu); - if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING) - vcpu->arch.tsc_offset += vmcs12->tsc_offset; + + if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING) { + if (vmcs12->secondary_vm_exec_control & SECONDARY_EXEC_TSC_SCALING) { + vcpu->arch.tsc_offset = kvm_compute_02_tsc_offset( + vcpu->arch.l1_tsc_offset, + vmcs12->tsc_multiplier, + vmcs12->tsc_offset); + + vcpu->arch.tsc_scaling_ratio = mul_u64_u64_shr( + vcpu->arch.tsc_scaling_ratio, + vmcs12->tsc_multiplier, + kvm_tsc_scaling_ratio_frac_bits); + } else { + vcpu->arch.tsc_offset += vmcs12->tsc_offset; + } + } if (prepare_vmcs02(vcpu, vmcs12, &entry_failure_code)) { exit_reason.basic = EXIT_REASON_INVALID_STATE; @@ -4454,8 +4468,12 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason, if (nested_cpu_has_preemption_timer(vmcs12)) hrtimer_cancel(&to_vmx(vcpu)->nested.preemption_timer); - if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING) - vcpu->arch.tsc_offset -= vmcs12->tsc_offset; + if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING) { + vcpu->arch.tsc_offset = vcpu->arch.l1_tsc_offset; + + if (vmcs12->secondary_vm_exec_control & SECONDARY_EXEC_TSC_SCALING) + vcpu->arch.tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; + } if (likely(!vmx->fail)) { sync_vmcs02_to_vmcs12(vcpu, vmcs12); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 26a4c0f46f15..87deb119c521 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2266,6 +2266,31 @@ static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc) return target_tsc - tsc; } +/* + * This function computes the TSC offset that is stored in VMCS02 when entering + * L2 by combining the offset and multiplier values of VMCS01 and VMCS12. + */ +u64 kvm_compute_02_tsc_offset(u64 l1_offset, u64 l2_multiplier, u64 l2_offset) +{ + u64 offset; + + /* + * The L1 offset is interpreted as a signed number by the CPU and can + * be negative. So we extract the sign before the multiplication and + * put it back afterwards if needed. + */ + offset = mul_u64_u64_shr(abs((s64) l1_offset), + l2_multiplier, + kvm_tsc_scaling_ratio_frac_bits); + + if ((s64) l1_offset < 0) + offset = -((s64) offset); + + offset += l2_offset; + return offset; +} +EXPORT_SYMBOL_GPL(kvm_compute_02_tsc_offset); + u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc) { return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc, true); From patchwork Thu May 6 10:32:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13CD1C433B4 for ; Thu, 6 May 2021 10:35:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C8A8E61207 for ; Thu, 6 May 2021 10:35:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234406AbhEFKgw (ORCPT ); Thu, 6 May 2021 06:36:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231863AbhEFKgw (ORCPT ); Thu, 6 May 2021 06:36:52 -0400 Received: from mout-p-102.mailbox.org (mout-p-102.mailbox.org [IPv6:2001:67c:2050::465:102]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4F89C061761 for ; Thu, 6 May 2021 03:35:54 -0700 (PDT) Received: from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-102.mailbox.org (Postfix) with ESMTPS id 4FbVNS0pF8zQk1H; Thu, 6 May 2021 12:35:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mailbox.org; h= references:in-reply-to:message-id:date:date:subject:subject:from :from:received; s=mail20150812; t=1620297349; bh=tEybp2p8gf7yZ+6 LkwoThST0HRw53MFcH7vdYU00HJw=; b=wzgn2nFq00MCUz95pLq5RL0DEwQy4lL 7IMijFPXEpESm+2MDdvveYYwZrTmQJuvxqBE3/kWivcqT2P9FVYpcbAGuWp4Rw/6 14DU9PLgztfelB+2y4Vijo0+nlGmOwm5v1lGt32NaCh7ftPxCNyuhiykuJD7B0J9 IV9pyC+0vYxhKWK7wMr/AQvkaD4opwFdROX9G/Dxlo/NSbhaplAQj2GOA56nnHIs fCzzWz9Tb34bgJmWhVBxw+sMAZadHwo5DIF0Vcy4bX44uOMMbwWoXU3bnwDaYegR uVGNDNAniSSY1PmX7S92lAxQnpt8rFy4kejPGRwpO5ud02bTAA2telg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1620297350; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:in-reply-to:in-reply-to:references:references; bh=gZSRfLxHhC3FdVKaHb3Mg4nXEWDZswfrHVBWzXtiPxo=; b=QBmzz/smQt3uzBwJtPIBHOc/ZKuk8d8iX9kWRQZqro8vC2Ti8sLJs88tUXKbS+/9LSTRj4 8N/u+xnLcBSsgqa00goLmOAsOgT/G8p51vpp3Qm/I3QeaImSR8t5NFPYjSau28BlV4cxdK 2fvFda5NrMGyDaCGOYtXCFRafELiCjCSNwFPqO3PpNT+yDf0Rjd4/fpmcny7rx6YTDfjN9 cxPn0VZX/uozCg/d8qw/YOQhGHwl7sjdX412NmnzP9Ay6animJCbkPTKRWEsiHVSKXYTiU DPAQjitwXsyvle2cqnm7HllcC6KoEzFRbLUlMUNPvO7OkMC1jAHYUVXzuMXMTg== X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by spamfilter04.heinlein-hosting.de (spamfilter04.heinlein-hosting.de [80.241.56.122]) (amavisd-new, port 10030) with ESMTP id 1-E47WGN_SHf; Thu, 6 May 2021 12:35:49 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 5/8] KVM: X86: Move tracing outside write_l1_tsc_offset() Date: Thu, 6 May 2021 10:32:25 +0000 Message-Id: <20210506103228.67864-6-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -4.11 / 15.00 / 15.00 X-Rspamd-Queue-Id: 355691868 X-Rspamd-UID: 2bd5a9 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis A subsequent patch fixes write_l1_tsc_offset() to account for nested TSC scaling. Calculating the L1 TSC for logging it with the trace call becomes more complex then. This patch moves the trace call to the caller and avoids code duplication as a result too. Signed-off-by: Ilias Stamatis Reviewed-by: Maxim Levitsky --- arch/x86/kvm/svm/svm.c | 4 ---- arch/x86/kvm/vmx/vmx.c | 3 --- arch/x86/kvm/x86.c | 4 ++++ 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 9790c73f2a32..d2f9d6a9716f 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -1090,10 +1090,6 @@ static u64 svm_write_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 offset) svm->vmcb01.ptr->control.tsc_offset = offset; } - trace_kvm_write_tsc_offset(vcpu->vcpu_id, - svm->vmcb->control.tsc_offset - g_tsc_offset, - offset); - svm->vmcb->control.tsc_offset = offset + g_tsc_offset; vmcb_mark_dirty(svm->vmcb, VMCB_INTERCEPTS); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index cbe0cdade38a..49241423b854 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1812,9 +1812,6 @@ static u64 vmx_write_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 offset) (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING)) g_tsc_offset = vmcs12->tsc_offset; - trace_kvm_write_tsc_offset(vcpu->vcpu_id, - vcpu->arch.tsc_offset - g_tsc_offset, - offset); vmcs_write64(TSC_OFFSET, offset + g_tsc_offset); return offset + g_tsc_offset; } diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 87deb119c521..c08295bcf50e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2299,6 +2299,10 @@ EXPORT_SYMBOL_GPL(kvm_read_l1_tsc); static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset) { + trace_kvm_write_tsc_offset(vcpu->vcpu_id, + vcpu->arch.l1_tsc_offset, + offset); + vcpu->arch.l1_tsc_offset = offset; vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset); } From patchwork Thu May 6 10:32:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C662DC433B4 for ; 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Thu, 6 May 2021 12:36:00 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 6/8] KVM: VMX: Make vmx_write_l1_tsc_offset() work with nested TSC scaling Date: Thu, 6 May 2021 10:32:26 +0000 Message-Id: <20210506103228.67864-7-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -4.55 / 15.00 / 15.00 X-Rspamd-Queue-Id: 495101867 X-Rspamd-UID: a39cc6 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis Calculating the current TSC offset is done differently when nested TSC scaling is used. Signed-off-by: Ilias Stamatis --- arch/x86/kvm/vmx/vmx.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 49241423b854..df7dc0e4c903 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1797,10 +1797,16 @@ static void setup_msrs(struct vcpu_vmx *vmx) vmx_update_msr_bitmap(&vmx->vcpu); } -static u64 vmx_write_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 offset) +/* + * This function receives the requested offset for L1 as an argument but it + * actually writes the "current" tsc offset to the VMCS and returns it. The + * current offset might be different in case an L2 guest is currently running + * and its VMCS02 is loaded. + */ +static u64 vmx_write_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset) { struct vmcs12 *vmcs12 = get_vmcs12(vcpu); - u64 g_tsc_offset = 0; + u64 cur_offset = l1_offset; /* * We're here if L1 chose not to trap WRMSR to TSC. According @@ -1809,11 +1815,19 @@ static u64 vmx_write_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 offset) * to the newly set TSC to get L2's TSC. */ if (is_guest_mode(vcpu) && - (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING)) - g_tsc_offset = vmcs12->tsc_offset; + (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING)) { + if (vmcs12->secondary_vm_exec_control & SECONDARY_EXEC_TSC_SCALING) { + cur_offset = kvm_compute_02_tsc_offset( + l1_offset, + vmcs12->tsc_multiplier, + vmcs12->tsc_offset); + } else { + cur_offset = l1_offset + vmcs12->tsc_offset; + } + } - vmcs_write64(TSC_OFFSET, offset + g_tsc_offset); - return offset + g_tsc_offset; + vmcs_write64(TSC_OFFSET, cur_offset); + return cur_offset; } /* From patchwork Thu May 6 10:32:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39540C433ED for ; Thu, 6 May 2021 10:36:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04B43611AC for ; Thu, 6 May 2021 10:36:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234564AbhEFKhN (ORCPT ); Thu, 6 May 2021 06:37:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231863AbhEFKhL (ORCPT ); Thu, 6 May 2021 06:37:11 -0400 Received: from mout-p-102.mailbox.org (mout-p-102.mailbox.org [IPv6:2001:67c:2050::465:102]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E84B6C061574 for ; Thu, 6 May 2021 03:36:13 -0700 (PDT) Received: from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-102.mailbox.org (Postfix) with ESMTPS id 4FbVNr4J7RzQk2W; Thu, 6 May 2021 12:36:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mailbox.org; h= references:in-reply-to:message-id:date:date:subject:subject:from :from:received; s=mail20150812; t=1620297369; bh=RvZXkGsu8cXKRJt 8ydP7KN+mkXFOvnb7/TswBji0CFg=; b=jDBRrN8W/XOweo2rKhlpopTx2P+tDVv 7KqzLy3nBR4ql2WTW7HDVcfcMbOXEocCT5ywAYhKs+sFp/8Mhuin6amvxrvS4LDA CWC1hwJGRRUcRf5MbcRQqhGriRSyGpiKYAsBzkTd84FKaJxAZihmxB0fYqE2yl3i EXWZsyAyUrxgwpqLPGauz7v+DokVZj0FhOQz+vqGRh+7AVic4hjvpkr1vv7JBK8P j4kewwaL0rRxRZdiGNSQuM/9LYnsnrfS2alpQkvyIJaxq5qhT2rJ2bbqBPPBfISc OizbUPqG98iZ27HikTiDfcs0MQbUUO3Jd64PEyBPQSuRytN2oXO3mJA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1620297370; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:in-reply-to:in-reply-to:references:references; bh=KWMygrqM7CgM+ub4JVcR1kl1qNZAp7fYzNhtJ1U3Qf8=; b=YVaAP7/rsG/s7w/GYGI6WBA6B1de4lGuAMgMS0B6O0JZ0yXvr5J/AzSOJBLhvksPqD7qfR lZt/DkhtYxBrL+/l0k1aAP3IMr0Yj35X6pNs3wncpgocCMt7xiQk68cpKX6l2qR1Y8vpnb bMV3gVudkJfhYq6nARIuDz1dsWt80jBHeBvpgDPfpLrPNhKsLfZ/EN87+oDMzW9fifq11g HlYgUoNzMs2g2TuKQFhN1sTWtqS8mh54EanBB5OMQiKu/kd/FtvIbwfLYL9XYlk/6dmiLM ErZHmPDWd6f4VpuG4p+Q0wsjd8ByeU29VlbsyZkOZnlhHSJXCIz76u0vqoCKqw== X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by spamfilter02.heinlein-hosting.de (spamfilter02.heinlein-hosting.de [80.241.56.116]) (amavisd-new, port 10030) with ESMTP id iCIEuU8BK-AH; Thu, 6 May 2021 12:36:09 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 7/8] KVM: VMX: Expose TSC scaling to L2 Date: Thu, 6 May 2021 10:32:27 +0000 Message-Id: <20210506103228.67864-8-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -1.55 / 15.00 / 15.00 X-Rspamd-Queue-Id: A6D2417CF X-Rspamd-UID: 3cb4ce Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis Expose the TSC scaling feature to nested guests. Signed-off-by: Ilias Stamatis Reviewed-by: Maxim Levitsky --- arch/x86/kvm/vmx/nested.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index a1bf28f33837..639cb9462103 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -2277,7 +2277,8 @@ static void prepare_vmcs02_early(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12) SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE | SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | SECONDARY_EXEC_APIC_REGISTER_VIRT | - SECONDARY_EXEC_ENABLE_VMFUNC); + SECONDARY_EXEC_ENABLE_VMFUNC | + SECONDARY_EXEC_TSC_SCALING); if (nested_cpu_has(vmcs12, CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)) exec_control |= vmcs12->secondary_vm_exec_control; @@ -6483,7 +6484,8 @@ void nested_vmx_setup_ctls_msrs(struct nested_vmx_msrs *msrs, u32 ept_caps) SECONDARY_EXEC_RDRAND_EXITING | SECONDARY_EXEC_ENABLE_INVPCID | SECONDARY_EXEC_RDSEED_EXITING | - SECONDARY_EXEC_XSAVES; + SECONDARY_EXEC_XSAVES | + SECONDARY_EXEC_TSC_SCALING; /* * We can emulate "VMCS shadowing," even if the hardware From patchwork Thu May 6 10:32:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ilstam@mailbox.org X-Patchwork-Id: 12241995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FECBC433ED for ; Thu, 6 May 2021 10:36:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5DBB9611AC for ; Thu, 6 May 2021 10:36:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234561AbhEFKh0 (ORCPT ); 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Thu, 6 May 2021 12:36:19 +0200 (CEST) From: ilstam@mailbox.org To: kvm@vger.kernel.org, pbonzini@redhat.com Cc: ilstam@amazon.com, seanjc@google.com, vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, haozhong.zhang@intel.com, zamsden@gmail.com, mtosatti@redhat.com, dplotnikov@virtuozzo.com, dwmw@amazon.co.uk Subject: [PATCH 8/8] KVM: selftests: x86: Add vmx_nested_tsc_scaling_test Date: Thu, 6 May 2021 10:32:28 +0000 Message-Id: <20210506103228.67864-9-ilstam@mailbox.org> In-Reply-To: <20210506103228.67864-1-ilstam@mailbox.org> References: <20210506103228.67864-1-ilstam@mailbox.org> X-MBO-SPAM-Probability: X-Rspamd-Score: -4.55 / 15.00 / 15.00 X-Rspamd-Queue-Id: A5B6B1893 X-Rspamd-UID: 8ec50b Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Ilias Stamatis Test that nested TSC scaling works as expected with both L1 and L2 scaled. Signed-off-by: Ilias Stamatis --- tools/testing/selftests/kvm/.gitignore | 1 + tools/testing/selftests/kvm/Makefile | 1 + .../kvm/x86_64/vmx_nested_tsc_scaling_test.c | 209 ++++++++++++++++++ 3 files changed, 211 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c diff --git a/tools/testing/selftests/kvm/.gitignore b/tools/testing/selftests/kvm/.gitignore index bd83158e0e0b..cc02022f9951 100644 --- a/tools/testing/selftests/kvm/.gitignore +++ b/tools/testing/selftests/kvm/.gitignore @@ -29,6 +29,7 @@ /x86_64/vmx_preemption_timer_test /x86_64/vmx_set_nested_state_test /x86_64/vmx_tsc_adjust_test +/x86_64/vmx_nested_tsc_scaling_test /x86_64/xapic_ipi_test /x86_64/xen_shinfo_test /x86_64/xen_vmcall_test diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index e439d027939d..1078240b1313 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -60,6 +60,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/vmx_close_while_nested_test TEST_GEN_PROGS_x86_64 += x86_64/vmx_dirty_log_test TEST_GEN_PROGS_x86_64 += x86_64/vmx_set_nested_state_test TEST_GEN_PROGS_x86_64 += x86_64/vmx_tsc_adjust_test +TEST_GEN_PROGS_x86_64 += x86_64/vmx_nested_tsc_scaling_test TEST_GEN_PROGS_x86_64 += x86_64/xapic_ipi_test TEST_GEN_PROGS_x86_64 += x86_64/xss_msr_test TEST_GEN_PROGS_x86_64 += x86_64/debug_regs diff --git a/tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c b/tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c new file mode 100644 index 000000000000..b05f5151ecbe --- /dev/null +++ b/tools/testing/selftests/kvm/x86_64/vmx_nested_tsc_scaling_test.c @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * vmx_nested_tsc_scaling_test + * + * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. + * + * This test case verifies that nested TSC scaling behaves as expected when + * both L1 and L2 are scaled using different ratios. For this test we scale + * L1 down and scale L2 up. + */ + + +#include "kvm_util.h" +#include "vmx.h" +#include "kselftest.h" + + +#define VCPU_ID 0 + +/* L1 is scaled down by this factor */ +#define L1_SCALE_FACTOR 2ULL +/* L2 is scaled up (from L1's perspective) by this factor */ +#define L2_SCALE_FACTOR 4ULL + +#define TSC_OFFSET_L2 (1UL << 32) +#define TSC_MULTIPLIER_L2 (L2_SCALE_FACTOR << 48) + +#define L2_GUEST_STACK_SIZE 64 + +enum { USLEEP, UCHECK_L1, UCHECK_L2 }; +#define GUEST_SLEEP(sec) ucall(UCALL_SYNC, 2, USLEEP, sec) +#define GUEST_CHECK(level, freq) ucall(UCALL_SYNC, 2, level, freq) + + +/* + * This function checks whether the "actual" TSC frequency of a guest matches + * its expected frequency. In order to account for delays in taking the TSC + * measurements, a difference of 1% between the actual and the expected value + * is tolerated. + */ +static void compare_tsc_freq(uint64_t actual, uint64_t expected) +{ + uint64_t tolerance, thresh_low, thresh_high; + + tolerance = expected / 100; + thresh_low = expected - tolerance; + thresh_high = expected + tolerance; + + TEST_ASSERT(thresh_low < actual, + "TSC freq is expected to be between %"PRIu64" and %"PRIu64 + " but it actually is %"PRIu64, + thresh_low, thresh_high, actual); + TEST_ASSERT(thresh_high > actual, + "TSC freq is expected to be between %"PRIu64" and %"PRIu64 + " but it actually is %"PRIu64, + thresh_low, thresh_high, actual); +} + +static void check_tsc_freq(int level) +{ + uint64_t tsc_start, tsc_end, tsc_freq; + + /* + * Reading the TSC twice with about a second's difference should give + * us an approximation of the TSC frequency from the guest's + * perspective. Now, this won't be completely accurate, but it should + * be good enough for the purposes of this test. + */ + tsc_start = rdmsr(MSR_IA32_TSC); + GUEST_SLEEP(1); + tsc_end = rdmsr(MSR_IA32_TSC); + + tsc_freq = tsc_end - tsc_start; + + GUEST_CHECK(level, tsc_freq); +} + +static void l2_guest_code(void) +{ + check_tsc_freq(UCHECK_L2); + + /* exit to L1 */ + __asm__ __volatile__("vmcall"); +} + +static void l1_guest_code(struct vmx_pages *vmx_pages) +{ + unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE]; + uint32_t control; + + /* check that L1's frequency looks alright before launching L2 */ + check_tsc_freq(UCHECK_L1); + + GUEST_ASSERT(prepare_for_vmx_operation(vmx_pages)); + GUEST_ASSERT(load_vmcs(vmx_pages)); + + /* prepare the VMCS for L2 execution */ + prepare_vmcs(vmx_pages, l2_guest_code, &l2_guest_stack[L2_GUEST_STACK_SIZE]); + + /* enable TSC offsetting and TSC scaling for L2 */ + control = vmreadz(CPU_BASED_VM_EXEC_CONTROL); + control |= CPU_BASED_USE_MSR_BITMAPS | CPU_BASED_USE_TSC_OFFSETTING; + vmwrite(CPU_BASED_VM_EXEC_CONTROL, control); + + control = vmreadz(SECONDARY_VM_EXEC_CONTROL); + control |= SECONDARY_EXEC_TSC_SCALING; + vmwrite(SECONDARY_VM_EXEC_CONTROL, control); + + vmwrite(TSC_OFFSET, TSC_OFFSET_L2); + vmwrite(TSC_MULTIPLIER, TSC_MULTIPLIER_L2); + vmwrite(TSC_MULTIPLIER_HIGH, TSC_MULTIPLIER_L2 >> 32); + + /* launch L2 */ + GUEST_ASSERT(!vmlaunch()); + GUEST_ASSERT(vmreadz(VM_EXIT_REASON) == EXIT_REASON_VMCALL); + + /* check that L1's frequency still looks good */ + check_tsc_freq(UCHECK_L1); + + GUEST_DONE(); +} + +static void tsc_scaling_check_supported(void) +{ + if (!kvm_check_cap(KVM_CAP_TSC_CONTROL)) { + print_skip("TSC scaling not supported by the HW"); + exit(KSFT_SKIP); + } +} + +int main(int argc, char *argv[]) +{ + struct kvm_vm *vm; + vm_vaddr_t vmx_pages_gva; + + uint64_t tsc_start, tsc_end; + uint64_t tsc_khz; + uint64_t l0_tsc_freq = 0; + uint64_t l1_tsc_freq = 0; + uint64_t l2_tsc_freq = 0; + + nested_vmx_check_supported(); + tsc_scaling_check_supported(); + + tsc_start = rdtsc(); + sleep(1); + tsc_end = rdtsc(); + + l0_tsc_freq = tsc_end - tsc_start; + printf("real TSC frequency is around: %"PRIu64"\n", l0_tsc_freq); + + vm = vm_create_default(VCPU_ID, 0, (void *) l1_guest_code); + vcpu_alloc_vmx(vm, &vmx_pages_gva); + vcpu_args_set(vm, VCPU_ID, 1, vmx_pages_gva); + + tsc_khz = _vcpu_ioctl(vm, VCPU_ID, KVM_GET_TSC_KHZ, NULL); + TEST_ASSERT(tsc_khz != -1, "vcpu ioctl KVM_GET_TSC_KHZ failed"); + + /* scale down L1's TSC frequency */ + vcpu_ioctl(vm, VCPU_ID, KVM_SET_TSC_KHZ, + (void *) (tsc_khz / L1_SCALE_FACTOR)); + + for (;;) { + volatile struct kvm_run *run = vcpu_state(vm, VCPU_ID); + struct ucall uc; + + vcpu_run(vm, VCPU_ID); + TEST_ASSERT(run->exit_reason == KVM_EXIT_IO, + "Got exit_reason other than KVM_EXIT_IO: %u (%s)\n", + run->exit_reason, + exit_reason_str(run->exit_reason)); + + switch (get_ucall(vm, VCPU_ID, &uc)) { + case UCALL_ABORT: + TEST_FAIL("%s", (const char *) uc.args[0]); + case UCALL_SYNC: + switch (uc.args[0]) { + case USLEEP: + sleep(uc.args[1]); + break; + case UCHECK_L1: + l1_tsc_freq = uc.args[1]; + printf("L1's TSC frequency is around: %"PRIu64 + "\n", l1_tsc_freq); + + compare_tsc_freq(l1_tsc_freq, + l0_tsc_freq / L1_SCALE_FACTOR); + break; + case UCHECK_L2: + l2_tsc_freq = uc.args[1]; + printf("L2's TSC frequency is around: %"PRIu64 + "\n", l2_tsc_freq); + + compare_tsc_freq(l2_tsc_freq, + l1_tsc_freq * L2_SCALE_FACTOR); + break; + } + break; + case UCALL_DONE: + goto done; + default: + TEST_FAIL("Unknown ucall %lu", uc.cmd); + } + } + +done: + kvm_vm_free(vm); + return 0; +}