From patchwork Mon May 17 09:43:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sit, Michael Wei Hong" X-Patchwork-Id: 12261341 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5228C433ED for ; Mon, 17 May 2021 09:48:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9A1F1611CA for ; Mon, 17 May 2021 09:48:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236194AbhEQJt4 (ORCPT ); Mon, 17 May 2021 05:49:56 -0400 Received: from mga05.intel.com ([192.55.52.43]:33296 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236032AbhEQJty (ORCPT ); Mon, 17 May 2021 05:49:54 -0400 IronPort-SDR: 2eP3txAJWhlqhPTzkMRbm+la5Y/O3Knt8TbRtkG1/z//NGgPJjZQGlSZxHdfJCzkDEU7Ktr5kz YaI8mm63R1XA== X-IronPort-AV: E=McAfee;i="6200,9189,9986"; a="285958503" X-IronPort-AV: E=Sophos;i="5.82,307,1613462400"; d="scan'208";a="285958503" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 May 2021 02:48:38 -0700 IronPort-SDR: w9DBZ9O0g2ZC0JAiCp1cgueqvsJl4GzJX51nCg4yaFhf8w3NY6UfbZuEfa0Lyg9qz4ZVGu0AiC M28T0GkvcpBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,307,1613462400"; d="scan'208";a="540356000" Received: from mike-ilbpg1.png.intel.com ([10.88.227.76]) by fmsmga001.fm.intel.com with ESMTP; 17 May 2021 02:48:34 -0700 From: Michael Sit Wei Hong To: Jose.Abreu@synopsys.com, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, kuba@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com, alexandre.torgue@foss.st.com, davem@davemloft.net, mcoquelin.stm32@gmail.com, weifeng.voon@intel.com, boon.leong.ong@intel.com, tee.min.tan@intel.com, vee.khee.wong@linux.intel.com, vee.khee.wong@intel.com, michael.wei.hong.sit@intel.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/2] net: pcs: Introducing support for DWC xpcs Energy Efficient Ethernet Date: Mon, 17 May 2021 17:43:31 +0800 Message-Id: <20210517094332.24976-2-michael.wei.hong.sit@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210517094332.24976-1-michael.wei.hong.sit@intel.com> References: <20210517094332.24976-1-michael.wei.hong.sit@intel.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add DWC xpcs EEE support callbacks.The callback function is used to set EEE registers on xpcs. xpcs transparent mode is enabled to allow PHY to detect MAC EEE status. Signed-off-by: Michael Sit Wei Hong --- drivers/net/pcs/pcs-xpcs.c | 51 ++++++++++++++++++++++++++++++++++++ include/linux/pcs/pcs-xpcs.h | 2 ++ 2 files changed, 53 insertions(+) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 944ba105cac1..aa985a5aae8d 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -63,6 +63,9 @@ #define DW_VR_MII_DIG_CTRL1 0x8000 #define DW_VR_MII_AN_CTRL 0x8001 #define DW_VR_MII_AN_INTR_STS 0x8002 +/* EEE Mode Control Register */ +#define DW_VR_MII_EEE_MCTRL0 0x8006 +#define DW_VR_MII_EEE_MCTRL1 0x800b /* VR_MII_DIG_CTRL1 */ #define DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW BIT(9) @@ -86,6 +89,20 @@ #define DW_VR_MII_C37_ANSGM_SP_1000 0x2 #define DW_VR_MII_C37_ANSGM_SP_LNKSTS BIT(4) +/* VR MII EEE Control 0 defines */ +#define DW_VR_MII_EEE_LTX_EN BIT(0) /* LPI Tx Enable */ +#define DW_VR_MII_EEE_LRX_EN BIT(1) /* LPI Rx Enable */ +#define DW_VR_MII_EEE_TX_QUIET_EN BIT(2) /* Tx Quiet Enable */ +#define DW_VR_MII_EEE_RX_QUIET_EN BIT(3) /* Rx Quiet Enable */ +#define DW_VR_MII_EEE_TX_EN_CTRL BIT(4) /* Tx Control Enable */ +#define DW_VR_MII_EEE_RX_EN_CTRL BIT(7) /* Rx Control Enable */ + +#define DW_VR_MII_EEE_MULT_FACT_100NS_SHIFT 8 +#define DW_VR_MII_EEE_MULT_FACT_100NS GENMASK(11, 8) + +/* VR MII EEE Control 1 defines */ +#define DW_VR_MII_EEE_TRN_LPI BIT(0) /* Transparent Mode Enable */ + static const int xpcs_usxgmii_features[] = { ETHTOOL_LINK_MODE_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT, @@ -650,6 +667,39 @@ static int xpcs_validate(struct mdio_xpcs_args *xpcs, return 0; } +static int xpcs_config_eee(struct mdio_xpcs_args *xpcs, int mult_fact_100ns, + int enable) +{ + int ret; + + if (enable) { + /* Enable EEE */ + ret = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN | + DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN | + DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL | + mult_fact_100ns << DW_VR_MII_EEE_MULT_FACT_100NS_SHIFT; + } else { + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0); + if (ret < 0) + return ret; + ret &= ~(DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN | + DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN | + DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL | + DW_VR_MII_EEE_MULT_FACT_100NS); + } + + ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, ret); + if (ret < 0) + return ret; + + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1); + if (ret < 0) + return ret; + + ret |= DW_VR_MII_EEE_TRN_LPI; + return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1, ret); +} + static int xpcs_config_aneg_c37_sgmii(struct mdio_xpcs_args *xpcs) { int ret; @@ -908,6 +958,7 @@ static struct mdio_xpcs_ops xpcs_ops = { .get_state = xpcs_get_state, .link_up = xpcs_link_up, .probe = xpcs_probe, + .config_eee = xpcs_config_eee, }; struct mdio_xpcs_ops *mdio_xpcs_get_ops(void) diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h index 2cb5188a7ef1..5938ced805f4 100644 --- a/include/linux/pcs/pcs-xpcs.h +++ b/include/linux/pcs/pcs-xpcs.h @@ -32,6 +32,8 @@ struct mdio_xpcs_ops { int (*link_up)(struct mdio_xpcs_args *xpcs, int speed, phy_interface_t interface); int (*probe)(struct mdio_xpcs_args *xpcs, phy_interface_t interface); + int (*config_eee)(struct mdio_xpcs_args *xpcs, int mult_fact_100ns, + int enable); }; #if IS_ENABLED(CONFIG_PCS_XPCS) From patchwork Mon May 17 09:43:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sit, Michael Wei Hong" X-Patchwork-Id: 12261343 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F491C43460 for ; Mon, 17 May 2021 09:48:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E61DB611CA for ; Mon, 17 May 2021 09:48:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236256AbhEQJuB (ORCPT ); Mon, 17 May 2021 05:50:01 -0400 Received: from mga05.intel.com ([192.55.52.43]:33296 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236234AbhEQJt6 (ORCPT ); Mon, 17 May 2021 05:49:58 -0400 IronPort-SDR: WksWsRLUxeIr2cbE1HJjbuXQefwikYv+TL9ozfAb4OHGxck5frpQr61EyVUqrdqR0JnukNgPot sqcM+5rPGk+g== X-IronPort-AV: E=McAfee;i="6200,9189,9986"; a="285958510" X-IronPort-AV: E=Sophos;i="5.82,307,1613462400"; d="scan'208";a="285958510" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 May 2021 02:48:42 -0700 IronPort-SDR: rME9TzGhPgHXvRp3v/U89+7RJbt2dOakBUJ5/8pgJkfdJdOLkRJmwiN3xWcaRrh0Ifn+fHXCN7 PpfVMGmoerZg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,307,1613462400"; d="scan'208";a="540356013" Received: from mike-ilbpg1.png.intel.com ([10.88.227.76]) by fmsmga001.fm.intel.com with ESMTP; 17 May 2021 02:48:38 -0700 From: Michael Sit Wei Hong To: Jose.Abreu@synopsys.com, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, kuba@kernel.org, netdev@vger.kernel.org, peppe.cavallaro@st.com, alexandre.torgue@foss.st.com, davem@davemloft.net, mcoquelin.stm32@gmail.com, weifeng.voon@intel.com, boon.leong.ong@intel.com, tee.min.tan@intel.com, vee.khee.wong@linux.intel.com, vee.khee.wong@intel.com, michael.wei.hong.sit@intel.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/2] net: stmmac: Add callbacks for DWC xpcs Energy Efficient Ethernet Date: Mon, 17 May 2021 17:43:32 +0800 Message-Id: <20210517094332.24976-3-michael.wei.hong.sit@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210517094332.24976-1-michael.wei.hong.sit@intel.com> References: <20210517094332.24976-1-michael.wei.hong.sit@intel.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Link xpcs callback functions for MAC to configure the xpcs EEE feature. The clk_eee frequency is used to calculate the MULT_FACT_100NS. This is to adjust the clock tic closer to 100ns. Signed-off-by: Michael Sit Wei Hong --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 11 +++++++++++ drivers/net/ethernet/stmicro/stmmac/hwif.h | 2 ++ drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 6 ++++++ include/linux/stmmac.h | 1 + 4 files changed, 20 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 80728a4c0e3f..e36a8cc59ad0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -429,6 +429,17 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, plat->force_sf_dma_mode = 0; plat->tso_en = 1; + /* Multiplying factor to the clk_eee_i clock time + * period to make it closer to 100 ns. This value + * should be programmed such that the clk_eee_time_period * + * (MULT_FACT_100NS + 1) should be within 80 ns to 120 ns + * clk_eee frequency is 19.2Mhz + * clk_eee_time_period is 52ns + * 52ns * (1 + 1) = 104ns + * MULT_FACT_100NS = 1 + */ + plat->mult_fact_100ns = 1; + plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; for (i = 0; i < plat->rx_queues_to_use; i++) { diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index 2cc91759b91f..c678d7b826a3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -624,6 +624,8 @@ struct stmmac_mmc_ops { stmmac_do_callback(__priv, xpcs, link_up, __args) #define stmmac_xpcs_probe(__priv, __args...) \ stmmac_do_callback(__priv, xpcs, probe, __args) +#define stmmac_xpcs_config_eee(__priv, __args...) \ + stmmac_do_callback(__priv, xpcs, config_eee, __args) struct stmmac_regs_off { u32 ptp_off; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 61b11639ee0c..1f6d749fd9a3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -720,6 +720,12 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev, netdev_warn(priv->dev, "Setting EEE tx-lpi is not supported\n"); + ret = stmmac_xpcs_config_eee(priv, &priv->hw->xpcs_args, + priv->plat->mult_fact_100ns, + edata->eee_enabled); + if (ret) + return ret; + if (!edata->eee_enabled) stmmac_disable_eee_mode(priv); diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 0db36360ef21..e14a12df381b 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -223,6 +223,7 @@ struct plat_stmmacenet_data { struct clk *clk_ptp_ref; unsigned int clk_ptp_rate; unsigned int clk_ref_rate; + unsigned int mult_fact_100ns; s32 ptp_max_adj; struct reset_control *stmmac_rst; struct stmmac_axi *axi;