From patchwork Wed May 19 14:36:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267767 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84481C433ED for ; Wed, 19 May 2021 14:37:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 62A54613AD for ; Wed, 19 May 2021 14:37:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354173AbhESOi4 (ORCPT ); Wed, 19 May 2021 10:38:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354202AbhESOiy (ORCPT ); Wed, 19 May 2021 10:38:54 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB014C06138A for ; Wed, 19 May 2021 07:37:31 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id 69so7148274plc.5 for ; Wed, 19 May 2021 07:37:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zG635xOID1k2/MXq+MKZASd8MAgolK42+7VgFHWsBrE=; b=BDOAaFFyisX6ZcapOca80pchy7MV6pvuLTVoq7tL9hVe78g3mtHX1u4KcxR+KS/l1F s0ICui7AisYvcrgn5Fq3pNlSOVTcwayGp0yzPvx0bsooNlS0I0qdQGX2pQ2m002mOxUd o7UY7FPxwVR20ym/34ykY6NYLAa4OBA1wmd56MPNLXZftzIajJSaJMz6Azog5/bb8gwW KFDGK2isep+R1PyWKl46dxch6UL+j2psBGeth0GeUAr0A/zN3owFojNwIGoQNaOLwBNc 1yOlz+3iK/JtsVFBzNxTavo49bCr6crtZe0p8oGda7GXKp/m23Tt/FyHNsmfawzBrkY5 XDAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zG635xOID1k2/MXq+MKZASd8MAgolK42+7VgFHWsBrE=; b=JbtHjnOs7If2vkLMixJ3pB7jaWYQCuENPKmx1TLqnL/1oX8Po8CUFV8T0d9Sm51jjp 5U77AxmcnjDufswa6naPpl6q7AmBQSqJB5vG/FGspNdTmQNEu0iJDyE5WZrXFfPX24Iq mWiwu2S7RP8F7h3IUbBeK7zI+8WoV7nfZre1JHMp2CQglg4RdmWFKxZqVg/AKH3+P2EC XmHfZaCVYVp7H4rV9bLwrQ6Qv40LPEPkB0aBNNQ7z1fT9Z1cB0BhhnA0ZhvJ8x3dkiPr UqRU48LMY7ey/1qteid21+7d4jL+UN/74BVrOckCSEkSctszu3lRAhkFh+85HCqKmJBC BDwg== X-Gm-Message-State: AOAM530v7OHxwSnF6kh04i7JMFMCXtmw6RuBgsmwrGHy3OwX9/D5MN0e vHP92+jFbU47HicnRjP989Fm4w== X-Google-Smtp-Source: ABdhPJzKbyM7GTDb3zd9dvjsR3+jQaQxL8QNti/wAyXdfzHXFw2mJreTEzc9H5+2zWBW1uYNWJ4mpA== X-Received: by 2002:a17:902:8505:b029:ec:b451:71cd with SMTP id bj5-20020a1709028505b02900ecb45171cdmr11390479plb.23.1621435051224; Wed, 19 May 2021 07:37:31 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.37.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:37:30 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 01/17] dt-bindings: qcom-bam: Convert binding to YAML Date: Wed, 19 May 2021 20:06:44 +0530 Message-Id: <20210519143700.27392-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Convert Qualcomm BAM DMA devicetree binding to YAML. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- .../devicetree/bindings/dma/qcom_bam_dma.txt | 50 ---------- .../devicetree/bindings/dma/qcom_bam_dma.yaml | 91 +++++++++++++++++++ 2 files changed, 91 insertions(+), 50 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt deleted file mode 100644 index cf5b9e44432c..000000000000 --- a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt +++ /dev/null @@ -1,50 +0,0 @@ -QCOM BAM DMA controller - -Required properties: -- compatible: must be one of the following: - * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084 - * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960 - * "qcom,bam-v1.7.0" for MSM8916 -- reg: Address range for DMA registers -- interrupts: Should contain the one interrupt shared by all channels -- #dma-cells: must be <1>, the cell in the dmas property of the client device - represents the channel number -- clocks: required clock -- clock-names: must contain "bam_clk" entry -- qcom,ee : indicates the active Execution Environment identifier (0-7) used in - the secure world. -- qcom,controlled-remotely : optional, indicates that the bam is controlled by - remote proccessor i.e. execution environment. -- num-channels : optional, indicates supported number of DMA channels in a - remotely controlled bam. -- qcom,num-ees : optional, indicates supported number of Execution Environments - in a remotely controlled bam. - -Example: - - uart-bam: dma@f9984000 = { - compatible = "qcom,bam-v1.4.0"; - reg = <0xf9984000 0x15000>; - interrupts = <0 94 0>; - clocks = <&gcc GCC_BAM_DMA_AHB_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - }; - -DMA clients must use the format described in the dma.txt file, using a two cell -specifier for each channel. - -Example: - serial@f991e000 { - compatible = "qcom,msm-uart"; - reg = <0xf991e000 0x1000> - <0xf9944000 0x19000>; - interrupts = <0 108 0>; - clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - - dmas = <&uart-bam 0>, <&uart-bam 1>; - dma-names = "rx", "tx"; - }; diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml new file mode 100644 index 000000000000..173e4d7508a6 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/qcom_bam_dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QCOM BAM DMA controller binding + +maintainers: + - Bhupesh Sharma + +description: | + This document defines the binding for the BAM DMA controller + found on Qualcomm parts. + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + enum: + - qcom,bam-v1.4.0 + - qcom,bam-v1.3.0 + - qcom,bam-v1.7.0 + + reg: + maxItems: 1 + description: Address range of the DMA registers. + + clocks: + minItems: 1 + maxItems: 8 + + clock-names: + const: bam_clk + + interrupts: + maxItems: 1 + description: Single interrupt line shared by all channels. + + num-channels: + maxItems: 31 + description: | + Indicates supported number of DMA channels in a remotely controlled bam. + + "#dma-cells": + const: 1 + description: The single cell represents the channel index. + + qcom,ee: + $ref: /schemas/types.yaml#/definitions/uint8 + description: + Indicates the active Execution Environment identifier (0-7) + used in the secure world. + enum: [0, 1, 2, 3, 4, 5, 6, 7] + + qcom,controlled-remotely: + $ref: /schemas/types.yaml#/definitions/flag + description: + Indicates that the bam is controlled by remote proccessor i.e. + execution environment. + + qcom,num-ees: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Indicates supported number of Execution Environments in a + remotely controlled bam. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - "#dma-cells" + - qcom,ee + +additionalProperties: false + +examples: + - | + #include + dma-controller@f9984000 { + compatible = "qcom,bam-v1.4.0"; + reg = <0xf9984000 0x15000>; + interrupts = <0 94 0>; + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = /bits/ 8 <0>; + }; From patchwork Wed May 19 14:36:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267769 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28502C433ED for ; Wed, 19 May 2021 14:37:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0B7566124C for ; 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Wed, 19 May 2021 07:37:37 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 02/17] dt-bindings: qcom-bam: Add 'interconnects' & 'interconnect-names' to optional properties Date: Wed, 19 May 2021 20:06:45 +0530 Message-Id: <20210519143700.27392-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add new optional properties - 'interconnects' and 'interconnect-names' to the device-tree binding documentation for qcom-bam DMA IP. These properties describe the interconnect path between bam and main memory and the interconnect type respectively. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml index 173e4d7508a6..d2900616006c 100644 --- a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml @@ -47,6 +47,14 @@ properties: const: 1 description: The single cell represents the channel index. + interconnects: + maxItems: 1 + description: | + Interconnect path between bam and main memory. + + interconnect-names: + const: memory + qcom,ee: $ref: /schemas/types.yaml#/definitions/uint8 description: From patchwork Wed May 19 14:36:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267771 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E749C433ED for ; Wed, 19 May 2021 14:38:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 061B4611C2 for ; Wed, 19 May 2021 14:38:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354219AbhESOjK (ORCPT ); Wed, 19 May 2021 10:39:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43292 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354257AbhESOjF (ORCPT ); Wed, 19 May 2021 10:39:05 -0400 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1F47C0613ED for ; Wed, 19 May 2021 07:37:44 -0700 (PDT) Received: by mail-pj1-x102e.google.com with SMTP id ot16so5489442pjb.3 for ; Wed, 19 May 2021 07:37:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tfYY0SynHLUvKImA0WJS6vFoZYpwQQ4sgm9paKqwl54=; b=LMDyQ/zuyHaHFHZdUKNQlFAxMEqlWRr2VaQPfUkGnDJDmV1+yF8C00rnS4gCFd5v3o wmKj8D69QYlT2IY21LKAQ0umZwSOx99YlOm4ZSXhnsW99gHN8TXUbgLX0Eb8fK0zkumk FdBnnYmInjarV5Kb4JQQZNhGs7UyCgGhYZP2EaVOV5jar1VxohlN80/G1vglN9Fd8ggq Ob3cnQ5JAkQIJOWIEfUR8y8ZCpf5ftFAVaI1C3nk1Hiet1VVrGz47+vRcGsbpknC9fSF PVRMdV64UtNnZqwUmS3jKeDnvAOLOMsfnQ3rQ/EQkvoZS1dkgakaTpK7VDyUKEZGSSJC FClw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tfYY0SynHLUvKImA0WJS6vFoZYpwQQ4sgm9paKqwl54=; b=sPPodGRaz00USCEAOLUOtZ9Q50PZ7u2ZEhXwE6g9NCr1H/4mwzp+nwBzmfP7IUvOTt haHEO5+rgq6uFDTKJP7jf5EEEpBamuw3i7+6tZS4r2wKyoPBN7GTn+PVLPYQRiRMjIhJ ZKwP1w4FMzZPVhMS7br2XDKXf9KuhWbEjzETmlymly/quaIEgxIHOHgpzOqyfRReVuO0 njdurVGoNy40qDqioHV7v8w3WlRRAPgE6/11C4RcTsxb0AFW3Mx3zF8aFidSRhLWGQhx tfK8ZKlerkjVSO31pPSVI9wJkcJG9Ud/hl5YKL1QY2/IAwkyQwH+CXNU/SXmYpct0EcF p26g== X-Gm-Message-State: AOAM5303IuhnDKU3zT+zWFqSmHkFlMFX4YcXUNm1ACYFiAK+zCLXazKX VK9/MUfsUh20YdZ2ys97zqZnHw== X-Google-Smtp-Source: ABdhPJwy849Ca+hXXvP504HCbRthfcaqff/Mo+T2X7D7E2ExfjN7Ipe/+RyMBbaOmwnYSCCO9oSKDw== X-Received: by 2002:a17:90b:4ac2:: with SMTP id mh2mr11697000pjb.33.1621435064459; Wed, 19 May 2021 07:37:44 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.37.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:37:44 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 03/17] dt-bindings: qcom-bam: Add 'iommus' to required properties Date: Wed, 19 May 2021 20:06:46 +0530 Message-Id: <20210519143700.27392-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the missing required property - 'iommus' to the device-tree binding documentation for qcom-bam DMA IP. This property describes the phandle(s) to apps_smmu node with sid mask. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- .../devicetree/bindings/dma/qcom_bam_dma.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml index d2900616006c..2479862a3654 100644 --- a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml @@ -55,6 +55,12 @@ properties: interconnect-names: const: memory + iommus: + minItems: 1 + maxItems: 8 + description: | + phandle to apps_smmu node with sid mask. + qcom,ee: $ref: /schemas/types.yaml#/definitions/uint8 description: @@ -81,6 +87,7 @@ required: - clocks - clock-names - "#dma-cells" + - iommus - qcom,ee additionalProperties: false @@ -96,4 +103,8 @@ examples: clock-names = "bam_clk"; #dma-cells = <1>; qcom,ee = /bits/ 8 <0>; + iommus = <&apps_smmu 0x584 0x0011>, + <&apps_smmu 0x586 0x0011>, + <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; }; From patchwork Wed May 19 14:36:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7FCFC43460 for ; Wed, 19 May 2021 14:39:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8D70F613B9 for ; Wed, 19 May 2021 14:39:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242396AbhESOkr (ORCPT ); Wed, 19 May 2021 10:40:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354284AbhESOjL (ORCPT ); Wed, 19 May 2021 10:39:11 -0400 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B102EC06138E for ; Wed, 19 May 2021 07:37:51 -0700 (PDT) Received: by mail-pj1-x1034.google.com with SMTP id pi6-20020a17090b1e46b029015cec51d7cdso3519322pjb.5 for ; Wed, 19 May 2021 07:37:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZOrjrBtPIyQIufzW+o4HH7ug0OM7ZtmcrQX7KbEW7to=; b=M545Dwsqv22D3WQyGr7vMn1jPt0IkVoocNJtCm5AcFzfF3vxsG5NQvHUcVSEWo5mtM rtY1srUqjp/4Snb5qn/0zVgceDUZcRJlM8caKj8cfd5vAsNdMAX2VEENGxo68qfvmVq5 CJou73dz7fd1tjvcRKUxHV7jdWDnDup0C+8E6T/6vIqibeoGA1xwopcHKMxKDACQYPvN 2fjl03bmmIg3GyfiYGlFCZs/x6v+ht/p7nvolKWB/GD0ldT3jhfWHMDqL1b+PT8UFViR q5IbrCaQKKmCJ4doz7QJDtiKVmDUI+ZhX2B4MIBqOvqZd18C2yVlMcL32bkluJDFgdUO P5kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZOrjrBtPIyQIufzW+o4HH7ug0OM7ZtmcrQX7KbEW7to=; b=kQEjJGDVzRrnniZMb+r4xWqXVOiRV2GIgnycuQAwoXB2wkjPPv3TIrq7oIZWn+G/0H z5rjGfTdegva1Dq5toBFtBnYtnkwNJxotEQMT5BBuMbKIeSSLgIG6GnAlmHup9NeVzDL PZWjE42rldecD+S0ppGQymF7bEJJKB7hkBjC4J1W1M/i+XSQoeaJm4v29Zw95B1CEs2P In+LBNHsX9LAMziDFD7mZfedPtWEHmRXjYIZLqBShMQwSJRDQFhV9eXI0xsqh1Wg1qay b9fSkjCnp4tdCHrCavgOmzHkW124faJU36WggY9l/ev17xYeXN0an/+i/okfTOFUOHUs KXpQ== X-Gm-Message-State: AOAM533pyxlf01ki6t+apEGmz9lrqOyuWIKDW5gsqKEwZqSetCRlAA6L 38ckWq+1xgFeU1UZzJwkOH+uJA== X-Google-Smtp-Source: ABdhPJxmr+u2rkVp4m2hiqRLQaNgGpYGBaraMC0xioEZ1piRcVrBG+8u0r5P9Vx2Cl3l49L/iitVlQ== X-Received: by 2002:a17:90b:4812:: with SMTP id kn18mr11859732pjb.188.1621435071241; Wed, 19 May 2021 07:37:51 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:37:50 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 04/17] dt-bindings: qcom-qce: Convert bindings to yaml Date: Wed, 19 May 2021 20:06:47 +0530 Message-Id: <20210519143700.27392-5-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Convert Qualcomm QCE crypto devicetree binding to YAML. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma Reviewed-by: Rob Herring --- .../devicetree/bindings/crypto/qcom-qce.txt | 25 ------- .../devicetree/bindings/crypto/qcom-qce.yaml | 69 +++++++++++++++++++ 2 files changed, 69 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.txt create mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.yaml diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt deleted file mode 100644 index fdd53b184ba8..000000000000 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.txt +++ /dev/null @@ -1,25 +0,0 @@ -Qualcomm crypto engine driver - -Required properties: - -- compatible : should be "qcom,crypto-v5.1" -- reg : specifies base physical address and size of the registers map -- clocks : phandle to clock-controller plus clock-specifier pair -- clock-names : "iface" clocks register interface - "bus" clocks data transfer interface - "core" clocks rest of the crypto block -- dmas : DMA specifiers for tx and rx dma channels. For more see - Documentation/devicetree/bindings/dma/dma.txt -- dma-names : DMA request names should be "rx" and "tx" - -Example: - crypto@fd45a000 { - compatible = "qcom,crypto-v5.1"; - reg = <0xfd45a000 0x6000>; - clocks = <&gcc GCC_CE2_AHB_CLK>, - <&gcc GCC_CE2_AXI_CLK>, - <&gcc GCC_CE2_CLK>; - clock-names = "iface", "bus", "core"; - dmas = <&cryptobam 2>, <&cryptobam 3>; - dma-names = "rx", "tx"; - }; diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml new file mode 100644 index 000000000000..a691cd08f372 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm crypto engine driver + +maintainers: + - Bhupesh Sharma + +description: | + This document defines the binding for the QCE crypto + controller found on Qualcomm parts. + +properties: + compatible: + const: qcom,crypto-v5.1 + + reg: + maxItems: 1 + description: | + Specifies base physical address and size of the registers map. + + clocks: + items: + - description: iface clocks register interface. + - description: bus clocks data transfer interface. + - description: core clocks rest of the crypto block. + + clock-names: + items: + - const: iface + - const: bus + - const: core + + dmas: + items: + - description: DMA specifiers for tx dma channel. + - description: DMA specifiers for rx dma channel. + + dma-names: + items: + - const: rx + - const: tx + +required: + - compatible + - reg + - clocks + - clock-names + - dmas + - dma-names + +additionalProperties: false + +examples: + - | + #include + crypto-engine@fd45a000 { + compatible = "qcom,crypto-v5.1"; + reg = <0xfd45a000 0x6000>; + clocks = <&gcc GCC_CE2_AHB_CLK>, + <&gcc GCC_CE2_AXI_CLK>, + <&gcc GCC_CE2_CLK>; + clock-names = "iface", "bus", "core"; + dmas = <&cryptobam 2>, <&cryptobam 3>; + dma-names = "rx", "tx"; + }; From patchwork Wed May 19 14:36:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267773 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D239CC433ED for ; Wed, 19 May 2021 14:38:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B62D1613AD for ; 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Wed, 19 May 2021 07:37:57 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 05/17] dt-bindings: qcom-qce: Add 'interconnects' and move 'clocks' to optional properties Date: Wed, 19 May 2021 20:06:48 +0530 Message-Id: <20210519143700.27392-6-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add 'interconnects' and 'interconnect-names' to the device-tree binding documentation for qcom crypto IP. These properties describe the interconnect path between crypto and main memory and the interconnect type respectively. While at it also move 'clocks' to the optional properties sections, as crypto IPs on SoCs like sm8150, sm8250, sm8350 (and so on), don't require linux to setup the clocks (this is already done by the secure firmware running before linux). Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index a691cd08f372..f8d3ea8b0d08 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -34,6 +34,14 @@ properties: - const: bus - const: core + interconnects: + maxItems: 1 + description: | + Interconnect path between qce crypto and main memory. + + interconnect-names: + const: memory + dmas: items: - description: DMA specifiers for tx dma channel. @@ -47,8 +55,6 @@ properties: required: - compatible - reg - - clocks - - clock-names - dmas - dma-names From patchwork Wed May 19 14:36:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267775 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BCD0C43617 for ; Wed, 19 May 2021 14:38:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 079C46124C for ; Wed, 19 May 2021 14:38:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354445AbhESOjc (ORCPT ); Wed, 19 May 2021 10:39:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348199AbhESOj0 (ORCPT ); Wed, 19 May 2021 10:39:26 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 652C9C061761 for ; Wed, 19 May 2021 07:38:05 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id v12so7133163plo.10 for ; Wed, 19 May 2021 07:38:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R9Krb+n145fDfyPy6Q+6FikWTCuZ2x/Un3CW1NBeexc=; b=ZHUwdEfGjfzjF+1Xzy03WJG6lceLujT8ZApwtXutEA+cikysCCmrDPAXbDR6owzLvB TprktMT8fF7xDML9mbIYolmJBoiyzxgnLBWkDLzQk99IxBeCFBzw4mGdQ3dkdhdZ7dIc dnAfaukxJ+hZW0/F1m1rYrqI0ITrWXWcaaqAywwmok80BF4KYIBJ0d74MrVHdeNm6oY5 eEh1x5KH/MuRK8MBEBbXHeX7h8Sm0cW2mJgV77v12S9lFs6bHNP7dEEBEoz9cPFY7DUb a7DmY1jaFJKTTpLy4543cdiDupl5HZ9XMYMf2Ukn5g0cAwVXlVHDS76sAdhcv2AMPhMa yzPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R9Krb+n145fDfyPy6Q+6FikWTCuZ2x/Un3CW1NBeexc=; b=mwPJ9iAFeWY4r8IXotrmj5j/+aY7/75yf0U+rdilgY2qPTEszIfa4Ej3tSlR36nUut JwHJef94nPWMornDritB1yoZCIXQGk9/hda2hfzyeus8aBSz+pTED+YoyBbO5KNKrHzB 9p+fkrtvwaR1sswVKm8H3IyPFiM5RYr0zPmGgzOYUOzjMXgvyaFuiCNJBLhqNpwWRGA4 Scm9qk1nGX0zSTsZAid5Vwtag2HW9EHVHOGRuada9HugIUf4gcIyPHSBNfdytvbBZC8A cavMP+DBTOS4v0tqnD6EqDWEsMbeabYnSkMhY9jf4oPw27JUGyOHHAcs7V826wX5gns+ LMVw== X-Gm-Message-State: AOAM532a786ixDQpIAV2TQ93bZfbkWwIKk/pigLKJ3ex90bpQzLhzA9Y l7UoparxPK1vKj4E7u3nGAsAHA== X-Google-Smtp-Source: ABdhPJzGm8igSQWVOQrpGm9zPwCp15NHaHODb+6kVtJ5RUfeDsQhZhOjJ/ZgJ0Bs/skxeb9IUjgK2A== X-Received: by 2002:a17:90a:a087:: with SMTP id r7mr11679403pjp.84.1621435084870; Wed, 19 May 2021 07:38:04 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.37.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:38:04 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 06/17] dt-bindings: qcom-qce: Add 'iommus' to required properties Date: Wed, 19 May 2021 20:06:49 +0530 Message-Id: <20210519143700.27392-7-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the missing required property - 'iommus' to the device-tree binding documentation for qcom-qce crypto IP. This property describes the phandle(s) to apps_smmu node with sid mask. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- .../devicetree/bindings/crypto/qcom-qce.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index f8d3ea8b0d08..4be9ce697123 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -34,6 +34,12 @@ properties: - const: bus - const: core + iommus: + minItems: 1 + maxItems: 8 + description: | + phandle to apps_smmu node with sid mask. + interconnects: maxItems: 1 description: | @@ -57,6 +63,7 @@ required: - reg - dmas - dma-names + - iommus additionalProperties: false @@ -72,4 +79,9 @@ examples: clock-names = "iface", "bus", "core"; dmas = <&cryptobam 2>, <&cryptobam 3>; dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x584 0x0011>, + <&apps_smmu 0x586 0x0011>, + <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; + }; From patchwork Wed May 19 14:36:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D8A9C43619 for ; Wed, 19 May 2021 14:38:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 88E336135C for ; Wed, 19 May 2021 14:38:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354296AbhESOjd (ORCPT ); Wed, 19 May 2021 10:39:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347649AbhESOjc (ORCPT ); Wed, 19 May 2021 10:39:32 -0400 Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E953C061763 for ; Wed, 19 May 2021 07:38:12 -0700 (PDT) Received: by mail-pf1-x434.google.com with SMTP id f22so1671224pfn.0 for ; Wed, 19 May 2021 07:38:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/W6azUUE1Twja3FY7bt61gqSPj92cSqiD8Un8maDnxA=; b=kCyBhJZGO6qUJrlRysy4+Nv4CLYlylZc3tBEI8W4U1wmH3c4bQXckCc3dnxJU+NfXM BfdBLML+2jRQsk7WbX8NvtyEOMFUbVswuY89ywECZWrUzmfTk9qhmt1uf5D6jcpufRXS yP9AFzCegCI6JG1SrOmPplG39WQ/edeAv/S6HT0M1Nglbcqk65abCVCFrMcHWw/83Har gqTrPFgc+JbKbrDf2mcgx2zCbMDDdBFPUb86BdY2y1tU/D1E9z9F3b3u7OjHBl0zJRcx Qh71OoJvzY7yItHn56MNpXTN86tYgAIq7n72SwydDlmTnbfDCxgx7AmKMgkcxh8r5+0j Qd3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/W6azUUE1Twja3FY7bt61gqSPj92cSqiD8Un8maDnxA=; b=uRYEP18RLGhYA/WmRsj59GVDaA+IgbL8wdP7KAJ5ZUrT9C+mpXHefGJp8ajEzzo+0j 5ORTfq+hMRLkvPXNFh0Yz6/5xPy6QaXm3ryFfB3qfFVbF8Cj1rzkiTITGtyaWV+HNrbV ZvbC/zmEYE+KXJOSrBPwF2vT6SLXdmO4b2K6XNHiFLpuvXeUmBQu7J90udCZJeWuoL8j dMuc3/CJUQHZUUWxfTY+0R6yByi31av/wlQSs03fA2QF5KJE5q+rQ5PG5c7T6IIaEJ0f Qk/5RoUmi32hYnEJUdzrx1KfTluAmvKSEocjOW3EZofZgfx9m744qGXQwbmMNwvVH2B0 2ibw== X-Gm-Message-State: AOAM532BIlsLv6bvYbBDQ0iqW58h5PU8DZIsFBE8nEEycFBrWsQAessS /zvJMQ5O8kF2x+0stQADPP8WYg== X-Google-Smtp-Source: ABdhPJy3a7CdTIhSB/nQ28C7YaB8wfi/fMlYpHgg0TNVFLzqWwJOWMrMPmQnAruZ8wqIRwkrEOWHkQ== X-Received: by 2002:aa7:91d4:0:b029:2c5:7d17:c20c with SMTP id z20-20020aa791d40000b02902c57d17c20cmr11250321pfa.4.1621435091682; Wed, 19 May 2021 07:38:11 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.38.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:38:11 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 07/17] arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly Date: Wed, 19 May 2021 20:06:50 +0530 Message-Id: <20210519143700.27392-8-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org In commit 3e482859f1ef ("dts: qcom: sdm845: Add dt entries to support crypto engine."), we decided to use the value indicated by constant RPMH_CE_CLK rather than using it directly. Now that the same RPMH clock value might be used for other SoCs (in addition to sdm845), let's use the constant RPMH_CE_CLK to make sure that this dtsi is compatible with the other qcom ones. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma Reviewed-by: Thara Gopinath --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0a86fe71a66d..2ec4be930fd6 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2316,7 +2316,7 @@ cryptobam: dma@1dc4000 { compatible = "qcom,bam-v1.7.0"; reg = <0 0x01dc4000 0 0x24000>; interrupts = ; - clocks = <&rpmhcc 15>; + clocks = <&rpmhcc RPMH_CE_CLK>; clock-names = "bam_clk"; #dma-cells = <1>; qcom,ee = <0>; @@ -2332,7 +2332,7 @@ crypto: crypto@1dfa000 { reg = <0 0x01dfa000 0 0x6000>; clocks = <&gcc GCC_CE1_AHB_CLK>, <&gcc GCC_CE1_AHB_CLK>, - <&rpmhcc 15>; + <&rpmhcc RPMH_CE_CLK>; clock-names = "iface", "bus", "core"; dmas = <&cryptobam 6>, <&cryptobam 7>; dma-names = "rx", "tx"; From patchwork Wed May 19 14:36:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48667C433ED for ; Wed, 19 May 2021 14:38:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 274A76124C for ; Wed, 19 May 2021 14:38:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347874AbhESOkP (ORCPT ); Wed, 19 May 2021 10:40:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354416AbhESOj6 (ORCPT ); Wed, 19 May 2021 10:39:58 -0400 Received: from mail-pf1-x42c.google.com (mail-pf1-x42c.google.com [IPv6:2607:f8b0:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8EE42C06138A for ; Wed, 19 May 2021 07:38:19 -0700 (PDT) Received: by mail-pf1-x42c.google.com with SMTP id c17so10036465pfn.6 for ; Wed, 19 May 2021 07:38:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=N4+Pmvy+Kn++u+tJ4TtTc+C+SSq9T8K7CwVNxOIPf08=; b=x2HRCTgG0GipiWBQV07MrWomyjGTmV7e4awp8zrWM08SFfCgZhcczG3pxZ8iD2a1/d kAyVzuq69LQyP0DH5u32JgTO48NM0M4agymuMF3Y9akEUjkPGSnpqualcBZl5Ue3lLvr h2+udxNYvoW8ZM9ymO8oRwyLaJkasizAM7pMMZLyQJzZoVO8lpaitttXtcVF+I5FLH89 WN1gbQo2LRRpT5OPvqlATjjUahEWcsUSi99+xxRd9LEynK5VUH/lCulfveJozVyPs5OA uFgEO51te7ziVGkJRdeKwxlRDLlhzFDQX3T5VDhwxhCq8bjJ6PbcXW5aCW/02q4cidEr ISIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=N4+Pmvy+Kn++u+tJ4TtTc+C+SSq9T8K7CwVNxOIPf08=; b=hjOZvYW0d+03/9qmD/IUS3V8rpXVdOuGlchZwfisGDp9LkG8BdgqfmUnKHBuT2+4gK 7vNbZTytdy1PVyaReD+fWbAD5BAgWgGhz3usD8hxjoCzX91fo7xBIQgwEDUt6TWH7eK4 ZsE3sdU/9tXr+l4fGkQ3NnQ5dxnxG9D79/x1ajerP4DnblVf9TBttvVjJSHPxW95Fpuk lNj05KgOciUiX1ETML/K4ikIeUxK2nlYPWHty1Z4FoGNhAiq6MbN3CtqJ8Cmfi++65nX FvMMtLwZIVXtC5nKGpZaxgQXKbCDXvTfdIN7lu+SXIGLOiOiDH6SFbhLEF1WX7r5F3rT /qhw== X-Gm-Message-State: AOAM5326xikrIgGGaZ35m/XXKVC1YtWstvRsIfUeTeLjuG62u34mMV1v 91fOHoxzaYWEX5d1aA66CMdFmw== X-Google-Smtp-Source: ABdhPJwQ8L+n4Xe7Qq4tu9SJumb4UjS8KaJ/uz1/vXqSGC2KvOezTn5DRRaQ0RPlEN0HrPsxQ4PLvA== X-Received: by 2002:a63:bf4a:: with SMTP id i10mr10994699pgo.200.1621435099126; Wed, 19 May 2021 07:38:19 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.38.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:38:18 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 08/17] dt-bindings: crypto : Add new compatible strings for qcom-qce Date: Wed, 19 May 2021 20:06:51 +0530 Message-Id: <20210519143700.27392-9-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Newer qcom chips support newer versions of the qce crypto IP, so add soc specific compatible strings for qcom-qce instead of using crypto IP version specific ones. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index 4be9ce697123..7722ac9529bf 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -15,7 +15,12 @@ description: | properties: compatible: - const: qcom,crypto-v5.1 + enum: + - qcom,ipq6018-qce + - qcom,sdm845-qce + - qcom,sm8150-qce + - qcom,sm8250-qce + - qcom,sm8350-qce reg: maxItems: 1 @@ -71,7 +76,7 @@ examples: - | #include crypto-engine@fd45a000 { - compatible = "qcom,crypto-v5.1"; + compatible = "qcom,ipq6018-qce"; reg = <0xfd45a000 0x6000>; clocks = <&gcc GCC_CE2_AHB_CLK>, <&gcc GCC_CE2_AXI_CLK>, From patchwork Wed May 19 14:36:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96A61C43461 for ; Wed, 19 May 2021 14:39:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 793636124C for ; Wed, 19 May 2021 14:39:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354448AbhESOke (ORCPT ); Wed, 19 May 2021 10:40:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43648 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354397AbhESOkQ (ORCPT ); Wed, 19 May 2021 10:40:16 -0400 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 03275C06134C for ; Wed, 19 May 2021 07:38:26 -0700 (PDT) Received: by mail-pj1-x102e.google.com with SMTP id h20-20020a17090aa894b029015db8f3969eso2902852pjq.3 for ; Wed, 19 May 2021 07:38:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IaOgy5E/D/bWKnSjfGh3VxC5Z9iVmzAmqxR9MxuONrg=; b=Vvm5HPOnSLpyJOXwDu8vb2SPZLbgNWcpeutWd4vm2Ov76Rb2MbBfrMjqPu7kp8la28 rioaFea8YX0ogcKmKgEjQu9ihaDkl2Hppmx6e9vbBHRQsUx7nsjZfzJwi+9BGxLliGg4 f2j1qMWk9k0yUfWJ9yvYQXaPDLNWxIKw5P9dlXcDI3GqA4LD1eqkVrPzzSF2Ku3lCUbj M9+mgvnQgN5uFBpHgL38tN6bfZSvvquyYoDgCwnaOFnqY7MnBf3jPPuHohygtsL0d3UU aeYmErY5H+ZR5La+CfhencbYFYf5LLrH2JyKCofQr77OCjPkFT/fwIW6aBuvSKfu7UE+ 7azw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IaOgy5E/D/bWKnSjfGh3VxC5Z9iVmzAmqxR9MxuONrg=; b=O2mRonHe+vkmIvJ+UVjHlIInBXUC01tEB9E7kNLE3R1n5BZqYc9ivxUDtUUs8cQN8y 8cFY4Kg/po832Uq7ACvgk8+CvkeD/OTpMmZL0HBeoFGw3wGI6YcbWeieWVgC+9hD2/Y+ QSluT9Sau4HRs6FJd3aGbk8DxaAerT1QliXSlS3BBXdlVjxAG/hk6MSaZD5mVaQpMkwY PgSOuLDrl2zOoXBdowL/PB7giuC8XInL1WGhM/zXzn4Y7vIECwrcROGIBleiYz2M9A/P bDf1nl0fxLfrwrk8YHOiV/rq++elp9eZD35IJEFc/dfByP6mmqmuFt6YAzNfwRiCsI8o haRA== X-Gm-Message-State: AOAM532RxTUJ2Thxa2BX0cvSWGBOxh7cq1MFZFdhMRpCgpZpcBNwCVOT oxY2psOLdy5kZwr+v/0ncTir3A== X-Google-Smtp-Source: ABdhPJzWo8ETp1ciHc+3WQrVQp1e53+LQOk1FfNU7NzV+sIVt9FzZAXAbLJOlwunY4BssrCo/5l3mg== X-Received: by 2002:a17:902:8505:b029:ec:b451:71cd with SMTP id bj5-20020a1709028505b02900ecb45171cdmr11394815plb.23.1621435105574; Wed, 19 May 2021 07:38:25 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.38.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:38:25 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 09/17] arm64/dts: qcom: Use new compatibles for crypto nodes Date: Wed, 19 May 2021 20:06:52 +0530 Message-Id: <20210519143700.27392-10-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Since we are using soc specific qce crypto IP compatibles in the bindings now, use the same in the device tree files which include the crypto nodes. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 9fa5b028e4f3..978c34f176de 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -205,7 +205,7 @@ cryptobam: dma-controller@704000 { }; crypto: crypto@73a000 { - compatible = "qcom,crypto-v5.1"; + compatible = "qcom,ipq6018-qce"; reg = <0x0 0x0073a000 0x0 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 2ec4be930fd6..6423991fa303 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2328,7 +2328,7 @@ cryptobam: dma@1dc4000 { }; crypto: crypto@1dfa000 { - compatible = "qcom,crypto-v5.4"; + compatible = "qcom,sdm845-qce"; reg = <0 0x01dfa000 0 0x6000>; clocks = <&gcc GCC_CE1_AHB_CLK>, <&gcc GCC_CE1_AHB_CLK>, From patchwork Wed May 19 14:36:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C101C43470 for ; Wed, 19 May 2021 14:39:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 50D9C611C2 for ; Wed, 19 May 2021 14:39:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354456AbhESOkj (ORCPT ); Wed, 19 May 2021 10:40:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348092AbhESOk2 (ORCPT ); Wed, 19 May 2021 10:40:28 -0400 Received: from mail-pg1-x534.google.com (mail-pg1-x534.google.com [IPv6:2607:f8b0:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00AD7C061355 for ; Wed, 19 May 2021 07:38:32 -0700 (PDT) Received: by mail-pg1-x534.google.com with SMTP id f22so8659371pgb.9 for ; Wed, 19 May 2021 07:38:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9/tRHikibb3VDcl2hDfDt+wuIOHwmbk3mgz2i/PihKw=; b=u7a89WZVIzdktaGkwWnlPlSmIYDzJGnbfm2CzHxBCMEXDIfmNMOp1L93vDZcA3DCeY g8Bpv1A/OuH0LefeJglan+PMxiZvB3+FXyoqBTYIIVZRAgQMTyhi8kLEmyUBubi2OdOl litNXvhurgiw0cbCTNxEUyGwmhW44MEJ1MC+CXylJpcsWhkv/E8CceaHzap3LI2NMtSq qcyT6r3qbHwIDIR0djgRhem08/+U14EkkuTYd+ilqHqwvQrSCfI+ITg5319w+fs6O40U kmO7/QsI7o0lWCYTJsn/gVTXbZZAL/Z6xy0h3HSyznfKI4MRanSyAHxeZGsHUs1k/IiD hOMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9/tRHikibb3VDcl2hDfDt+wuIOHwmbk3mgz2i/PihKw=; b=Gz2oJhRwDFnfNxOqr3oQI+Kltt5OvpT1Vy8XN5Ujc6Xxpw0hIEYie5rt1jW8kwfelu 5mxh2QZzGR9OpwaIZX273WMNKeMT2LNSUMB0et9hMF8DmwwjRA5HON8P7wI0M8IjKGjC jj+u8v8V7cHaTDfBamR8HV+c583mGqJVdl5sKeIecM/xqFiqaiqErNiHvV63rCTOLUWF eGjMncz+Nuat22MsolAoxhR9nIdSpcISpJTiBrye3z/8UocuQqRe8dynKgO8dM3Hepim fBRmNqlRGxOkyZKhnIx9Cv8DsVTQU1NncgEiLPrv+xqyGAXu+o7++PNLZ+CbVVyNKeM/ gdWg== X-Gm-Message-State: AOAM532WgrHo9+EICLc71L+M73shK4BSxpurPvgFwzO4SqeThND6GqC3 BgWWRAqfhBTCvBcFM32y8jLZ4A== X-Google-Smtp-Source: ABdhPJwATRlheQTYTLSdGD+kSlPUqq4AspzaBlyRyYQdhQsx6Na2MFDmsbjDiYvm50TCzRC4mqShDw== X-Received: by 2002:a63:6486:: with SMTP id y128mr11051673pgb.414.1621435112516; Wed, 19 May 2021 07:38:32 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.38.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:38:32 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 10/17] dma: qcom: bam_dma: Add support to initialize interconnect path Date: Wed, 19 May 2021 20:06:53 +0530 Message-Id: <20210519143700.27392-11-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Thara Gopinath BAM dma engine associated with certain hardware blocks could require relevant interconnect pieces be initialized prior to the dma engine initialization. For e.g. crypto bam dma engine on sm8250. Such requirement is passed on to the bam dma driver from dt via the "interconnects" property. Add support in bam_dma driver to check whether the interconnect path is accessible/enabled prior to attempting driver intializations. Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Thara Gopinath [ bhupesh.sharma@linaro.org: Make header file inclusion alphabetical and use devm_of_icc_get() ] Signed-off-by: Bhupesh Sharma --- drivers/dma/qcom/bam_dma.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c index c8a77b428b52..4b03415b8183 100644 --- a/drivers/dma/qcom/bam_dma.c +++ b/drivers/dma/qcom/bam_dma.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -392,6 +393,7 @@ struct bam_device { const struct reg_offset_data *layout; struct clk *bamclk; + struct icc_path *mem_path; int irq; /* dma start transaction tasklet */ @@ -1284,6 +1286,14 @@ static int bam_dma_probe(struct platform_device *pdev) return ret; } + /* Ensure that interconnects are initialized */ + bdev->mem_path = devm_of_icc_get(bdev->dev, "memory"); + if (IS_ERR(bdev->mem_path)) { + ret = PTR_ERR(bdev->mem_path); + dev_err(bdev->dev, "failed to acquire icc path %d\n", ret); + goto err_disable_clk; + } + ret = bam_init(bdev); if (ret) goto err_disable_clk; From patchwork Wed May 19 14:36:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC1ABC43460 for ; Wed, 19 May 2021 14:39:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AFBAF6124C for ; Wed, 19 May 2021 14:39:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354434AbhESOkl (ORCPT ); Wed, 19 May 2021 10:40:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354350AbhESOka (ORCPT ); Wed, 19 May 2021 10:40:30 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87FE1C06135A for ; Wed, 19 May 2021 07:38:39 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id d78so9170293pfd.10 for ; Wed, 19 May 2021 07:38:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PDydCz783kyI7jNgitJR8zCb8Ar4M6klN2ivXhhgevM=; b=xDVjMuiRG+d9R+s0Ow2ozpu7fxVX8osnVwDuOOGFE6+KOKHFHn80dJ9O3D/srtj9tt Y/vxjISnx0tJWa46kTz2RgQbTunHkYtgCOiDdooJcqG/Q/c7g5gQqBiS6ceFRW+8o4rh Mzw2j7C3UZe6KTz4lUHFZ0yAOVBJC8ZuQyZ2gHQSeA8LEF9yzG9j1HkAi0cXi107FefI V9TXvX9DscVK1U5isYPGdkNacJdfNLP3xW3ASNpH//ZSsPaAgtolhsx7PMH/OhhRLaaE +ZkkWCNz6A6syvJcrCVwXx1iOQuXSNiuue/fdXBKW6PfmFKMZmjmX7gR9VcTceeGNz/b vqmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PDydCz783kyI7jNgitJR8zCb8Ar4M6klN2ivXhhgevM=; b=Yc4MeWlui9ib4yZ9Ow2JlgiPlUy575oSMqEXSzHtjiYpzz1rOLM35fv4NAfnbtQ9iZ eW3ZsVSXXDUUApS4PD3128nWugivjSWrfBUo0jwEKGhOLliXBkv3hwgktROQ/sEcOXFc UH5wI93YLvMsy+U1nOxMoGhled4xBQLW7Nl2McoqDLSP9vedHhzIiTT3WGhj9yYJKX7K axPDF4OU8BR82ppu9ZX75EbmKlzHoqcZVXVyIeI7pg4NfiX4FzP2+sGfTyMbv6Tt4ofr t7UoAwiDNCve75qnVRX3At6ev9odl+qn9zWHJ73McTsSx+e8224lV857cNFxtTcMP02y +33Q== X-Gm-Message-State: AOAM531w7jIOWYuRts5ccqgxOOL393xF21LJL6V+VrJUVenFOP7Hr52G xCgrtCP2lVUdek2Nk8nqaBj9XQ== X-Google-Smtp-Source: ABdhPJzi8Amq8flun5ibZBTC1dsU+cOEzeRB7P2E+0T3I4Y6DU5ElvMH2rUatAGvb+DKw7pP2K0KKA== X-Received: by 2002:aa7:8809:0:b029:2de:3b94:487e with SMTP id c9-20020aa788090000b02902de3b94487emr9467646pfo.33.1621435119088; Wed, 19 May 2021 07:38:39 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.38.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:38:38 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 11/17] crypto: qce: core: Add support to initialize interconnect path Date: Wed, 19 May 2021 20:06:54 +0530 Message-Id: <20210519143700.27392-12-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Thara Gopinath Crypto engine on certain Snapdragon processors like sm8150, sm8250, sm8350 etc. requires interconnect path between the engine and memory to be explicitly enabled and bandwidth set prior to any operations. Add support in the qce core to enable the interconnect path appropriately. Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Thara Gopinath [ bhupesh.sharma@linaro.org: Make header file inclusion alphabetical and use devm_of_icc_get() ] Signed-off-by: Bhupesh Sharma --- drivers/crypto/qce/core.c | 12 ++++++++++++ drivers/crypto/qce/core.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 80b75085c265..89a17b677607 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -21,6 +22,8 @@ #define QCE_MAJOR_VERSION5 0x05 #define QCE_QUEUE_LENGTH 1 +#define QCE_DEFAULT_MEM_BANDWIDTH 393600 + static const struct qce_algo_ops *qce_ops[] = { #ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER &skcipher_ops, @@ -202,6 +205,11 @@ static int qce_crypto_probe(struct platform_device *pdev) if (ret < 0) return ret; + qce->mem_path = devm_of_icc_get(qce->dev, "memory"); + if (IS_ERR(qce->mem_path)) + return dev_err_probe(dev, PTR_ERR(qce->mem_path), + "Failed to get mem path\n"); + qce->core = devm_clk_get(qce->dev, "core"); if (IS_ERR(qce->core)) return PTR_ERR(qce->core); @@ -214,6 +222,10 @@ static int qce_crypto_probe(struct platform_device *pdev) if (IS_ERR(qce->bus)) return PTR_ERR(qce->bus); + ret = icc_set_bw(qce->mem_path, QCE_DEFAULT_MEM_BANDWIDTH, QCE_DEFAULT_MEM_BANDWIDTH); + if (ret) + return ret; + ret = clk_prepare_enable(qce->core); if (ret) return ret; diff --git a/drivers/crypto/qce/core.h b/drivers/crypto/qce/core.h index 085774cdf641..228fcd69ec51 100644 --- a/drivers/crypto/qce/core.h +++ b/drivers/crypto/qce/core.h @@ -35,6 +35,7 @@ struct qce_device { void __iomem *base; struct device *dev; struct clk *core, *iface, *bus; + struct icc_path *mem_path; struct qce_dma_data dma; int burst_size; unsigned int pipe_pair_id; From patchwork Wed May 19 14:36:55 2021 Content-Type: text/plain; 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Wed, 19 May 2021 07:38:45 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 12/17] crypto: qce: Add new compatibles for qce crypto driver Date: Wed, 19 May 2021 20:06:55 +0530 Message-Id: <20210519143700.27392-13-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Since we decided to use soc specific compatibles for describing the qce crypto IP nodes in the device-trees, adapt the driver now to handle the same. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- drivers/crypto/qce/core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 89a17b677607..905378906ac7 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -285,8 +285,8 @@ static int qce_crypto_remove(struct platform_device *pdev) } static const struct of_device_id qce_crypto_of_match[] = { - { .compatible = "qcom,crypto-v5.1", }, - { .compatible = "qcom,crypto-v5.4", }, + { .compatible = "qcom,ipq6018-qce", }, + { .compatible = "qcom,sdm845-qce", }, {} }; MODULE_DEVICE_TABLE(of, qce_crypto_of_match); From patchwork Wed May 19 14:36:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2D1CC43470 for ; Wed, 19 May 2021 14:39:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9CBB3613B6 for ; Wed, 19 May 2021 14:39:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354486AbhESOlD (ORCPT ); Wed, 19 May 2021 10:41:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354458AbhESOkj (ORCPT ); Wed, 19 May 2021 10:40:39 -0400 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9E77C061377 for ; Wed, 19 May 2021 07:38:52 -0700 (PDT) Received: by mail-pg1-x52d.google.com with SMTP id 6so9603123pgk.5 for ; Wed, 19 May 2021 07:38:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JavEPRsMYE4L6ZTfv8wl3bF4qxOU1C90z+usn5HEmMo=; b=xwg/XZVIeX9loT5uM6hOfsTSscaHquFpNwOmBr8Im9I+3qO0TD/wuvwHRGbQw0kgl6 J7COAjlgkwCLQDuypAcYT97xwBxkjRu6cxEkELc4lNI/AfkfaOq1xcjVFmnsTnXkXxtk pL4lZLmXy7yYBJwn3mRyIn6jXulgSA0YuZYuw6L7QKlSgSE2yn339xkT2rSf7cnvnjJ2 /sxIJYTnA8vBfWM4tDEKLqnDi2rZFnktsCb6phxa7eKd6lEZmj9T4rAwOaa6LyXd1jo1 B8yywUFudUiepQhMQyh3eZ0D+tqV+6t/sGNEfKLRKkDNlW3Pz2O4tibzGFHR/8blgUDn HzRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JavEPRsMYE4L6ZTfv8wl3bF4qxOU1C90z+usn5HEmMo=; b=Bj72vuHP/9V/3k/Eu1wMXainJ81614zSJlt+iGJTBdxVfc789rE023Dp8lji5Ig6GK 3TB7S5a6nEWV1mPDCpwbLHSKIX8oHtU1Y+ZWwLEuxSHGMgR7D8m5xuoTuZ7OPmmgrZ67 MrSSOVa1dMK7INh95omtNcWiO492VXML6XYhnA9dzYfho4RtG6nOORLPOPSgpSMEtpS8 DwRs2EXKGX2Xmz0kwnvwtH4V+dGWkn7N8hSL8saV6XAha8UpyhMgTVtvxzUmAPlPqEzw MLJw8T1h6lqhFT3RkfLd7VYo4Zm7V68venvR73OKRQvgK7WiagfJQZGaDImaw6H8+g9x tyiA== X-Gm-Message-State: AOAM532gnZzpS0vRjx2dvUt5aTXQvGZXkIjnWAjJ+fBGXjnsKxX9Ufec yimYBT9zdoeMVuB7/Pilw2+82g== X-Google-Smtp-Source: ABdhPJyY1iJJAF8rgiwIQMpBkw86Ji/0s3ys/j14wWlns+SE4zL+9JZpHi3g+5k5QSpYhv/sntG1TA== X-Received: by 2002:aa7:8198:0:b029:274:8a92:51b5 with SMTP id g24-20020aa781980000b02902748a9251b5mr11031935pfi.5.1621435132367; Wed, 19 May 2021 07:38:52 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.38.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:38:52 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 13/17] crypto: qce: core: Make clocks optional Date: Wed, 19 May 2021 20:06:56 +0530 Message-Id: <20210519143700.27392-14-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Thara Gopinath On certain Snapdragon processors, the crypto engine clocks are enabled by default by security firmware and the driver need not handle the clocks. Make acquiring of all the clocks optional in crypto enginer driver so that the driver intializes properly even if no clocks are specified in the dt. Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Thara Gopinath [ bhupesh.sharma@linaro.org: Make clock enablement optional only for qcom parts where firmware has already initialized them, using a bool variable and fix error paths ] Signed-off-by: Bhupesh Sharma --- drivers/crypto/qce/core.c | 89 +++++++++++++++++++++++++-------------- drivers/crypto/qce/core.h | 2 + 2 files changed, 59 insertions(+), 32 deletions(-) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 905378906ac7..8c3c68ba579e 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -184,10 +185,20 @@ static int qce_check_version(struct qce_device *qce) return 0; } +static const struct of_device_id qce_crypto_of_match[] = { + { .compatible = "qcom,ipq6018-qce", }, + { .compatible = "qcom,sdm845-qce", }, + { .compatible = "qcom,sm8250-qce", }, + {} +}; +MODULE_DEVICE_TABLE(of, qce_crypto_of_match); + static int qce_crypto_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct qce_device *qce; + const struct of_device_id *of_id = + of_match_device(qce_crypto_of_match, &pdev->dev); int ret; qce = devm_kzalloc(dev, sizeof(*qce), GFP_KERNEL); @@ -198,45 +209,65 @@ static int qce_crypto_probe(struct platform_device *pdev) platform_set_drvdata(pdev, qce); qce->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(qce->base)) - return PTR_ERR(qce->base); + if (IS_ERR(qce->base)) { + ret = PTR_ERR(qce->base); + goto err_out; + } ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); if (ret < 0) - return ret; + goto err_out; qce->mem_path = devm_of_icc_get(qce->dev, "memory"); if (IS_ERR(qce->mem_path)) return dev_err_probe(dev, PTR_ERR(qce->mem_path), "Failed to get mem path\n"); - qce->core = devm_clk_get(qce->dev, "core"); - if (IS_ERR(qce->core)) - return PTR_ERR(qce->core); - - qce->iface = devm_clk_get(qce->dev, "iface"); - if (IS_ERR(qce->iface)) - return PTR_ERR(qce->iface); - - qce->bus = devm_clk_get(qce->dev, "bus"); - if (IS_ERR(qce->bus)) - return PTR_ERR(qce->bus); - ret = icc_set_bw(qce->mem_path, QCE_DEFAULT_MEM_BANDWIDTH, QCE_DEFAULT_MEM_BANDWIDTH); if (ret) - return ret; + goto err_out; - ret = clk_prepare_enable(qce->core); - if (ret) - return ret; + /* On some qcom parts the crypto clocks are already configured by + * the firmware running before linux. In such cases we don't need to + * enable/configure them again. Check here for the same. + */ + if (!strcmp(of_id->compatible, "qcom,ipq6018-qce") || + !strcmp(of_id->compatible, "qcom,sdm845-qce")) + qce->clks_configured_by_fw = false; + else + qce->clks_configured_by_fw = true; + + if (!qce->clks_configured_by_fw) { + qce->core = devm_clk_get(qce->dev, "core"); + if (IS_ERR(qce->core)) { + ret = PTR_ERR(qce->core); + goto err_out; + } + + qce->iface = devm_clk_get(qce->dev, "iface"); + if (IS_ERR(qce->iface)) { + ret = PTR_ERR(qce->iface); + goto err_out; + } + + qce->bus = devm_clk_get(qce->dev, "bus"); + if (IS_ERR(qce->bus)) { + ret = PTR_ERR(qce->bus); + goto err_out; + } + + ret = clk_prepare_enable(qce->core); + if (ret) + goto err_out; - ret = clk_prepare_enable(qce->iface); - if (ret) - goto err_clks_core; + ret = clk_prepare_enable(qce->iface); + if (ret) + goto err_clks_core; - ret = clk_prepare_enable(qce->bus); - if (ret) - goto err_clks_iface; + ret = clk_prepare_enable(qce->bus); + if (ret) + goto err_clks_iface; + } ret = qce_dma_request(qce->dev, &qce->dma); if (ret) @@ -268,6 +299,7 @@ static int qce_crypto_probe(struct platform_device *pdev) clk_disable_unprepare(qce->iface); err_clks_core: clk_disable_unprepare(qce->core); +err_out: return ret; } @@ -284,13 +316,6 @@ static int qce_crypto_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id qce_crypto_of_match[] = { - { .compatible = "qcom,ipq6018-qce", }, - { .compatible = "qcom,sdm845-qce", }, - {} -}; -MODULE_DEVICE_TABLE(of, qce_crypto_of_match); - static struct platform_driver qce_crypto_driver = { .probe = qce_crypto_probe, .remove = qce_crypto_remove, diff --git a/drivers/crypto/qce/core.h b/drivers/crypto/qce/core.h index 228fcd69ec51..d9bf05babecc 100644 --- a/drivers/crypto/qce/core.h +++ b/drivers/crypto/qce/core.h @@ -23,6 +23,7 @@ * @dma: pointer to dma data * @burst_size: the crypto burst size * @pipe_pair_id: which pipe pair id the device using + * @clks_configured_by_fw: clocks are already configured by fw * @async_req_enqueue: invoked by every algorithm to enqueue a request * @async_req_done: invoked by every algorithm to finish its request */ @@ -39,6 +40,7 @@ struct qce_device { struct qce_dma_data dma; int burst_size; unsigned int pipe_pair_id; + bool clks_configured_by_fw; int (*async_req_enqueue)(struct qce_device *qce, struct crypto_async_request *req); void (*async_req_done)(struct qce_device *qce, int ret); From patchwork Wed May 19 14:36:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267795 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35B5DC433ED for ; Wed, 19 May 2021 14:39:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 142C661244 for ; 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Wed, 19 May 2021 07:38:58 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 14/17] crypto: qce: Print a failure msg in case probe() fails Date: Wed, 19 May 2021 20:06:57 +0530 Message-Id: <20210519143700.27392-15-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Print a failure message (dev_err) in case the qcom qce crypto driver probe() fails. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma Reviewed-by: Thara Gopinath --- drivers/crypto/qce/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 8c3c68ba579e..aecb2cdd79e5 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -300,6 +300,7 @@ static int qce_crypto_probe(struct platform_device *pdev) err_clks_core: clk_disable_unprepare(qce->core); err_out: + dev_err(dev, "%s failed : %d\n", __func__, ret); return ret; } From patchwork Wed May 19 14:36:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267793 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6580C43461 for ; Wed, 19 May 2021 14:39:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CAC35613AC for ; Wed, 19 May 2021 14:39:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354441AbhESOlR (ORCPT ); Wed, 19 May 2021 10:41:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354479AbhESOlC (ORCPT ); Wed, 19 May 2021 10:41:02 -0400 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FE10C0612F1 for ; Wed, 19 May 2021 07:39:06 -0700 (PDT) Received: by mail-pj1-x102f.google.com with SMTP id gf3so447883pjb.5 for ; Wed, 19 May 2021 07:39:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GuVgCqdDVbpVqTxpQsc56DvhHyMstWv4OtUHtXIMiUo=; b=KMuY5RNLdpiEhbr2tQeG5s6v3pPiLIlI1eHS7+xBwnBDl4QKs/qJkehAf/jhLtG9Ka SIMGaIbNYqABeb8L6/tNJJplCjRSBVzCW/91ym1uWcj4oIftLXssT1qc1fFe7CBBo63I FzGdRLgD3Pui+VDruj4QV+i8iAdPOYyfQCtyMdpEp+y94hmEG/3uioaphf7Too+y87U7 Gvmcr6KoudOm9eLo8Nj4ZCZQ09SIqlBLVmTdNVPGjOso6Bsmmq5Qf29Zwj1vGLXMilAy DTGU6Tb4sfRlAdr5Uu05Su9CUhbunrNfACptzwkqPBYyBBsIYnA8EcDXchIHgO7aXyIU wrtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GuVgCqdDVbpVqTxpQsc56DvhHyMstWv4OtUHtXIMiUo=; b=qIjoPlhSGQ5J2vlZPmJ4NYz9HrUqZzjfOhG9nTWJtwpYlvUImXuARCU1Bb3wBAkZl3 6/pkzIvNuHIeFtQQDWtwpz/XmfgDpYclhm6Aa4RQ7c9ntdmpcJ/PTcjmvvxqls66JMM7 aK4MYqeaCErXUH2ho2ttXGY4UeCzNxp5gLrZnSbGV0IZFDknneYL+HSO5OUT2n/V8Odb 5YyrnBcSjLxlXpQ7MXW94HfW7JI3ot5y8kWddvccSSwy41Yz25imWwx5FOAwEaqM/blF oFWMOGQMvtdbfOLDG6rkgVQDh3ldkb+t2MUvOvxJHrvFxiy+MGHcrN9WhpFhywu5LYwr jB6A== X-Gm-Message-State: AOAM532o7LvLui0KNa8FRVwO9frV90WHkBsM6sn8LA6TcMoDPfGFpFdi DbAYg4VAaE1uB19u7tFX+E77aQ== X-Google-Smtp-Source: ABdhPJx6hdlVq88LAcpGG7h74r7c6fsEv4sgmH5s5r4MC6EmcaFYn3potNLrbADj38Bf6Dwiy0Ztrw== X-Received: by 2002:a17:902:f545:b029:f5:4b82:9cc9 with SMTP id h5-20020a170902f545b02900f54b829cc9mr593285plf.68.1621435145578; Wed, 19 May 2021 07:39:05 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.38.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:39:05 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 15/17] crypto: qce: Convert the device found dev_dbg() to dev_info() Date: Wed, 19 May 2021 20:06:58 +0530 Message-Id: <20210519143700.27392-16-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org QCE crypto driver is right now too silent even if the probe() is ok and a valid crypto IP version is found. Convert the dev_dbg() message to a dev_info() instead. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma Reviewed-by: Thara Gopinath --- drivers/crypto/qce/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index aecb2cdd79e5..8b3e2b4580c2 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -179,7 +179,7 @@ static int qce_check_version(struct qce_device *qce) */ qce->pipe_pair_id = qce->dma.rxchan->chan_id >> 1; - dev_dbg(qce->dev, "Crypto device found, version %d.%d.%d\n", + dev_info(qce->dev, "Crypto device found, version %d.%d.%d\n", major, minor, step); return 0; From patchwork Wed May 19 14:36:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267797 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0610C433ED for ; Wed, 19 May 2021 14:40:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9FE296124C for ; Wed, 19 May 2021 14:40:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354531AbhESOle (ORCPT ); Wed, 19 May 2021 10:41:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354357AbhESOlL (ORCPT ); Wed, 19 May 2021 10:41:11 -0400 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 619C6C061345 for ; Wed, 19 May 2021 07:39:12 -0700 (PDT) Received: by mail-pj1-x102c.google.com with SMTP id o17-20020a17090a9f91b029015cef5b3c50so3606120pjp.4 for ; Wed, 19 May 2021 07:39:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tMCI6bMNXfsVdvjl30Isl8zmWzmOUOT+UPEict+OVps=; b=rdgnDhvw+CW1f1A/uSTAaEcFXGAneUA+szrRk2vs8Ry2VxbHT9B+3MRNMJZUT+GzrV sWBytOOnV8NtSwkPBBeqUE/YeVsxky6razNmKsRIttmsezmV9v7K4FanTFVQnL6h3uSI NNm8kAzSqhI20qB69H90/cmtnQQw2aNNMrMjg/aQmZAQmVJA4SZcSGS7ntSW1RPDNQnf I1fcDiB82cp9p1PQkdxSThuzYWu2L7NMysw18F6IHdXG10akOwXwdc0kwp7uZX9MTLuV 6LOQAPNK/WE45F/hd+f2BvbHMwWiT/QrNE8Sk8QZ+0pvZor64WkBzQH8uyZ+tEcu4YXM 3Fxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tMCI6bMNXfsVdvjl30Isl8zmWzmOUOT+UPEict+OVps=; b=KYqmZNT2TLA/rkreU/0/RY1C1zhvOkCFNWgBAVzJhXSNWNjBAtZ2dy1pvC/K7J80/B GQst9MXiF7OoH9sbMTcdfw7NRAWc1DqLsMm5Q3cDRzYfTk6vakJ/vwz+sy5DELd00IcV thwVTZUmc7ecbCgZcXmU4nnwsdVOyT7um7LUS/0q7csS3wC4fw2jFrzvgMl+R7sazi0R AtbOl7pNWhkUS14JHCRimxJw/kEVLHy0g/c7jwoDZ3kan7PZyUnog0vsAxcpeXnvyxv7 FAcq2OLh2u31MLnXXFAatm5UXiREP3zDBH+o+2t5qUdW9gs2gkYj491uQOrloIzDAoUj m5BQ== X-Gm-Message-State: AOAM533Y7Ht5nWWp/bkT4RbiuYHHAu+EMLI/JNw784o1Ue68CtY/Qsw4 +vU2lbXEAZPAtRon1Y6vxY8l8g== X-Google-Smtp-Source: ABdhPJzr+a1uQ9RFogLFWAN1jtxvZWiwfYkJwabLX3IHIvu7yYK/cneU9SjCzc8LH/2CZ7r0xzbMEg== X-Received: by 2002:a17:90a:4a89:: with SMTP id f9mr11679024pjh.50.1621435151963; Wed, 19 May 2021 07:39:11 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.39.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:39:11 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 16/17] crypto: qce: Defer probing if BAM dma channel is not yet initialized Date: Wed, 19 May 2021 20:06:59 +0530 Message-Id: <20210519143700.27392-17-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Since the Qualcomm qce crypto driver needs the BAM dma driver to be setup first (to allow crypto operations), it makes sense to defer the qce crypto driver probing in case the BAM dma driver is not yet probed. Move the code leg requesting dma channels earlier in the probe() flow. This fixes the qce probe failure issues when both qce and BMA dma are compiled as static part of the kernel. Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma --- drivers/crypto/qce/core.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 8b3e2b4580c2..207221d5b996 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -218,6 +218,14 @@ static int qce_crypto_probe(struct platform_device *pdev) if (ret < 0) goto err_out; + /* qce driver requires BAM dma driver to be setup first. + * In case the dma channel are not set yet, this check + * helps use to return -EPROBE_DEFER earlier. + */ + ret = qce_dma_request(qce->dev, &qce->dma); + if (ret) + return ret; + qce->mem_path = devm_of_icc_get(qce->dev, "memory"); if (IS_ERR(qce->mem_path)) return dev_err_probe(dev, PTR_ERR(qce->mem_path), @@ -269,10 +277,6 @@ static int qce_crypto_probe(struct platform_device *pdev) goto err_clks_iface; } - ret = qce_dma_request(qce->dev, &qce->dma); - if (ret) - goto err_clks; - ret = qce_check_version(qce); if (ret) goto err_clks; @@ -287,12 +291,10 @@ static int qce_crypto_probe(struct platform_device *pdev) ret = qce_register_algs(qce); if (ret) - goto err_dma; + goto err_clks; return 0; -err_dma: - qce_dma_release(&qce->dma); err_clks: clk_disable_unprepare(qce->bus); err_clks_iface: From patchwork Wed May 19 14:37:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12267799 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04685C433B4 for ; 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Wed, 19 May 2021 07:39:18 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.135.250]) by smtp.gmail.com with ESMTPSA id o24sm9239515pgl.55.2021.05.19.07.39.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 07:39:18 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, Thara Gopinath , Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Subject: [PATCH v3 17/17] arm64/dts: qcom: sm8250: Add dt entries to support crypto engine. Date: Wed, 19 May 2021 20:07:00 +0530 Message-Id: <20210519143700.27392-18-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519143700.27392-1-bhupesh.sharma@linaro.org> References: <20210519143700.27392-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add crypto engine (CE) and CE BAM related nodes and definitions to "sm8250.dtsi". Cc: Thara Gopinath Cc: Bjorn Andersson Cc: Rob Herring Cc: Andy Gross Cc: Herbert Xu Cc: David S. Miller Cc: Stephen Boyd Cc: Michael Turquette Cc: Vinod Koul Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma Signed-off-by: Thara Gopinath --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4c0de12aaba6..6700d609a7b8 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3796,6 +3796,34 @@ cpufreq_hw: cpufreq@18591000 { #freq-domain-cells = <1>; }; + + cryptobam: dma@1dc4000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0 0x01dc4000 0 0x24000>; + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely = <1>; + iommus = <&apps_smmu 0x584 0x0011>, + <&apps_smmu 0x586 0x0011>, + <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; + interconnect-names = "memory"; + }; + + crypto: crypto@1dfa000 { + compatible = "qcom,sm8250-qce"; + reg = <0 0x01dfa000 0 0x6000>; + dmas = <&cryptobam 4>, <&cryptobam 5>; + dma-names = "rx", "tx"; + iommus = <&apps_smmu 0x584 0x0011>, + <&apps_smmu 0x586 0x0011>, + <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>; + interconnect-names = "memory"; + }; }; timer {