From patchwork Fri May 21 19:51:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 12273661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83FDEC4707A for ; Fri, 21 May 2021 19:51:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3DE6B613AF for ; Fri, 21 May 2021 19:51:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3DE6B613AF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B36A06E844; Fri, 21 May 2021 19:51:49 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id D90AB6E849 for ; Fri, 21 May 2021 19:51:48 +0000 (UTC) IronPort-SDR: iSZKJ0zXpkSdVYNoaVBueULG5ZREE5jE9B1QLFkXr9xjXKBy+IN1dpNh05UcNh26nTt5K6r9dU e3DBAMHEW/1g== X-IronPort-AV: E=McAfee;i="6200,9189,9991"; a="287102555" X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="287102555" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2021 12:51:47 -0700 IronPort-SDR: BX6plKXvYcaa/uAS4oGzOjuLnBhxHoMQ4VZNjoyu7Hv++tPMp6rhrxglRr39pXjX7ZdUI9EDa7 +lHfSZwRjq/g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="476213001" Received: from anushasr-mobl6.jf.intel.com ([10.165.21.155]) by fmsmga002.fm.intel.com with ESMTP; 21 May 2021 12:51:47 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Fri, 21 May 2021 12:51:29 -0700 Message-Id: <20210521195131.27775-2-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20210521195131.27775-1-anusha.srivatsa@intel.com> References: <20210521195131.27775-1-anusha.srivatsa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/3] drm/i915/dmc: s/DRM_ERROR/drm_err X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use new format of debug messages across intel_csr. While at it, change some function definitions which now need dev_priv for drm_err and drm_info etc. v2: use container_of() (Jani) v3: Indentation fixes. (Jani) Cc: Jani Nikula Suggested-by: Lucas De Marchi Signed-off-by: Anusha Srivatsa Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_dmc.c | 48 +++++++++++++----------- 1 file changed, 26 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 560574dd929a..5887453ff302 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -395,6 +395,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, const struct intel_dmc_header_base *dmc_header, size_t rem_size) { + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); unsigned int header_len_bytes, dmc_header_size, payload_size, i; const u32 *mmioaddr, *mmiodata; u32 mmio_count, mmio_count_max; @@ -439,28 +440,28 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, header_len_bytes = dmc_header->header_len; dmc_header_size = sizeof(*v1); } else { - DRM_ERROR("Unknown DMC fw header version: %u\n", - dmc_header->header_ver); + drm_err(&i915->drm, "Unknown DMC fw header version: %u\n", + dmc_header->header_ver); return 0; } if (header_len_bytes != dmc_header_size) { - DRM_ERROR("DMC firmware has wrong dmc header length " - "(%u bytes)\n", header_len_bytes); + drm_err(&i915->drm, "DMC firmware has wrong dmc header length " + "(%u bytes)\n", header_len_bytes); return 0; } /* Cache the dmc header info. */ if (mmio_count > mmio_count_max) { - DRM_ERROR("DMC firmware has wrong mmio count %u\n", mmio_count); + drm_err(&i915->drm, "DMC firmware has wrong mmio count %u\n", mmio_count); return 0; } for (i = 0; i < mmio_count; i++) { if (mmioaddr[i] < DMC_MMIO_START_RANGE || mmioaddr[i] > DMC_MMIO_END_RANGE) { - DRM_ERROR("DMC firmware has wrong mmio address 0x%x\n", - mmioaddr[i]); + drm_err(&i915->drm, "DMC firmware has wrong mmio address 0x%x\n", + mmioaddr[i]); return 0; } dmc->mmioaddr[i] = _MMIO(mmioaddr[i]); @@ -476,14 +477,14 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, goto error_truncated; if (payload_size > dmc->max_fw_size) { - DRM_ERROR("DMC FW too big (%u bytes)\n", payload_size); + drm_err(&i915->drm, "DMC FW too big (%u bytes)\n", payload_size); return 0; } dmc->dmc_fw_size = dmc_header->fw_size; dmc->dmc_payload = kmalloc(payload_size, GFP_KERNEL); if (!dmc->dmc_payload) { - DRM_ERROR("Memory allocation failed for dmc payload\n"); + drm_err(&i915->drm, "Memory allocation failed for dmc payload\n"); return 0; } @@ -493,7 +494,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, return header_len_bytes + payload_size; error_truncated: - DRM_ERROR("Truncated DMC firmware, refusing.\n"); + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); return 0; } @@ -503,6 +504,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc, const struct stepping_info *si, size_t rem_size) { + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); u32 package_size = sizeof(struct intel_package_header); u32 num_entries, max_entries, dmc_offset; const struct intel_fw_info *fw_info; @@ -515,8 +517,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, } else if (package_header->header_ver == 2) { max_entries = PACKAGE_V2_MAX_FW_INFO_ENTRIES; } else { - DRM_ERROR("DMC firmware has unknown header version %u\n", - package_header->header_ver); + drm_err(&i915->drm, "DMC firmware has unknown header version %u\n", + package_header->header_ver); return 0; } @@ -529,8 +531,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, goto error_truncated; if (package_header->header_len * 4 != package_size) { - DRM_ERROR("DMC firmware has wrong package header length " - "(%u bytes)\n", package_size); + drm_err(&i915->drm, "DMC firmware has wrong package header length " + "(%u bytes)\n", package_size); return 0; } @@ -543,8 +545,8 @@ parse_dmc_fw_package(struct intel_dmc *dmc, dmc_offset = find_dmc_fw_offset(fw_info, num_entries, si, package_header->header_ver); if (dmc_offset == DMC_DEFAULT_FW_OFFSET) { - DRM_ERROR("DMC firmware not supported for %c stepping\n", - si->stepping); + drm_err(&i915->drm, "DMC firmware not supported for %c stepping\n", + si->stepping); return 0; } @@ -552,7 +554,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc, return package_size + dmc_offset * 4; error_truncated: - DRM_ERROR("Truncated DMC firmware, refusing.\n"); + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); return 0; } @@ -561,22 +563,24 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc, struct intel_css_header *css_header, size_t rem_size) { + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); + if (rem_size < sizeof(struct intel_css_header)) { - DRM_ERROR("Truncated DMC firmware, refusing.\n"); + drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); return 0; } if (sizeof(struct intel_css_header) != (css_header->header_len * 4)) { - DRM_ERROR("DMC firmware has wrong CSS header length " - "(%u bytes)\n", - (css_header->header_len * 4)); + drm_err(&i915->drm, "DMC firmware has wrong CSS header length " + "(%u bytes)\n", + (css_header->header_len * 4)); return 0; } if (dmc->required_version && css_header->version != dmc->required_version) { - DRM_INFO("Refusing to load DMC firmware v%u.%u," + drm_info(&i915->drm, "Refusing to load DMC firmware v%u.%u," " please use v%u.%u\n", DMC_VERSION_MAJOR(css_header->version), DMC_VERSION_MINOR(css_header->version), From patchwork Fri May 21 19:51:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 12273667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF76C4707A for ; Fri, 21 May 2021 19:51:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E7925613AF for ; Fri, 21 May 2021 19:51:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E7925613AF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B5B16E852; Fri, 21 May 2021 19:51:56 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 681586E852 for ; Fri, 21 May 2021 19:51:50 +0000 (UTC) IronPort-SDR: OcVuBtZd99G1Byn28IpQtK2JDTs7S90eNtx/NbLXgfX/x+q+1rNUBVcRe8stHl+Mm7vmCtgQ/4 ZvCMaSmfdcAw== X-IronPort-AV: E=McAfee;i="6200,9189,9991"; a="287102559" X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="287102559" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2021 12:51:50 -0700 IronPort-SDR: hhS/aZ9pHq88YamYtwcynewtypiQrrntwZ5r7PnGMgHFRnl3pkW5xyTh9/PZbl2PkRWuh5wQPS JJYpk72FMJQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="476213066" Received: from anushasr-mobl6.jf.intel.com ([10.165.21.155]) by fmsmga002.fm.intel.com with ESMTP; 21 May 2021 12:51:50 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Fri, 21 May 2021 12:51:30 -0700 Message-Id: <20210521195131.27775-3-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20210521195131.27775-1-anusha.srivatsa@intel.com> References: <20210521195131.27775-1-anusha.srivatsa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/3] drm/i915/dmc: Add intel_dmc_has_payload() helper X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We check for dmc_payload being there at various points in the driver. Replace it with the helper. v2: rebased. v3: Move intel_dmc to intel_dmc.h in another patch (Lucas) v4: Remove headers not needed from intel_dmc.h Cc: Lucas De Marchi Signed-off-by: Anusha Srivatsa Reviewed-by: Lucas De Marchi --- .../gpu/drm/i915/display/intel_display_debugfs.c | 4 ++-- .../gpu/drm/i915/display/intel_display_power.c | 16 ++++++++-------- drivers/gpu/drm/i915/display/intel_dmc.c | 13 +++++++++---- drivers/gpu/drm/i915/display/intel_dmc.h | 1 + drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- 5 files changed, 21 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 94e5cbd86e77..88bb05d5c483 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -542,10 +542,10 @@ static int i915_dmc_info(struct seq_file *m, void *unused) wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); - seq_printf(m, "fw loaded: %s\n", yesno(dmc->dmc_payload)); + seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv))); seq_printf(m, "path: %s\n", dmc->fw_path); - if (!dmc->dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) goto out; seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version), diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 991ceea06a07..b546672c9b00 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1220,7 +1220,7 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv, static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv, struct i915_power_well *power_well) { - if (!dev_priv->dmc.dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) return; switch (dev_priv->dmc.target_dc_state) { @@ -5579,7 +5579,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv, gen9_dbuf_enable(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); } @@ -5646,7 +5646,7 @@ static void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume gen9_dbuf_enable(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); } @@ -5712,7 +5712,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume /* 6. Enable DBUF */ gen9_dbuf_enable(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); } @@ -5869,7 +5869,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, if (DISPLAY_VER(dev_priv) >= 12) tgl_bw_buddy_init(dev_priv); - if (resume && dev_priv->dmc.dmc_payload) + if (resume && intel_dmc_has_payload(dev_priv)) intel_dmc_load_program(dev_priv); /* Wa_14011508470 */ @@ -6230,7 +6230,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915, */ if (!(i915->dmc.allowed_dc_mask & DC_STATE_EN_DC9) && suspend_mode == I915_DRM_SUSPEND_IDLE && - i915->dmc.dmc_payload) { + intel_dmc_has_payload(i915)) { intel_display_power_flush_work(i915); intel_power_domains_verify_state(i915); return; @@ -6420,7 +6420,7 @@ void intel_display_power_resume(struct drm_i915_private *i915) if (DISPLAY_VER(i915) >= 11) { bxt_disable_dc9(i915); icl_display_core_init(i915, true); - if (i915->dmc.dmc_payload) { + if (intel_dmc_has_payload(i915)) { if (i915->dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC6) skl_enable_dc6(i915); @@ -6431,7 +6431,7 @@ void intel_display_power_resume(struct drm_i915_private *i915) } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { bxt_disable_dc9(i915); bxt_display_core_init(i915, true); - if (i915->dmc.dmc_payload && + if (intel_dmc_has_payload(i915) && (i915->dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)) gen9_enable_dc5(i915); } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 5887453ff302..0e87251b3d4c 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -237,6 +237,11 @@ struct stepping_info { char substepping; }; +bool intel_dmc_has_payload(struct drm_i915_private *dev_priv) +{ + return dev_priv->dmc.dmc_payload; +} + static const struct stepping_info skl_stepping_info[] = { {'A', '0'}, {'B', '0'}, {'C', '0'}, {'D', '0'}, {'E', '0'}, {'F', '0'}, @@ -320,7 +325,7 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv) return; } - if (!dev_priv->dmc.dmc_payload) { + if (!intel_dmc_has_payload(dev_priv)) { drm_err(&dev_priv->drm, "Tried to program CSR with empty payload\n"); return; @@ -656,7 +661,7 @@ static void dmc_load_work_fn(struct work_struct *work) request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv->drm.dev); parse_dmc_fw(dev_priv, fw); - if (dev_priv->dmc.dmc_payload) { + if (intel_dmc_has_payload(dev_priv)) { intel_dmc_load_program(dev_priv); intel_dmc_runtime_pm_put(dev_priv); @@ -785,7 +790,7 @@ void intel_dmc_ucode_suspend(struct drm_i915_private *dev_priv) flush_work(&dev_priv->dmc.work); /* Drop the reference held in case DMC isn't loaded. */ - if (!dev_priv->dmc.dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) intel_dmc_runtime_pm_put(dev_priv); } @@ -805,7 +810,7 @@ void intel_dmc_ucode_resume(struct drm_i915_private *dev_priv) * Reacquire the reference to keep RPM disabled in case DMC isn't * loaded. */ - if (!dev_priv->dmc.dmc_payload) + if (!intel_dmc_has_payload(dev_priv)) intel_dmc_runtime_pm_get(dev_priv); } diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index 57dd99da0ced..64816f4a71b6 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -17,5 +17,6 @@ void intel_dmc_load_program(struct drm_i915_private *i915); void intel_dmc_ucode_fini(struct drm_i915_private *i915); void intel_dmc_ucode_suspend(struct drm_i915_private *i915); void intel_dmc_ucode_resume(struct drm_i915_private *i915); +bool intel_dmc_has_payload(struct drm_i915_private *i915); #endif /* __INTEL_DMC_H__ */ diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 8b964e355cb5..833d3e8b7631 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -792,7 +792,7 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m, struct intel_dmc *dmc = &m->i915->dmc; err_printf(m, "DMC loaded: %s\n", - yesno(dmc->dmc_payload)); + yesno(intel_dmc_has_payload(m->i915) != 0)); err_printf(m, "DMC fw version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version), DMC_VERSION_MINOR(dmc->version)); From patchwork Fri May 21 19:51:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 12273665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFBADC4707D for ; Fri, 21 May 2021 19:51:54 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 877AA61164 for ; Fri, 21 May 2021 19:51:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 877AA61164 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D27846E849; Fri, 21 May 2021 19:51:53 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0EDC66E849 for ; Fri, 21 May 2021 19:51:51 +0000 (UTC) IronPort-SDR: s2wOvSIwCiAKfOo2eZDGYm2FymhQDhMAfiwAEa84NPCTN6a+yU+D0P+osVOMshG2DciDXYoT58 3pJkg32UxiNA== X-IronPort-AV: E=McAfee;i="6200,9189,9991"; a="287102570" X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="287102570" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2021 12:51:50 -0700 IronPort-SDR: eFX0hoPHVVh9N0/jHVPNYh2IFGWwflN1+nFYBazEnGRD3eSM69mExPgZ1qok7jyeCBH7vpN9dw luWg7CfGP+/Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,319,1613462400"; d="scan'208";a="476213128" Received: from anushasr-mobl6.jf.intel.com ([10.165.21.155]) by fmsmga002.fm.intel.com with ESMTP; 21 May 2021 12:51:50 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Fri, 21 May 2021 12:51:31 -0700 Message-Id: <20210521195131.27775-4-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20210521195131.27775-1-anusha.srivatsa@intel.com> References: <20210521195131.27775-1-anusha.srivatsa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/3] drm/i915/dmc: Move struct intel_dmc to intel_dmc.h X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move struct intel_dmc from i915_drv.h to intel_dmc.h. v2: Add includes along with moving the struct. Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_dmc.h | 21 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 18 +----------------- 2 files changed, 22 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index 64816f4a71b6..8baeb85cf8db 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -6,12 +6,33 @@ #ifndef __INTEL_DMC_H__ #define __INTEL_DMC_H__ +#include +#include "intel_wakeref.h" +#include "i915_reg.h" + struct drm_i915_private; #define DMC_VERSION(major, minor) ((major) << 16 | (minor)) #define DMC_VERSION_MAJOR(version) ((version) >> 16) #define DMC_VERSION_MINOR(version) ((version) & 0xffff) +struct intel_dmc { + struct work_struct work; + const char *fw_path; + u32 required_version; + u32 max_fw_size; /* bytes */ + u32 *dmc_payload; + u32 dmc_fw_size; /* dwords */ + u32 version; + u32 mmio_count; + i915_reg_t mmioaddr[20]; + u32 mmiodata[20]; + u32 dc_state; + u32 target_dc_state; + u32 allowed_dc_mask; + intel_wakeref_t wakeref; +}; + void intel_dmc_ucode_init(struct drm_i915_private *i915); void intel_dmc_load_program(struct drm_i915_private *i915); void intel_dmc_ucode_fini(struct drm_i915_private *i915); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9cb02618ba15..b5962768a1f1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -67,6 +67,7 @@ #include "display/intel_bios.h" #include "display/intel_display.h" #include "display/intel_display_power.h" +#include "display/intel_dmc.h" #include "display/intel_dpll_mgr.h" #include "display/intel_dsb.h" #include "display/intel_frontbuffer.h" @@ -328,23 +329,6 @@ struct drm_i915_display_funcs { void (*read_luts)(struct intel_crtc_state *crtc_state); }; -struct intel_dmc { - struct work_struct work; - const char *fw_path; - u32 required_version; - u32 max_fw_size; /* bytes */ - u32 *dmc_payload; - u32 dmc_fw_size; /* dwords */ - u32 version; - u32 mmio_count; - i915_reg_t mmioaddr[20]; - u32 mmiodata[20]; - u32 dc_state; - u32 target_dc_state; - u32 allowed_dc_mask; - intel_wakeref_t wakeref; -}; - enum i915_cache_level { I915_CACHE_NONE = 0, I915_CACHE_LLC, /* also used for snoopable memory on non-LLC */