From patchwork Fri May 21 20:17:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bruno Larsen (billionai)" X-Patchwork-Id: 12273717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52B3CC04FF3 for ; Fri, 21 May 2021 20:24:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D77BA61004 for ; Fri, 21 May 2021 20:24:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D77BA61004 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=eldorado.org.br Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53198 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBh8-0005cn-RI for qemu-devel@archiver.kernel.org; Fri, 21 May 2021 16:24:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49940) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lkBbM-0005up-F5; Fri, 21 May 2021 16:18:32 -0400 Received: from [201.28.113.2] (port=1319 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBbL-0001Nf-51; Fri, 21 May 2021 16:18:32 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 21 May 2021 17:18:19 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id 282EF8013E6; Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 1/9] target/ppc: cleaned error_report from ppc_store_sdr1 Date: Fri, 21 May 2021 17:17:51 -0300 Message-Id: <20210521201759.85475-2-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0307 (UTC) FILETIME=[709F8FB0:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Changed how the function ppc_store_sdr1, from error_report(...) to qemu_log_mask(LOG_GUEST_ERROR, ...). Signed-off-by: Bruno Larsen (billionai) Suggested-by: Richard Henderson --- target/ppc/cpu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index d957d1a687..9cf3288b7a 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -77,13 +77,13 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value) target_ulong htabsize = value & SDR_64_HTABSIZE; if (value & ~sdr_mask) { - error_report("Invalid bits 0x"TARGET_FMT_lx" set in SDR1", - value & ~sdr_mask); + qemu_log_mask(LOG_GUEST_ERROR, "Invalid bits 0x"TARGET_FMT_lx + " set in SDR1", value & ~sdr_mask); value &= sdr_mask; } if (htabsize > 28) { - error_report("Invalid HTABSIZE 0x" TARGET_FMT_lx" stored in SDR1", - htabsize); + qemu_log_mask(LOG_GUEST_ERROR, "Invalid HTABSIZE 0x" TARGET_FMT_lx + " stored in SDR1", htabsize); return; } } From patchwork Fri May 21 20:17:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bruno Larsen (billionai)" X-Patchwork-Id: 12273685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B171BC4707E for ; Fri, 21 May 2021 20:20:50 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 40BE061164 for ; Fri, 21 May 2021 20:20:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 40BE061164 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=eldorado.org.br Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:44830 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBdZ-0008ME-Bs for qemu-devel@archiver.kernel.org; Fri, 21 May 2021 16:20:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49968) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lkBbO-0005yv-TP; Fri, 21 May 2021 16:18:34 -0400 Received: from [201.28.113.2] (port=1319 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBbN-0001Nf-Eb; Fri, 21 May 2021 16:18:34 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 21 May 2021 17:18:19 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id 3FE148013E3; Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 2/9] target/ppc: moved ppc_store_lpcr and ppc_store_msr to cpu.c Date: Fri, 21 May 2021 17:17:52 -0300 Message-Id: <20210521201759.85475-3-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0385 (UTC) FILETIME=[70AB7690:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These functions are used in hw/ppc logic, during machine startup, which means it must be compiled when --disable-tcg is selected, and so it has been moved into a common code file Signed-off-by: Bruno Larsen (billionai) Reviewed-by: Richard Henderson Reviewed-by: David Gibson --- target/ppc/cpu.c | 17 +++++++++++++++++ target/ppc/misc_helper.c | 16 ---------------- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index 9cf3288b7a..c8e87e30f1 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -24,6 +24,7 @@ #include "exec/log.h" #include "fpu/softfloat-helpers.h" #include "mmu-hash64.h" +#include "helper_regs.h" target_ulong cpu_read_xer(CPUPPCState *env) { @@ -92,3 +93,19 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value) env->spr[SPR_SDR1] = value; } #endif /* CONFIG_SOFTMMU */ + +/* GDBstub can read and write MSR... */ +void ppc_store_msr(CPUPPCState *env, target_ulong value) +{ + hreg_store_msr(env, value, 0); +} + +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) +{ + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + CPUPPCState *env = &cpu->env; + + env->spr[SPR_LPCR] = val & pcc->lpcr_mask; + /* The gtse bit affects hflags */ + hreg_compute_hflags(env); +} diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 08a31da289..442b12652c 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -255,22 +255,6 @@ target_ulong helper_clcs(CPUPPCState *env, uint32_t arg) /*****************************************************************************/ /* Special registers manipulation */ -/* GDBstub can read and write MSR... */ -void ppc_store_msr(CPUPPCState *env, target_ulong value) -{ - hreg_store_msr(env, value, 0); -} - -void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) -{ - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); - CPUPPCState *env = &cpu->env; - - env->spr[SPR_LPCR] = val & pcc->lpcr_mask; - /* The gtse bit affects hflags */ - hreg_compute_hflags(env); -} - /* * This code is lifted from MacOnLinux. It is called whenever THRM1,2 * or 3 is read an fixes up the values in such a way that will make From patchwork Fri May 21 20:17:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bruno Larsen (billionai)" X-Patchwork-Id: 12273719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45429C04FF3 for ; Fri, 21 May 2021 20:24:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E222F6135A for ; Fri, 21 May 2021 20:24:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E222F6135A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=eldorado.org.br Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53396 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBhC-0005kh-37 for qemu-devel@archiver.kernel.org; Fri, 21 May 2021 16:24:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50020) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lkBbR-00065W-Rv; Fri, 21 May 2021 16:18:37 -0400 Received: from [201.28.113.2] (port=1319 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBbP-0001Nf-UZ; Fri, 21 May 2021 16:18:37 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 21 May 2021 17:18:19 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id 5663F8013E6; Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 3/9] target/ppc: reduce usage of fpscr_set_rounding_mode Date: Fri, 21 May 2021 17:17:53 -0300 Message-Id: <20210521201759.85475-4-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0479 (UTC) FILETIME=[70B9CE70:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" It is preferable to store the current rounding mode and retore from that than recalculating from fpscr, so we changed the behavior of do_fri and VSX_ROUND to do it like that. Suggested-by: Richard Henderson Signed-off-by: Bruno Larsen (billionai) Reviewed-by: Richard Henderson --- target/ppc/fpu_helper.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 44315fca0b..a4a283df2b 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -822,6 +822,7 @@ static inline uint64_t do_fri(CPUPPCState *env, uint64_t arg, int rounding_mode) { CPU_DoubleU farg; + FloatRoundMode old_rounding_mode = get_float_rounding_mode(&env->fp_status); farg.ll = arg; @@ -834,8 +835,7 @@ static inline uint64_t do_fri(CPUPPCState *env, uint64_t arg, float_flag_inexact; set_float_rounding_mode(rounding_mode, &env->fp_status); farg.ll = float64_round_to_int(farg.d, &env->fp_status); - /* Restore rounding mode from FPSCR */ - fpscr_set_rounding_mode(env); + set_float_rounding_mode(old_rounding_mode, &env->fp_status); /* fri* does not set FPSCR[XX] */ if (!inexact) { @@ -3136,8 +3136,10 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, ppc_vsr_t *xb) \ { \ ppc_vsr_t t = *xt; \ int i; \ + FloatRoundMode curr_rounding_mode; \ \ if (rmode != FLOAT_ROUND_CURRENT) { \ + curr_rounding_mode = get_float_rounding_mode(&env->fp_status); \ set_float_rounding_mode(rmode, &env->fp_status); \ } \ \ @@ -3160,7 +3162,7 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, ppc_vsr_t *xb) \ * mode from FPSCR \ */ \ if (rmode != FLOAT_ROUND_CURRENT) { \ - fpscr_set_rounding_mode(env); \ + set_float_rounding_mode(curr_rounding_mode, &env->fp_status); \ env->fp_status.float_exception_flags &= ~float_flag_inexact; \ } \ \ From patchwork Fri May 21 20:17:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bruno Larsen (billionai)" X-Patchwork-Id: 12273715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27137C04FF3 for ; Fri, 21 May 2021 20:21:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C338D61353 for ; Fri, 21 May 2021 20:21:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C338D61353 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=eldorado.org.br Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:47424 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBee-0001ei-T6 for qemu-devel@archiver.kernel.org; Fri, 21 May 2021 16:21:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50048) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lkBbU-0006Cu-UX; Fri, 21 May 2021 16:18:40 -0400 Received: from [201.28.113.2] (port=1319 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBbS-0001Nf-VP; Fri, 21 May 2021 16:18:40 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 21 May 2021 17:18:19 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id 6B3B88013E3; Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 4/9] target/ppc: overhauled and moved logic of storing fpscr Date: Fri, 21 May 2021 17:17:54 -0300 Message-Id: <20210521201759.85475-5-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0557 (UTC) FILETIME=[70C5B550:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Followed the suggested overhaul to store_fpscr logic, and moved it to cpu.c where it can be accessed in !TCG builds. The overhaul was suggesting because storing a value to fpscr should never raise an exception, so we could remove all the mess that happened with POWERPC_EXCP_FP. We also moved fpscr_set_rounding_mode into cpu.c as it could now be moved there, and it is needed when a value for the fpscr is being stored directly. Suggested-by: Richard Henderson Signed-off-by: Bruno Larsen (billionai) Reviewed-by: Richard Henderson --- target/ppc/cpu.c | 43 ++++++++ target/ppc/cpu.h | 12 +- target/ppc/fpu_helper.c | 238 +++------------------------------------- target/ppc/gdbstub.c | 6 +- 4 files changed, 65 insertions(+), 234 deletions(-) diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index c8e87e30f1..19d67b5b07 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -25,6 +25,7 @@ #include "fpu/softfloat-helpers.h" #include "mmu-hash64.h" #include "helper_regs.h" +#include "sysemu/tcg.h" target_ulong cpu_read_xer(CPUPPCState *env) { @@ -109,3 +110,45 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) /* The gtse bit affects hflags */ hreg_compute_hflags(env); } + +static inline void fpscr_set_rounding_mode(CPUPPCState *env) +{ + int rnd_type; + + /* Set rounding mode */ + switch (fpscr_rn) { + case 0: + /* Best approximation (round to nearest) */ + rnd_type = float_round_nearest_even; + break; + case 1: + /* Smaller magnitude (round toward zero) */ + rnd_type = float_round_to_zero; + break; + case 2: + /* Round toward +infinite */ + rnd_type = float_round_up; + break; + default: + case 3: + /* Round toward -infinite */ + rnd_type = float_round_down; + break; + } + set_float_rounding_mode(rnd_type, &env->fp_status); +} + +void ppc_store_fpscr(CPUPPCState *env, target_ulong val) +{ + val &= ~(FP_VX | FP_FEX); + if (val & FPSCR_IX) { + val |= FP_VX; + } + if ((val >> FPSCR_XX) & (val >> FPSCR_XE) & 0x1f) { + val |= FP_FEX; + } + env->fpscr = val; + if (tcg_enabled()) { + fpscr_set_rounding_mode(env); + } +} diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index cab33a3680..203f07e48e 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -675,11 +675,11 @@ enum { #define fpscr_ni (((env->fpscr) >> FPSCR_NI) & 0x1) #define fpscr_rn (((env->fpscr) >> FPSCR_RN0) & 0x3) /* Invalid operation exception summary */ -#define fpscr_ix ((env->fpscr) & ((1 << FPSCR_VXSNAN) | (1 << FPSCR_VXISI) | \ - (1 << FPSCR_VXIDI) | (1 << FPSCR_VXZDZ) | \ - (1 << FPSCR_VXIMZ) | (1 << FPSCR_VXVC) | \ - (1 << FPSCR_VXSOFT) | (1 << FPSCR_VXSQRT) | \ - (1 << FPSCR_VXCVI))) +#define FPSCR_IX ((1 << FPSCR_VXSNAN) | (1 << FPSCR_VXISI) | \ + (1 << FPSCR_VXIDI) | (1 << FPSCR_VXZDZ) | \ + (1 << FPSCR_VXIMZ) | (1 << FPSCR_VXVC) | \ + (1 << FPSCR_VXSOFT) | (1 << FPSCR_VXSQRT) | \ + (1 << FPSCR_VXCVI)) /* exception summary */ #define fpscr_ex (((env->fpscr) >> FPSCR_XX) & 0x1F) /* enabled exception summary */ @@ -1334,7 +1334,7 @@ void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp); #endif #endif -void store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask); +void ppc_store_fpscr(CPUPPCState *env, target_ulong val); void helper_hfscr_facility_check(CPUPPCState *env, uint32_t bit, const char *caller, uint32_t cause); diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index a4a283df2b..0f4074fc7e 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -383,247 +383,35 @@ static inline void float_inexact_excp(CPUPPCState *env) } } -static inline void fpscr_set_rounding_mode(CPUPPCState *env) -{ - int rnd_type; - - /* Set rounding mode */ - switch (fpscr_rn) { - case 0: - /* Best approximation (round to nearest) */ - rnd_type = float_round_nearest_even; - break; - case 1: - /* Smaller magnitude (round toward zero) */ - rnd_type = float_round_to_zero; - break; - case 2: - /* Round toward +infinite */ - rnd_type = float_round_up; - break; - default: - case 3: - /* Round toward -infinite */ - rnd_type = float_round_down; - break; - } - set_float_rounding_mode(rnd_type, &env->fp_status); -} - void helper_fpscr_clrbit(CPUPPCState *env, uint32_t bit) { - int prev; - - prev = (env->fpscr >> bit) & 1; - env->fpscr &= ~(1 << bit); - if (prev == 1) { - switch (bit) { - case FPSCR_RN1: - case FPSCR_RN0: - fpscr_set_rounding_mode(env); - break; - case FPSCR_VXSNAN: - case FPSCR_VXISI: - case FPSCR_VXIDI: - case FPSCR_VXZDZ: - case FPSCR_VXIMZ: - case FPSCR_VXVC: - case FPSCR_VXSOFT: - case FPSCR_VXSQRT: - case FPSCR_VXCVI: - if (!fpscr_ix) { - /* Set VX bit to zero */ - env->fpscr &= ~FP_VX; - } - break; - case FPSCR_OX: - case FPSCR_UX: - case FPSCR_ZX: - case FPSCR_XX: - case FPSCR_VE: - case FPSCR_OE: - case FPSCR_UE: - case FPSCR_ZE: - case FPSCR_XE: - if (!fpscr_eex) { - /* Set the FEX bit */ - env->fpscr &= ~FP_FEX; - } - break; - default: - break; - } + uint32_t mask = 1u << bit; + if (env->fpscr & mask) { + ppc_store_fpscr(env, env->fpscr & ~mask); } } void helper_fpscr_setbit(CPUPPCState *env, uint32_t bit) { - CPUState *cs = env_cpu(env); - int prev; - - prev = (env->fpscr >> bit) & 1; - env->fpscr |= 1 << bit; - if (prev == 0) { - switch (bit) { - case FPSCR_VX: - env->fpscr |= FP_FX; - if (fpscr_ve) { - goto raise_ve; - } - break; - case FPSCR_OX: - env->fpscr |= FP_FX; - if (fpscr_oe) { - goto raise_oe; - } - break; - case FPSCR_UX: - env->fpscr |= FP_FX; - if (fpscr_ue) { - goto raise_ue; - } - break; - case FPSCR_ZX: - env->fpscr |= FP_FX; - if (fpscr_ze) { - goto raise_ze; - } - break; - case FPSCR_XX: - env->fpscr |= FP_FX; - if (fpscr_xe) { - goto raise_xe; - } - break; - case FPSCR_VXSNAN: - case FPSCR_VXISI: - case FPSCR_VXIDI: - case FPSCR_VXZDZ: - case FPSCR_VXIMZ: - case FPSCR_VXVC: - case FPSCR_VXSOFT: - case FPSCR_VXSQRT: - case FPSCR_VXCVI: - env->fpscr |= FP_VX; - env->fpscr |= FP_FX; - if (fpscr_ve != 0) { - goto raise_ve; - } - break; - case FPSCR_VE: - if (fpscr_vx != 0) { - raise_ve: - env->error_code = POWERPC_EXCP_FP; - if (fpscr_vxsnan) { - env->error_code |= POWERPC_EXCP_FP_VXSNAN; - } - if (fpscr_vxisi) { - env->error_code |= POWERPC_EXCP_FP_VXISI; - } - if (fpscr_vxidi) { - env->error_code |= POWERPC_EXCP_FP_VXIDI; - } - if (fpscr_vxzdz) { - env->error_code |= POWERPC_EXCP_FP_VXZDZ; - } - if (fpscr_vximz) { - env->error_code |= POWERPC_EXCP_FP_VXIMZ; - } - if (fpscr_vxvc) { - env->error_code |= POWERPC_EXCP_FP_VXVC; - } - if (fpscr_vxsoft) { - env->error_code |= POWERPC_EXCP_FP_VXSOFT; - } - if (fpscr_vxsqrt) { - env->error_code |= POWERPC_EXCP_FP_VXSQRT; - } - if (fpscr_vxcvi) { - env->error_code |= POWERPC_EXCP_FP_VXCVI; - } - goto raise_excp; - } - break; - case FPSCR_OE: - if (fpscr_ox != 0) { - raise_oe: - env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_OX; - goto raise_excp; - } - break; - case FPSCR_UE: - if (fpscr_ux != 0) { - raise_ue: - env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_UX; - goto raise_excp; - } - break; - case FPSCR_ZE: - if (fpscr_zx != 0) { - raise_ze: - env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX; - goto raise_excp; - } - break; - case FPSCR_XE: - if (fpscr_xx != 0) { - raise_xe: - env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_XX; - goto raise_excp; - } - break; - case FPSCR_RN1: - case FPSCR_RN0: - fpscr_set_rounding_mode(env); - break; - default: - break; - raise_excp: - /* Update the floating-point enabled exception summary */ - env->fpscr |= FP_FEX; - /* We have to update Rc1 before raising the exception */ - cs->exception_index = POWERPC_EXCP_PROGRAM; - break; - } + uint32_t mask = 1u << bit; + if (!(env->fpscr & mask)) { + ppc_store_fpscr(env, env->fpscr | mask); } } -void helper_store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask) +void helper_store_fpscr(CPUPPCState *env, uint64_t val, uint32_t nibbles) { - CPUState *cs = env_cpu(env); - target_ulong prev, new; + target_ulong mask = 0; int i; - prev = env->fpscr; - new = (target_ulong)arg; - new &= ~(FP_FEX | FP_VX); - new |= prev & (FP_FEX | FP_VX); + /* TODO: push this extension back to translation time */ for (i = 0; i < sizeof(target_ulong) * 2; i++) { - if (mask & (1 << i)) { - env->fpscr &= ~(0xFLL << (4 * i)); - env->fpscr |= new & (0xFLL << (4 * i)); + if (nibbles & (1 << i)) { + mask |= (target_ulong) 0xf << (4 * i); } } - /* Update VX and FEX */ - if (fpscr_ix != 0) { - env->fpscr |= FP_VX; - } else { - env->fpscr &= ~FP_VX; - } - if ((fpscr_ex & fpscr_eex) != 0) { - env->fpscr |= FP_FEX; - cs->exception_index = POWERPC_EXCP_PROGRAM; - /* XXX: we should compute it properly */ - env->error_code = POWERPC_EXCP_FP; - } else { - env->fpscr &= ~FP_FEX; - } - fpscr_set_rounding_mode(env); -} - -void store_fpscr(CPUPPCState *env, uint64_t arg, uint32_t mask) -{ - helper_store_fpscr(env, arg, mask); + val = (val & mask) | (env->fpscr & ~mask); + ppc_store_fpscr(env, val); } static void do_float_check_status(CPUPPCState *env, uintptr_t raddr) diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index 9339e7eafe..c7d866cfcc 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -272,7 +272,7 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) break; case 70: /* fpscr */ - store_fpscr(env, ldtul_p(mem_buf), 0xffffffff); + ppc_store_fpscr(env, ldtul_p(mem_buf)); break; } } @@ -322,7 +322,7 @@ int ppc_cpu_gdb_write_register_apple(CPUState *cs, uint8_t *mem_buf, int n) break; case 70 + 32: /* fpscr */ - store_fpscr(env, ldq_p(mem_buf), 0xffffffff); + ppc_store_fpscr(env, ldq_p(mem_buf)); break; } } @@ -475,7 +475,7 @@ static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) } if (n == 32) { ppc_maybe_bswap_register(env, mem_buf, 4); - store_fpscr(env, ldl_p(mem_buf), 0xffffffff); + ppc_store_fpscr(env, ldl_p(mem_buf)); return 4; } return 0; From patchwork Fri May 21 20:17:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bruno Larsen (billionai)" X-Patchwork-Id: 12273735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69700C04FF3 for ; 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Fri, 21 May 2021 16:19:45 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 21 May 2021 17:18:19 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id 7F1D98013E6; Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 5/9] target/ppc: removed unnecessary inclusion of helper-proto.h Date: Fri, 21 May 2021 17:17:55 -0300 Message-Id: <20210521201759.85475-6-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0635 (UTC) FILETIME=[70D19C30:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These files included helper-proto.h, but didn't use or declare any helpers, so the #include has been removed Signed-off-by: Bruno Larsen (billionai) Reviewed-by: Richard Henderson --- target/ppc/cpu_init.c | 1 - target/ppc/gdbstub.c | 1 - target/ppc/mmu-hash32.c | 1 - target/ppc/mmu-radix64.c | 1 - 4 files changed, 4 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 3365135896..b696469d1a 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -43,7 +43,6 @@ #include "fpu/softfloat.h" #include "qapi/qapi-commands-machine-target.h" -#include "exec/helper-proto.h" #include "helper_regs.h" #include "internal.h" #include "spr_tcg.h" diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index c7d866cfcc..09ff1328d4 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/gdbstub.h" -#include "exec/helper-proto.h" #include "internal.h" static int ppc_gdb_register_len_apple(int n) diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 32d1f4a954..6a07c345e4 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" -#include "exec/helper-proto.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "internal.h" diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index eabfe4e261..cbd404bfa4 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" -#include "exec/helper-proto.h" #include "qemu/error-report.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" From patchwork Fri May 21 20:17:56 2021 Content-Type: text/plain; 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Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 6/9] target/ppc: moved ppc_cpu_do_interrupt to cpu.c Date: Fri, 21 May 2021 17:17:56 -0300 Message-Id: <20210521201759.85475-7-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0714 (UTC) FILETIME=[70DDAA20:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Moved the ppc_cpu_do_interrupt function to cpu.c file, where it makes more sense, and turned powerpc_excp not static, as it now needs to be accessed from outside of excp_helper.c Signed-off-by: Bruno Larsen (billionai) --- target/ppc/cpu.c | 20 ++++++++++++++++++++ target/ppc/cpu.h | 1 + target/ppc/excp_helper.c | 19 +------------------ 3 files changed, 22 insertions(+), 18 deletions(-) diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index 19d67b5b07..95898f348b 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -152,3 +152,23 @@ void ppc_store_fpscr(CPUPPCState *env, target_ulong val) fpscr_set_rounding_mode(env); } } + +/* Exception processing */ +#if defined(CONFIG_USER_ONLY) +void ppc_cpu_do_interrupt(CPUState *cs) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + cs->exception_index = POWERPC_EXCP_NONE; + env->error_code = 0; +} +#else +void ppc_cpu_do_interrupt(CPUState *cs) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + powerpc_excp(cpu, env->excp_model, cs->exception_index); +} +#endif diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 203f07e48e..65a08cc424 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1254,6 +1254,7 @@ DECLARE_OBJ_CHECKERS(PPCVirtualHypervisor, PPCVirtualHypervisorClass, #endif /* CONFIG_USER_ONLY */ void ppc_cpu_do_interrupt(CPUState *cpu); +void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp); bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req); void ppc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); void ppc_cpu_dump_statistics(CPUState *cpu, int flags); diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index f4f15279eb..80bb6e70e9 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -38,15 +38,6 @@ /*****************************************************************************/ /* Exception processing */ #if defined(CONFIG_USER_ONLY) -void ppc_cpu_do_interrupt(CPUState *cs) -{ - PowerPCCPU *cpu = POWERPC_CPU(cs); - CPUPPCState *env = &cpu->env; - - cs->exception_index = POWERPC_EXCP_NONE; - env->error_code = 0; -} - static void ppc_hw_interrupt(CPUPPCState *env) { CPUState *cs = env_cpu(env); @@ -324,7 +315,7 @@ static inline void powerpc_set_excp_state(PowerPCCPU *cpu, * Note that this function should be greatly optimized when called * with a constant excp, from ppc_hw_interrupt */ -static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) +inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; @@ -968,14 +959,6 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) powerpc_set_excp_state(cpu, vector, new_msr); } -void ppc_cpu_do_interrupt(CPUState *cs) -{ - PowerPCCPU *cpu = POWERPC_CPU(cs); - CPUPPCState *env = &cpu->env; - - powerpc_excp(cpu, env->excp_model, cs->exception_index); -} - static void ppc_hw_interrupt(CPUPPCState *env) { PowerPCCPU *cpu = env_archcpu(env); From patchwork Fri May 21 20:17:57 2021 Content-Type: text/plain; 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Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 7/9] target/ppc: Added options to disable many TCG-only functions Date: Fri, 21 May 2021 17:17:57 -0300 Message-Id: <20210521201759.85475-8-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0807 (UTC) FILETIME=[70EBDAF0:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Wrapped some function calls in cpu_init.c, gdbstub.c, mmu-hash64.c, mmu_helper.c and excp_helper.c that were TCG only with ifdef CONFIG_TCG, to support building without TCG. for excp_helper we also moved the function do_rfi higher in the file to reduce the ifdef count. For cpu_init.c, we will also create stubs for ppc_*_opcodes, to make the ifdef hell a little smaller, and have hid part of the spr_registration logic into the macro that can make the TCG part disappear. Signed-off-by: Bruno Larsen (billionai) --- target/ppc/cpu_init.c | 11 +++--- target/ppc/excp_helper.c | 85 +++++++++++++++++++++++----------------- target/ppc/mmu-hash64.c | 11 +++++- target/ppc/mmu_helper.c | 16 +++++++- 4 files changed, 78 insertions(+), 45 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index b696469d1a..f5ae2f150d 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -1205,15 +1205,12 @@ static void register_BookE206_sprs(CPUPPCState *env, uint32_t mas_mask, /* TLB assist registers */ /* XXX : not implemented */ for (i = 0; i < 8; i++) { - void (*uea_write)(DisasContext *ctx, int sprn, int gprn) = - &spr_write_generic32; - if (i == 2 && (mas_mask & (1 << i)) && (env->insns_flags & PPC_64B)) { - uea_write = &spr_write_generic; - } if (mas_mask & (1 << i)) { spr_register(env, mas_sprn[i], mas_names[i], SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, uea_write, + &spr_read_generic, + (i == 2 && (env->insns_flags & PPC_64B)) + ? &spr_write_generic : &spr_write_generic32, 0x00000000); } } @@ -9253,7 +9250,9 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = ppc_cpu_class_by_name; cc->has_work = ppc_cpu_has_work; cc->dump_state = ppc_cpu_dump_state; +#ifdef CONFIG_TCG cc->dump_statistics = ppc_cpu_dump_statistics; +#endif cc->set_pc = ppc_cpu_set_pc; cc->gdb_read_register = ppc_cpu_gdb_read_register; cc->gdb_write_register = ppc_cpu_gdb_write_register; diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 80bb6e70e9..e20f38ebe2 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -19,12 +19,15 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "cpu.h" -#include "exec/helper-proto.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #include "internal.h" #include "helper_regs.h" +#ifdef CONFIG_TCG +#include "exec/helper-proto.h" +#include "exec/cpu_ldst.h" +#endif + /* #define DEBUG_OP */ /* #define DEBUG_SOFTWARE_TLB */ /* #define DEBUG_EXCEPTIONS */ @@ -1191,6 +1194,7 @@ void raise_exception_ra(CPUPPCState *env, uint32_t exception, raise_exception_err_ra(env, exception, 0, raddr); } +#ifdef CONFIG_TCG void helper_raise_exception_err(CPUPPCState *env, uint32_t exception, uint32_t error_code) { @@ -1201,8 +1205,43 @@ void helper_raise_exception(CPUPPCState *env, uint32_t exception) { raise_exception_err_ra(env, exception, 0, 0); } +#endif #if !defined(CONFIG_USER_ONLY) +static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr) +{ + CPUState *cs = env_cpu(env); + + /* MSR:POW cannot be set by any form of rfi */ + msr &= ~(1ULL << MSR_POW); + +#if defined(TARGET_PPC64) + /* Switching to 32-bit ? Crop the nip */ + if (!msr_is_64bit(env, msr)) { + nip = (uint32_t)nip; + } +#else + nip = (uint32_t)nip; +#endif + /* XXX: beware: this is false if VLE is supported */ + env->nip = nip & ~((target_ulong)0x00000003); + hreg_store_msr(env, msr, 1); +#if defined(DEBUG_OP) + cpu_dump_rfi(env->nip, env->msr); +#endif + /* + * No need to raise an exception here, as rfi is always the last + * insn of a TB + */ + cpu_interrupt_exittb(cs); + /* Reset the reservation */ + env->reserve_addr = -1; + + /* Context synchronizing: check if TCG TLB needs flush */ + check_tlb_flush(env, false); +} + +#ifdef CONFIG_TCG void helper_store_msr(CPUPPCState *env, target_ulong val) { uint32_t excp = hreg_store_msr(env, val, 0); @@ -1243,39 +1282,6 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn) } #endif /* defined(TARGET_PPC64) */ -static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr) -{ - CPUState *cs = env_cpu(env); - - /* MSR:POW cannot be set by any form of rfi */ - msr &= ~(1ULL << MSR_POW); - -#if defined(TARGET_PPC64) - /* Switching to 32-bit ? Crop the nip */ - if (!msr_is_64bit(env, msr)) { - nip = (uint32_t)nip; - } -#else - nip = (uint32_t)nip; -#endif - /* XXX: beware: this is false if VLE is supported */ - env->nip = nip & ~((target_ulong)0x00000003); - hreg_store_msr(env, msr, 1); -#if defined(DEBUG_OP) - cpu_dump_rfi(env->nip, env->msr); -#endif - /* - * No need to raise an exception here, as rfi is always the last - * insn of a TB - */ - cpu_interrupt_exittb(cs); - /* Reset the reservation */ - env->reserve_addr = -1; - - /* Context synchronizing: check if TCG TLB needs flush */ - check_tlb_flush(env, false); -} - void helper_rfi(CPUPPCState *env) { do_rfi(env, env->spr[SPR_SRR0], env->spr[SPR_SRR1] & 0xfffffffful); @@ -1328,8 +1334,10 @@ void helper_rfmci(CPUPPCState *env) /* FIXME: choose CSRR1 or MCSRR1 based on cpu type */ do_rfi(env, env->spr[SPR_BOOKE_MCSRR0], env->spr[SPR_BOOKE_MCSRR1]); } -#endif +#endif /* CONFIG_TCG */ +#endif /* !defined(CONFIG_USER_ONLY) */ +#ifdef CONFIG_TCG void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2, uint32_t flags) { @@ -1357,11 +1365,13 @@ void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2, } } #endif +#endif #if !defined(CONFIG_USER_ONLY) /*****************************************************************************/ /* PowerPC 601 specific instructions (POWER bridge) */ +#ifdef CONFIG_TCG void helper_rfsvc(CPUPPCState *env) { do_rfi(env, env->lr, env->ctr & 0x0000FFFF); @@ -1506,8 +1516,10 @@ void helper_book3s_msgsndp(CPUPPCState *env, target_ulong rb) book3s_msgsnd_common(pir, PPC_INTERRUPT_DOORBELL); } #endif +#endif /* CONFIG_TCG */ #endif +#ifdef CONFIG_TCG void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) @@ -1523,3 +1535,4 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, env->error_code = insn & 0x03FF0000; cpu_loop_exit(cs); } +#endif diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index ce0068590f..c1b98a97e9 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -21,7 +21,6 @@ #include "qemu/units.h" #include "cpu.h" #include "exec/exec-all.h" -#include "exec/helper-proto.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "sysemu/hw_accel.h" @@ -33,6 +32,10 @@ #include "mmu-book3s-v3.h" #include "helper_regs.h" +#ifdef CONFIG_TCG +#include "exec/helper-proto.h" +#endif + /* #define DEBUG_SLB */ #ifdef DEBUG_SLB @@ -97,6 +100,7 @@ void dump_slb(PowerPCCPU *cpu) } } +#ifdef CONFIG_TCG void helper_slbia(CPUPPCState *env, uint32_t ih) { PowerPCCPU *cpu = env_archcpu(env); @@ -202,6 +206,7 @@ void helper_slbieg(CPUPPCState *env, target_ulong addr) { __helper_slbie(env, addr, true); } +#endif int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot, target_ulong esid, target_ulong vsid) @@ -255,6 +260,7 @@ int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot, return 0; } +#ifdef CONFIG_TCG static int ppc_load_slb_esid(PowerPCCPU *cpu, target_ulong rb, target_ulong *rt) { @@ -348,6 +354,7 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env, target_ulong rb) } return rt; } +#endif /* Check No-Execute or Guarded Storage */ static inline int ppc_hash64_pte_noexec_guard(PowerPCCPU *cpu, @@ -1097,12 +1104,14 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong ptex, cpu->env.tlb_need_flush = TLB_NEED_GLOBAL_FLUSH | TLB_NEED_LOCAL_FLUSH; } +#ifdef CONFIG_TCG void helper_store_lpcr(CPUPPCState *env, target_ulong val) { PowerPCCPU *cpu = env_archcpu(env); ppc_store_lpcr(cpu, val); } +#endif void ppc_hash64_init(PowerPCCPU *cpu) { diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 5395e5ee5a..9339b3aa59 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -20,13 +20,11 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "cpu.h" -#include "exec/helper-proto.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "mmu-hash64.h" #include "mmu-hash32.h" #include "exec/exec-all.h" -#include "exec/cpu_ldst.h" #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" @@ -36,6 +34,10 @@ #include "mmu-book3s-v3.h" #include "mmu-radix64.h" +#ifdef CONFIG_TCG +#include "exec/helper-proto.h" +#include "exec/cpu_ldst.h" +#endif /* #define DEBUG_MMU */ /* #define DEBUG_BATS */ /* #define DEBUG_SOFTWARE_TLB */ @@ -268,6 +270,7 @@ static inline void ppc6xx_tlb_invalidate_virt(CPUPPCState *env, ppc6xx_tlb_invalidate_virt2(env, eaddr, is_code, 0); } +#ifdef CONFIG_TCG static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, int is_code, target_ulong pte0, target_ulong pte1) { @@ -286,6 +289,7 @@ static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, /* Store last way for LRU mechanism */ env->last_way = way; } +#endif static int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, MMUAccessType access_type) @@ -626,6 +630,7 @@ static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, return 0; } +#ifdef CONFIG_TCG /* Generic TLB search function for PowerPC embedded implementations */ static int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid) @@ -646,6 +651,7 @@ static int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, return ret; } +#endif /* Helpers specific to PowerPC 40x implementations */ static inline void ppc4xx_tlb_invalidate_all(CPUPPCState *env) @@ -1420,12 +1426,14 @@ static int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, return ret; } +#ifdef CONFIG_TCG static int get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx, target_ulong eaddr, MMUAccessType access_type, int type) { return get_physical_address_wtlb(env, ctx, eaddr, access_type, type, 0); } +#endif static void booke206_update_mas_tlb_miss(CPUPPCState *env, target_ulong address, MMUAccessType access_type, int mmu_idx) @@ -1709,6 +1717,7 @@ static bool ppc_jumbo_xlate(PowerPCCPU *cpu, vaddr eaddr, return false; } +#ifdef CONFIG_TCG /*****************************************************************************/ /* BATs management */ #if !defined(FLUSH_ALL_TLBS) @@ -1898,6 +1907,7 @@ void helper_store_601_batl(CPUPPCState *env, uint32_t nr, target_ulong value) #endif } } +#endif /*****************************************************************************/ /* TLB management */ @@ -1943,6 +1953,7 @@ void ppc_tlb_invalidate_all(CPUPPCState *env) } } +#ifdef CONFIG_TCG void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr) { #if !defined(FLUSH_ALL_TLBS) @@ -2912,6 +2923,7 @@ void helper_check_tlb_flush_global(CPUPPCState *env) { check_tlb_flush(env, true); } +#endif /* CONFIG_TCG */ /*****************************************************************************/ From patchwork Fri May 21 20:17:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bruno Larsen (billionai)" X-Patchwork-Id: 12273737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC2B8C04FF3 for ; Fri, 21 May 2021 20:29:54 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C184613EA for ; Fri, 21 May 2021 20:29:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C184613EA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=eldorado.org.br Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:37526 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBmL-0005zx-H7 for qemu-devel@archiver.kernel.org; Fri, 21 May 2021 16:29:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50520) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lkBcg-0007ZE-0f; Fri, 21 May 2021 16:19:54 -0400 Received: from [201.28.113.2] (port=30260 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBce-0001dV-J9; Fri, 21 May 2021 16:19:53 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 21 May 2021 17:18:19 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id BCD7A80141F; Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 8/9] target/ppc: created tcg-stub.c file Date: Fri, 21 May 2021 17:17:58 -0300 Message-Id: <20210521201759.85475-9-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0901 (UTC) FILETIME=[70FA32D0:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Created a file with stubs needed to compile disabling TCG. *_ppc_opcodes were created to make cpu_init.c have a few less ifdefs, since they are not needed. coftmmu_resize_hpt_* have to be created because the compiler can't automatically know they aren't used, but they should never be reached. Signed-off-by: Bruno Larsen (billionai) --- target/ppc/meson.build | 4 ++++ target/ppc/tcg-stub.c | 25 +++++++++++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 target/ppc/tcg-stub.c diff --git a/target/ppc/meson.build b/target/ppc/meson.build index d1aa7d5d39..848e625302 100644 --- a/target/ppc/meson.build +++ b/target/ppc/meson.build @@ -28,6 +28,10 @@ ppc_softmmu_ss.add(files( 'mmu_helper.c', 'monitor.c', )) +ppc_softmmu_ss.add(when: 'CONFIG_TCG', if_false: files( + 'tcg-stub.c' +)) + ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files( 'compat.c', 'mmu-book3s-v3.c', diff --git a/target/ppc/tcg-stub.c b/target/ppc/tcg-stub.c new file mode 100644 index 0000000000..6d99834274 --- /dev/null +++ b/target/ppc/tcg-stub.c @@ -0,0 +1,25 @@ +#include "qemu/osdep.h" +#include "cpu.h" +#include "internal.h" +#include "hw/ppc/spapr.h" + +void create_ppc_opcodes(PowerPCCPU *cpu, Error **errp) +{} + +void destroy_ppc_opcodes(PowerPCCPU *cpu) +{} + +target_ulong softmmu_resize_hpt_prepare(PowerPCCPU *cpu, + SpaprMachineState *spapr, + target_ulong shift) +{ + g_assert_not_reached(); +} + +target_ulong softmmu_resize_hpt_commit(PowerPCCPU *cpu, + SpaprMachineState *spapr, + target_ulong flags, + target_ulong shift) +{ + g_assert_not_reached(); +} From patchwork Fri May 21 20:17:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bruno Larsen (billionai)" X-Patchwork-Id: 12273723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B9DFC04FF3 for ; Fri, 21 May 2021 20:26:19 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DE590613EA for ; Fri, 21 May 2021 20:26:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DE590613EA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=eldorado.org.br Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:57186 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBiq-0008K5-7u for qemu-devel@archiver.kernel.org; Fri, 21 May 2021 16:26:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50574) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lkBci-0007g3-Cl; Fri, 21 May 2021 16:19:56 -0400 Received: from [201.28.113.2] (port=30260 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lkBch-0001dV-1G; Fri, 21 May 2021 16:19:56 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Fri, 21 May 2021 17:18:19 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id D2BA98013E3; Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 9/9] target/ppc: updated meson.build to support disable-tcg Date: Fri, 21 May 2021 17:17:59 -0300 Message-Id: <20210521201759.85475-10-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0979 (UTC) FILETIME=[710619B0:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" updated build file to not compile some sources that are unnecessary if TCG is disabled on the system. Signed-off-by: Bruno Larsen (billionai) Reviewed-by: Richard Henderson --- target/ppc/meson.build | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/target/ppc/meson.build b/target/ppc/meson.build index 848e625302..a6a53a8d5c 100644 --- a/target/ppc/meson.build +++ b/target/ppc/meson.build @@ -3,11 +3,14 @@ ppc_ss.add(files( 'cpu-models.c', 'cpu.c', 'cpu_init.c', - 'dfp_helper.c', 'excp_helper.c', - 'fpu_helper.c', 'gdbstub.c', 'helper_regs.c', +)) + +ppc_ss.add(when: 'CONFIG_TCG', if_true: files( + 'dfp_helper.c', + 'fpu_helper.c', 'int_helper.c', 'mem_helper.c', 'misc_helper.c',