From patchwork Wed Nov 28 14:50:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10702833 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3111713BB for ; Wed, 28 Nov 2018 14:51:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 225242D5B0 for ; Wed, 28 Nov 2018 14:51:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 172A72D5CD; Wed, 28 Nov 2018 14:51:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 286EB2D5B0 for ; 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Wed, 28 Nov 2018 06:50:56 -0800 (PST) Received: from baker.fritz.box ([2a02:908:125b:9a00:d565:1a37:fff0:7800]) by smtp.gmail.com with ESMTPSA id 142sm5741545wmw.27.2018.11.28.06.50.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 06:50:56 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: [PATCH libdrm 1/5] new syncobj extension v2 Date: Wed, 28 Nov 2018 15:50:51 +0100 Message-Id: <20181128145055.4178-1-christian.koenig@amd.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chunming Zhou v2: drop not implemented IOCTLs and flags Signed-off-by: Chunming Zhou Signed-off-by: Christian König --- include/drm/drm.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/include/drm/drm.h b/include/drm/drm.h index 85c685a2..34f1e3f9 100644 --- a/include/drm/drm.h +++ b/include/drm/drm.h @@ -731,6 +731,7 @@ struct drm_syncobj_handle { #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0) #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1) +#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) struct drm_syncobj_wait { __u64 handles; /* absolute timeout */ @@ -741,12 +742,32 @@ struct drm_syncobj_wait { __u32 pad; }; +struct drm_syncobj_timeline_wait { + __u64 handles; + /* wait on specific timeline point for every handles*/ + __u64 points; + /* absolute timeout */ + __s64 timeout_nsec; + __u32 count_handles; + __u32 flags; + __u32 first_signaled; /* only valid when not waiting all */ + __u32 pad; +}; + struct drm_syncobj_array { __u64 handles; __u32 count_handles; __u32 pad; }; +struct drm_syncobj_timeline_query { + __u64 handles; + /* points are timeline syncobjs payloads returned by query ioctl */ + __u64 points; + __u32 count_handles; + __u32 pad; +}; + /* Query current scanout sequence number */ struct drm_crtc_get_sequence { __u32 crtc_id; /* requested crtc_id */ @@ -903,6 +924,10 @@ extern "C" { #define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease) #define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease) +#define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait) +#define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_query) + + /** * Device specific ioctls should only be in their respective headers * The device specific ioctl range is from 0x40 to 0x9f. From patchwork Wed Nov 28 14:50:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10702841 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5BB6E13BB for ; Wed, 28 Nov 2018 14:51:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4D25D2D565 for ; Wed, 28 Nov 2018 14:51:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4BE5B2D59D; Wed, 28 Nov 2018 14:51:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0E4802D565 for ; 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Wed, 28 Nov 2018 06:50:57 -0800 (PST) Received: from baker.fritz.box ([2a02:908:125b:9a00:d565:1a37:fff0:7800]) by smtp.gmail.com with ESMTPSA id 142sm5741545wmw.27.2018.11.28.06.50.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 06:50:56 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: [PATCH libdrm 2/5] addr cs chunk for syncobj timeline Date: Wed, 28 Nov 2018 15:50:52 +0100 Message-Id: <20181128145055.4178-2-christian.koenig@amd.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20181128145055.4178-1-christian.koenig@amd.com> References: <20181128145055.4178-1-christian.koenig@amd.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chunming Zhou Signed-off-by: Chunming Zhou --- include/drm/amdgpu_drm.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h index 1ceec56d..a3c067dd 100644 --- a/include/drm/amdgpu_drm.h +++ b/include/drm/amdgpu_drm.h @@ -517,6 +517,8 @@ struct drm_amdgpu_gem_va { #define AMDGPU_CHUNK_ID_SYNCOBJ_IN 0x04 #define AMDGPU_CHUNK_ID_SYNCOBJ_OUT 0x05 #define AMDGPU_CHUNK_ID_BO_HANDLES 0x06 +#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT 0x07 +#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL 0x08 struct drm_amdgpu_cs_chunk { __u32 chunk_id; @@ -592,6 +594,13 @@ struct drm_amdgpu_cs_chunk_sem { __u32 handle; }; +struct drm_amdgpu_cs_chunk_syncobj { + __u32 handle; + __u32 flags; + __u64 point; +}; + + #define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ 0 #define AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ_FD 1 #define AMDGPU_FENCE_TO_HANDLE_GET_SYNC_FILE_FD 2 From patchwork Wed Nov 28 14:50:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10702835 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6134C13BB for ; Wed, 28 Nov 2018 14:51:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 518202D5AF for ; Wed, 28 Nov 2018 14:51:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 44F5C2D5C7; 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Wed, 28 Nov 2018 06:50:58 -0800 (PST) Received: from baker.fritz.box ([2a02:908:125b:9a00:d565:1a37:fff0:7800]) by smtp.gmail.com with ESMTPSA id 142sm5741545wmw.27.2018.11.28.06.50.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 06:50:57 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: [PATCH libdrm 3/5] add timeline wait/query ioctl v2 Date: Wed, 28 Nov 2018 15:50:53 +0100 Message-Id: <20181128145055.4178-3-christian.koenig@amd.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20181128145055.4178-1-christian.koenig@amd.com> References: <20181128145055.4178-1-christian.koenig@amd.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chunming Zhou v2: drop export/import Signed-off-by: Chunming Zhou --- xf86drm.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ xf86drm.h | 8 ++++++++ 2 files changed, 52 insertions(+) diff --git a/xf86drm.c b/xf86drm.c index 71ad54ba..afa2f466 100644 --- a/xf86drm.c +++ b/xf86drm.c @@ -4277,3 +4277,47 @@ drm_public int drmSyncobjSignal(int fd, const uint32_t *handles, ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_SIGNAL, &args); return ret; } + +drm_public int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t *points, + unsigned num_handles, + int64_t timeout_nsec, unsigned flags, + uint32_t *first_signaled) +{ + struct drm_syncobj_timeline_wait args; + int ret; + + memclear(args); + args.handles = (uintptr_t)handles; + args.points = (uint64_t)(uintptr_t)points; + args.timeout_nsec = timeout_nsec; + args.count_handles = num_handles; + args.flags = flags; + + ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT, &args); + if (ret < 0) + return -errno; + + if (first_signaled) + *first_signaled = args.first_signaled; + return ret; +} + + +drm_public int drmSyncobjQuery(int fd, uint32_t *handles, uint64_t *points, + uint32_t handle_count) +{ + struct drm_syncobj_timeline_query args; + int ret; + + memclear(args); + args.handles = (uintptr_t)handles; + args.points = (uint64_t)(uintptr_t)points; + args.count_handles = handle_count; + + ret = drmIoctl(fd, DRM_IOCTL_SYNCOBJ_QUERY, &args); + if (ret) + return ret; + return 0; +} + + diff --git a/xf86drm.h b/xf86drm.h index 7773d71a..2dae1694 100644 --- a/xf86drm.h +++ b/xf86drm.h @@ -870,11 +870,19 @@ extern int drmSyncobjFDToHandle(int fd, int obj_fd, uint32_t *handle); extern int drmSyncobjImportSyncFile(int fd, uint32_t handle, int sync_file_fd); extern int drmSyncobjExportSyncFile(int fd, uint32_t handle, int *sync_file_fd); +extern int drmSyncobjImportSyncFile2(int fd, uint32_t handle, uint64_t point, int sync_file_fd); +extern int drmSyncobjExportSyncFile2(int fd, uint32_t handle, uint64_t point, int *sync_file_fd); extern int drmSyncobjWait(int fd, uint32_t *handles, unsigned num_handles, int64_t timeout_nsec, unsigned flags, uint32_t *first_signaled); extern int drmSyncobjReset(int fd, const uint32_t *handles, uint32_t handle_count); extern int drmSyncobjSignal(int fd, const uint32_t *handles, uint32_t handle_count); +extern int drmSyncobjTimelineWait(int fd, uint32_t *handles, uint64_t *points, + unsigned num_handles, + int64_t timeout_nsec, unsigned flags, + uint32_t *first_signaled); +extern int drmSyncobjQuery(int fd, uint32_t *handles, uint64_t *points, + uint32_t handle_count); #if defined(__cplusplus) } From patchwork Wed Nov 28 14:50:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10702837 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CA22913AD for ; Wed, 28 Nov 2018 14:51:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BB2F02D5C7 for ; Wed, 28 Nov 2018 14:51:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B00532D5D3; Wed, 28 Nov 2018 14:51:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 60BBD2D5CF for ; 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Wed, 28 Nov 2018 06:50:59 -0800 (PST) Received: from baker.fritz.box ([2a02:908:125b:9a00:d565:1a37:fff0:7800]) by smtp.gmail.com with ESMTPSA id 142sm5741545wmw.27.2018.11.28.06.50.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 06:50:58 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: [PATCH libdrm 4/5] wrap syncobj timeline query/wait APIs for amdgpu v3 Date: Wed, 28 Nov 2018 15:50:54 +0100 Message-Id: <20181128145055.4178-4-christian.koenig@amd.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20181128145055.4178-1-christian.koenig@amd.com> References: <20181128145055.4178-1-christian.koenig@amd.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chunming Zhou v2: symbos are stored in lexical order. v3: drop export/import and extra query indirection Signed-off-by: Chunming Zhou Signed-off-by: Christian König --- amdgpu/amdgpu-symbol-check | 2 ++ amdgpu/amdgpu.h | 39 +++++++++++++++++++++++++++++++++++++++ amdgpu/amdgpu_cs.c | 23 +++++++++++++++++++++++ 3 files changed, 64 insertions(+) diff --git a/amdgpu/amdgpu-symbol-check b/amdgpu/amdgpu-symbol-check index 6f5e0f95..4553736f 100755 --- a/amdgpu/amdgpu-symbol-check +++ b/amdgpu/amdgpu-symbol-check @@ -49,8 +49,10 @@ amdgpu_cs_submit amdgpu_cs_submit_raw amdgpu_cs_syncobj_export_sync_file amdgpu_cs_syncobj_import_sync_file +amdgpu_cs_syncobj_query amdgpu_cs_syncobj_reset amdgpu_cs_syncobj_signal +amdgpu_cs_syncobj_timeline_wait amdgpu_cs_syncobj_wait amdgpu_cs_wait_fences amdgpu_cs_wait_semaphore diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h index dc51659a..330658a0 100644 --- a/amdgpu/amdgpu.h +++ b/amdgpu/amdgpu.h @@ -1489,6 +1489,45 @@ int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev, int64_t timeout_nsec, unsigned flags, uint32_t *first_signaled); +/** + * Wait for one or all sync objects on their points to signal. + * + * \param dev - \c [in] self-explanatory + * \param handles - \c [in] array of sync object handles + * \param points - \c [in] array of sync points to wait + * \param num_handles - \c [in] self-explanatory + * \param timeout_nsec - \c [in] self-explanatory + * \param flags - \c [in] a bitmask of DRM_SYNCOBJ_WAIT_FLAGS_* + * \param first_signaled - \c [in] self-explanatory + * + * \return 0 on success\n + * -ETIME - Timeout + * <0 - Negative POSIX Error code + * + */ +int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev, + uint32_t *handles, uint64_t *points, + unsigned num_handles, + int64_t timeout_nsec, unsigned flags, + uint32_t *first_signaled); +/** + * Query sync objects payloads. + * + * \param dev - \c [in] self-explanatory + * \param handles - \c [in] array of sync object handles + * \param points - \c [out] array of sync points returned, which presents + * syncobj payload. + * \param num_handles - \c [in] self-explanatory + * + * \return 0 on success\n + * -ETIME - Timeout + * <0 - Negative POSIX Error code + * + */ +int amdgpu_cs_syncobj_query(amdgpu_device_handle dev, + uint32_t *handles, uint64_t *points, + unsigned num_handles); + /** * Export kernel sync object to shareable fd. * diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c index 3b8231aa..e4a547c6 100644 --- a/amdgpu/amdgpu_cs.c +++ b/amdgpu/amdgpu_cs.c @@ -661,6 +661,29 @@ drm_public int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev, flags, first_signaled); } +drm_public int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev, + uint32_t *handles, uint64_t *points, + unsigned num_handles, + int64_t timeout_nsec, unsigned flags, + uint32_t *first_signaled) +{ + if (NULL == dev) + return -EINVAL; + + return drmSyncobjTimelineWait(dev->fd, handles, points, num_handles, + timeout_nsec, flags, first_signaled); +} + +drm_public int amdgpu_cs_syncobj_query(amdgpu_device_handle dev, + uint32_t *handles, uint64_t *points, + unsigned num_handles) +{ + if (NULL == dev) + return -EINVAL; + + return drmSyncobjQuery(dev->fd, handles, points, num_handles); +} + drm_public int amdgpu_cs_export_syncobj(amdgpu_device_handle dev, uint32_t handle, int *shared_fd) From patchwork Wed Nov 28 14:50:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10702839 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3E15213AD for ; Wed, 28 Nov 2018 14:51:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E7E42D5B0 for ; Wed, 28 Nov 2018 14:51:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2CDB62D5D1; Wed, 28 Nov 2018 14:51:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 61A6F2D5CF for ; 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Wed, 28 Nov 2018 06:51:00 -0800 (PST) Received: from baker.fritz.box ([2a02:908:125b:9a00:d565:1a37:fff0:7800]) by smtp.gmail.com with ESMTPSA id 142sm5741545wmw.27.2018.11.28.06.50.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 06:51:00 -0800 (PST) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: [PATCH libdrm 5/5] add syncobj timeline tests v2 Date: Wed, 28 Nov 2018 15:50:55 +0100 Message-Id: <20181128145055.4178-5-christian.koenig@amd.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20181128145055.4178-1-christian.koenig@amd.com> References: <20181128145055.4178-1-christian.koenig@amd.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chunming Zhou v2: drop DRM_SYNCOBJ_CREATE_TYPE_TIMELINE, fix timeout calculation, fix some warnings Signed-off-by: Chunming Zhou Signed-off-by: Christian König --- tests/amdgpu/Makefile.am | 3 +- tests/amdgpu/amdgpu_test.c | 12 ++ tests/amdgpu/amdgpu_test.h | 21 ++++ tests/amdgpu/meson.build | 2 +- tests/amdgpu/syncobj_tests.c | 266 +++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 302 insertions(+), 2 deletions(-) create mode 100644 tests/amdgpu/syncobj_tests.c diff --git a/tests/amdgpu/Makefile.am b/tests/amdgpu/Makefile.am index 447ff217..d3fbe2bb 100644 --- a/tests/amdgpu/Makefile.am +++ b/tests/amdgpu/Makefile.am @@ -33,4 +33,5 @@ amdgpu_test_SOURCES = \ vcn_tests.c \ uve_ib.h \ deadlock_tests.c \ - vm_tests.c + vm_tests.c \ + syncobj_tests.c diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c index ebf44098..ff1448f3 100644 --- a/tests/amdgpu/amdgpu_test.c +++ b/tests/amdgpu/amdgpu_test.c @@ -56,6 +56,7 @@ #define UVD_ENC_TESTS_STR "UVD ENC Tests" #define DEADLOCK_TESTS_STR "Deadlock Tests" #define VM_TESTS_STR "VM Tests" +#define SYNCOBJ_TIMELINE_TESTS_STR "SYNCOBJ TIMELINE Tests" /** * Open handles for amdgpu devices @@ -116,6 +117,12 @@ static CU_SuiteInfo suites[] = { .pCleanupFunc = suite_vm_tests_clean, .pTests = vm_tests, }, + { + .pName = SYNCOBJ_TIMELINE_TESTS_STR, + .pInitFunc = suite_syncobj_timeline_tests_init, + .pCleanupFunc = suite_syncobj_timeline_tests_clean, + .pTests = syncobj_timeline_tests, + }, CU_SUITE_INFO_NULL, }; @@ -165,6 +172,11 @@ static Suites_Active_Status suites_active_stat[] = { .pName = VM_TESTS_STR, .pActive = suite_vm_tests_enable, }, + { + .pName = SYNCOBJ_TIMELINE_TESTS_STR, + .pActive = suite_syncobj_timeline_tests_enable, + }, + }; diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h index af81eea8..24d64b64 100644 --- a/tests/amdgpu/amdgpu_test.h +++ b/tests/amdgpu/amdgpu_test.h @@ -194,6 +194,27 @@ CU_BOOL suite_vm_tests_enable(void); */ extern CU_TestInfo vm_tests[]; +/** + * Initialize syncobj timeline test suite + */ +int suite_syncobj_timeline_tests_init(); + +/** + * Deinitialize syncobj timeline test suite + */ +int suite_syncobj_timeline_tests_clean(); + +/** + * Decide if the suite is enabled by default or not. + */ +CU_BOOL suite_syncobj_timeline_tests_enable(void); + +/** + * Tests in syncobj timeline test suite + */ +extern CU_TestInfo syncobj_timeline_tests[]; + + /** * Helper functions */ diff --git a/tests/amdgpu/meson.build b/tests/amdgpu/meson.build index 4c1237c6..3ceec715 100644 --- a/tests/amdgpu/meson.build +++ b/tests/amdgpu/meson.build @@ -24,7 +24,7 @@ if dep_cunit.found() files( 'amdgpu_test.c', 'basic_tests.c', 'bo_tests.c', 'cs_tests.c', 'vce_tests.c', 'uvd_enc_tests.c', 'vcn_tests.c', 'deadlock_tests.c', - 'vm_tests.c', + 'vm_tests.c', 'syncobj_tests.c', ), dependencies : [dep_cunit, dep_threads], include_directories : [inc_root, inc_drm, include_directories('../../amdgpu')], diff --git a/tests/amdgpu/syncobj_tests.c b/tests/amdgpu/syncobj_tests.c new file mode 100644 index 00000000..cbe9394c --- /dev/null +++ b/tests/amdgpu/syncobj_tests.c @@ -0,0 +1,266 @@ +/* + * Copyright 2017 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * +*/ + +#include "CUnit/Basic.h" + +#include "amdgpu_test.h" +#include "amdgpu_drm.h" +#include "amdgpu_internal.h" +#include + +static amdgpu_device_handle device_handle; +static uint32_t major_version; +static uint32_t minor_version; + +static void amdgpu_syncobj_timeline_test(void); + +CU_BOOL suite_syncobj_timeline_tests_enable(void) +{ + return CU_TRUE; +} + +int suite_syncobj_timeline_tests_init(void) +{ + int r; + + r = amdgpu_device_initialize(drm_amdgpu[0], &major_version, + &minor_version, &device_handle); + + if (r) { + if ((r == -EACCES) && (errno == EACCES)) + printf("\n\nError:%s. " + "Hint:Try to run this test program as root.", + strerror(errno)); + return CUE_SINIT_FAILED; + } + + return CUE_SUCCESS; +} + +int suite_syncobj_timeline_tests_clean(void) +{ + int r = amdgpu_device_deinitialize(device_handle); + + if (r == 0) + return CUE_SUCCESS; + else + return CUE_SCLEAN_FAILED; +} + + +CU_TestInfo syncobj_timeline_tests[] = { + { "syncobj timeline test", amdgpu_syncobj_timeline_test }, + CU_TEST_INFO_NULL, +}; + +#define GFX_COMPUTE_NOP 0xffff1000 +#define SDMA_NOP 0x0 +static int syncobj_command_submission_helper(uint32_t syncobj_handle, bool + wait_or_signal, uint64_t point) +{ + amdgpu_context_handle context_handle; + amdgpu_bo_handle ib_result_handle; + void *ib_result_cpu; + uint64_t ib_result_mc_address; + struct drm_amdgpu_cs_chunk chunks[2]; + struct drm_amdgpu_cs_chunk_data chunk_data; + struct drm_amdgpu_cs_chunk_syncobj syncobj_data; + struct amdgpu_cs_fence fence_status; + amdgpu_bo_list_handle bo_list; + amdgpu_va_handle va_handle; + uint32_t expired, flags; + int i, r; + uint64_t seq_no; + static uint32_t *ptr; + + r = amdgpu_cs_ctx_create(device_handle, &context_handle); + CU_ASSERT_EQUAL(r, 0); + + r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096, + AMDGPU_GEM_DOMAIN_GTT, 0, + &ib_result_handle, &ib_result_cpu, + &ib_result_mc_address, &va_handle); + CU_ASSERT_EQUAL(r, 0); + + r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL, + &bo_list); + CU_ASSERT_EQUAL(r, 0); + + ptr = ib_result_cpu; + + for (i = 0; i < 16; ++i) + ptr[i] = wait_or_signal ? GFX_COMPUTE_NOP: SDMA_NOP; + + chunks[0].chunk_id = AMDGPU_CHUNK_ID_IB; + chunks[0].length_dw = sizeof(struct drm_amdgpu_cs_chunk_ib) / 4; + chunks[0].chunk_data = (uint64_t)(uintptr_t)&chunk_data; + chunk_data.ib_data._pad = 0; + chunk_data.ib_data.va_start = ib_result_mc_address; + chunk_data.ib_data.ib_bytes = 16 * 4; + chunk_data.ib_data.ip_type = wait_or_signal ? AMDGPU_HW_IP_GFX : + AMDGPU_HW_IP_DMA; + chunk_data.ib_data.ip_instance = 0; + chunk_data.ib_data.ring = 0; + chunk_data.ib_data.flags = 0; + + chunks[1].chunk_id = wait_or_signal ? + AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT : + AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL; + chunks[1].length_dw = sizeof(struct drm_amdgpu_cs_chunk_syncobj) / 4; + chunks[1].chunk_data = (uint64_t)(uintptr_t)&syncobj_data; + syncobj_data.handle = syncobj_handle; + syncobj_data.point = point; + syncobj_data.flags = DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT; + + r = amdgpu_cs_submit_raw(device_handle, + context_handle, + bo_list, + 2, + chunks, + &seq_no); + CU_ASSERT_EQUAL(r, 0); + + + memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence)); + fence_status.context = context_handle; + fence_status.ip_type = wait_or_signal ? AMDGPU_HW_IP_GFX: + AMDGPU_HW_IP_DMA; + fence_status.ip_instance = 0; + fence_status.ring = 0; + fence_status.fence = seq_no; + + r = amdgpu_cs_query_fence_status(&fence_status, + AMDGPU_TIMEOUT_INFINITE,0, &expired); + CU_ASSERT_EQUAL(r, 0); + + r = amdgpu_bo_list_destroy(bo_list); + CU_ASSERT_EQUAL(r, 0); + + r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle, + ib_result_mc_address, 4096); + CU_ASSERT_EQUAL(r, 0); + + r = amdgpu_cs_ctx_free(context_handle); + CU_ASSERT_EQUAL(r, 0); + + return r; +} + +struct syncobj_point { + uint32_t syncobj_handle; + uint64_t point; +}; + +static void *syncobj_wait(void *data) +{ + struct syncobj_point *sp = (struct syncobj_point *)data; + int r; + + r = syncobj_command_submission_helper(sp->syncobj_handle, true, + sp->point); + CU_ASSERT_EQUAL(r, 0); + + return (void *)(long)r; +} + +static void *syncobj_signal(void *data) +{ + struct syncobj_point *sp = (struct syncobj_point *)data; + int r; + + r = syncobj_command_submission_helper(sp->syncobj_handle, false, + sp->point); + CU_ASSERT_EQUAL(r, 0); + + return (void *)(long)r; +} + +static void amdgpu_syncobj_timeline_test(void) +{ + static pthread_t wait_thread; + static pthread_t signal_thread; + static pthread_t c_thread; + struct syncobj_point sp1, sp2, sp3; + uint32_t syncobj_handle; + uint64_t payload; + uint64_t wait_point; + uint64_t timeout; + struct timespec tp; + int r; + void *tmp; + + r = amdgpu_cs_create_syncobj2(device_handle, 0, &syncobj_handle); + CU_ASSERT_EQUAL(r, 0); + + // wait on point 5 + sp1.syncobj_handle = syncobj_handle; + sp1.point = 5; + r = pthread_create(&wait_thread, NULL, syncobj_wait, &sp1); + CU_ASSERT_EQUAL(r, 0); + + // signal on point 10 + sp2.syncobj_handle = syncobj_handle; + sp2.point = 10; + r = pthread_create(&signal_thread, NULL, syncobj_signal, &sp2); + CU_ASSERT_EQUAL(r, 0); + + r = pthread_join(wait_thread, &tmp); + CU_ASSERT_EQUAL(r, 0); + CU_ASSERT_EQUAL(tmp, 0); + + r = pthread_join(signal_thread, &tmp); + CU_ASSERT_EQUAL(r, 0); + CU_ASSERT_EQUAL(tmp, 0); + + //query timeline payload + r = amdgpu_cs_syncobj_query(device_handle, &syncobj_handle, + &payload, 1); + CU_ASSERT_EQUAL(r, 0); + CU_ASSERT_EQUAL(payload, 10); + + //signal on point 16 + sp3.syncobj_handle = syncobj_handle; + sp3.point = 16; + r = pthread_create(&c_thread, NULL, syncobj_signal, &sp3); + CU_ASSERT_EQUAL(r, 0); + //CPU wait on point 16 + wait_point = 16; + timeout = 0; + clock_gettime(CLOCK_MONOTONIC, &tp); + timeout = tp.tv_sec * 1000000000ULL + tp.tv_nsec; + timeout += 0x10000000000; //10s + r = amdgpu_cs_syncobj_timeline_wait(device_handle, &syncobj_handle, + &wait_point, 1, timeout, + DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL | + DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT, + NULL); + + CU_ASSERT_EQUAL(r, 0); + r = pthread_join(c_thread, &tmp); + CU_ASSERT_EQUAL(r, 0); + CU_ASSERT_EQUAL(tmp, 0); + + r = amdgpu_cs_destroy_syncobj(device_handle, syncobj_handle); + CU_ASSERT_EQUAL(r, 0); + +}