From patchwork Mon May 24 18:27:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sven Peter X-Patchwork-Id: 12277403 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-22.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7464BC2B9F7 for ; Tue, 25 May 2021 00:49:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 327D3613BF for ; Tue, 25 May 2021 00:49:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 327D3613BF Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=svenpeter.dev Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VGJ4XFjZCTeLh5pEoyKDNVDLbIQuR/rhSDXQEKIGmnw=; b=iqtiRKNOpqcBhy UrY2mJJ0a4ksD+NkleO/N3bu1DnlM5AdD6qneADiv/MCPRs8iofgDT9pqz8lX91tX1cAoR7qXplTP jCfsOr8TgexQrcV/bZAyARrUJNLmfOTQ4Xc8c2YVgPSEncemGS2CoQYxVgCE8Blo2RGx+F5t7q9NK +OcnSjf84FSZY9oHcBfPRWLFni34lO976RBauHIopbsioCnWEyMjXlv0ZOnYnUzc/WknZpzT/UZgZ jk+gOaEBVLKFPmxd8fpHPArndCeVzlExyVwJ/fYFAtfvL0nBmNncGTD+YoNsjGfFakxHoEUwMrvZg K7chjgGDVrq3ZYOqpf9g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llLDg-002d3Z-0u; Tue, 25 May 2021 00:46:53 +0000 Received: from new3-smtp.messagingengine.com ([66.111.4.229]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1llFJ7-001SJV-PU for linux-arm-kernel@lists.infradead.org; Mon, 24 May 2021 18:28:07 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailnew.nyi.internal (Postfix) with ESMTP id 74F56581E72; Mon, 24 May 2021 14:28:00 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Mon, 24 May 2021 14:28:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svenpeter.dev; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=LwSKq/ex842eG i/egnj5f1CpSQ34FFJ9YcYzjun5nOQ=; b=2MVTAWaPVPvNHvFg2rYWvao0Ur3wo ATIE+7KWNKWNA+F+sKfMXbkH2tMQXSUDsvFrSPi39VDZ10GxwMk34ddLQ/G3vN88 LiXqwIA+pgD5WLNydG0z0ZNxz6LRIyzDiLytVNM3UvJt59hFZEueb+bc/Ln77Aby isvHPE7idQ9WuJ8nNRdWroUo7gQtzstmdQ4w3rGusuhUSch+yIBlr85toK6KK0Iv 1j3sf3YvK1dFlsCdicBA+tKJc++tUHCFNsTncyZmT8obdrTLYPkouQm/HT68OmH6 WukCJPSEM7eGwz6bAOWH3z88KeKT14azDfkAukB20IvvbF8N+0faKwcww== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=LwSKq/ex842eGi/egnj5f1CpSQ34FFJ9YcYzjun5nOQ=; b=jaETDRqV GFXmd92DPk5LEAYmrFUMayOm2reliCekKQaKQLuhqeyIweALc5GnoTpTNiN4sAbD N5h5U8gYbycPEZtk1Jy6QVKxnefdN0Jzm3hk5fF7A5XD0LRTD7n/DUmxXxNkbcHA GMamD92SzXBIxRwFGwVytpCqsS+Fpa2eMFiS6cYvJ0Vu48J0RhpRITUW8HUO8HYD bLeWBdvdPC3MOkvhW+kjtBbYuqxSGa2rmrmBYhOuGEKzOD2msUXr4JjriahsIPtr ShaNZprd5lYyuXDY5KHRjfCoQ2He4sUOPjwuElzOmI0TeXxA1y96rJ2Hij238nWV 7OJ76bjjq2Ux+Q== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvdejledguddvjecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufhvvghn ucfrvghtvghruceoshhvvghnsehsvhgvnhhpvghtvghrrdguvghvqeenucggtffrrghtth gvrhhnpeefgefhgeelhefhtedvuddvudehffffgffftedugeeufeevtdegudfhjeeuieeu hfenucffohhmrghinhepuggvvhhitggvthhrvggvrdhorhhgpdhgihhthhhusgdrtghomh dpfhhrvggvnhhouggvrdhnvghtnecukfhppedujeeirdduleelrddvuddurdduvdegnecu vehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepshhvvghnse hsvhgvnhhpvghtvghrrdguvghv X-ME-Proxy: Received: from photon.s7r42.com (ip-176-199-211-124.hsi06.unitymediagroup.de [176.199.211.124]) by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 24 May 2021 14:27:58 -0400 (EDT) From: Sven Peter To: devicetree@vger.kernel.org, linux-clk@vger.kernel.org Cc: Sven Peter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hector Martin , Michael Turquette , Rob Herring , Stephen Boyd , Mark Kettenis , Arnd Bergmann Subject: [PATCH 1/3] dt-bindings: clock: add DT bindings for apple,gate-clock Date: Mon, 24 May 2021 20:27:43 +0200 Message-Id: <20210524182745.22923-2-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) In-Reply-To: <20210524182745.22923-1-sven@svenpeter.dev> References: <20210524182745.22923-1-sven@svenpeter.dev> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_112806_034355_82775D01 X-CRM114-Status: GOOD ( 14.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org These gated clocks are found on Apple SoCs, such as the M1, and are required to enable access to MMIO regions of various peripherals. Signed-off-by: Sven Peter --- .../bindings/clock/apple,gate-clock.yaml | 60 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/apple,gate-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/apple,gate-clock.yaml b/Documentation/devicetree/bindings/clock/apple,gate-clock.yaml new file mode 100644 index 000000000000..3aae47c40b42 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/apple,gate-clock.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/apple,gate-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Binding for Apple clock gates + +maintainers: + - Sven Peter + +description: | + Apple SoC's such as the M1 contain various clock gates. + These clock gates do not have a frequency associated with them and are only + used to power on/off various peripherals. Generally, a clock gate needs to + be enabled before the respective MMIO region can be accessed. + + Each clock gate is configured by a single 32bit MMIO register which contains + the actual and the target state. The state is encoded as four bits but + right now only "powered on" / 0b1111 and "powered off" / 0b0000 are used. + + +properties: + compatible: + enum: + - apple,t8103-gate-clock + - apple,gate-clock + + "#clock-cells": + const: 0 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + clock-output-names: + maxItems: 1 + +required: + - compatible + - reg + - clock-output-names + - "#clock-cells" + +additionalProperties: false + +examples: + - | + clock@3b7001c0 { + compatible = "apple,t8103-gate-clock"; + reg = <0x3b7001c0 0x4>; + #clock-cells = <0>; + clock-output-names = "sio_busif_clk"; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 008fcad7ac00..59c026ce4d73 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1654,6 +1654,7 @@ B: https://github.com/AsahiLinux/linux/issues C: irc://chat.freenode.net/asahi-dev T: git https://github.com/AsahiLinux/linux.git F: Documentation/devicetree/bindings/arm/apple.yaml +F: Documentation/devicetree/bindings/clock/apple,gate-clock.yaml F: Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml F: arch/arm64/boot/dts/apple/ F: drivers/irqchip/irq-apple-aic.c From patchwork Mon May 24 18:27:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sven Peter X-Patchwork-Id: 12277409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2D0CC2B9F7 for ; Tue, 25 May 2021 00:52:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E92C613BF for ; Tue, 25 May 2021 00:52:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E92C613BF Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=svenpeter.dev Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZKywSgHSRVNGsojN1ZR9+KMN0TiH7MzQyXD/v1EJmhw=; b=sv5QCx/Jo8mc7P Bl9K5jxw7SwbhH5CBleQvigQoTXnQkjhRaGD8k+9rpPbGqo3c3PUV8vZT88zjMCU7dA4IZFCPZg0w 0CXt2kXUzf5gwLTJEZkKpFTP9/QKZJXoD9jnjXPU5OWKpUsSDFY4gqiY2b47FlX/EbKWsaZw3v/mV FT+F3vxbnfr4E5RhoJuzKHkC97eZBlomsV7cS/5y1NXgng7gBCNSJBVa3ozgNU4E2iyB5ytMH4pC6 IyWu7xyQFirX2Tkp+uEwANZDay5Jk9wKL6mahkO5bqQGJ6ysXOWfcFg+MTltjA4Bgk/ClrkKZrNhz yikUvKybszuBpYpQ5Tyg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llLH8-002di1-CS; Tue, 25 May 2021 00:50:27 +0000 Received: from new3-smtp.messagingengine.com ([66.111.4.229]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1llFJ7-001SJq-PI for linux-arm-kernel@lists.infradead.org; Mon, 24 May 2021 18:28:09 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailnew.nyi.internal (Postfix) with ESMTP id 501B6581E78; Mon, 24 May 2021 14:28:02 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Mon, 24 May 2021 14:28:02 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svenpeter.dev; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=tUG8E8y1qF72Z 2wc4W2MFpiXtVOxUG4yzQDw5VhB6r8=; b=p3WaX6fr19fhNWEztsLyK+0iDt/Aj wq0vgRm5r2gwPIHPA3tp1H/aDjPVp3v9nuzR4vXRO38fHY7NtsX80JzF9P/lGR8/ 530/an0vTDWVq2r9lwoEC586rRj5sWKI8fmhR781o3rtPhwieT6BV6FKDg9WP1BJ mSPTMcadouUgcy2KoI83EdoTRSZexaDy0v36ZUdR36bLw090QO2n9Rp83hvSG5Rk HoaDlLa+GfTUMVm8BTALkSABsygpAbmVg6KLGe1TG7CHH0RaRBszKMJI+8yXi0od 2yAqkVyDE0d/UaQortH0gsUskGEd55edu2vlFPii/O3GvjCMslm2Y+ZzQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=tUG8E8y1qF72Z2wc4W2MFpiXtVOxUG4yzQDw5VhB6r8=; b=mYnTIV4Q Fmiphzl52G+ra5Z+agtLQ32rpMbeFlj+7cCNbtufbR54dznOuI+xGZdhEfbsKULv uuKZgkCFwSmQti403fXBvHG8D8p1EvIp2nDsBr3pa0JSsKVler3UcZERN4OJE2To E11mugyOQ5oIuIJMuPRljkYla9/uPTVFgF86Nq+CgDsosuvugcy3GxUvrPaBOJkt YSX8yN1ATcGaEm1grqXFO4P2ysZZKUAV9v413YoZCphHcVnXBRF5NoU/j04Ouqxk I4AGVYnhRnqZ12yzxJ897Hk4ZckfUT37DFxbgf8G1uKZhXR44VEVLu2SaOHufttL REdEu/ounWBkkg== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvdejledguddvjecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufhvvghn ucfrvghtvghruceoshhvvghnsehsvhgvnhhpvghtvghrrdguvghvqeenucggtffrrghtth gvrhhnpeetvdekteeluefffffhkeetteffgefggfevheeileeufedvtdeuffevveelhfef jeenucfkphepudejiedrudelledrvdduuddruddvgeenucevlhhushhtvghrufhiiigvpe dtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehsvhgvnhesshhvvghnphgvthgvrhdruggv vh X-ME-Proxy: Received: from photon.s7r42.com (ip-176-199-211-124.hsi06.unitymediagroup.de [176.199.211.124]) by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 24 May 2021 14:28:00 -0400 (EDT) From: Sven Peter To: devicetree@vger.kernel.org, linux-clk@vger.kernel.org Cc: Sven Peter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hector Martin , Michael Turquette , Rob Herring , Stephen Boyd , Mark Kettenis , Arnd Bergmann Subject: [PATCH 2/3] clk: add support for gate clocks on Apple SoCs Date: Mon, 24 May 2021 20:27:44 +0200 Message-Id: <20210524182745.22923-3-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) In-Reply-To: <20210524182745.22923-1-sven@svenpeter.dev> References: <20210524182745.22923-1-sven@svenpeter.dev> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_112806_031363_46CFC3E6 X-CRM114-Status: GOOD ( 24.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a simple driver for gate clocks found on Apple SoCs. These don't have any frequency associated with them and are only used to enable access to MMIO regions of various peripherals. Signed-off-by: Sven Peter --- MAINTAINERS | 1 + drivers/clk/Kconfig | 12 +++ drivers/clk/Makefile | 1 + drivers/clk/clk-apple-gate.c | 152 +++++++++++++++++++++++++++++++++++ 4 files changed, 166 insertions(+) create mode 100644 drivers/clk/clk-apple-gate.c diff --git a/MAINTAINERS b/MAINTAINERS index 59c026ce4d73..4b5d8e7a0fbc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1657,6 +1657,7 @@ F: Documentation/devicetree/bindings/arm/apple.yaml F: Documentation/devicetree/bindings/clock/apple,gate-clock.yaml F: Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml F: arch/arm64/boot/dts/apple/ +F: drivers/clk/clk-apple-gate.c F: drivers/irqchip/irq-apple-aic.c F: include/dt-bindings/interrupt-controller/apple-aic.h diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index e80918be8e9c..ac987a8cf318 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -245,6 +245,18 @@ config CLK_TWL6040 McPDM. McPDM module is using the external bit clock on the McPDM bus as functional clock. +config COMMON_CLK_APPLE + tristate "Clock driver for Apple platforms" + depends on ARCH_APPLE && COMMON_CLK + default ARCH_APPLE + help + Support for clock gates on Apple SoCs such as the M1. + + These clock gates do not have a frequency associated with them and + are only used to power on/off various peripherals. Generally, a clock + gate needs to be enabled before the respective MMIO region can be + accessed. + config COMMON_CLK_AXI_CLKGEN tristate "AXI clkgen driver" depends on HAS_IOMEM || COMPILE_TEST diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 5f06879d7fe9..ba73960694e3 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -18,6 +18,7 @@ endif # hardware specific clock types # please keep this section sorted lexicographically by file path name +obj-$(CONFIG_COMMON_CLK_APPLE) += clk-apple-gate.o obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o diff --git a/drivers/clk/clk-apple-gate.c b/drivers/clk/clk-apple-gate.c new file mode 100644 index 000000000000..799e9269758f --- /dev/null +++ b/drivers/clk/clk-apple-gate.c @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Apple SoC clock/power gating driver + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CLOCK_TARGET_MODE_MASK 0x0f +#define CLOCK_TARGET_MODE(m) (((m)&0xf)) +#define CLOCK_ACTUAL_MODE_MASK 0xf0 +#define CLOCK_ACTUAL_MODE(m) (((m)&0xf) << 4) + +#define CLOCK_MODE_ENABLE 0xf +#define CLOCK_MODE_DISABLE 0 + +#define CLOCK_ENDISABLE_TIMEOUT 100 + +struct apple_clk_gate { + struct clk_hw hw; + void __iomem *reg; +}; + +#define to_apple_clk_gate(_hw) container_of(_hw, struct apple_clk_gate, hw) + +static int apple_clk_gate_endisable(struct clk_hw *hw, int enable) +{ + struct apple_clk_gate *gate = to_apple_clk_gate(hw); + u32 reg; + u32 mode; + + if (enable) + mode = CLOCK_MODE_ENABLE; + else + mode = CLOCK_MODE_DISABLE; + + reg = readl(gate->reg); + reg &= ~CLOCK_TARGET_MODE_MASK; + reg |= CLOCK_TARGET_MODE(mode); + writel(reg, gate->reg); + + return readl_poll_timeout_atomic(gate->reg, reg, + (reg & CLOCK_ACTUAL_MODE_MASK) == + CLOCK_ACTUAL_MODE(mode), + 1, CLOCK_ENDISABLE_TIMEOUT); +} + +static int apple_clk_gate_enable(struct clk_hw *hw) +{ + return apple_clk_gate_endisable(hw, 1); +} + +static void apple_clk_gate_disable(struct clk_hw *hw) +{ + apple_clk_gate_endisable(hw, 0); +} + +static int apple_clk_gate_is_enabled(struct clk_hw *hw) +{ + struct apple_clk_gate *gate = to_apple_clk_gate(hw); + u32 reg; + + reg = readl(gate->reg); + + if ((reg & CLOCK_ACTUAL_MODE_MASK) == CLOCK_ACTUAL_MODE(CLOCK_MODE_ENABLE)) + return 1; + return 0; +} + +static const struct clk_ops apple_clk_gate_ops = { + .enable = apple_clk_gate_enable, + .disable = apple_clk_gate_disable, + .is_enabled = apple_clk_gate_is_enabled, +}; + +static int apple_gate_clk_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + const struct clk_parent_data parent_data[] = { + { .index = 0 }, + }; + struct apple_clk_gate *data; + struct clk_hw *hw; + struct clk_init_data init; + struct resource *res; + int num_parents; + int ret; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + data->reg = devm_ioremap_resource(dev, res); + if (IS_ERR(data->reg)) + return PTR_ERR(data->reg); + + num_parents = of_clk_get_parent_count(node); + if (num_parents > 1) { + dev_err(dev, "clock supports at most one parent\n"); + return -EINVAL; + } + + init.name = dev->of_node->name; + init.ops = &apple_clk_gate_ops; + init.flags = 0; + init.parent_names = NULL; + init.parent_data = parent_data; + init.num_parents = num_parents; + + data->hw.init = &init; + hw = &data->hw; + + ret = devm_clk_hw_register(dev, hw); + if (ret) + return ret; + + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw); +} + +static const struct of_device_id apple_gate_clk_of_match[] = { + { .compatible = "apple,t8103-gate-clock" }, + { .compatible = "apple,gate-clock" }, + {} +}; + +MODULE_DEVICE_TABLE(of, apple_gate_clk_of_match); + +static struct platform_driver apple_gate_clkdriver = { + .probe = apple_gate_clk_probe, + .driver = { + .name = "apple-gate-clock", + .of_match_table = apple_gate_clk_of_match, + }, +}; + +MODULE_AUTHOR("Sven Peter "); +MODULE_DESCRIPTION("Clock gating driver for Apple SoCs"); +MODULE_LICENSE("GPL v2"); + +module_platform_driver(apple_gate_clkdriver); From patchwork Mon May 24 18:27:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sven Peter X-Patchwork-Id: 12277407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9689FC2B9F7 for ; Tue, 25 May 2021 00:51:11 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4CB6C613BF for ; Tue, 25 May 2021 00:51:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4CB6C613BF Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=svenpeter.dev Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wshz38v13Y+KteEguIgIoGZBhwd6jo9lFrLOx5gmI0k=; b=KAYDj762r6Th06 qDvKBzymtVYaglULh8dpMOnfi1/fsD5xhDNWKJUAxdcl5NotMnherfly9fviI6n/YrgBAayTC03uZ EsfWTsSbtz244cMaY3HZl66TX2TMqYJCfodEDs77u/n7a3nHxOuL7EI0oynDdWyVwnS09V2pjyDTi r1NstUHbdUbe3uSmBL0Qxq+bcogh8NcgFRoEz9u+2ZyD22W21Pjzi9tSbO5TNpeubpuY/TDarTM1N +LUd5mqeAy7NbXvuwpftLhPUiWoVZavTJIn0DLG/wi1Q6pqFJbR4IV1gIhQIeeJdTWA+B6ZbQoRFc RLRodCmsx4QWjbBxeGfw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llLFn-002dS1-C3; Tue, 25 May 2021 00:49:06 +0000 Received: from new3-smtp.messagingengine.com ([66.111.4.229]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1llFJ8-001SKV-1D for linux-arm-kernel@lists.infradead.org; Mon, 24 May 2021 18:28:09 +0000 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailnew.nyi.internal (Postfix) with ESMTP id 4765F581E77; Mon, 24 May 2021 14:28:05 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Mon, 24 May 2021 14:28:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svenpeter.dev; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=2fewIY8SSeOIN MWuX04BZLhEUB7cqd8i9hwPLOWHdeY=; b=r4g5LIrUfm4HTwFGDPybjTlZaIJoC u0g4bgplBwxMKrR0W2ts+TzDqCGMiBjPHqGMkcLgkZocztyJfERxVKTJsIusONe3 LrZoCtN5gEwc3yoLDBelZOjGAeHyAFrstz9k7sn1Hcj6MTKkgM/TRIhTSiD32C3I ACDYN/lQCEz3DGEb1rgGrcBoqWSfeR7DHL3QBUnkQ3PJV8brIRL7lmOuQPIaZn9M /eVWRWDanRwrms6hKKWIQLfDhXkjVEKxLgy9Nm2IBex3SlV18MRfhOAUPyZVTALK W6xQartIELHA+dgGKYf2g8GrJ74JbtvgwtaJjcvJG/Ao0TvS2mBh3BRgA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=2fewIY8SSeOINMWuX04BZLhEUB7cqd8i9hwPLOWHdeY=; b=Bdh4cKCJ 6B/+t4L2ERzwEv/DNZle7PnXB5ogDZA2XAkZQ94VvVJIgni1HmtzXyEEwnWj5t7/ mO1vuJEmRYnVxx7TW/27y6gG0gkrvAQKxKg1auxUmrEBcT0X/XcREFj7E1g8w+nP YpK0ZI+gdwXANayau9Ku4aMw55+94tIw0BD0jQmRLE5//HGWYwypTQ2MQ91vR4+f tkb8E9miSwjhtyA02JA8EsuhbhMDS5rt3bLMc+nHlNG76oYTebDOMOYFQFq31/LY 3v3QlN1KQniM9Ks0fGAzfpItStX0Bt98I2hwv4QoEBdNzHaGRcappmPCDH1O4+Mn 254fyMc821sEDw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvdejledguddvjecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufhvvghn ucfrvghtvghruceoshhvvghnsehsvhgvnhhpvghtvghrrdguvghvqeenucggtffrrghtth gvrhhnpeetvdekteeluefffffhkeetteffgefggfevheeileeufedvtdeuffevveelhfef jeenucfkphepudejiedrudelledrvdduuddruddvgeenucevlhhushhtvghrufhiiigvpe dtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehsvhgvnhesshhvvghnphgvthgvrhdruggv vh X-ME-Proxy: Received: from photon.s7r42.com (ip-176-199-211-124.hsi06.unitymediagroup.de [176.199.211.124]) by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 24 May 2021 14:28:02 -0400 (EDT) From: Sven Peter To: devicetree@vger.kernel.org, linux-clk@vger.kernel.org Cc: Sven Peter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hector Martin , Michael Turquette , Rob Herring , Stephen Boyd , Mark Kettenis , Arnd Bergmann Subject: [PATCH 3/3] arm64: apple: add uart gate clocks Date: Mon, 24 May 2021 20:27:45 +0200 Message-Id: <20210524182745.22923-4-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) In-Reply-To: <20210524182745.22923-1-sven@svenpeter.dev> References: <20210524182745.22923-1-sven@svenpeter.dev> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_112806_184600_DEAC30FA X-CRM114-Status: GOOD ( 11.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now that we have a driver for gate clocks add the proper topology for the UART. These are already enabled by the bootloader but are part of the clock topology used by devices yet to be implemented. Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8103.dtsi | 36 +++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index a1e22a2ea2e5..b7c85b800efd 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -120,7 +120,7 @@ serial0: serial@235200000 { * TODO: figure out the clocking properly, there may * be a third selectable clock. */ - clocks = <&clk24>, <&clk24>; + clocks = <&clock_uart0>, <&clk24>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; @@ -131,5 +131,39 @@ aic: interrupt-controller@23b100000 { interrupt-controller; reg = <0x2 0x3b100000 0x0 0x8000>; }; + + clock_sio_busif: clock-sio-busif@23b7001c0 { + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + reg = <0x2 0x3b7001c0 0x0 0x4>; + clock-output-names = "clock_sio_busif"; + }; + + clock_sio: clock-sio@23b7001c8 { + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + reg = <0x2 0x3b7001c8 0x0 0x4>; + clocks = <&clock_sio_busif>; + clock-names = "clock_sio_busif"; + clock-output-names = "clock_sio"; + }; + + clock_uart_p: clock-uart-p@23b700220 { + reg = <0x2 0x3b700220 0 4>; + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + clock-output-names = "clock_uart_p"; + clocks = <&clock_sio>; + clock-names = "clock_sio"; + }; + + clock_uart0: clock-uart0@23b700270 { + reg = <0x2 0x3b700270 0 4>; + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + clock-output-names = "clock_uart0"; + clocks = <&clock_uart_p>; + clock-names = "clock_uart_p"; + }; }; };