From patchwork Sun Jun 6 12:30:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sandor Bodo-Merle X-Patchwork-Id: 12302021 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79D0DC47096 for ; Sun, 6 Jun 2021 12:32:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 54030613F3 for ; Sun, 6 Jun 2021 12:32:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230127AbhFFMeJ (ORCPT ); Sun, 6 Jun 2021 08:34:09 -0400 Received: from mail-wr1-f45.google.com ([209.85.221.45]:40608 "EHLO mail-wr1-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230150AbhFFMeF (ORCPT ); Sun, 6 Jun 2021 08:34:05 -0400 Received: by mail-wr1-f45.google.com with SMTP id y7so9569683wrh.7; Sun, 06 Jun 2021 05:32:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ngEb9x/2utKfD/oQZnoIJU7hrPHYhp9F52zqoVWgx2Q=; b=ln3LRqC6tLdxL+1LU08oPx52dfBqDds6fq3/rr4qQA4cUSbe0SzLnE6+4MMNXd2bH7 Qnro11dvjRucyBvvWclLmMRQVoy5WDhwtt/OqzhoEIY1dEsH7smnEtn0f7pTXf1EDelr bdriH02MC6Ksuck9Hfj44uZDAXf8mAdYqbyzzOpKYh/S43xhCKVpdxSH4P+BrRBS/6Do enX4qeCZCOpfw5ix6q/5rv2yY2WZlr3CXEOXC11OtYhhL7+vI8MWGvF8REk2R/g9ZXRX aWAaSSr2v8Wdop1Tq0Wxs6MwasZZMDBN82qPVc2E1pUHTPAueVOZeCKz1XOTzUMSO/YR Frrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ngEb9x/2utKfD/oQZnoIJU7hrPHYhp9F52zqoVWgx2Q=; b=ZLMHgghV2xgRFZCeUTvUPCoIhM+karvF6asqMD3qFGBVUWQMPQsAk7XMZnAAnfpPXR IWF1L+V38Qxati9lq+kPgJjlGa9cmioRBi0MkWDw3v1/zHjNwEhFYBfsrhO/hkRgzZqv IT+xrDuINYXPT0RcKGeNY/n2XK7QVhHI0Lj7xk5wvNZ2UVkPNVeaSHgd7/sAG3r83aZc mSpDcwR1LVH5QeQOypt1N3oZkGbAw7mvqP/UeDkJChQh/Z/1yfkuqwjoo84kdo6b1HzX ncKFAt/8Qbl+VN20wxrHzC5XLy32GQF3pJgG8nqHrqR2SNuELYtEW66KFKu1fhCb1yk6 jBfw== X-Gm-Message-State: AOAM531aGtkZL+Ww62QsjH7RLYbJ8XNw183X3e8DtfYG5lDLMKgdDs1I 24n1siTnAFCDj8Y6OrgITz0= X-Google-Smtp-Source: ABdhPJxWiQPwTbCyI7h2PehlUVgYVecZGrRQnXC+VdJYC3TS78WhRModc4mvqS8dbMGWjdUi2qYDKw== X-Received: by 2002:adf:fd90:: with SMTP id d16mr12536436wrr.35.1622982674405; Sun, 06 Jun 2021 05:31:14 -0700 (PDT) Received: from snuff.lan (178-164-181-11.pool.digikabel.hu. [178.164.181.11]) by smtp.gmail.com with ESMTPSA id p5sm12922023wrd.25.2021.06.06.05.31.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Jun 2021 05:31:14 -0700 (PDT) From: Sandor Bodo-Merle To: Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Sandor Bodo-Merle , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH 1/2] PCI: iproc: fix the base vector number allocation for multi-MSI Date: Sun, 6 Jun 2021 14:30:43 +0200 Message-Id: <20210606123044.31250-1-sbodomerle@gmail.com> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Commit fc54bae28818 ("PCI: iproc: Allow allocation of multiple MSIs") introduced multi-MSI support with a broken allocation mechanism (it failed to reserve the proper number of bits from the inner domain). Natural alignment of the base vector number was also not guaranteed. Fixes: fc54bae28818 ("PCI: iproc: Allow allocation of multiple MSIs") Reported-by: Pali Rohár Signed-off-by: Sandor Bodo-Merle Acked-by: Marc Zyngier Acked-by: Pali Rohár Acked-by: Ray Jui --- drivers/pci/controller/pcie-iproc-msi.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/pci/controller/pcie-iproc-msi.c b/drivers/pci/controller/pcie-iproc-msi.c index eede4e8f3f75..557d93dcb3bc 100644 --- a/drivers/pci/controller/pcie-iproc-msi.c +++ b/drivers/pci/controller/pcie-iproc-msi.c @@ -252,18 +252,18 @@ static int iproc_msi_irq_domain_alloc(struct irq_domain *domain, mutex_lock(&msi->bitmap_lock); - /* Allocate 'nr_cpus' number of MSI vectors each time */ - hwirq = bitmap_find_next_zero_area(msi->bitmap, msi->nr_msi_vecs, 0, - msi->nr_cpus, 0); - if (hwirq < msi->nr_msi_vecs) { - bitmap_set(msi->bitmap, hwirq, msi->nr_cpus); - } else { - mutex_unlock(&msi->bitmap_lock); - return -ENOSPC; - } + /* + * Allocate 'nr_irqs' multiplied by 'nr_cpus' number of MSI vectors + * each time + */ + hwirq = bitmap_find_free_region(msi->bitmap, msi->nr_msi_vecs, + order_base_2(msi->nr_cpus * nr_irqs)); mutex_unlock(&msi->bitmap_lock); + if (hwirq < 0) + return -ENOSPC; + for (i = 0; i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, hwirq + i, &iproc_msi_bottom_irq_chip, @@ -284,7 +284,8 @@ static void iproc_msi_irq_domain_free(struct irq_domain *domain, mutex_lock(&msi->bitmap_lock); hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq); - bitmap_clear(msi->bitmap, hwirq, msi->nr_cpus); + bitmap_release_region(msi->bitmap, hwirq, + order_base_2(msi->nr_cpus * nr_irqs)); mutex_unlock(&msi->bitmap_lock); From patchwork Sun Jun 6 12:30:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sandor Bodo-Merle X-Patchwork-Id: 12302023 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37B05C47096 for ; Sun, 6 Jun 2021 12:32:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1BC3061008 for ; Sun, 6 Jun 2021 12:32:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230150AbhFFMe2 (ORCPT ); Sun, 6 Jun 2021 08:34:28 -0400 Received: from mail-wr1-f54.google.com ([209.85.221.54]:45718 "EHLO mail-wr1-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230145AbhFFMe1 (ORCPT ); Sun, 6 Jun 2021 08:34:27 -0400 Received: by mail-wr1-f54.google.com with SMTP id z8so14176776wrp.12; Sun, 06 Jun 2021 05:32:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kYwRQbli1I4hRkELxP1eiNXBdqKWRZGGQHjz4e56pPA=; b=HxfDQx8n4eFxXVY5t1YWxq4nYBT+yLIpZ821I/YZFbkADzUxOTIkwYVGSQI5knuaVc rNnTzxvSo0yL2eJCNKLHNYFkdtd2DC0H20X5tLu1BYsgmHNeDD8jHt8xbjk+/kWNH/uV ounfRlhyqCjkLf1CXcza8Hif36Q8Lcu/6DfTgDAjrVG4LHmlhoH8eWlxwwc7YzvkOkrP yCVhwJJyiQ46Ifq+51uQnwRP1bAI6v3b8er7U0B+44SZmmhttZAG2F0fbV3GPpSPzGxR NeSwbBnmvCLmwqK8fFTZDM/iYT0mXn0GFE7No59K9+PNWxcqJx64XmOPmL7rCO0U+koC LTRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kYwRQbli1I4hRkELxP1eiNXBdqKWRZGGQHjz4e56pPA=; b=SL69PhtcTBU9uF89ANmnXC4eHIHHRiPYq8MMb92iBoOE0y3tU4JCRAyKblS6tVojab qzfSbHMu2K13NEiMPKYWRGgLMVxBbKNoPZcneGRx/D2xdqZLUAolJbOPYwWw7i174L7D uFzVTegeMLRYIqS9O4tsyNu2rY6gjmgOZBiS6LS7H4rGoZmOEX4FUbxaAxjo6FtWIqIO jYbPNSVzZpEivDrOgjApuVMuwsb0Zv5XDc0xU29XP47qtSaVXhkyj5E0KUcZf8uZElnx kt0k6BUJkBbk9Zti0w06+YZyV4AwuVm/GRaxG4W1gb0EK+0PuthNA8Gl1PaLdq2UryQ/ mCcw== X-Gm-Message-State: AOAM531d9oREhJE0hnYR8w9KNoBFiNyBCuUcdiLSZyErfjksJvju0k4R B0zrDrbN18vhW5zf6Y6YULo= X-Google-Smtp-Source: ABdhPJzQh10L6Nw6bzQ+bW4SV/yydOU0a0bTrlgXmmGQbGj5xwgMbTUwDqKzhDgn5JL89gNYgRwY2Q== X-Received: by 2002:adf:f98e:: with SMTP id f14mr12652140wrr.408.1622982682947; Sun, 06 Jun 2021 05:31:22 -0700 (PDT) Received: from snuff.lan (178-164-181-11.pool.digikabel.hu. [178.164.181.11]) by smtp.gmail.com with ESMTPSA id p5sm12922023wrd.25.2021.06.06.05.31.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Jun 2021 05:31:22 -0700 (PDT) From: Sandor Bodo-Merle To: Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Sandor Bodo-Merle , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marc Zyngier Subject: [PATCH 2/2] PCI: iproc: Support multi-MSI only on uniprocessor kernel Date: Sun, 6 Jun 2021 14:30:44 +0200 Message-Id: <20210606123044.31250-2-sbodomerle@gmail.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210606123044.31250-1-sbodomerle@gmail.com> References: <20210606123044.31250-1-sbodomerle@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The interrupt affinity scheme used by this driver is incompatible with multi-MSI as it implies moving the doorbell address to that of another MSI group. This isn't possible for multi-MSI, as all the MSIs must have the same doorbell address. As such it is restricted to systems with a single CPU. Fixes: fc54bae28818 ("PCI: iproc: Allow allocation of multiple MSIs") Reported-by: Marc Zyngier Signed-off-by: Sandor Bodo-Merle Acked-by: Marc Zyngier Acked-by: Ray Jui Acked-by: Pali Rohár --- drivers/pci/controller/pcie-iproc-msi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-iproc-msi.c b/drivers/pci/controller/pcie-iproc-msi.c index 557d93dcb3bc..81b4effeb130 100644 --- a/drivers/pci/controller/pcie-iproc-msi.c +++ b/drivers/pci/controller/pcie-iproc-msi.c @@ -171,7 +171,7 @@ static struct irq_chip iproc_msi_irq_chip = { static struct msi_domain_info iproc_msi_domain_info = { .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX, + MSI_FLAG_PCI_MSIX, .chip = &iproc_msi_irq_chip, }; @@ -250,6 +250,9 @@ static int iproc_msi_irq_domain_alloc(struct irq_domain *domain, struct iproc_msi *msi = domain->host_data; int hwirq, i; + if (msi->nr_cpus > 1 && nr_irqs > 1) + return -EINVAL; + mutex_lock(&msi->bitmap_lock); /* @@ -540,6 +543,9 @@ int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node) mutex_init(&msi->bitmap_lock); msi->nr_cpus = num_possible_cpus(); + if (msi->nr_cpus == 1) + iproc_msi_domain_info.flags |= MSI_FLAG_MULTI_PCI_MSI; + msi->nr_irqs = of_irq_count(node); if (!msi->nr_irqs) { dev_err(pcie->dev, "found no MSI GIC interrupt\n");