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Mon, 07 Jun 2021 14:33:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy4ll9t3EwcCKy3igwdQwoTdXU//20aYaO8amkuTKLrzZN/i3Xio/esdoJJJge80qbLcxBnjQ== X-Received: by 2002:a7b:c24e:: with SMTP id b14mr19012434wmj.6.1623101626926; Mon, 07 Jun 2021 14:33:46 -0700 (PDT) Received: from minerva.home ([92.176.231.106]) by smtp.gmail.com with ESMTPSA id q5sm17659319wrm.15.2021.06.07.14.33.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 14:33:46 -0700 (PDT) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Cc: Javier Martinez Canillas , Peter Robinson , Bjorn Helgaas , Heiko Stuebner , Lorenzo Pieralisi , Rob Herring , Shawn Lin , linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH] PCI: rockchip: Avoid accessing PCIe registers with clocks gated Date: Mon, 7 Jun 2021 23:33:28 +0200 Message-Id: <20210607213328.1711570-1-javierm@redhat.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=javierm@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210607_143353_609553_7D9953FF X-CRM114-Status: GOOD ( 19.02 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org IRQ handlers that are registered for shared interrupts can be called at any time after have been registered using the request_irq() function. It's up to drivers to ensure that's always safe for these to be called. Both the "pcie-sys" and "pcie-client" interrupts are shared, but since their handlers are registered very early in the probe function, an error later can lead to these handlers being executed before all the required have been properly setup. For example, the rockchip_pcie_read() function used by these IRQ handlers expects that some PCIe clocks will already be enabled, otherwise trying to access the PCIe registers causes the read to hang and never return. The CONFIG_DEBUG_SHIRQ option tests if drivers are able to cope with their shared interrupt handlers being called, by generating a spurious interrupt just before a shared interrupt handler is unregistered. But this means that if the option is enabled, any error in the probe path of this driver could lead to one of the IRQ handlers to be executed. In a rockpro64 board, the following sequence of events happens: 1) "pcie-sys" IRQ is requested and its handler registered. 2) "pcie-client" IRQ is requested and its handler registered. 3) probe later fails due readl_poll_timeout() returning a timeout. 4) the "pcie-sys" IRQ is unregistered. 5) CONFIG_DEBUG_SHIRQ triggers a spurious interrupt. 6) "pcie-client" IRQ handler is called for this spurious interrupt. 7) IRQ handler tries to read PCIE_CLIENT_INT_STATUS with clocks gated. 8) the machine hangs because rockchip_pcie_read() call never returns. To avoid cases like this, the handlers don't have to be registered until very late in the probe function, once all the resources have been setup. So let's just move all the IRQ init before the pci_host_probe() call, that will prevent issues like this and seems to be the correct thing to do too. Reported-by: Peter Robinson Signed-off-by: Javier Martinez Canillas Acked-by: Shawn Lin --- drivers/pci/controller/pcie-rockchip-host.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c index f1d08a1b159..78d04ac29cd 100644 --- a/drivers/pci/controller/pcie-rockchip-host.c +++ b/drivers/pci/controller/pcie-rockchip-host.c @@ -592,10 +592,6 @@ static int rockchip_pcie_parse_host_dt(struct rockchip_pcie *rockchip) if (err) return err; - err = rockchip_pcie_setup_irq(rockchip); - if (err) - return err; - rockchip->vpcie12v = devm_regulator_get_optional(dev, "vpcie12v"); if (IS_ERR(rockchip->vpcie12v)) { if (PTR_ERR(rockchip->vpcie12v) != -ENODEV) @@ -973,8 +969,6 @@ static int rockchip_pcie_probe(struct platform_device *pdev) if (err) goto err_vpcie; - rockchip_pcie_enable_interrupts(rockchip); - err = rockchip_pcie_init_irq_domain(rockchip); if (err < 0) goto err_deinit_port; @@ -992,6 +986,12 @@ static int rockchip_pcie_probe(struct platform_device *pdev) bridge->sysdata = rockchip; bridge->ops = &rockchip_pcie_ops; + err = rockchip_pcie_setup_irq(rockchip); + if (err) + goto err_remove_irq_domain; + + rockchip_pcie_enable_interrupts(rockchip); + err = pci_host_probe(bridge); if (err < 0) goto err_remove_irq_domain;