From patchwork Wed Jun 9 13:21:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12310111 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1ED6C48BD1 for ; Wed, 9 Jun 2021 13:23:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A68E8613B8 for ; Wed, 9 Jun 2021 13:23:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233902AbhFINZC (ORCPT ); Wed, 9 Jun 2021 09:25:02 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:29373 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234605AbhFINZB (ORCPT ); Wed, 9 Jun 2021 09:25:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1623244987; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=92YiPexxYpFlIHYIfUzcajyREjX7dCB4H6SLkcvlG4w=; b=Yx6Ty0kM/fA3NdfefXZAbouUBjNpaVkFT8r+CdqT34TLOT+6v45sSqswP1ElQY9t4EDp67 VW6XlO0XpfeipNun6M2QDDVI+/26xd28cfNGDg8UTIaWF2ynVzLrm7N8XOKReWC6M4MUhe wBr8KJ0Q2icdVt8zUsU2ZqkJm9Cs+Ck= Received: from mail-oo1-f69.google.com (mail-oo1-f69.google.com [209.85.161.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-321-J7UWsI_AOPGdaogFVYe4Pw-1; Wed, 09 Jun 2021 09:23:06 -0400 X-MC-Unique: J7UWsI_AOPGdaogFVYe4Pw-1 Received: by mail-oo1-f69.google.com with SMTP id n16-20020a0568200550b029020b438b2591so15524576ooj.19 for ; Wed, 09 Jun 2021 06:23:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=92YiPexxYpFlIHYIfUzcajyREjX7dCB4H6SLkcvlG4w=; b=nxT3fwqanubLM2Pb7l8lWDLqnCp2upBT+zZWnfeK8HFkwvhS8tF8tw46UzWyjUFx++ sefXvLEIjrzfW6HDydjopDBupDGSEq15CXSz6v2lcBAV8/bKcfeXgMunMY83P59lHY2i YkGC+owJBLFSIUWQMvBA8apsfvzzfP2byPeJpka2PbfYZ6t7gmiSc14zulYgwPye+3+g kQ2XBTZQs14yeLn1eTWTeSYJPv+1sQryG0VwslVdqOcz2o4v85XF2AdCg+J79xD/Z/MN w5EUUZDzFbyT/O1GJjfud60s46sgEo6lvBHMFPLgGThAjdrD6LZUHuB4Cps3+xPNvMAg hwjA== X-Gm-Message-State: AOAM530PE72QJFqWKcD3ITBrkrJjAXBQJ6syqteQ1ivgyY260YRjvrtE o6uuKaI2WutrwNOS+gfLBhI2v4pk4envB4vyF+P4nDByPbjbpnK7ehn9pdr0QBe/kWc/O3Y4Etd lp34dMtYP8h2pGtPZ9SE4tA== X-Received: by 2002:a9d:6f88:: with SMTP id h8mr2735062otq.73.1623244985016; Wed, 09 Jun 2021 06:23:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwPMIpjxRX4dadpgXM5m40PYb26wDF4WHHQmibOXeVOj7sfKA78mnLLazA+DThMByerKnUIJw== X-Received: by 2002:a9d:6f88:: with SMTP id h8mr2735042otq.73.1623244984756; Wed, 09 Jun 2021 06:23:04 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 21sm3165654otd.21.2021.06.09.06.23.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 06:23:04 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH 1/7] fpga: dfl: reorganize to subdir layout Date: Wed, 9 Jun 2021 06:21:45 -0700 Message-Id: <20210609132151.3081379-3-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210609132151.3081379-1-trix@redhat.com> References: <20210609132151.3081379-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Create a dfl/ subdir Move dfl-* files to it. Add a Kconfig and Makefile Because FPGA_DFL is now used in dfl/Kconfig in a if/endif block, all the other configs in dfl/Kconfig implicitly depend on FPGA_DFL. So the explict dependence can be removed. Also since FPGA_DFL depends on HAS_IOMEM, it can be removed from the other configs. Signed-off-by: Tom Rix --- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 80 +------------------- drivers/fpga/Makefile | 18 +---- drivers/fpga/dfl/Kconfig | 81 +++++++++++++++++++++ drivers/fpga/dfl/Makefile | 19 +++++ drivers/fpga/{ => dfl}/dfl-afu-dma-region.c | 0 drivers/fpga/{ => dfl}/dfl-afu-error.c | 0 drivers/fpga/{ => dfl}/dfl-afu-main.c | 0 drivers/fpga/{ => dfl}/dfl-afu-region.c | 0 drivers/fpga/{ => dfl}/dfl-afu.h | 0 drivers/fpga/{ => dfl}/dfl-fme-br.c | 0 drivers/fpga/{ => dfl}/dfl-fme-error.c | 0 drivers/fpga/{ => dfl}/dfl-fme-main.c | 0 drivers/fpga/{ => dfl}/dfl-fme-mgr.c | 0 drivers/fpga/{ => dfl}/dfl-fme-perf.c | 0 drivers/fpga/{ => dfl}/dfl-fme-pr.c | 0 drivers/fpga/{ => dfl}/dfl-fme-pr.h | 0 drivers/fpga/{ => dfl}/dfl-fme-region.c | 0 drivers/fpga/{ => dfl}/dfl-fme.h | 0 drivers/fpga/{ => dfl}/dfl-n3000-nios.c | 0 drivers/fpga/{ => dfl}/dfl-pci.c | 0 drivers/fpga/{ => dfl}/dfl.c | 0 drivers/fpga/{ => dfl}/dfl.h | 0 23 files changed, 103 insertions(+), 97 deletions(-) create mode 100644 drivers/fpga/dfl/Kconfig create mode 100644 drivers/fpga/dfl/Makefile rename drivers/fpga/{ => dfl}/dfl-afu-dma-region.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu-error.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu-main.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu-region.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu.h (100%) rename drivers/fpga/{ => dfl}/dfl-fme-br.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-error.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-main.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-mgr.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-perf.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-pr.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-pr.h (100%) rename drivers/fpga/{ => dfl}/dfl-fme-region.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme.h (100%) rename drivers/fpga/{ => dfl}/dfl-n3000-nios.c (100%) rename drivers/fpga/{ => dfl}/dfl-pci.c (100%) rename drivers/fpga/{ => dfl}/dfl.c (100%) rename drivers/fpga/{ => dfl}/dfl.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 1be6895a143d2..46ef3af06ba53 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7201,7 +7201,7 @@ L: linux-fpga@vger.kernel.org S: Maintained F: Documentation/ABI/testing/sysfs-bus-dfl* F: Documentation/fpga/dfl.rst -F: drivers/fpga/dfl* +F: drivers/fpga/dfl/ F: drivers/uio/uio_dfl.c F: include/linux/dfl.h F: include/uapi/linux/fpga-dfl.h diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 33e15058d0dc7..c427b25cc6f7e 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -145,85 +145,7 @@ config OF_FPGA_REGION Support for loading FPGA images by applying a Device Tree overlay. -config FPGA_DFL - tristate "FPGA Device Feature List (DFL) support" - select FPGA_BRIDGE - select FPGA_REGION - depends on HAS_IOMEM - help - Device Feature List (DFL) defines a feature list structure that - creates a linked list of feature headers within the MMIO space - to provide an extensible way of adding features for FPGA. - Driver can walk through the feature headers to enumerate feature - devices (e.g. FPGA Management Engine, Port and Accelerator - Function Unit) and their private features for target FPGA devices. - - Select this option to enable common support for Field-Programmable - Gate Array (FPGA) solutions which implement Device Feature List. - It provides enumeration APIs and feature device infrastructure. - -config FPGA_DFL_FME - tristate "FPGA DFL FME Driver" - depends on FPGA_DFL && HWMON && PERF_EVENTS - help - The FPGA Management Engine (FME) is a feature device implemented - under Device Feature List (DFL) framework. Select this option to - enable the platform device driver for FME which implements all - FPGA platform level management features. There shall be one FME - per DFL based FPGA device. - -config FPGA_DFL_FME_MGR - tristate "FPGA DFL FME Manager Driver" - depends on FPGA_DFL_FME && HAS_IOMEM - help - Say Y to enable FPGA Manager driver for FPGA Management Engine. - -config FPGA_DFL_FME_BRIDGE - tristate "FPGA DFL FME Bridge Driver" - depends on FPGA_DFL_FME && HAS_IOMEM - help - Say Y to enable FPGA Bridge driver for FPGA Management Engine. - -config FPGA_DFL_FME_REGION - tristate "FPGA DFL FME Region Driver" - depends on FPGA_DFL_FME && HAS_IOMEM - help - Say Y to enable FPGA Region driver for FPGA Management Engine. - -config FPGA_DFL_AFU - tristate "FPGA DFL AFU Driver" - depends on FPGA_DFL - help - This is the driver for FPGA Accelerated Function Unit (AFU) which - implements AFU and Port management features. A User AFU connects - to the FPGA infrastructure via a Port. There may be more than one - Port/AFU per DFL based FPGA device. - -config FPGA_DFL_NIOS_INTEL_PAC_N3000 - tristate "FPGA DFL NIOS Driver for Intel PAC N3000" - depends on FPGA_DFL - select REGMAP - help - This is the driver for the N3000 Nios private feature on Intel - PAC (Programmable Acceleration Card) N3000. It communicates - with the embedded Nios processor to configure the retimers on - the card. It also instantiates the SPI master (spi-altera) for - the card's BMC (Board Management Controller). - -config FPGA_DFL_PCI - tristate "FPGA DFL PCIe Device Driver" - depends on PCI && FPGA_DFL - help - Select this option to enable PCIe driver for PCIe-based - Field-Programmable Gate Array (FPGA) solutions which implement - the Device Feature List (DFL). This driver provides interfaces - for userspace applications to configure, enumerate, open and access - FPGA accelerators on the FPGA DFL devices, enables system level - management functions such as FPGA partial reconfiguration, power - management and virtualization with DFL framework and DFL feature - device drivers. - - To compile this as a module, choose M here. +source "drivers/fpga/dfl/Kconfig" config FPGA_MGR_ZYNQMP_FPGA tristate "Xilinx ZynqMP FPGA" diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 18dc9885883a2..bda74e54ce390 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -31,20 +31,4 @@ obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o obj-$(CONFIG_FPGA_REGION) += fpga-region.o obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o -# FPGA Device Feature List Support -obj-$(CONFIG_FPGA_DFL) += dfl.o -obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o -obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o -obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o -obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o -obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o - -dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o -dfl-fme-objs += dfl-fme-perf.o -dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o -dfl-afu-objs += dfl-afu-error.o - -obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o - -# Drivers for FPGAs which implement DFL -obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o +obj-$(CONFIG_FPGA_DFL) += dfl/ diff --git a/drivers/fpga/dfl/Kconfig b/drivers/fpga/dfl/Kconfig new file mode 100644 index 0000000000000..1f5ce42f63e44 --- /dev/null +++ b/drivers/fpga/dfl/Kconfig @@ -0,0 +1,81 @@ +config FPGA_DFL + tristate "FPGA Device Feature List (DFL) support" + select FPGA_BRIDGE + select FPGA_REGION + depends on HAS_IOMEM + help + Device Feature List (DFL) defines a feature list structure that + creates a linked list of feature headers within the MMIO space + to provide an extensible way of adding features for FPGA. + Driver can walk through the feature headers to enumerate feature + devices (e.g. FPGA Management Engine, Port and Accelerator + Function Unit) and their private features for target FPGA devices. + + Select this option to enable common support for Field-Programmable + Gate Array (FPGA) solutions which implement Device Feature List. + It provides enumeration APIs and feature device infrastructure. + +if FPGA_DFL + +config FPGA_DFL_FME + tristate "FPGA DFL FME Driver" + depends on HWMON && PERF_EVENTS + help + The FPGA Management Engine (FME) is a feature device implemented + under Device Feature List (DFL) framework. Select this option to + enable the platform device driver for FME which implements all + FPGA platform level management features. There shall be one FME + per DFL based FPGA device. + +config FPGA_DFL_FME_MGR + tristate "FPGA DFL FME Manager Driver" + depends on FPGA_DFL_FME + help + Say Y to enable FPGA Manager driver for FPGA Management Engine. + +config FPGA_DFL_FME_BRIDGE + tristate "FPGA DFL FME Bridge Driver" + depends on FPGA_DFL_FME + help + Say Y to enable FPGA Bridge driver for FPGA Management Engine. + +config FPGA_DFL_FME_REGION + tristate "FPGA DFL FME Region Driver" + depends on FPGA_DFL_FME + help + Say Y to enable FPGA Region driver for FPGA Management Engine. + +config FPGA_DFL_AFU + tristate "FPGA DFL AFU Driver" + help + This is the driver for FPGA Accelerated Function Unit (AFU) which + implements AFU and Port management features. A User AFU connects + to the FPGA infrastructure via a Port. There may be more than one + Port/AFU per DFL based FPGA device. + +config FPGA_DFL_NIOS_INTEL_PAC_N3000 + tristate "FPGA DFL NIOS Driver for Intel PAC N3000" + select REGMAP + help + This is the driver for the N3000 Nios private feature on Intel + PAC (Programmable Acceleration Card) N3000. It communicates + with the embedded Nios processor to configure the retimers on + the card. It also instantiates the SPI master (spi-altera) for + the card's BMC (Board Management Controller). + +config FPGA_DFL_PCI + tristate "FPGA DFL PCIe Device Driver" + depends on PCI + help + Select this option to enable PCIe driver for PCIe-based + Field-Programmable Gate Array (FPGA) solutions which implement + the Device Feature List (DFL). This driver provides interfaces + for userspace applications to configure, enumerate, open and access + FPGA accelerators on the FPGA DFL devices, enables system level + management functions such as FPGA partial reconfiguration, power + management and virtualization with DFL framework and DFL feature + device drivers. + + To compile this as a module, choose M here. + +endif #FPGA_DFL diff --git a/drivers/fpga/dfl/Makefile b/drivers/fpga/dfl/Makefile new file mode 100644 index 0000000000000..724792039026f --- /dev/null +++ b/drivers/fpga/dfl/Makefile @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# FPGA Device Feature List (DFL) Support +obj-$(CONFIG_FPGA_DFL) += dfl.o +obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o +obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o +obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o +obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o +obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o +obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o +obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o + +dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o \ + dfl-fme-perf.o +dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o \ + dfl-afu-error.o + + + diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl/dfl-afu-dma-region.c similarity index 100% rename from drivers/fpga/dfl-afu-dma-region.c rename to drivers/fpga/dfl/dfl-afu-dma-region.c diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl/dfl-afu-error.c similarity index 100% rename from drivers/fpga/dfl-afu-error.c rename to drivers/fpga/dfl/dfl-afu-error.c diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl/dfl-afu-main.c similarity index 100% rename from drivers/fpga/dfl-afu-main.c rename to drivers/fpga/dfl/dfl-afu-main.c diff --git a/drivers/fpga/dfl-afu-region.c b/drivers/fpga/dfl/dfl-afu-region.c similarity index 100% rename from drivers/fpga/dfl-afu-region.c rename to drivers/fpga/dfl/dfl-afu-region.c diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl/dfl-afu.h similarity index 100% rename from drivers/fpga/dfl-afu.h rename to drivers/fpga/dfl/dfl-afu.h diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl/dfl-fme-br.c similarity index 100% rename from drivers/fpga/dfl-fme-br.c rename to drivers/fpga/dfl/dfl-fme-br.c diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl/dfl-fme-error.c similarity index 100% rename from drivers/fpga/dfl-fme-error.c rename to drivers/fpga/dfl/dfl-fme-error.c diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl/dfl-fme-main.c similarity index 100% rename from drivers/fpga/dfl-fme-main.c rename to drivers/fpga/dfl/dfl-fme-main.c diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl/dfl-fme-mgr.c similarity index 100% rename from drivers/fpga/dfl-fme-mgr.c rename to drivers/fpga/dfl/dfl-fme-mgr.c diff --git a/drivers/fpga/dfl-fme-perf.c b/drivers/fpga/dfl/dfl-fme-perf.c similarity index 100% rename from drivers/fpga/dfl-fme-perf.c rename to drivers/fpga/dfl/dfl-fme-perf.c diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl/dfl-fme-pr.c similarity index 100% rename from drivers/fpga/dfl-fme-pr.c rename to drivers/fpga/dfl/dfl-fme-pr.c diff --git a/drivers/fpga/dfl-fme-pr.h b/drivers/fpga/dfl/dfl-fme-pr.h similarity index 100% rename from drivers/fpga/dfl-fme-pr.h rename to drivers/fpga/dfl/dfl-fme-pr.h diff --git a/drivers/fpga/dfl-fme-region.c b/drivers/fpga/dfl/dfl-fme-region.c similarity index 100% rename from drivers/fpga/dfl-fme-region.c rename to drivers/fpga/dfl/dfl-fme-region.c diff --git a/drivers/fpga/dfl-fme.h b/drivers/fpga/dfl/dfl-fme.h similarity index 100% rename from drivers/fpga/dfl-fme.h rename to drivers/fpga/dfl/dfl-fme.h diff --git a/drivers/fpga/dfl-n3000-nios.c b/drivers/fpga/dfl/dfl-n3000-nios.c similarity index 100% rename from drivers/fpga/dfl-n3000-nios.c rename to drivers/fpga/dfl/dfl-n3000-nios.c diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl/dfl-pci.c similarity index 100% rename from drivers/fpga/dfl-pci.c rename to drivers/fpga/dfl/dfl-pci.c diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl/dfl.c similarity index 100% rename from drivers/fpga/dfl.c rename to drivers/fpga/dfl/dfl.c diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl/dfl.h similarity index 100% rename from drivers/fpga/dfl.h rename to drivers/fpga/dfl/dfl.h From patchwork Wed Jun 9 13:21:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12310113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18974C48BCF for ; Wed, 9 Jun 2021 13:23:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EFB39613BC for ; Wed, 9 Jun 2021 13:23:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236168AbhFINZG (ORCPT ); Wed, 9 Jun 2021 09:25:06 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:43592 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235972AbhFINZE (ORCPT ); Wed, 9 Jun 2021 09:25:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1623244990; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XvFqgoXbMqYdld4DmESpGVSZB3RoZyxfbp1QAtbqos0=; b=dJGxbb6JVr94XKJKFeEd8312jG2PKcZYpFB5Vy8gss7i6AfTJi/ZUa+g1luFAveKVOk0gB JR0l/kQqon3f5duX+qO4ROfiI6+LCVvO0BulaBlMaTGCnBdgvWZ1/iKH/nuMUSPDbOiFa3 YBunU3oG57uol0zmJWKAI2PD6GCi2ww= Received: from mail-oi1-f200.google.com (mail-oi1-f200.google.com [209.85.167.200]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-242-IA6L6LtxMUa4XUKxmBO5Pg-1; Wed, 09 Jun 2021 09:23:09 -0400 X-MC-Unique: IA6L6LtxMUa4XUKxmBO5Pg-1 Received: by mail-oi1-f200.google.com with SMTP id r19-20020acaa8130000b02901f41b1b235bso3800004oie.9 for ; Wed, 09 Jun 2021 06:23:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XvFqgoXbMqYdld4DmESpGVSZB3RoZyxfbp1QAtbqos0=; b=YDji3ueQjzjJj3NF7RKnZoneOqlnJRmRtQM292Ui3HxY5fIFwfNjAyQ5BCVM4j3leI ALlYRBQ/GCkPNUgsn8N/FmVyR5LcX9WM/8uKCCObDgrgEH/72MAGM1tlDBLpf3T7A6Hb 8y4ejz/zmbUtACTKYIhZZ7IlmIzkh3qv48Qwu88grzpCj9qDUfILQbOcqwg1REaIHEsT d2Z4A5Bg8AKtQrie/6VK8OE29ilSxBxyYaN7tSupKAp4Er+Aquk3quyGK5wJbi57V4jm PDNjULeHsbJT6uptri4rpPW0OPaW0JkBvxTA4KLNGxyMLx9MtK+Frrpl9bNgIO40GUpt Ny6w== X-Gm-Message-State: AOAM533/tWOaV0YyHJ2Ajmaikdp8inOWsgSuasiv5m1+7bcpBz2nnaRS fc1poP/HFPm85eNsyqTCG4CnEwlTX5RQCWtr4BbspDZPcm06fFpVX17F92XOBItx5VCnFCnMPGW SZdmxZN3Y0xueYDm9rOVVvQ== X-Received: by 2002:a9d:17c5:: with SMTP id j63mr22568497otj.369.1623244988222; Wed, 09 Jun 2021 06:23:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz7QRjBg+gi5RVOVaFJZtZGRHgUKmOXOl/EGosz1au0ojize/ADUAoiEJmP2WB1Tnm7Sq0yVw== X-Received: by 2002:a9d:17c5:: with SMTP id j63mr22568483otj.369.1623244988022; Wed, 09 Jun 2021 06:23:08 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 21sm3165654otd.21.2021.06.09.06.23.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 06:23:07 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH 2/7] fpga: xilinx: reorganize to subdir layout Date: Wed, 9 Jun 2021 06:21:46 -0700 Message-Id: <20210609132151.3081379-4-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210609132151.3081379-1-trix@redhat.com> References: <20210609132151.3081379-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Create a xilinx/ subdir Move xilinx-* and zynq* files to it. Add a Kconfig and Makefile Signed-off-by: Tom Rix --- drivers/fpga/Kconfig | 40 +--------------- drivers/fpga/Makefile | 5 +- drivers/fpga/xilinx/Kconfig | 48 +++++++++++++++++++ drivers/fpga/xilinx/Makefile | 8 ++++ .../fpga/{ => xilinx}/xilinx-pr-decoupler.c | 0 drivers/fpga/{ => xilinx}/xilinx-spi.c | 0 drivers/fpga/{ => xilinx}/zynq-fpga.c | 0 drivers/fpga/{ => xilinx}/zynqmp-fpga.c | 0 8 files changed, 58 insertions(+), 43 deletions(-) create mode 100644 drivers/fpga/xilinx/Kconfig create mode 100644 drivers/fpga/xilinx/Makefile rename drivers/fpga/{ => xilinx}/xilinx-pr-decoupler.c (100%) rename drivers/fpga/{ => xilinx}/xilinx-spi.c (100%) rename drivers/fpga/{ => xilinx}/zynq-fpga.c (100%) rename drivers/fpga/{ => xilinx}/zynqmp-fpga.c (100%) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index c427b25cc6f7e..657703b41b06e 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -52,25 +52,12 @@ config FPGA_MGR_ALTERA_CVP FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V, Arria 10 and Stratix10 Altera FPGAs using the CvP interface over PCIe. -config FPGA_MGR_ZYNQ_FPGA - tristate "Xilinx Zynq FPGA" - depends on ARCH_ZYNQ || COMPILE_TEST - help - FPGA manager driver support for Xilinx Zynq FPGAs. - config FPGA_MGR_STRATIX10_SOC tristate "Intel Stratix10 SoC FPGA Manager" depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE) help FPGA manager driver support for the Intel Stratix10 SoC. -config FPGA_MGR_XILINX_SPI - tristate "Xilinx Configuration over Slave Serial (SPI)" - depends on SPI - help - FPGA manager driver support for Xilinx FPGA configuration - over slave serial interface. - config FPGA_MGR_ICE40_SPI tristate "Lattice iCE40 SPI" depends on OF && SPI @@ -113,23 +100,6 @@ config ALTERA_FREEZE_BRIDGE isolate one region of the FPGA from the busses while that region is being reprogrammed. -config XILINX_PR_DECOUPLER - tristate "Xilinx LogiCORE PR Decoupler" - depends on FPGA_BRIDGE - depends on HAS_IOMEM - help - Say Y to enable drivers for Xilinx LogiCORE PR Decoupler - or Xilinx Dynamic Function eXchnage AIX Shutdown Manager. - The PR Decoupler exists in the FPGA fabric to isolate one - region of the FPGA from the busses while that region is - being reprogrammed during partial reconfig. - The Dynamic Function eXchange AXI shutdown manager prevents - AXI traffic from passing through the bridge. The controller - safely handles AXI4MM and AXI4-Lite interfaces on a - Reconfigurable Partition when it is undergoing dynamic - reconfiguration, preventing the system deadlock that can - occur if AXI transactions are interrupted by DFX. - config FPGA_REGION tristate "FPGA Region" depends on FPGA_BRIDGE @@ -146,14 +116,6 @@ config OF_FPGA_REGION overlay. source "drivers/fpga/dfl/Kconfig" - -config FPGA_MGR_ZYNQMP_FPGA - tristate "Xilinx ZynqMP FPGA" - depends on ZYNQMP_FIRMWARE || (!ZYNQMP_FIRMWARE && COMPILE_TEST) - help - FPGA manager driver support for Xilinx ZynqMP FPGAs. - This driver uses the processor configuration port(PCAP) - to configure the programmable logic(PL) through PS - on ZynqMP SoC. +source "drivers/fpga/xilinx/Kconfig" endif # FPGA diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index bda74e54ce390..0868c7c4264d8 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -15,9 +15,6 @@ obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o -obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o -obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o -obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o @@ -25,10 +22,10 @@ obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o -obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o # High Level Interfaces obj-$(CONFIG_FPGA_REGION) += fpga-region.o obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o obj-$(CONFIG_FPGA_DFL) += dfl/ +obj-$(CONFIG_FPGA_XILINX) += xilinx/ diff --git a/drivers/fpga/xilinx/Kconfig b/drivers/fpga/xilinx/Kconfig new file mode 100644 index 0000000000000..1ef0b6a34ae0c --- /dev/null +++ b/drivers/fpga/xilinx/Kconfig @@ -0,0 +1,48 @@ +config FPGA_XILINX + bool "Xilinx Devices" + default y + help + If you have a xilinx fpga, say Y. + +if FPGA_XILINX + +config FPGA_MGR_ZYNQ_FPGA + tristate "Xilinx Zynq FPGA" + depends on ARCH_ZYNQ || COMPILE_TEST + help + FPGA manager driver support for Xilinx Zynq FPGAs. + +config FPGA_MGR_ZYNQMP_FPGA + tristate "Xilinx ZynqMP FPGA" + depends on ZYNQMP_FIRMWARE || (!ZYNQMP_FIRMWARE && COMPILE_TEST) + help + FPGA manager driver support for Xilinx ZynqMP FPGAs. + This driver uses the processor configuration port(PCAP) + to configure the programmable logic(PL) through PS + on ZynqMP SoC. + +config XILINX_PR_DECOUPLER + tristate "Xilinx LogiCORE PR Decoupler" + depends on FPGA_BRIDGE + depends on HAS_IOMEM + help + Say Y to enable drivers for Xilinx LogiCORE PR Decoupler + or Xilinx Dynamic Function eXchnage AIX Shutdown Manager. + The PR Decoupler exists in the FPGA fabric to isolate one + region of the FPGA from the busses while that region is + being reprogrammed during partial reconfig. + The Dynamic Function eXchange AXI shutdown manager prevents + AXI traffic from passing through the bridge. The controller + safely handles AXI4MM and AXI4-Lite interfaces on a + Reconfigurable Partition when it is undergoing dynamic + reconfiguration, preventing the system deadlock that can + occur if AXI transactions are interrupted by DFX. + +config FPGA_MGR_XILINX_SPI + tristate "Xilinx Configuration over Slave Serial (SPI)" + depends on SPI + help + FPGA manager driver support for Xilinx FPGA configuration + over slave serial interface. + +endif #FPGA_XILINX diff --git a/drivers/fpga/xilinx/Makefile b/drivers/fpga/xilinx/Makefile new file mode 100644 index 0000000000000..7bb7543412790 --- /dev/null +++ b/drivers/fpga/xilinx/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o +obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o +obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o +obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o + + diff --git a/drivers/fpga/xilinx-pr-decoupler.c b/drivers/fpga/xilinx/xilinx-pr-decoupler.c similarity index 100% rename from drivers/fpga/xilinx-pr-decoupler.c rename to drivers/fpga/xilinx/xilinx-pr-decoupler.c diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx/xilinx-spi.c similarity index 100% rename from drivers/fpga/xilinx-spi.c rename to drivers/fpga/xilinx/xilinx-spi.c diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/xilinx/zynq-fpga.c similarity index 100% rename from drivers/fpga/zynq-fpga.c rename to drivers/fpga/xilinx/zynq-fpga.c diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/xilinx/zynqmp-fpga.c similarity index 100% rename from drivers/fpga/zynqmp-fpga.c rename to drivers/fpga/xilinx/zynqmp-fpga.c From patchwork Wed Jun 9 13:21:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12310115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D912EC48BDF for ; Wed, 9 Jun 2021 13:23:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2EB6613BC for ; Wed, 9 Jun 2021 13:23:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236256AbhFINZO (ORCPT ); Wed, 9 Jun 2021 09:25:14 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:54028 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236196AbhFINZJ (ORCPT ); Wed, 9 Jun 2021 09:25:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1623244994; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=toAw5Xqv8MQJGP4owqqo3qaenoRchLuqhCbpOlut5Y4=; b=BP3b58B2iZuWOna0GfbGoiLCuESUCqQnEB4foWNT1EcO7wNgOrK3wrETVTILBoNyhuoQJv 0/9TwcJs1ICSpbf9gj7qduNBZwMHlv1etrF3C7P77ii/w+8lt8YT+rxPRRBRBDSVWx8W2l eVIZDW3iKjMgsHatg4jV0iRYQoag48g= Received: from mail-oi1-f198.google.com (mail-oi1-f198.google.com [209.85.167.198]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-43-UUH1LcP_Od-rD3uduQW3eg-1; Wed, 09 Jun 2021 09:23:13 -0400 X-MC-Unique: UUH1LcP_Od-rD3uduQW3eg-1 Received: by mail-oi1-f198.google.com with SMTP id p5-20020acabf050000b02901eed1481b82so9509620oif.20 for ; Wed, 09 Jun 2021 06:23:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=toAw5Xqv8MQJGP4owqqo3qaenoRchLuqhCbpOlut5Y4=; b=GT3Q20uCiZYW0iKAdRbj204ZWX5IQg09/C/uc0bpuhNDFabbjUnPgIex2751YOoEed fshz3w7oojieBaBa9hPriRAaD+5F/91xCQRBR1w2i3Bn5bIhT+hxPP8t5jKpdPh9Y60T qNlye9KDbfr7RumhiWPx0k0/kmh1GypqvRefZ/gaKZquuBK47/WZ0rjlR9mViW/4s9YW iHR2J7rdKjHKVJMzJw3trI5b8PsXvbHUkzA4Hr81xtNS/KHI3glDKO4nS45+NTO0lsn+ 3HM/7oDXu2WZ61CmIPy2BUx9m+qouUvPPMUvWULi+NU8VrKKgdmiPx6rkc4Reurgu46n NgMw== X-Gm-Message-State: AOAM53226AuJvDCAdxegxs+Vh85Iea7OsnM9cH2o43yR1Dj2RObNBvyD +bwmGZMllPbg+5yXKcbsr4VWAcQbzEusW9zF9UhipSRe7tErP7ewnLDt8Hi3HZVNXC7/VKb/IQ/ bo9G2SgJVBxRujg3zI9xsxA== X-Received: by 2002:a05:6830:2476:: with SMTP id x54mr4587634otr.293.1623244992463; Wed, 09 Jun 2021 06:23:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyJVTDvLlUDaJIXu5S/Py9PlgwFfhdEeR9Iy2Od2esg6I8Dwfcj2r9Zl8jfnt3n33QzVdBfaw== X-Received: by 2002:a05:6830:2476:: with SMTP id x54mr4587618otr.293.1623244992227; Wed, 09 Jun 2021 06:23:12 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 21sm3165654otd.21.2021.06.09.06.23.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 06:23:11 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH 3/7] fpga: altera: reorganize to subdir layout Date: Wed, 9 Jun 2021 06:21:47 -0700 Message-Id: <20210609132151.3081379-5-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210609132151.3081379-1-trix@redhat.com> References: <20210609132151.3081379-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Create a altera/ subdir Move altera-* and soc* ts73xx* files to it. Add a Kconfig and Makefile Signed-off-by: Tom Rix --- drivers/fpga/Kconfig | 70 +--------------- drivers/fpga/Makefile | 11 +-- drivers/fpga/altera/Kconfig | 79 +++++++++++++++++++ drivers/fpga/altera/Makefile | 12 +++ drivers/fpga/{ => altera}/altera-cvp.c | 0 drivers/fpga/{ => altera}/altera-fpga2sdram.c | 0 .../fpga/{ => altera}/altera-freeze-bridge.c | 0 drivers/fpga/{ => altera}/altera-hps2fpga.c | 0 .../{ => altera}/altera-pr-ip-core-plat.c | 0 drivers/fpga/{ => altera}/altera-pr-ip-core.c | 0 drivers/fpga/{ => altera}/altera-ps-spi.c | 0 drivers/fpga/{ => altera}/socfpga-a10.c | 0 drivers/fpga/{ => altera}/socfpga.c | 0 drivers/fpga/{ => altera}/stratix10-soc.c | 0 drivers/fpga/{ => altera}/ts73xx-fpga.c | 0 15 files changed, 93 insertions(+), 79 deletions(-) create mode 100644 drivers/fpga/altera/Kconfig create mode 100644 drivers/fpga/altera/Makefile rename drivers/fpga/{ => altera}/altera-cvp.c (100%) rename drivers/fpga/{ => altera}/altera-fpga2sdram.c (100%) rename drivers/fpga/{ => altera}/altera-freeze-bridge.c (100%) rename drivers/fpga/{ => altera}/altera-hps2fpga.c (100%) rename drivers/fpga/{ => altera}/altera-pr-ip-core-plat.c (100%) rename drivers/fpga/{ => altera}/altera-pr-ip-core.c (100%) rename drivers/fpga/{ => altera}/altera-ps-spi.c (100%) rename drivers/fpga/{ => altera}/socfpga-a10.c (100%) rename drivers/fpga/{ => altera}/socfpga.c (100%) rename drivers/fpga/{ => altera}/stratix10-soc.c (100%) rename drivers/fpga/{ => altera}/ts73xx-fpga.c (100%) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 657703b41b06e..885701b1356ad 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -12,52 +12,6 @@ menuconfig FPGA if FPGA -config FPGA_MGR_SOCFPGA - tristate "Altera SOCFPGA FPGA Manager" - depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST - help - FPGA manager driver support for Altera SOCFPGA. - -config FPGA_MGR_SOCFPGA_A10 - tristate "Altera SoCFPGA Arria10" - depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST - select REGMAP_MMIO - help - FPGA manager driver support for Altera Arria10 SoCFPGA. - -config ALTERA_PR_IP_CORE - tristate "Altera Partial Reconfiguration IP Core" - help - Core driver support for Altera Partial Reconfiguration IP component - -config ALTERA_PR_IP_CORE_PLAT - tristate "Platform support of Altera Partial Reconfiguration IP Core" - depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM - help - Platform driver support for Altera Partial Reconfiguration IP - component - -config FPGA_MGR_ALTERA_PS_SPI - tristate "Altera FPGA Passive Serial over SPI" - depends on SPI - select BITREVERSE - help - FPGA manager driver support for Altera Arria/Cyclone/Stratix - using the passive serial interface over SPI. - -config FPGA_MGR_ALTERA_CVP - tristate "Altera CvP FPGA Manager" - depends on PCI - help - FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V, - Arria 10 and Stratix10 Altera FPGAs using the CvP interface over PCIe. - -config FPGA_MGR_STRATIX10_SOC - tristate "Intel Stratix10 SoC FPGA Manager" - depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE) - help - FPGA manager driver support for the Intel Stratix10 SoC. - config FPGA_MGR_ICE40_SPI tristate "Lattice iCE40 SPI" depends on OF && SPI @@ -71,35 +25,12 @@ config FPGA_MGR_MACHXO2_SPI FPGA manager driver support for Lattice MachXO2 configuration over slave SPI interface. -config FPGA_MGR_TS73XX - tristate "Technologic Systems TS-73xx SBC FPGA Manager" - depends on ARCH_EP93XX && MACH_TS72XX - help - FPGA manager driver support for the Altera Cyclone II FPGA - present on the TS-73xx SBC boards. - config FPGA_BRIDGE tristate "FPGA Bridge Framework" help Say Y here if you want to support bridges connected between host processors and FPGAs or between FPGAs. -config SOCFPGA_FPGA_BRIDGE - tristate "Altera SoCFPGA FPGA Bridges" - depends on ARCH_INTEL_SOCFPGA && FPGA_BRIDGE - help - Say Y to enable drivers for FPGA bridges for Altera SOCFPGA - devices. - -config ALTERA_FREEZE_BRIDGE - tristate "Altera FPGA Freeze Bridge" - depends on FPGA_BRIDGE && HAS_IOMEM - help - Say Y to enable drivers for Altera FPGA Freeze bridges. A - freeze bridge is a bridge that exists in the FPGA fabric to - isolate one region of the FPGA from the busses while that - region is being reprogrammed. - config FPGA_REGION tristate "FPGA Region" depends on FPGA_BRIDGE @@ -115,6 +46,7 @@ config OF_FPGA_REGION Support for loading FPGA images by applying a Device Tree overlay. +source "drivers/fpga/altera/Kconfig" source "drivers/fpga/dfl/Kconfig" source "drivers/fpga/xilinx/Kconfig" diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 0868c7c4264d8..db83aeb997f24 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -7,25 +7,16 @@ obj-$(CONFIG_FPGA) += fpga-mgr.o # FPGA Manager Drivers -obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o -obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o -obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o -obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o -obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o -obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o -obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o -obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o # FPGA Bridge Drivers obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o -obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o -obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o # High Level Interfaces obj-$(CONFIG_FPGA_REGION) += fpga-region.o obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o +obj-$(CONFIG_FPGA_ALTERA) += altera/ obj-$(CONFIG_FPGA_DFL) += dfl/ obj-$(CONFIG_FPGA_XILINX) += xilinx/ diff --git a/drivers/fpga/altera/Kconfig b/drivers/fpga/altera/Kconfig new file mode 100644 index 0000000000000..87480445664f4 --- /dev/null +++ b/drivers/fpga/altera/Kconfig @@ -0,0 +1,79 @@ +config FPGA_ALTERA + bool "Altera Devices" + default y + help + If you have an altera fpga, say Y. + +if FPGA_ALTERA + +config FPGA_MGR_SOCFPGA + tristate "Altera SOCFPGA FPGA Manager" + depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST + help + FPGA manager driver support for Altera SOCFPGA. + +config FPGA_MGR_SOCFPGA_A10 + tristate "Altera SoCFPGA Arria10" + depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST + select REGMAP_MMIO + help + FPGA manager driver support for Altera Arria10 SoCFPGA. + +config ALTERA_PR_IP_CORE + tristate "Altera Partial Reconfiguration IP Core" + help + Core driver support for Altera Partial Reconfiguration IP component + +config ALTERA_PR_IP_CORE_PLAT + tristate "Platform support of Altera Partial Reconfiguration IP Core" + depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM + help + Platform driver support for Altera Partial Reconfiguration IP + component + +config FPGA_MGR_ALTERA_PS_SPI + tristate "Altera FPGA Passive Serial over SPI" + depends on SPI + select BITREVERSE + help + FPGA manager driver support for Altera Arria/Cyclone/Stratix + using the passive serial interface over SPI. + +config FPGA_MGR_ALTERA_CVP + tristate "Altera CvP FPGA Manager" + depends on PCI + help + FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V, + Arria 10 and Stratix10 Altera FPGAs using the CvP interface over PCIe. + +config FPGA_MGR_STRATIX10_SOC + tristate "Intel Stratix10 SoC FPGA Manager" + depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE) + help + FPGA manager driver support for the Intel Stratix10 SoC. + +config FPGA_MGR_TS73XX + tristate "Technologic Systems TS-73xx SBC FPGA Manager" + depends on ARCH_EP93XX && MACH_TS72XX + help + FPGA manager driver support for the Altera Cyclone II FPGA + present on the TS-73xx SBC boards. + +config ALTERA_FREEZE_BRIDGE + tristate "Altera FPGA Freeze Bridge" + depends on FPGA_BRIDGE && HAS_IOMEM + help + Say Y to enable drivers for Altera FPGA Freeze bridges. A + freeze bridge is a bridge that exists in the FPGA fabric to + isolate one region of the FPGA from the busses while that + region is being reprogrammed. + +config SOCFPGA_FPGA_BRIDGE + tristate "Altera SoCFPGA FPGA Bridges" + depends on ARCH_INTEL_SOCFPGA && FPGA_BRIDGE + help + Say Y to enable drivers for FPGA bridges for Altera SOCFPGA + devices. + +endif #FPGA_ALTERA + diff --git a/drivers/fpga/altera/Makefile b/drivers/fpga/altera/Makefile new file mode 100644 index 0000000000000..4d725c72fcbef --- /dev/null +++ b/drivers/fpga/altera/Makefile @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o +obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o +obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o +obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o +obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o +obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o +obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o +obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o +obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o +obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera/altera-cvp.c similarity index 100% rename from drivers/fpga/altera-cvp.c rename to drivers/fpga/altera/altera-cvp.c diff --git a/drivers/fpga/altera-fpga2sdram.c b/drivers/fpga/altera/altera-fpga2sdram.c similarity index 100% rename from drivers/fpga/altera-fpga2sdram.c rename to drivers/fpga/altera/altera-fpga2sdram.c diff --git a/drivers/fpga/altera-freeze-bridge.c b/drivers/fpga/altera/altera-freeze-bridge.c similarity index 100% rename from drivers/fpga/altera-freeze-bridge.c rename to drivers/fpga/altera/altera-freeze-bridge.c diff --git a/drivers/fpga/altera-hps2fpga.c b/drivers/fpga/altera/altera-hps2fpga.c similarity index 100% rename from drivers/fpga/altera-hps2fpga.c rename to drivers/fpga/altera/altera-hps2fpga.c diff --git a/drivers/fpga/altera-pr-ip-core-plat.c b/drivers/fpga/altera/altera-pr-ip-core-plat.c similarity index 100% rename from drivers/fpga/altera-pr-ip-core-plat.c rename to drivers/fpga/altera/altera-pr-ip-core-plat.c diff --git a/drivers/fpga/altera-pr-ip-core.c b/drivers/fpga/altera/altera-pr-ip-core.c similarity index 100% rename from drivers/fpga/altera-pr-ip-core.c rename to drivers/fpga/altera/altera-pr-ip-core.c diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera/altera-ps-spi.c similarity index 100% rename from drivers/fpga/altera-ps-spi.c rename to drivers/fpga/altera/altera-ps-spi.c diff --git a/drivers/fpga/socfpga-a10.c b/drivers/fpga/altera/socfpga-a10.c similarity index 100% rename from drivers/fpga/socfpga-a10.c rename to drivers/fpga/altera/socfpga-a10.c diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/altera/socfpga.c similarity index 100% rename from drivers/fpga/socfpga.c rename to drivers/fpga/altera/socfpga.c diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/altera/stratix10-soc.c similarity index 100% rename from drivers/fpga/stratix10-soc.c rename to drivers/fpga/altera/stratix10-soc.c diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/altera/ts73xx-fpga.c similarity index 100% rename from drivers/fpga/ts73xx-fpga.c rename to drivers/fpga/altera/ts73xx-fpga.c From patchwork Wed Jun 9 13:21:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12310117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1540CC48BCF for ; Wed, 9 Jun 2021 13:23:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F26776124C for ; Wed, 9 Jun 2021 13:23:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234079AbhFINZW (ORCPT ); Wed, 9 Jun 2021 09:25:22 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:27356 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236224AbhFINZM (ORCPT ); Wed, 9 Jun 2021 09:25:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1623244997; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hE6HSHMIRX+gAlRokY5aHJhvIk3ZJblkRJXqZXARHDc=; b=gJ1Hgxy4+Uccicwb7lXcelclfqVSA9Yo8YTzHg60A4JoW/GdI3svfQ/0OkVSPyNpFoEACW q11P7+9R1dxt89ARZCJJVC0QkRAZV+dDw+RCIg/mqwewUyZIx8l5o+7nKN0iKJtAw7fJ/z Z6Cs08WuRSUszqsKz1EXowmGoY0PAJU= Received: from mail-oi1-f198.google.com (mail-oi1-f198.google.com [209.85.167.198]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-2-m3e5CGHlODqFdjlKEi3MLQ-1; Wed, 09 Jun 2021 09:23:17 -0400 X-MC-Unique: m3e5CGHlODqFdjlKEi3MLQ-1 Received: by mail-oi1-f198.google.com with SMTP id p5-20020acabf050000b02901eed1481b82so9509665oif.20 for ; Wed, 09 Jun 2021 06:23:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hE6HSHMIRX+gAlRokY5aHJhvIk3ZJblkRJXqZXARHDc=; b=cM/KNEmegFWNOXBRRpBgXW1IViBQ4bagxO0RxRA0APWmCuo6gkdI4xf8FUwHtcqL9d lFd4h93hrhUXJZTpPhM9NG+LO9Ixtbnmq1iiITJIk4uwu++jjgXS5XhJeTvpzOF3ZzNK RqsFOgInOVU5AtyXN0ZfsPqPFKPXfTDUXHDNESv7644K1AY/Drb8NaVomJsxPN0tN5Ws oF24xmffu6UbLkv9Hrvefk9uTDbWQYSuxCr+nB3rp6Nm9C6z+xmScbykt8/PwG7ff20L hk3Gdl10GV3bBkUSWLwCnNL1hdSd2n1SS6QYrDZK5VusSZTjqjedAgT0rwqigDsOyt+3 7AjA== X-Gm-Message-State: AOAM532z3cRHDMgLuH/ChtOT7GBRmwOKsGj0//2Ey98G2BfhiWJhggB5 UZvy8nDtBDkjfMkGGBoGzU1KtqZbsTdSUZEdZS7X6X0I6lCVXn15UGeu48EEIukbi2iI7xtc/b5 bng9cf8TpdpHM3NTqY9+iKA== X-Received: by 2002:a9d:1b8:: with SMTP id e53mr21498146ote.252.1623244995630; Wed, 09 Jun 2021 06:23:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwr4NEx7Yve3wjhF1gwVJrTOehYjV/0qEGs38SXoho/7pOmP0syhetqKATX2jZzPm+B7Rcomg== X-Received: by 2002:a9d:1b8:: with SMTP id e53mr21498134ote.252.1623244995464; Wed, 09 Jun 2021 06:23:15 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 21sm3165654otd.21.2021.06.09.06.23.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 06:23:15 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH 4/7] fpga: lattice: reorganize to subdir layout Date: Wed, 9 Jun 2021 06:21:48 -0700 Message-Id: <20210609132151.3081379-6-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210609132151.3081379-1-trix@redhat.com> References: <20210609132151.3081379-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Create a lattice/ subdir Move ice40* and machxo2* files to it. Add a Kconfig and Makefile Signed-off-by: Tom Rix --- drivers/fpga/Kconfig | 14 +------------- drivers/fpga/Makefile | 13 +++++-------- drivers/fpga/lattice/Kconfig | 22 ++++++++++++++++++++++ drivers/fpga/lattice/Makefile | 4 ++++ drivers/fpga/{ => lattice}/ice40-spi.c | 0 drivers/fpga/{ => lattice}/machxo2-spi.c | 0 6 files changed, 32 insertions(+), 21 deletions(-) create mode 100644 drivers/fpga/lattice/Kconfig create mode 100644 drivers/fpga/lattice/Makefile rename drivers/fpga/{ => lattice}/ice40-spi.c (100%) rename drivers/fpga/{ => lattice}/machxo2-spi.c (100%) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 885701b1356ad..0cce719d6af84 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -12,19 +12,6 @@ menuconfig FPGA if FPGA -config FPGA_MGR_ICE40_SPI - tristate "Lattice iCE40 SPI" - depends on OF && SPI - help - FPGA manager driver support for Lattice iCE40 FPGAs over SPI. - -config FPGA_MGR_MACHXO2_SPI - tristate "Lattice MachXO2 SPI" - depends on SPI - help - FPGA manager driver support for Lattice MachXO2 configuration - over slave SPI interface. - config FPGA_BRIDGE tristate "FPGA Bridge Framework" help @@ -47,6 +34,7 @@ config OF_FPGA_REGION overlay. source "drivers/fpga/altera/Kconfig" +source "drivers/fpga/lattice/Kconfig" source "drivers/fpga/dfl/Kconfig" source "drivers/fpga/xilinx/Kconfig" diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index db83aeb997f24..9197698201e3a 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -4,19 +4,16 @@ # # Core FPGA Manager Framework -obj-$(CONFIG_FPGA) += fpga-mgr.o - -# FPGA Manager Drivers -obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o -obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o +obj-$(CONFIG_FPGA) += fpga-mgr.o # FPGA Bridge Drivers -obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o +obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o # High Level Interfaces -obj-$(CONFIG_FPGA_REGION) += fpga-region.o -obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o +obj-$(CONFIG_FPGA_REGION) += fpga-region.o +obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o obj-$(CONFIG_FPGA_ALTERA) += altera/ obj-$(CONFIG_FPGA_DFL) += dfl/ +obj-$(CONFIG_FPGA_LATTICE) += lattice/ obj-$(CONFIG_FPGA_XILINX) += xilinx/ diff --git a/drivers/fpga/lattice/Kconfig b/drivers/fpga/lattice/Kconfig new file mode 100644 index 0000000000000..4619aac49ef57 --- /dev/null +++ b/drivers/fpga/lattice/Kconfig @@ -0,0 +1,22 @@ +config FPGA_LATTICE + bool "Lattice Devices" + default y + help + If you have a lattic fpga, say Y. + +if FPGA_LATTICE + +config FPGA_MGR_ICE40_SPI + tristate "Lattice iCE40 SPI" + depends on OF && SPI + help + FPGA manager driver support for Lattice iCE40 FPGAs over SPI. + +config FPGA_MGR_MACHXO2_SPI + tristate "Lattice MachXO2 SPI" + depends on SPI + help + FPGA manager driver support for Lattice MachXO2 configuration + over slave SPI interface. + +endif #FPGA_LATTICE diff --git a/drivers/fpga/lattice/Makefile b/drivers/fpga/lattice/Makefile new file mode 100644 index 0000000000000..42d01c1b61704 --- /dev/null +++ b/drivers/fpga/lattice/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o +obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o diff --git a/drivers/fpga/ice40-spi.c b/drivers/fpga/lattice/ice40-spi.c similarity index 100% rename from drivers/fpga/ice40-spi.c rename to drivers/fpga/lattice/ice40-spi.c diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/lattice/machxo2-spi.c similarity index 100% rename from drivers/fpga/machxo2-spi.c rename to drivers/fpga/lattice/machxo2-spi.c From patchwork Wed Jun 9 13:21:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12310119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C22F8C48BCD for ; Wed, 9 Jun 2021 13:23:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ACB70613CC for ; Wed, 9 Jun 2021 13:23:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236262AbhFINZ3 (ORCPT ); Wed, 9 Jun 2021 09:25:29 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:54560 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236195AbhFINZU (ORCPT ); Wed, 9 Jun 2021 09:25:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1623245005; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=z30Ub+z2OjWJtR5c/iXeFpG9nHCwEt3UgVQc8aykjUY=; b=adSMwrCcxVCYVxhimz/o8kSxliXhKeWmR+7yUDuBnfzc7Ws6ume/KhOSLphGrnS36HwDwd eHUpQdhE0Oyijk+Ot7sTdwAP/E0TdXX3IMavMTgmF01W2q2i2WeYhpGVFlpMvxr/6G6Ii5 bZgYPHEVBVmbMAXiN1X+LIkquiN4JLs= Received: from mail-ot1-f69.google.com (mail-ot1-f69.google.com [209.85.210.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-400-3nHMd4f2N_WaWKyCKSuezg-1; Wed, 09 Jun 2021 09:23:24 -0400 X-MC-Unique: 3nHMd4f2N_WaWKyCKSuezg-1 Received: by mail-ot1-f69.google.com with SMTP id q20-20020a9d7c940000b02903f5a4101f8eso3499654otn.17 for ; Wed, 09 Jun 2021 06:23:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=z30Ub+z2OjWJtR5c/iXeFpG9nHCwEt3UgVQc8aykjUY=; b=Y3zUw3fPODY521DWMrUkiTxJW3ZCqNL03wE0wDFQFuR3aAzH+9gEI0o8cNrz0vhUBZ GKpzsNIa4PEr+ma4xCs633mwNvGidUqd3OBmIRTauhIf89qL3RvEG5piiSv/Z2OSN8v6 GNEbpFGbh7PEeTzE1xcVxfr1lOIGnF6HX5i+ssLcJanXQ0ewGAyExSLEfJVaeF8EeLqy ziI1nLZMjXydREyxR3d/r8REXUlFdvwuV5mxfj172ghQtFFDBv9TQUb4H8JZq127Z0c3 /rQ6PqFjk617HfZVYgsezH/+MbfjLV3pOuuszlfbNVYpXNQuAxDy3nYGsBAeH2Q5BQT9 Nl2w== X-Gm-Message-State: AOAM530KsnRbtxRkKK1vVqAyQySRkw2j+pwvpf8o1VYZYvP3N7+wbrql +TOtg1ZSzZJKVs/ZokLs47Vwq1QpkjWbEEaIg4ucrkC8OKKrhbrI9piFzDq2HsUhE9Rw4V7uTZC yv0BDHwLumOVjkXFr8S8ZiQ== X-Received: by 2002:aca:f488:: with SMTP id s130mr6325425oih.5.1623245003523; Wed, 09 Jun 2021 06:23:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxGZkuQlcHGNMAEUbmCa4ErDyEavEw7XXTSdMa/dKVrmhOsr0+aOpMSgBvnYm3yB4s0eiprzA== X-Received: by 2002:aca:f488:: with SMTP id s130mr6325411oih.5.1623245003321; Wed, 09 Jun 2021 06:23:23 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 21sm3165654otd.21.2021.06.09.06.23.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 06:23:23 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH 5/7] fpga: dfl: remove dfl- prefix on files Date: Wed, 9 Jun 2021 06:21:49 -0700 Message-Id: <20210609132151.3081379-7-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210609132151.3081379-1-trix@redhat.com> References: <20210609132151.3081379-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix It is not necessary to have a dfl- prefix on a file when the file is in a dfl/ subdir. Signed-off-by: Tom Rix --- Documentation/fpga/dfl.rst | 4 ++-- drivers/fpga/dfl/Makefile | 21 +++++++------------ ...{dfl-afu-dma-region.c => afu-dma-region.c} | 2 +- .../fpga/dfl/{dfl-afu-error.c => afu-error.c} | 2 +- .../fpga/dfl/{dfl-afu-main.c => afu-main.c} | 2 +- .../dfl/{dfl-afu-region.c => afu-region.c} | 2 +- drivers/fpga/dfl/{dfl-afu.h => afu.h} | 6 +++--- drivers/fpga/dfl/{dfl-fme-br.c => fme-br.c} | 2 +- .../fpga/dfl/{dfl-fme-error.c => fme-error.c} | 2 +- .../fpga/dfl/{dfl-fme-main.c => fme-main.c} | 2 +- drivers/fpga/dfl/{dfl-fme-mgr.c => fme-mgr.c} | 2 +- .../fpga/dfl/{dfl-fme-perf.c => fme-perf.c} | 2 +- drivers/fpga/dfl/{dfl-fme-pr.c => fme-pr.c} | 4 ++-- drivers/fpga/dfl/{dfl-fme-pr.h => fme-pr.h} | 6 +++--- .../dfl/{dfl-fme-region.c => fme-region.c} | 2 +- drivers/fpga/dfl/{dfl-fme.h => fme.h} | 6 +++--- .../dfl/{dfl-n3000-nios.c => n3000-nios.c} | 0 drivers/fpga/dfl/{dfl-pci.c => pci.c} | 0 18 files changed, 31 insertions(+), 36 deletions(-) rename drivers/fpga/dfl/{dfl-afu-dma-region.c => afu-dma-region.c} (99%) rename drivers/fpga/dfl/{dfl-afu-error.c => afu-error.c} (99%) rename drivers/fpga/dfl/{dfl-afu-main.c => afu-main.c} (99%) rename drivers/fpga/dfl/{dfl-afu-region.c => afu-region.c} (99%) rename drivers/fpga/dfl/{dfl-afu.h => afu.h} (98%) rename drivers/fpga/dfl/{dfl-fme-br.c => fme-br.c} (99%) rename drivers/fpga/dfl/{dfl-fme-error.c => fme-error.c} (99%) rename drivers/fpga/dfl/{dfl-fme-main.c => fme-main.c} (99%) rename drivers/fpga/dfl/{dfl-fme-mgr.c => fme-mgr.c} (99%) rename drivers/fpga/dfl/{dfl-fme-perf.c => fme-perf.c} (99%) rename drivers/fpga/dfl/{dfl-fme-pr.c => fme-pr.c} (99%) rename drivers/fpga/dfl/{dfl-fme-pr.h => fme-pr.h} (96%) rename drivers/fpga/dfl/{dfl-fme-region.c => fme-region.c} (98%) rename drivers/fpga/dfl/{dfl-fme.h => fme.h} (95%) rename drivers/fpga/dfl/{dfl-n3000-nios.c => n3000-nios.c} (100%) rename drivers/fpga/dfl/{dfl-pci.c => pci.c} (100%) diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index ccc33f199df2a..696ab63d9e6bf 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -210,7 +210,7 @@ device and etc. Its driver module is always loaded first once the device is created by the system. This driver plays an infrastructural role in the driver architecture. It locates the DFLs in the device memory, handles them and related resources to common interfaces from DFL framework for enumeration. -(Please refer to drivers/fpga/dfl.c for detailed enumeration APIs). +(Please refer to drivers/fpga/dfl/dfl.c for detailed enumeration APIs). The FPGA Management Engine (FME) driver is a platform driver which is loaded automatically after FME platform device creation from the DFL device module. It @@ -499,7 +499,7 @@ In some cases, we may need to add some new private features to existing FIUs framework, as each private feature will be parsed automatically and related mmio resources can be found under FIU platform device created by DFL framework. Developer only needs to provide a sub feature driver with matched feature id. -FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) +FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl/fme-pr.c) could be a reference. Location of DFLs on a PCI Device diff --git a/drivers/fpga/dfl/Makefile b/drivers/fpga/dfl/Makefile index 724792039026f..29c9dbabd9f77 100644 --- a/drivers/fpga/dfl/Makefile +++ b/drivers/fpga/dfl/Makefile @@ -4,16 +4,11 @@ obj-$(CONFIG_FPGA_DFL) += dfl.o obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o -obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o -obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o -obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o -obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o -obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o - -dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o \ - dfl-fme-perf.o -dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o \ - dfl-afu-error.o - - - +obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += fme-br.o +obj-$(CONFIG_FPGA_DFL_FME_MGR) += fme-mgr.o +obj-$(CONFIG_FPGA_DFL_FME_REGION) += fme-region.o +obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += n3000-nios.o +obj-$(CONFIG_FPGA_DFL_PCI) += pci.o + +dfl-fme-objs := fme-main.o fme-pr.o fme-error.o fme-perf.o +dfl-afu-objs := afu-main.o afu-region.o afu-dma-region.o afu-error.o diff --git a/drivers/fpga/dfl/dfl-afu-dma-region.c b/drivers/fpga/dfl/afu-dma-region.c similarity index 99% rename from drivers/fpga/dfl/dfl-afu-dma-region.c rename to drivers/fpga/dfl/afu-dma-region.c index 02b60fde04305..1cf3acbdb0918 100644 --- a/drivers/fpga/dfl/dfl-afu-dma-region.c +++ b/drivers/fpga/dfl/afu-dma-region.c @@ -14,7 +14,7 @@ #include #include -#include "dfl-afu.h" +#include "afu.h" void afu_dma_region_init(struct dfl_feature_platform_data *pdata) { diff --git a/drivers/fpga/dfl/dfl-afu-error.c b/drivers/fpga/dfl/afu-error.c similarity index 99% rename from drivers/fpga/dfl/dfl-afu-error.c rename to drivers/fpga/dfl/afu-error.c index ab7be62173681..4e04a9de314d5 100644 --- a/drivers/fpga/dfl/dfl-afu-error.c +++ b/drivers/fpga/dfl/afu-error.c @@ -17,7 +17,7 @@ #include #include -#include "dfl-afu.h" +#include "afu.h" #define PORT_ERROR_MASK 0x8 #define PORT_ERROR 0x10 diff --git a/drivers/fpga/dfl/dfl-afu-main.c b/drivers/fpga/dfl/afu-main.c similarity index 99% rename from drivers/fpga/dfl/dfl-afu-main.c rename to drivers/fpga/dfl/afu-main.c index 7f621e96d3b8d..9681ab83c02ee 100644 --- a/drivers/fpga/dfl/dfl-afu-main.c +++ b/drivers/fpga/dfl/afu-main.c @@ -19,7 +19,7 @@ #include #include -#include "dfl-afu.h" +#include "afu.h" #define RST_POLL_INVL 10 /* us */ #define RST_POLL_TIMEOUT 1000 /* us */ diff --git a/drivers/fpga/dfl/dfl-afu-region.c b/drivers/fpga/dfl/afu-region.c similarity index 99% rename from drivers/fpga/dfl/dfl-afu-region.c rename to drivers/fpga/dfl/afu-region.c index 0804b7a0c2986..0efcdb2a388e3 100644 --- a/drivers/fpga/dfl/dfl-afu-region.c +++ b/drivers/fpga/dfl/afu-region.c @@ -8,7 +8,7 @@ * Wu Hao * Xiao Guangrong */ -#include "dfl-afu.h" +#include "afu.h" /** * afu_mmio_region_init - init function for afu mmio region support diff --git a/drivers/fpga/dfl/dfl-afu.h b/drivers/fpga/dfl/afu.h similarity index 98% rename from drivers/fpga/dfl/dfl-afu.h rename to drivers/fpga/dfl/afu.h index e5020e2b1f3df..1ea7945218d57 100644 --- a/drivers/fpga/dfl/dfl-afu.h +++ b/drivers/fpga/dfl/afu.h @@ -14,8 +14,8 @@ * Henry Mitchel */ -#ifndef __DFL_AFU_H -#define __DFL_AFU_H +#ifndef __AFU_H +#define __AFU_H #include @@ -106,4 +106,4 @@ extern const struct dfl_feature_ops port_err_ops; extern const struct dfl_feature_id port_err_id_table[]; extern const struct attribute_group port_err_group; -#endif /* __DFL_AFU_H */ +#endif /* __AFU_H */ diff --git a/drivers/fpga/dfl/dfl-fme-br.c b/drivers/fpga/dfl/fme-br.c similarity index 99% rename from drivers/fpga/dfl/dfl-fme-br.c rename to drivers/fpga/dfl/fme-br.c index 3ff9f3a687ce5..ee321903b2885 100644 --- a/drivers/fpga/dfl/dfl-fme-br.c +++ b/drivers/fpga/dfl/fme-br.c @@ -17,7 +17,7 @@ #include #include "dfl.h" -#include "dfl-fme-pr.h" +#include "fme-pr.h" struct fme_br_priv { struct dfl_fme_br_pdata *pdata; diff --git a/drivers/fpga/dfl/dfl-fme-error.c b/drivers/fpga/dfl/fme-error.c similarity index 99% rename from drivers/fpga/dfl/dfl-fme-error.c rename to drivers/fpga/dfl/fme-error.c index 51c2892ec06d5..97c94a87d053b 100644 --- a/drivers/fpga/dfl/dfl-fme-error.c +++ b/drivers/fpga/dfl/fme-error.c @@ -19,7 +19,7 @@ #include #include "dfl.h" -#include "dfl-fme.h" +#include "fme.h" #define FME_ERROR_MASK 0x8 #define FME_ERROR 0x10 diff --git a/drivers/fpga/dfl/dfl-fme-main.c b/drivers/fpga/dfl/fme-main.c similarity index 99% rename from drivers/fpga/dfl/dfl-fme-main.c rename to drivers/fpga/dfl/fme-main.c index 77ea04d4edbef..05676c5a623b1 100644 --- a/drivers/fpga/dfl/dfl-fme-main.c +++ b/drivers/fpga/dfl/fme-main.c @@ -22,7 +22,7 @@ #include #include "dfl.h" -#include "dfl-fme.h" +#include "fme.h" static ssize_t ports_num_show(struct device *dev, struct device_attribute *attr, char *buf) diff --git a/drivers/fpga/dfl/dfl-fme-mgr.c b/drivers/fpga/dfl/fme-mgr.c similarity index 99% rename from drivers/fpga/dfl/dfl-fme-mgr.c rename to drivers/fpga/dfl/fme-mgr.c index d5861d13b3069..ae2b45abbe3aa 100644 --- a/drivers/fpga/dfl/dfl-fme-mgr.c +++ b/drivers/fpga/dfl/fme-mgr.c @@ -22,7 +22,7 @@ #include #include -#include "dfl-fme-pr.h" +#include "fme-pr.h" /* FME Partial Reconfiguration Sub Feature Register Set */ #define FME_PR_DFH 0x0 diff --git a/drivers/fpga/dfl/dfl-fme-perf.c b/drivers/fpga/dfl/fme-perf.c similarity index 99% rename from drivers/fpga/dfl/dfl-fme-perf.c rename to drivers/fpga/dfl/fme-perf.c index 4299145ef347e..451d7b6e0ac1f 100644 --- a/drivers/fpga/dfl/dfl-fme-perf.c +++ b/drivers/fpga/dfl/fme-perf.c @@ -18,7 +18,7 @@ #include #include "dfl.h" -#include "dfl-fme.h" +#include "fme.h" /* * Performance Counter Registers for Cache. diff --git a/drivers/fpga/dfl/dfl-fme-pr.c b/drivers/fpga/dfl/fme-pr.c similarity index 99% rename from drivers/fpga/dfl/dfl-fme-pr.c rename to drivers/fpga/dfl/fme-pr.c index d61ce9a188792..aed4f061c0bf2 100644 --- a/drivers/fpga/dfl/dfl-fme-pr.c +++ b/drivers/fpga/dfl/fme-pr.c @@ -26,8 +26,8 @@ #include #include "dfl.h" -#include "dfl-fme.h" -#include "dfl-fme-pr.h" +#include "fme.h" +#include "fme-pr.h" static struct dfl_fme_region * dfl_fme_region_find_by_port_id(struct dfl_fme *fme, int port_id) diff --git a/drivers/fpga/dfl/dfl-fme-pr.h b/drivers/fpga/dfl/fme-pr.h similarity index 96% rename from drivers/fpga/dfl/dfl-fme-pr.h rename to drivers/fpga/dfl/fme-pr.h index 096a699089d30..65b33cdeaf80d 100644 --- a/drivers/fpga/dfl/dfl-fme-pr.h +++ b/drivers/fpga/dfl/fme-pr.h @@ -15,8 +15,8 @@ * Henry Mitchel */ -#ifndef __DFL_FME_PR_H -#define __DFL_FME_PR_H +#ifndef __FME_PR_H +#define __FME_PR_H #include @@ -81,4 +81,4 @@ struct dfl_fme_mgr_pdata { #define DFL_FPGA_FME_BRIDGE "dfl-fme-bridge" #define DFL_FPGA_FME_REGION "dfl-fme-region" -#endif /* __DFL_FME_PR_H */ +#endif /* __FME_PR_H */ diff --git a/drivers/fpga/dfl/dfl-fme-region.c b/drivers/fpga/dfl/fme-region.c similarity index 98% rename from drivers/fpga/dfl/dfl-fme-region.c rename to drivers/fpga/dfl/fme-region.c index 1eeb42af10122..412609ebad148 100644 --- a/drivers/fpga/dfl/dfl-fme-region.c +++ b/drivers/fpga/dfl/fme-region.c @@ -17,7 +17,7 @@ #include #include -#include "dfl-fme-pr.h" +#include "fme-pr.h" static int fme_region_get_bridges(struct fpga_region *region) { diff --git a/drivers/fpga/dfl/dfl-fme.h b/drivers/fpga/dfl/fme.h similarity index 95% rename from drivers/fpga/dfl/dfl-fme.h rename to drivers/fpga/dfl/fme.h index 4195dd68193e7..300b6cc5cb63f 100644 --- a/drivers/fpga/dfl/dfl-fme.h +++ b/drivers/fpga/dfl/fme.h @@ -15,8 +15,8 @@ * Henry Mitchel */ -#ifndef __DFL_FME_H -#define __DFL_FME_H +#ifndef __FME_H +#define __FME_H /** * struct dfl_fme - dfl fme private data @@ -41,4 +41,4 @@ extern const struct attribute_group fme_global_err_group; extern const struct dfl_feature_ops fme_perf_ops; extern const struct dfl_feature_id fme_perf_id_table[]; -#endif /* __DFL_FME_H */ +#endif /* __FME_H */ diff --git a/drivers/fpga/dfl/dfl-n3000-nios.c b/drivers/fpga/dfl/n3000-nios.c similarity index 100% rename from drivers/fpga/dfl/dfl-n3000-nios.c rename to drivers/fpga/dfl/n3000-nios.c diff --git a/drivers/fpga/dfl/dfl-pci.c b/drivers/fpga/dfl/pci.c similarity index 100% rename from drivers/fpga/dfl/dfl-pci.c rename to drivers/fpga/dfl/pci.c From patchwork Wed Jun 9 13:21:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12310121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69267C48BCF for ; Wed, 9 Jun 2021 13:23:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 54F02613AE for ; Wed, 9 Jun 2021 13:23:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236300AbhFINZe (ORCPT ); Wed, 9 Jun 2021 09:25:34 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:28798 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236306AbhFINZX (ORCPT ); Wed, 9 Jun 2021 09:25:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1623245009; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qViXgyeh1dlyqh22Awn1t3CyyorftxIelVJ9ElQQ5YY=; b=gXU8yA2yvF+nwtWA8QsfPrOB6Pdkm7WfzhoTkZ31qFrGvlHwgbuy9v5EWD2LSjMEKsqvj5 LpJ1N49kiAuyWJKLqu9hRjOdwHT9dMuLHFr9wFcys7KxXn+B6v49y5qaz8W4nHDImiyaIV gAIRif9BVbGLbCgtobaVm6hNicNt2e8= Received: from mail-oi1-f197.google.com (mail-oi1-f197.google.com [209.85.167.197]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-517-A13i03I1Pi6QYqjzqn9MzQ-1; Wed, 09 Jun 2021 09:23:27 -0400 X-MC-Unique: A13i03I1Pi6QYqjzqn9MzQ-1 Received: by mail-oi1-f197.google.com with SMTP id j20-20020aca17140000b02901f3ef48ce7dso4584751oii.12 for ; Wed, 09 Jun 2021 06:23:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qViXgyeh1dlyqh22Awn1t3CyyorftxIelVJ9ElQQ5YY=; b=GV2HYYzv8IpkysRC09lZT/uQaNzPzJP/1h0H8v0PPOgqcybSbleNdUZxo3sqHxi3vB a1bvZ+ghVwxZ6SQjSUt7mGYGdbnFMHZOekqgm/kNX6r15/aViDTYy0K4SV5KZqPdIspy TDLmQ4FcmTZfkbX+9UKPz5CY/3AdvwmYkbuFbmBre7JSX6t0p7AePMu7R9IH1SDik2Q0 w87mMfqCpnHlRyBfr9WdGGLppZ4W8drTuIuAePa8wiA7rLMqClYC1quK/MyKf8VqQvfL EnmIaB2pvq8a91kiXw7u3I4awEB20LvkAhohbuK1+7+Jc/nD1u26khCDhW3wcnaafTfp 4hAA== X-Gm-Message-State: AOAM533m5Jv+leKexACUtzp7ueVO88Zoe+ciNurw9Qr82AlDZyNWs7qo vTn07FJpby1CpW+s4ga4xd4P0TwVANb8+t1pan6RAGEj2bjLUFvbSd1pAfPcQ0jRQjB4VqqRK5x vjmX1XR+3uJPzi8I3iuOfRQ== X-Received: by 2002:a9d:66d9:: with SMTP id t25mr3492363otm.217.1623245006772; Wed, 09 Jun 2021 06:23:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyYlq5NQAg9r5rM56eciALlRRoXOllzEovCjy257M0FuEL28u377Zg2s+BEXW70oM5w182g1Q== X-Received: by 2002:a9d:66d9:: with SMTP id t25mr3492350otm.217.1623245006642; Wed, 09 Jun 2021 06:23:26 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 21sm3165654otd.21.2021.06.09.06.23.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 06:23:26 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH 6/7] fpga: xilinx: remove xilinx- prefix on files Date: Wed, 9 Jun 2021 06:21:50 -0700 Message-Id: <20210609132151.3081379-8-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210609132151.3081379-1-trix@redhat.com> References: <20210609132151.3081379-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix It is not necessary to have a xilinx- prefix on a file when the file is in a xilinx/ subdir. Signed-off-by: Tom Rix --- drivers/fpga/xilinx/Makefile | 4 ++-- drivers/fpga/xilinx/{xilinx-pr-decoupler.c => pr-decoupler.c} | 0 drivers/fpga/xilinx/{xilinx-spi.c => spi.c} | 0 3 files changed, 2 insertions(+), 2 deletions(-) rename drivers/fpga/xilinx/{xilinx-pr-decoupler.c => pr-decoupler.c} (100%) rename drivers/fpga/xilinx/{xilinx-spi.c => spi.c} (100%) diff --git a/drivers/fpga/xilinx/Makefile b/drivers/fpga/xilinx/Makefile index 7bb7543412790..4ac727d03e140 100644 --- a/drivers/fpga/xilinx/Makefile +++ b/drivers/fpga/xilinx/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o -obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o +obj-$(CONFIG_XILINX_PR_DECOUPLER) += pr-decoupler.o +obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += spi.o obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o diff --git a/drivers/fpga/xilinx/xilinx-pr-decoupler.c b/drivers/fpga/xilinx/pr-decoupler.c similarity index 100% rename from drivers/fpga/xilinx/xilinx-pr-decoupler.c rename to drivers/fpga/xilinx/pr-decoupler.c diff --git a/drivers/fpga/xilinx/xilinx-spi.c b/drivers/fpga/xilinx/spi.c similarity index 100% rename from drivers/fpga/xilinx/xilinx-spi.c rename to drivers/fpga/xilinx/spi.c From patchwork Wed Jun 9 13:21:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12310123 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49312C48BE0 for ; Wed, 9 Jun 2021 13:23:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 36A93613E3 for ; Wed, 9 Jun 2021 13:23:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236217AbhFINZf (ORCPT ); Wed, 9 Jun 2021 09:25:35 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:26282 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236309AbhFINZ1 (ORCPT ); Wed, 9 Jun 2021 09:25:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1623245013; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GMoGoh2HRdMM9sJwX6YN1+PVxLx5DD2e1fp3oIQPxak=; b=fVyw/Yohktt1VX6K0t5VFz9unrrIT6uLS54XE2O8Sg498f+/1o+MIwc6ZIUBmfF0TMMBB0 tEC2pHK3M5/4s30nmRxwVr0tYwE9l5Yabyb5PDMiWIE42mZlPPvgnCrWM1zARiiifsfHPq bDUkZ0nNw2RX4QofOuVJMnL1/cFoSMw= Received: from mail-oi1-f199.google.com (mail-oi1-f199.google.com [209.85.167.199]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-37-nuG4BnPnPXW8bH9bBdMyQA-1; Wed, 09 Jun 2021 09:23:32 -0400 X-MC-Unique: nuG4BnPnPXW8bH9bBdMyQA-1 Received: by mail-oi1-f199.google.com with SMTP id y137-20020aca4b8f0000b02901f1fb748c74so7045434oia.21 for ; Wed, 09 Jun 2021 06:23:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GMoGoh2HRdMM9sJwX6YN1+PVxLx5DD2e1fp3oIQPxak=; b=gDDh/SfrkGVXmhL6ijMGRnB2TNsdDIAYSU7h0omCHSOcDYjMnLvCHirb6avKdSTa2Q BHbmBb4k0nwLUH1qudnqA24hTVVh6xxT8VFRAm7MFIyd9xQLU9UeLePy2LhJo/JG5FeR ezmtN4o1rN2hJT1oc3FU1R8g2VYyY7K6TdKLEqqizuExiAp78Kra0hBnZc0kh2yE4tK4 7stGZS/6k7EzXxJ5pHt+Eq5O0hWRbCgZXflgVQFreFFaGJMiDpWfw37IXlfUy5ovmFIQ 0PeYGriNokLbGYNzwyFKRTK0kV3AcXel4uqLneuK89TkLX7vVl9ZANVx+npKi1egzLiD VYNw== X-Gm-Message-State: AOAM5302sVThJuJ+Qwc5DyjQyV+3stT9kI6un6jDgl7rOvErABDS95Qz fvIUhx0kyyfl3OKVRixa/fjLMPzDVGG9qetl9QcV3n5AcwS3WrJjB3ppCWzFfy4D/iUdNokoyr9 f4TEQTaLnd72S95X1hKKPkQ== X-Received: by 2002:a9d:1d21:: with SMTP id m30mr23363350otm.145.1623245010291; Wed, 09 Jun 2021 06:23:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJydARdiHq8phH1rVCd2rtPnu21b5nt/oM27/i7eYYIcqaQSBvNa5sJkdoPzOFhOlfjHs69E/w== X-Received: by 2002:a9d:1d21:: with SMTP id m30mr23363338otm.145.1623245010121; Wed, 09 Jun 2021 06:23:30 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 21sm3165654otd.21.2021.06.09.06.23.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 06:23:29 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH 7/7] fpga: altera: remove altera- prefix on files Date: Wed, 9 Jun 2021 06:21:51 -0700 Message-Id: <20210609132151.3081379-9-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210609132151.3081379-1-trix@redhat.com> References: <20210609132151.3081379-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix It is not necessary to have an altera- prefix on a file when the file is in an altera/ subdir. Signed-off-by: Tom Rix --- drivers/fpga/altera/Makefile | 12 ++++++------ drivers/fpga/altera/{altera-cvp.c => cvp.c} | 0 .../altera/{altera-fpga2sdram.c => fpga2sdram.c} | 0 .../{altera-freeze-bridge.c => freeze-bridge.c} | 0 .../fpga/altera/{altera-hps2fpga.c => hps2fpga.c} | 0 .../{altera-pr-ip-core-plat.c => pr-ip-core-plat.c} | 0 .../altera/{altera-pr-ip-core.c => pr-ip-core.c} | 0 drivers/fpga/altera/{altera-ps-spi.c => ps-spi.c} | 0 8 files changed, 6 insertions(+), 6 deletions(-) rename drivers/fpga/altera/{altera-cvp.c => cvp.c} (100%) rename drivers/fpga/altera/{altera-fpga2sdram.c => fpga2sdram.c} (100%) rename drivers/fpga/altera/{altera-freeze-bridge.c => freeze-bridge.c} (100%) rename drivers/fpga/altera/{altera-hps2fpga.c => hps2fpga.c} (100%) rename drivers/fpga/altera/{altera-pr-ip-core-plat.c => pr-ip-core-plat.c} (100%) rename drivers/fpga/altera/{altera-pr-ip-core.c => pr-ip-core.c} (100%) rename drivers/fpga/altera/{altera-ps-spi.c => ps-spi.c} (100%) diff --git a/drivers/fpga/altera/Makefile b/drivers/fpga/altera/Makefile index 4d725c72fcbef..c2d626cd1f540 100644 --- a/drivers/fpga/altera/Makefile +++ b/drivers/fpga/altera/Makefile @@ -1,12 +1,12 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o -obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o -obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o -obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o -obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o +obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += freeze-bridge.o +obj-$(CONFIG_ALTERA_PR_IP_CORE) += pr-ip-core.o +obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += pr-ip-core-plat.o +obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += cvp.o +obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += ps-spi.o obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o -obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o +obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += hps2fpga.o fpga2sdram.o diff --git a/drivers/fpga/altera/altera-cvp.c b/drivers/fpga/altera/cvp.c similarity index 100% rename from drivers/fpga/altera/altera-cvp.c rename to drivers/fpga/altera/cvp.c diff --git a/drivers/fpga/altera/altera-fpga2sdram.c b/drivers/fpga/altera/fpga2sdram.c similarity index 100% rename from drivers/fpga/altera/altera-fpga2sdram.c rename to drivers/fpga/altera/fpga2sdram.c diff --git a/drivers/fpga/altera/altera-freeze-bridge.c b/drivers/fpga/altera/freeze-bridge.c similarity index 100% rename from drivers/fpga/altera/altera-freeze-bridge.c rename to drivers/fpga/altera/freeze-bridge.c diff --git a/drivers/fpga/altera/altera-hps2fpga.c b/drivers/fpga/altera/hps2fpga.c similarity index 100% rename from drivers/fpga/altera/altera-hps2fpga.c rename to drivers/fpga/altera/hps2fpga.c diff --git a/drivers/fpga/altera/altera-pr-ip-core-plat.c b/drivers/fpga/altera/pr-ip-core-plat.c similarity index 100% rename from drivers/fpga/altera/altera-pr-ip-core-plat.c rename to drivers/fpga/altera/pr-ip-core-plat.c diff --git a/drivers/fpga/altera/altera-pr-ip-core.c b/drivers/fpga/altera/pr-ip-core.c similarity index 100% rename from drivers/fpga/altera/altera-pr-ip-core.c rename to drivers/fpga/altera/pr-ip-core.c diff --git a/drivers/fpga/altera/altera-ps-spi.c b/drivers/fpga/altera/ps-spi.c similarity index 100% rename from drivers/fpga/altera/altera-ps-spi.c rename to drivers/fpga/altera/ps-spi.c