From patchwork Fri Jun 11 23:41:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F40ACC48BE5 for ; Fri, 11 Jun 2021 23:43:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B91EC613B8 for ; Fri, 11 Jun 2021 23:43:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B91EC613B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53072 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrqod-0005ot-SU for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:43:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46980) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmb-0002CJ-3b for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:49 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]:40457) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmZ-0002Ww-7d for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:48 -0400 Received: by mail-pl1-x635.google.com with SMTP id e7so3597130plj.7 for ; Fri, 11 Jun 2021 16:41:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5uMDnDezH8ov3NNnW0R3HVYll0BfUqU9E5lc10lEDLE=; b=b6WPe+KTdqsJPklkzvOPNM3pYY0KxQJgFZiXbbtRZYiY6tpIahZlG7PP97FDeQPZfh P9ifPm0cacZyRlvzddG4rO3PK4wRniIg2tkGyXblGneLzEU1k223fpBmEOdQz7CsNqzR tojyhupRXNcBPpKGQfD+Gh/RCcKbGFxuENl7N7Zl4/poVopW2gOqjt/YfTL89lCz3aeB a/cuhUNezVDpcK2/RBduNqceu2zKT4LWP7VHtXfUB8ZPFA9ivhwYRoea8u3XS5r3WYtq zWshI3W5lSPjIqhGpQNNqvlnZe/BQqWyrJN8DHWd/hqy5RksxPnxPsz7a79LP+oZRkG0 1LLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5uMDnDezH8ov3NNnW0R3HVYll0BfUqU9E5lc10lEDLE=; b=e2ZZiLVhjKNUd1uPxl5aTKfqlli9X3RiAFYxGqpNr1RXZggjRwwku9a5gRqQCYeltr ejBvD7hFUHK1CAP/CpS9a7Rvw4AcUx4VE8BiU57EaOpeF1z/awjaY8wkQvtTKkiyPcPn y2F2SX8FtbOtcaZs/zt5VhEVC1FVfGMs+W3LdD4XUJmv7gzeCZKEaQfd0RBax9S7W5qq iOxLXO1C2ZD4zDTE+8oR3iHDwUbXIsSV+pF9Lr8APw9OvYolRJHfOq8bCMSzz12uJctr Wz0KE42LYp+8PBFJMAWpPc4CQbzBcV2aAvFWkd6bH4/O8qRs2fWQH3d0ex8u4vsmR2Zr qojg== X-Gm-Message-State: AOAM531Y7AbztgiaIbO24L7LSAw/v2m2qwRokygCsR9DRxEEjG7PRd6N Ody9G61gzdaVzPYi+A1bSyilvQxeuZPjpQ== X-Google-Smtp-Source: ABdhPJwv5w+qju1lbPjYaG1T5O86JQlO1HonObrBbI21o0UkBqb9amBxwSvM1Euv/Mi2x8CzuGpX9w== X-Received: by 2002:a17:90a:d590:: with SMTP id v16mr6737382pju.205.1623454905921; Fri, 11 Jun 2021 16:41:45 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 01/34] meson: Split out tcg/meson.build Date: Fri, 11 Jun 2021 16:41:11 -0700 Message-Id: <20210611234144.653682-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- meson.build | 8 +------- tcg/meson.build | 13 +++++++++++++ 2 files changed, 14 insertions(+), 7 deletions(-) create mode 100644 tcg/meson.build diff --git a/meson.build b/meson.build index d2a9ce91f5..b5b2cf9e04 100644 --- a/meson.build +++ b/meson.build @@ -1970,14 +1970,7 @@ common_ss.add(capstone) specific_ss.add(files('cpu.c', 'disas.c', 'gdbstub.c'), capstone) specific_ss.add(when: 'CONFIG_TCG', if_true: files( 'fpu/softfloat.c', - 'tcg/optimize.c', - 'tcg/tcg-common.c', - 'tcg/tcg-op-gvec.c', - 'tcg/tcg-op-vec.c', - 'tcg/tcg-op.c', - 'tcg/tcg.c', )) -specific_ss.add(when: 'CONFIG_TCG_INTERPRETER', if_true: files('tcg/tci.c')) # Work around a gcc bug/misfeature wherein constant propagation looks # through an alias: @@ -2007,6 +2000,7 @@ subdir('net') subdir('replay') subdir('semihosting') subdir('hw') +subdir('tcg') subdir('accel') subdir('plugins') subdir('bsd-user') diff --git a/tcg/meson.build b/tcg/meson.build new file mode 100644 index 0000000000..84064a341e --- /dev/null +++ b/tcg/meson.build @@ -0,0 +1,13 @@ +tcg_ss = ss.source_set() + +tcg_ss.add(files( + 'optimize.c', + 'tcg.c', + 'tcg-common.c', + 'tcg-op.c', + 'tcg-op-gvec.c', + 'tcg-op-vec.c', +)) +tcg_ss.add(when: 'CONFIG_TCG_INTERPRETER', if_true: files('tci.c')) + +specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss) From patchwork Fri Jun 11 23:41:12 2021 Content-Type: text/plain; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 02/34] meson: Split out fpu/meson.build Date: Fri, 11 Jun 2021 16:41:12 -0700 Message-Id: <20210611234144.653682-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- meson.build | 4 +--- fpu/meson.build | 1 + 2 files changed, 2 insertions(+), 3 deletions(-) create mode 100644 fpu/meson.build diff --git a/meson.build b/meson.build index b5b2cf9e04..a2311eda6e 100644 --- a/meson.build +++ b/meson.build @@ -1968,9 +1968,6 @@ subdir('softmmu') common_ss.add(capstone) specific_ss.add(files('cpu.c', 'disas.c', 'gdbstub.c'), capstone) -specific_ss.add(when: 'CONFIG_TCG', if_true: files( - 'fpu/softfloat.c', -)) # Work around a gcc bug/misfeature wherein constant propagation looks # through an alias: @@ -2001,6 +1998,7 @@ subdir('replay') subdir('semihosting') subdir('hw') subdir('tcg') +subdir('fpu') subdir('accel') subdir('plugins') subdir('bsd-user') diff --git a/fpu/meson.build b/fpu/meson.build new file mode 100644 index 0000000000..1a9992ded5 --- /dev/null +++ b/fpu/meson.build @@ -0,0 +1 @@ +specific_ss.add(when: 'CONFIG_TCG', if_true: files('softfloat.c')) From patchwork Fri Jun 11 23:41:13 2021 Content-Type: text/plain; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 03/34] tcg: Re-order tcg_region_init vs tcg_prologue_init Date: Fri, 11 Jun 2021 16:41:13 -0700 Message-Id: <20210611234144.653682-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Instead of delaying tcg_region_init until after tcg_prologue_init is complete, do tcg_region_init first and let tcg_prologue_init shrink the first region by the size of the generated prologue. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- accel/tcg/tcg-all.c | 11 --------- accel/tcg/translate-all.c | 3 +++ bsd-user/main.c | 1 - linux-user/main.c | 1 - tcg/tcg.c | 52 ++++++++++++++------------------------- 5 files changed, 22 insertions(+), 46 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index e378c2db73..f132033999 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -111,17 +111,6 @@ static int tcg_init(MachineState *ms) tcg_exec_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); mttcg_enabled = s->mttcg_enabled; - - /* - * Initialize TCG regions only for softmmu. - * - * This needs to be done later for user mode, because the prologue - * generation needs to be delayed so that GUEST_BASE is already set. - */ -#ifndef CONFIG_USER_ONLY - tcg_region_init(); -#endif /* !CONFIG_USER_ONLY */ - return 0; } diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 1eefe6ea8d..04764626bc 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1339,6 +1339,9 @@ void tcg_exec_init(unsigned long tb_size, int splitwx) splitwx, &error_fatal); assert(ok); + /* TODO: allocating regions is hand-in-glove with code_gen_buffer. */ + tcg_region_init(); + #if defined(CONFIG_SOFTMMU) /* There's no guest base to take into account, so go ahead and initialize the prologue now. */ diff --git a/bsd-user/main.c b/bsd-user/main.c index 9d370bc8f6..270cf2ca70 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -879,7 +879,6 @@ int main(int argc, char **argv) * the real value of GUEST_BASE into account. */ tcg_prologue_init(tcg_ctx); - tcg_region_init(); /* build Task State */ memset(ts, 0, sizeof(TaskState)); diff --git a/linux-user/main.c b/linux-user/main.c index 4dfc47ad3b..2fb3a366a6 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -868,7 +868,6 @@ int main(int argc, char **argv, char **envp) generating the prologue until now so that the prologue can take the real value of GUEST_BASE into account. */ tcg_prologue_init(tcg_ctx); - tcg_region_init(); target_cpu_copy_regs(env, regs); diff --git a/tcg/tcg.c b/tcg/tcg.c index 0dc271aac9..1e683b80e4 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1206,32 +1206,18 @@ TranslationBlock *tcg_tb_alloc(TCGContext *s) void tcg_prologue_init(TCGContext *s) { - size_t prologue_size, total_size; - void *buf0, *buf1; + size_t prologue_size; /* Put the prologue at the beginning of code_gen_buffer. */ - buf0 = s->code_gen_buffer; - total_size = s->code_gen_buffer_size; - s->code_ptr = buf0; - s->code_buf = buf0; + tcg_region_assign(s, 0); + s->code_ptr = s->code_gen_ptr; + s->code_buf = s->code_gen_ptr; s->data_gen_ptr = NULL; - /* - * The region trees are not yet configured, but tcg_splitwx_to_rx - * needs the bounds for an assert. - */ - region.start = buf0; - region.end = buf0 + total_size; - #ifndef CONFIG_TCG_INTERPRETER - tcg_qemu_tb_exec = (tcg_prologue_fn *)tcg_splitwx_to_rx(buf0); + tcg_qemu_tb_exec = (tcg_prologue_fn *)tcg_splitwx_to_rx(s->code_ptr); #endif - /* Compute a high-water mark, at which we voluntarily flush the buffer - and start over. The size here is arbitrary, significantly larger - than we expect the code generation for any one opcode to require. */ - s->code_gen_highwater = s->code_gen_buffer + (total_size - TCG_HIGHWATER); - #ifdef TCG_TARGET_NEED_POOL_LABELS s->pool_labels = NULL; #endif @@ -1248,32 +1234,32 @@ void tcg_prologue_init(TCGContext *s) } #endif - buf1 = s->code_ptr; + prologue_size = tcg_current_code_size(s); + #ifndef CONFIG_TCG_INTERPRETER - flush_idcache_range((uintptr_t)tcg_splitwx_to_rx(buf0), (uintptr_t)buf0, - tcg_ptr_byte_diff(buf1, buf0)); + flush_idcache_range((uintptr_t)tcg_splitwx_to_rx(s->code_buf), + (uintptr_t)s->code_buf, prologue_size); #endif - /* Deduct the prologue from the buffer. */ - prologue_size = tcg_current_code_size(s); - s->code_gen_ptr = buf1; - s->code_gen_buffer = buf1; - s->code_buf = buf1; - total_size -= prologue_size; - s->code_gen_buffer_size = total_size; + /* Deduct the prologue from the first region. */ + region.start = s->code_ptr; - tcg_register_jit(tcg_splitwx_to_rx(s->code_gen_buffer), total_size); + /* Recompute boundaries of the first region. */ + tcg_region_assign(s, 0); + + tcg_register_jit(tcg_splitwx_to_rx(region.start), + region.end - region.start); #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { FILE *logfile = qemu_log_lock(); qemu_log("PROLOGUE: [size=%zu]\n", prologue_size); if (s->data_gen_ptr) { - size_t code_size = s->data_gen_ptr - buf0; + size_t code_size = s->data_gen_ptr - s->code_gen_ptr; size_t data_size = prologue_size - code_size; size_t i; - log_disas(buf0, code_size); + log_disas(s->code_gen_ptr, code_size); for (i = 0; i < data_size; i += sizeof(tcg_target_ulong)) { if (sizeof(tcg_target_ulong) == 8) { @@ -1287,7 +1273,7 @@ void tcg_prologue_init(TCGContext *s) } } } else { - log_disas(buf0, prologue_size); + log_disas(s->code_gen_ptr, prologue_size); } qemu_log("\n"); qemu_log_flush(); From patchwork Fri Jun 11 23:41:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E13F4C48BE5 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 04/34] tcg: Remove error return from tcg_region_initial_alloc__locked Date: Fri, 11 Jun 2021 16:41:14 -0700 Message-Id: <20210611234144.653682-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" All callers immediately assert on error, so move the assert into the function itself. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tcg.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 1e683b80e4..ba690e0483 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -720,9 +720,10 @@ static bool tcg_region_alloc(TCGContext *s) * Perform a context's first region allocation. * This function does _not_ increment region.agg_size_full. */ -static inline bool tcg_region_initial_alloc__locked(TCGContext *s) +static void tcg_region_initial_alloc__locked(TCGContext *s) { - return tcg_region_alloc__locked(s); + bool err = tcg_region_alloc__locked(s); + g_assert(!err); } /* Call from a safe-work context */ @@ -737,9 +738,7 @@ void tcg_region_reset_all(void) for (i = 0; i < n_ctxs; i++) { TCGContext *s = qatomic_read(&tcg_ctxs[i]); - bool err = tcg_region_initial_alloc__locked(s); - - g_assert(!err); + tcg_region_initial_alloc__locked(s); } qemu_mutex_unlock(®ion.lock); @@ -876,11 +875,7 @@ void tcg_region_init(void) /* In user-mode we support only one ctx, so do the initial allocation now */ #ifdef CONFIG_USER_ONLY - { - bool err = tcg_region_initial_alloc__locked(tcg_ctx); - - g_assert(!err); - } + tcg_region_initial_alloc__locked(tcg_ctx); #endif } @@ -942,7 +937,6 @@ void tcg_register_thread(void) MachineState *ms = MACHINE(qdev_get_machine()); TCGContext *s = g_malloc(sizeof(*s)); unsigned int i, n; - bool err; *s = tcg_init_ctx; @@ -966,8 +960,7 @@ void tcg_register_thread(void) tcg_ctx = s; qemu_mutex_lock(®ion.lock); - err = tcg_region_initial_alloc__locked(tcg_ctx); - g_assert(!err); + tcg_region_initial_alloc__locked(s); qemu_mutex_unlock(®ion.lock); } #endif /* !CONFIG_USER_ONLY */ From patchwork Fri Jun 11 23:41:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316655 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FAA9C48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 05/34] tcg: Split out tcg_region_initial_alloc Date: Fri, 11 Jun 2021 16:41:15 -0700 Message-Id: <20210611234144.653682-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This has only one user, and currently needs an ifdef, but will make more sense after some code motion. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tcg.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index ba690e0483..36ea21d596 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -726,6 +726,15 @@ static void tcg_region_initial_alloc__locked(TCGContext *s) g_assert(!err); } +#ifndef CONFIG_USER_ONLY +static void tcg_region_initial_alloc(TCGContext *s) +{ + qemu_mutex_lock(®ion.lock); + tcg_region_initial_alloc__locked(s); + qemu_mutex_unlock(®ion.lock); +} +#endif + /* Call from a safe-work context */ void tcg_region_reset_all(void) { @@ -959,9 +968,7 @@ void tcg_register_thread(void) } tcg_ctx = s; - qemu_mutex_lock(®ion.lock); - tcg_region_initial_alloc__locked(s); - qemu_mutex_unlock(®ion.lock); + tcg_region_initial_alloc(s); } #endif /* !CONFIG_USER_ONLY */ From patchwork Fri Jun 11 23:41:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD4BAC48BE5 for ; Fri, 11 Jun 2021 23:47:21 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 73A356136D for ; Fri, 11 Jun 2021 23:47:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 73A356136D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:35602 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrqrw-0004dL-JI for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:47:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47044) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqme-0002Lj-04 for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:52 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]:38435) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmc-0002Zu-6n for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:51 -0400 Received: by mail-pg1-x529.google.com with SMTP id t17so3679517pga.5 for ; Fri, 11 Jun 2021 16:41:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UGCE0hBuujlu+HiYuNrthLkWxka9AZtIh3/7kEDtjdA=; b=i1NngS7b7TVu0uaIggAkqclZ4+BbnJ1A3bvlRY5SD+J8SE5JgHNndSGA/RqZ9ZvSwa 4uke/wDxu1SAHz77wxLCf/ysnwQ4PLcTrHmaYxkYEMINfxtMom5ASUJlw+GgWc0Yd8Jo iOJs9BNVCdF5f1MFGWeWsCKzFeVmKBHumQSuE52Icl3KSHVtwDsw/f2tqfyDlSbjV2sk 1aFGkIoVRwVFugX+8OF6E66ts6m6NfdcUG5eO7WYpMHSAp2qltK3uqPd270+7tdNYHpG Vhdg0vBsH+2ef9YJBZNX/cDM7PK2ayA20+RTO4Pg75N8a9iIb7fvkY1E3tK51UkGZ/yP u4Aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UGCE0hBuujlu+HiYuNrthLkWxka9AZtIh3/7kEDtjdA=; b=XjTlnxCuYJoJM1iaPuvG+EQmd+Qlm1u3Y3PDrsOnFgc8gU43EDvUwAaHUhzxQzpC8G INxZfRDDFeGygfZhCAm10tbbB/mT8o+8SWEuAwr/CUs0vVcd00c/RvyBpltDcRKHXc5R OBD437658PhTzPgdpakwS959nJiMHlAiXVYEAFeXylpigKH/rCh+kK+//cTUUn3EwkWP 5AMAzhcgBUBLK7nTKADPIMy1DQWV2OmZo7TyddQVThd4MAo1HVvuGR5hS6D8m3TiUVE9 h1XBC9j2WrEim3TxNwIBQ1yI156kJbyh3KDYVUuOOQjmxqlEIzP5X3FrVQ/XjNxvAqsQ JSlA== X-Gm-Message-State: AOAM531YADv5NM70H7YnmY1dxcsJ8B4djVPsCBBXXMJDrLJGsZURvdkr MJZ1uuZv+SH0SzWsANFDyt8axEW0PEGmww== X-Google-Smtp-Source: ABdhPJwLAwrxIaqvPEceWX9ZrW/32GQJA6KBY13q5+Vb8a+oHuTO3JWrwXmzFMISxZzGneaZBxetrA== X-Received: by 2002:a63:e0e:: with SMTP id d14mr5877297pgl.426.1623454909009; Fri, 11 Jun 2021 16:41:49 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 06/34] tcg: Split out tcg_region_prologue_set Date: Fri, 11 Jun 2021 16:41:16 -0700 Message-Id: <20210611234144.653682-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This has only one user, but will make more sense after some code motion. Always leave the tcg_init_ctx initialized to the first region, in preparation for tcg_prologue_init(). This also requires that we don't re-allocate the region for the first cpu, lest we hit the assertion for total number of regions allocated . Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tcg.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 36ea21d596..eca72990c1 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -882,10 +882,26 @@ void tcg_region_init(void) tcg_region_trees_init(); - /* In user-mode we support only one ctx, so do the initial allocation now */ -#ifdef CONFIG_USER_ONLY - tcg_region_initial_alloc__locked(tcg_ctx); -#endif + /* + * Leave the initial context initialized to the first region. + * This will be the context into which we generate the prologue. + * It is also the only context for CONFIG_USER_ONLY. + */ + tcg_region_initial_alloc__locked(&tcg_init_ctx); +} + +static void tcg_region_prologue_set(TCGContext *s) +{ + /* Deduct the prologue from the first region. */ + g_assert(region.start == s->code_gen_buffer); + region.start = s->code_ptr; + + /* Recompute boundaries of the first region. */ + tcg_region_assign(s, 0); + + /* Register the balance of the buffer with gdb. */ + tcg_register_jit(tcg_splitwx_to_rx(region.start), + region.end - region.start); } #ifdef CONFIG_DEBUG_TCG @@ -965,10 +981,10 @@ void tcg_register_thread(void) if (n > 0) { alloc_tcg_plugin_context(s); + tcg_region_initial_alloc(s); } tcg_ctx = s; - tcg_region_initial_alloc(s); } #endif /* !CONFIG_USER_ONLY */ @@ -1208,8 +1224,6 @@ void tcg_prologue_init(TCGContext *s) { size_t prologue_size; - /* Put the prologue at the beginning of code_gen_buffer. */ - tcg_region_assign(s, 0); s->code_ptr = s->code_gen_ptr; s->code_buf = s->code_gen_ptr; s->data_gen_ptr = NULL; @@ -1241,14 +1255,7 @@ void tcg_prologue_init(TCGContext *s) (uintptr_t)s->code_buf, prologue_size); #endif - /* Deduct the prologue from the first region. */ - region.start = s->code_ptr; - - /* Recompute boundaries of the first region. */ - tcg_region_assign(s, 0); - - tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.end - region.start); + tcg_region_prologue_set(s); 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 07/34] tcg: Split out region.c Date: Fri, 11 Jun 2021 16:41:17 -0700 Message-Id: <20210611234144.653682-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tcg-internal.h | 37 +++ tcg/region.c | 572 +++++++++++++++++++++++++++++++++++++++++++++ tcg/tcg.c | 547 +------------------------------------------ tcg/meson.build | 1 + 4 files changed, 613 insertions(+), 544 deletions(-) create mode 100644 tcg/tcg-internal.h create mode 100644 tcg/region.c diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h new file mode 100644 index 0000000000..b1dda343c2 --- /dev/null +++ b/tcg/tcg-internal.h @@ -0,0 +1,37 @@ +/* + * Internal declarations for Tiny Code Generator for QEMU + * + * Copyright (c) 2008 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef TCG_INTERNAL_H +#define TCG_INTERNAL_H 1 + +#define TCG_HIGHWATER 1024 + +extern TCGContext **tcg_ctxs; +extern unsigned int n_tcg_ctxs; + +bool tcg_region_alloc(TCGContext *s); +void tcg_region_initial_alloc(TCGContext *s); +void tcg_region_prologue_set(TCGContext *s); + +#endif /* TCG_INTERNAL_H */ diff --git a/tcg/region.c b/tcg/region.c new file mode 100644 index 0000000000..6e34fcf775 --- /dev/null +++ b/tcg/region.c @@ -0,0 +1,572 @@ +/* + * Memory region management for Tiny Code Generator for QEMU + * + * Copyright (c) 2008 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "exec/exec-all.h" +#include "tcg/tcg.h" +#if !defined(CONFIG_USER_ONLY) +#include "hw/boards.h" +#endif +#include "tcg-internal.h" + + +struct tcg_region_tree { + QemuMutex lock; + GTree *tree; + /* padding to avoid false sharing is computed at run-time */ +}; + +/* + * We divide code_gen_buffer into equally-sized "regions" that TCG threads + * dynamically allocate from as demand dictates. Given appropriate region + * sizing, this minimizes flushes even when some TCG threads generate a lot + * more code than others. + */ +struct tcg_region_state { + QemuMutex lock; + + /* fields set at init time */ + void *start; + void *start_aligned; + void *end; + size_t n; + size_t size; /* size of one region */ + size_t stride; /* .size + guard size */ + + /* fields protected by the lock */ + size_t current; /* current region index */ + size_t agg_size_full; /* aggregate size of full regions */ +}; + +static struct tcg_region_state region; + +/* + * This is an array of struct tcg_region_tree's, with padding. + * We use void * to simplify the computation of region_trees[i]; each + * struct is found every tree_size bytes. + */ +static void *region_trees; +static size_t tree_size; + +/* compare a pointer @ptr and a tb_tc @s */ +static int ptr_cmp_tb_tc(const void *ptr, const struct tb_tc *s) +{ + if (ptr >= s->ptr + s->size) { + return 1; + } else if (ptr < s->ptr) { + return -1; + } + return 0; +} + +static gint tb_tc_cmp(gconstpointer ap, gconstpointer bp) +{ + const struct tb_tc *a = ap; + const struct tb_tc *b = bp; + + /* + * When both sizes are set, we know this isn't a lookup. + * This is the most likely case: every TB must be inserted; lookups + * are a lot less frequent. + */ + if (likely(a->size && b->size)) { + if (a->ptr > b->ptr) { + return 1; + } else if (a->ptr < b->ptr) { + return -1; + } + /* a->ptr == b->ptr should happen only on deletions */ + g_assert(a->size == b->size); + return 0; + } + /* + * All lookups have either .size field set to 0. + * From the glib sources we see that @ap is always the lookup key. However + * the docs provide no guarantee, so we just mark this case as likely. + */ + if (likely(a->size == 0)) { + return ptr_cmp_tb_tc(a->ptr, b); + } + return ptr_cmp_tb_tc(b->ptr, a); +} + +static void tcg_region_trees_init(void) +{ + size_t i; + + tree_size = ROUND_UP(sizeof(struct tcg_region_tree), qemu_dcache_linesize); + region_trees = qemu_memalign(qemu_dcache_linesize, region.n * tree_size); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + qemu_mutex_init(&rt->lock); + rt->tree = g_tree_new(tb_tc_cmp); + } +} + +static struct tcg_region_tree *tc_ptr_to_region_tree(const void *p) +{ + size_t region_idx; + + /* + * Like tcg_splitwx_to_rw, with no assert. The pc may come from + * a signal handler over which the caller has no control. + */ + if (!in_code_gen_buffer(p)) { + p -= tcg_splitwx_diff; + if (!in_code_gen_buffer(p)) { + return NULL; + } + } + + if (p < region.start_aligned) { + region_idx = 0; + } else { + ptrdiff_t offset = p - region.start_aligned; + + if (offset > region.stride * (region.n - 1)) { + region_idx = region.n - 1; + } else { + region_idx = offset / region.stride; + } + } + return region_trees + region_idx * tree_size; +} + +void tcg_tb_insert(TranslationBlock *tb) +{ + struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); + + g_assert(rt != NULL); + qemu_mutex_lock(&rt->lock); + g_tree_insert(rt->tree, &tb->tc, tb); + qemu_mutex_unlock(&rt->lock); +} + +void tcg_tb_remove(TranslationBlock *tb) +{ + struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); + + g_assert(rt != NULL); + qemu_mutex_lock(&rt->lock); + g_tree_remove(rt->tree, &tb->tc); + qemu_mutex_unlock(&rt->lock); +} + +/* + * Find the TB 'tb' such that + * tb->tc.ptr <= tc_ptr < tb->tc.ptr + tb->tc.size + * Return NULL if not found. + */ +TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr) +{ + struct tcg_region_tree *rt = tc_ptr_to_region_tree((void *)tc_ptr); + TranslationBlock *tb; + struct tb_tc s = { .ptr = (void *)tc_ptr }; + + if (rt == NULL) { + return NULL; + } + + qemu_mutex_lock(&rt->lock); + tb = g_tree_lookup(rt->tree, &s); + qemu_mutex_unlock(&rt->lock); + return tb; +} + +static void tcg_region_tree_lock_all(void) +{ + size_t i; + + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + qemu_mutex_lock(&rt->lock); + } +} + +static void tcg_region_tree_unlock_all(void) +{ + size_t i; + + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + qemu_mutex_unlock(&rt->lock); + } +} + +void tcg_tb_foreach(GTraverseFunc func, gpointer user_data) +{ + size_t i; + + tcg_region_tree_lock_all(); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + g_tree_foreach(rt->tree, func, user_data); + } + tcg_region_tree_unlock_all(); +} + +size_t tcg_nb_tbs(void) +{ + size_t nb_tbs = 0; + size_t i; + + tcg_region_tree_lock_all(); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + nb_tbs += g_tree_nnodes(rt->tree); + } + tcg_region_tree_unlock_all(); + return nb_tbs; +} + +static gboolean tcg_region_tree_traverse(gpointer k, gpointer v, gpointer data) +{ + TranslationBlock *tb = v; + + tb_destroy(tb); + return FALSE; +} + +static void tcg_region_tree_reset_all(void) +{ + size_t i; + + tcg_region_tree_lock_all(); + for (i = 0; i < region.n; i++) { + struct tcg_region_tree *rt = region_trees + i * tree_size; + + g_tree_foreach(rt->tree, tcg_region_tree_traverse, NULL); + /* Increment the refcount first so that destroy acts as a reset */ + g_tree_ref(rt->tree); + g_tree_destroy(rt->tree); + } + tcg_region_tree_unlock_all(); +} + +static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) +{ + void *start, *end; + + start = region.start_aligned + curr_region * region.stride; + end = start + region.size; + + if (curr_region == 0) { + start = region.start; + } + if (curr_region == region.n - 1) { + end = region.end; + } + + *pstart = start; + *pend = end; +} + +static void tcg_region_assign(TCGContext *s, size_t curr_region) +{ + void *start, *end; + + tcg_region_bounds(curr_region, &start, &end); + + s->code_gen_buffer = start; + s->code_gen_ptr = start; + s->code_gen_buffer_size = end - start; + s->code_gen_highwater = end - TCG_HIGHWATER; +} + +static bool tcg_region_alloc__locked(TCGContext *s) +{ + if (region.current == region.n) { + return true; + } + tcg_region_assign(s, region.current); + region.current++; + return false; +} + +/* + * Request a new region once the one in use has filled up. + * Returns true on error. + */ +bool tcg_region_alloc(TCGContext *s) +{ + bool err; + /* read the region size now; alloc__locked will overwrite it on success */ + size_t size_full = s->code_gen_buffer_size; + + qemu_mutex_lock(®ion.lock); + err = tcg_region_alloc__locked(s); + if (!err) { + region.agg_size_full += size_full - TCG_HIGHWATER; + } + qemu_mutex_unlock(®ion.lock); + return err; +} + +/* + * Perform a context's first region allocation. + * This function does _not_ increment region.agg_size_full. + */ +static void tcg_region_initial_alloc__locked(TCGContext *s) +{ + bool err = tcg_region_alloc__locked(s); + g_assert(!err); +} + +void tcg_region_initial_alloc(TCGContext *s) +{ + qemu_mutex_lock(®ion.lock); + tcg_region_initial_alloc__locked(s); + qemu_mutex_unlock(®ion.lock); +} + +/* Call from a safe-work context */ +void tcg_region_reset_all(void) +{ + unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int i; + + qemu_mutex_lock(®ion.lock); + region.current = 0; + region.agg_size_full = 0; + + for (i = 0; i < n_ctxs; i++) { + TCGContext *s = qatomic_read(&tcg_ctxs[i]); + tcg_region_initial_alloc__locked(s); + } + qemu_mutex_unlock(®ion.lock); + + tcg_region_tree_reset_all(); +} + +#ifdef CONFIG_USER_ONLY +static size_t tcg_n_regions(void) +{ + return 1; +} +#else +/* + * It is likely that some vCPUs will translate more code than others, so we + * first try to set more regions than max_cpus, with those regions being of + * reasonable size. If that's not possible we make do by evenly dividing + * the code_gen_buffer among the vCPUs. + */ +static size_t tcg_n_regions(void) +{ + size_t i; + + /* Use a single region if all we have is one vCPU thread */ +#if !defined(CONFIG_USER_ONLY) + MachineState *ms = MACHINE(qdev_get_machine()); + unsigned int max_cpus = ms->smp.max_cpus; +#endif + if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { + return 1; + } + + /* Try to have more regions than max_cpus, with each region being >= 2 MB */ + for (i = 8; i > 0; i--) { + size_t regions_per_thread = i; + size_t region_size; + + region_size = tcg_init_ctx.code_gen_buffer_size; + region_size /= max_cpus * regions_per_thread; + + if (region_size >= 2 * 1024u * 1024) { + return max_cpus * regions_per_thread; + } + } + /* If we can't, then just allocate one region per vCPU thread */ + return max_cpus; +} +#endif + +/* + * Initializes region partitioning. + * + * Called at init time from the parent thread (i.e. the one calling + * tcg_context_init), after the target's TCG globals have been set. + * + * Region partitioning works by splitting code_gen_buffer into separate regions, + * and then assigning regions to TCG threads so that the threads can translate + * code in parallel without synchronization. + * + * In softmmu the number of TCG threads is bounded by max_cpus, so we use at + * least max_cpus regions in MTTCG. In !MTTCG we use a single region. + * Note that the TCG options from the command-line (i.e. -accel accel=tcg,[...]) + * must have been parsed before calling this function, since it calls + * qemu_tcg_mttcg_enabled(). + * + * In user-mode we use a single region. Having multiple regions in user-mode + * is not supported, because the number of vCPU threads (recall that each thread + * spawned by the guest corresponds to a vCPU thread) is only bounded by the + * OS, and usually this number is huge (tens of thousands is not uncommon). + * Thus, given this large bound on the number of vCPU threads and the fact + * that code_gen_buffer is allocated at compile-time, we cannot guarantee + * that the availability of at least one region per vCPU thread. + * + * However, this user-mode limitation is unlikely to be a significant problem + * in practice. Multi-threaded guests share most if not all of their translated + * code, which makes parallel code generation less appealing than in softmmu. + */ +void tcg_region_init(void) +{ + void *buf = tcg_init_ctx.code_gen_buffer; + void *aligned; + size_t size = tcg_init_ctx.code_gen_buffer_size; + size_t page_size = qemu_real_host_page_size; + size_t region_size; + size_t n_regions; + size_t i; + + n_regions = tcg_n_regions(); + + /* The first region will be 'aligned - buf' bytes larger than the others */ + aligned = QEMU_ALIGN_PTR_UP(buf, page_size); + g_assert(aligned < tcg_init_ctx.code_gen_buffer + size); + /* + * Make region_size a multiple of page_size, using aligned as the start. + * As a result of this we might end up with a few extra pages at the end of + * the buffer; we will assign those to the last region. + */ + region_size = (size - (aligned - buf)) / n_regions; + region_size = QEMU_ALIGN_DOWN(region_size, page_size); + + /* A region must have at least 2 pages; one code, one guard */ + g_assert(region_size >= 2 * page_size); + + /* init the region struct */ + qemu_mutex_init(®ion.lock); + region.n = n_regions; + region.size = region_size - page_size; + region.stride = region_size; + region.start = buf; + region.start_aligned = aligned; + /* page-align the end, since its last page will be a guard page */ + region.end = QEMU_ALIGN_PTR_DOWN(buf + size, page_size); + /* account for that last guard page */ + region.end -= page_size; + + /* + * Set guard pages in the rw buffer, as that's the one into which + * buffer overruns could occur. Do not set guard pages in the rx + * buffer -- let that one use hugepages throughout. + */ + for (i = 0; i < region.n; i++) { + void *start, *end; + + tcg_region_bounds(i, &start, &end); + + /* + * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect + * rejects a permission change from RWX -> NONE. Guard pages are + * nice for bug detection but are not essential; ignore any failure. + */ + (void)qemu_mprotect_none(end, page_size); + } + + tcg_region_trees_init(); + + /* + * Leave the initial context initialized to the first region. + * This will be the context into which we generate the prologue. + * It is also the only context for CONFIG_USER_ONLY. + */ + tcg_region_initial_alloc__locked(&tcg_init_ctx); +} + +void tcg_region_prologue_set(TCGContext *s) +{ + /* Deduct the prologue from the first region. */ + g_assert(region.start == s->code_gen_buffer); + region.start = s->code_ptr; + + /* Recompute boundaries of the first region. */ + tcg_region_assign(s, 0); + + /* Register the balance of the buffer with gdb. */ + tcg_register_jit(tcg_splitwx_to_rx(region.start), + region.end - region.start); +} + +/* + * Returns the size (in bytes) of all translated code (i.e. from all regions) + * currently in the cache. + * See also: tcg_code_capacity() + * Do not confuse with tcg_current_code_size(); that one applies to a single + * TCG context. + */ +size_t tcg_code_size(void) +{ + unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int i; + size_t total; + + qemu_mutex_lock(®ion.lock); + total = region.agg_size_full; + for (i = 0; i < n_ctxs; i++) { + const TCGContext *s = qatomic_read(&tcg_ctxs[i]); + size_t size; + + size = qatomic_read(&s->code_gen_ptr) - s->code_gen_buffer; + g_assert(size <= s->code_gen_buffer_size); + total += size; + } + qemu_mutex_unlock(®ion.lock); + return total; +} + +/* + * Returns the code capacity (in bytes) of the entire cache, i.e. including all + * regions. + * See also: tcg_code_size() + */ +size_t tcg_code_capacity(void) +{ + size_t guard_size, capacity; + + /* no need for synchronization; these variables are set at init time */ + guard_size = region.stride - region.size; + capacity = region.end + guard_size - region.start; + capacity -= region.n * (guard_size + TCG_HIGHWATER); + return capacity; +} + +size_t tcg_tb_phys_invalidate_count(void) +{ + unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int i; + size_t total = 0; + + for (i = 0; i < n_ctxs; i++) { + const TCGContext *s = qatomic_read(&tcg_ctxs[i]); + + total += qatomic_read(&s->tb_phys_invalidate_count); + } + return total; +} diff --git a/tcg/tcg.c b/tcg/tcg.c index eca72990c1..8c43c0f316 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -63,6 +63,7 @@ #include "elf.h" #include "exec/log.h" +#include "tcg-internal.h" /* Forward declarations for functions declared in tcg-target.c.inc and used here. */ @@ -153,10 +154,8 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct); static int tcg_out_ldst_finalize(TCGContext *s); #endif -#define TCG_HIGHWATER 1024 - -static TCGContext **tcg_ctxs; -static unsigned int n_tcg_ctxs; +TCGContext **tcg_ctxs; +unsigned int n_tcg_ctxs; TCGv_env cpu_env = 0; const void *tcg_code_gen_epilogue; uintptr_t tcg_splitwx_diff; @@ -165,42 +164,6 @@ uintptr_t tcg_splitwx_diff; tcg_prologue_fn *tcg_qemu_tb_exec; #endif -struct tcg_region_tree { - QemuMutex lock; - GTree *tree; - /* padding to avoid false sharing is computed at run-time */ -}; - -/* - * We divide code_gen_buffer into equally-sized "regions" that TCG threads - * dynamically allocate from as demand dictates. Given appropriate region - * sizing, this minimizes flushes even when some TCG threads generate a lot - * more code than others. - */ -struct tcg_region_state { - QemuMutex lock; - - /* fields set at init time */ - void *start; - void *start_aligned; - void *end; - size_t n; - size_t size; /* size of one region */ - size_t stride; /* .size + guard size */ - - /* fields protected by the lock */ - size_t current; /* current region index */ - size_t agg_size_full; /* aggregate size of full regions */ -}; - -static struct tcg_region_state region; -/* - * This is an array of struct tcg_region_tree's, with padding. - * We use void * to simplify the computation of region_trees[i]; each - * struct is found every tree_size bytes. - */ -static void *region_trees; -static size_t tree_size; static TCGRegSet tcg_target_available_regs[TCG_TYPE_COUNT]; static TCGRegSet tcg_target_call_clobber_regs; @@ -457,453 +420,6 @@ static const TCGTargetOpDef constraint_sets[] = { #include "tcg-target.c.inc" -/* compare a pointer @ptr and a tb_tc @s */ -static int ptr_cmp_tb_tc(const void *ptr, const struct tb_tc *s) -{ - if (ptr >= s->ptr + s->size) { - return 1; - } else if (ptr < s->ptr) { - return -1; - } - return 0; -} - -static gint tb_tc_cmp(gconstpointer ap, gconstpointer bp) -{ - const struct tb_tc *a = ap; - const struct tb_tc *b = bp; - - /* - * When both sizes are set, we know this isn't a lookup. - * This is the most likely case: every TB must be inserted; lookups - * are a lot less frequent. - */ - if (likely(a->size && b->size)) { - if (a->ptr > b->ptr) { - return 1; - } else if (a->ptr < b->ptr) { - return -1; - } - /* a->ptr == b->ptr should happen only on deletions */ - g_assert(a->size == b->size); - return 0; - } - /* - * All lookups have either .size field set to 0. - * From the glib sources we see that @ap is always the lookup key. However - * the docs provide no guarantee, so we just mark this case as likely. - */ - if (likely(a->size == 0)) { - return ptr_cmp_tb_tc(a->ptr, b); - } - return ptr_cmp_tb_tc(b->ptr, a); -} - -static void tcg_region_trees_init(void) -{ - size_t i; - - tree_size = ROUND_UP(sizeof(struct tcg_region_tree), qemu_dcache_linesize); - region_trees = qemu_memalign(qemu_dcache_linesize, region.n * tree_size); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - qemu_mutex_init(&rt->lock); - rt->tree = g_tree_new(tb_tc_cmp); - } -} - -static struct tcg_region_tree *tc_ptr_to_region_tree(const void *p) -{ - size_t region_idx; - - /* - * Like tcg_splitwx_to_rw, with no assert. The pc may come from - * a signal handler over which the caller has no control. - */ - if (!in_code_gen_buffer(p)) { - p -= tcg_splitwx_diff; - if (!in_code_gen_buffer(p)) { - return NULL; - } - } - - if (p < region.start_aligned) { - region_idx = 0; - } else { - ptrdiff_t offset = p - region.start_aligned; - - if (offset > region.stride * (region.n - 1)) { - region_idx = region.n - 1; - } else { - region_idx = offset / region.stride; - } - } - return region_trees + region_idx * tree_size; -} - -void tcg_tb_insert(TranslationBlock *tb) -{ - struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); - - g_assert(rt != NULL); - qemu_mutex_lock(&rt->lock); - g_tree_insert(rt->tree, &tb->tc, tb); - qemu_mutex_unlock(&rt->lock); -} - -void tcg_tb_remove(TranslationBlock *tb) -{ - struct tcg_region_tree *rt = tc_ptr_to_region_tree(tb->tc.ptr); - - g_assert(rt != NULL); - qemu_mutex_lock(&rt->lock); - g_tree_remove(rt->tree, &tb->tc); - qemu_mutex_unlock(&rt->lock); -} - -/* - * Find the TB 'tb' such that - * tb->tc.ptr <= tc_ptr < tb->tc.ptr + tb->tc.size - * Return NULL if not found. - */ -TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr) -{ - struct tcg_region_tree *rt = tc_ptr_to_region_tree((void *)tc_ptr); - TranslationBlock *tb; - struct tb_tc s = { .ptr = (void *)tc_ptr }; - - if (rt == NULL) { - return NULL; - } - - qemu_mutex_lock(&rt->lock); - tb = g_tree_lookup(rt->tree, &s); - qemu_mutex_unlock(&rt->lock); - return tb; -} - -static void tcg_region_tree_lock_all(void) -{ - size_t i; - - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - qemu_mutex_lock(&rt->lock); - } -} - -static void tcg_region_tree_unlock_all(void) -{ - size_t i; - - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - qemu_mutex_unlock(&rt->lock); - } -} - -void tcg_tb_foreach(GTraverseFunc func, gpointer user_data) -{ - size_t i; - - tcg_region_tree_lock_all(); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - g_tree_foreach(rt->tree, func, user_data); - } - tcg_region_tree_unlock_all(); -} - -size_t tcg_nb_tbs(void) -{ - size_t nb_tbs = 0; - size_t i; - - tcg_region_tree_lock_all(); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - nb_tbs += g_tree_nnodes(rt->tree); - } - tcg_region_tree_unlock_all(); - return nb_tbs; -} - -static gboolean tcg_region_tree_traverse(gpointer k, gpointer v, gpointer data) -{ - TranslationBlock *tb = v; - - tb_destroy(tb); - return FALSE; -} - -static void tcg_region_tree_reset_all(void) -{ - size_t i; - - tcg_region_tree_lock_all(); - for (i = 0; i < region.n; i++) { - struct tcg_region_tree *rt = region_trees + i * tree_size; - - g_tree_foreach(rt->tree, tcg_region_tree_traverse, NULL); - /* Increment the refcount first so that destroy acts as a reset */ - g_tree_ref(rt->tree); - g_tree_destroy(rt->tree); - } - tcg_region_tree_unlock_all(); -} - -static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) -{ - void *start, *end; - - start = region.start_aligned + curr_region * region.stride; - end = start + region.size; - - if (curr_region == 0) { - start = region.start; - } - if (curr_region == region.n - 1) { - end = region.end; - } - - *pstart = start; - *pend = end; -} - -static void tcg_region_assign(TCGContext *s, size_t curr_region) -{ - void *start, *end; - - tcg_region_bounds(curr_region, &start, &end); - - s->code_gen_buffer = start; - s->code_gen_ptr = start; - s->code_gen_buffer_size = end - start; - s->code_gen_highwater = end - TCG_HIGHWATER; -} - -static bool tcg_region_alloc__locked(TCGContext *s) -{ - if (region.current == region.n) { - return true; - } - tcg_region_assign(s, region.current); - region.current++; - return false; -} - -/* - * Request a new region once the one in use has filled up. - * Returns true on error. - */ -static bool tcg_region_alloc(TCGContext *s) -{ - bool err; - /* read the region size now; alloc__locked will overwrite it on success */ - size_t size_full = s->code_gen_buffer_size; - - qemu_mutex_lock(®ion.lock); - err = tcg_region_alloc__locked(s); - if (!err) { - region.agg_size_full += size_full - TCG_HIGHWATER; - } - qemu_mutex_unlock(®ion.lock); - return err; -} - -/* - * Perform a context's first region allocation. - * This function does _not_ increment region.agg_size_full. - */ -static void tcg_region_initial_alloc__locked(TCGContext *s) -{ - bool err = tcg_region_alloc__locked(s); - g_assert(!err); -} - -#ifndef CONFIG_USER_ONLY -static void tcg_region_initial_alloc(TCGContext *s) -{ - qemu_mutex_lock(®ion.lock); - tcg_region_initial_alloc__locked(s); - qemu_mutex_unlock(®ion.lock); -} -#endif - -/* Call from a safe-work context */ -void tcg_region_reset_all(void) -{ - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); - unsigned int i; - - qemu_mutex_lock(®ion.lock); - region.current = 0; - region.agg_size_full = 0; - - for (i = 0; i < n_ctxs; i++) { - TCGContext *s = qatomic_read(&tcg_ctxs[i]); - tcg_region_initial_alloc__locked(s); - } - qemu_mutex_unlock(®ion.lock); - - tcg_region_tree_reset_all(); -} - -#ifdef CONFIG_USER_ONLY -static size_t tcg_n_regions(void) -{ - return 1; -} -#else -/* - * It is likely that some vCPUs will translate more code than others, so we - * first try to set more regions than max_cpus, with those regions being of - * reasonable size. If that's not possible we make do by evenly dividing - * the code_gen_buffer among the vCPUs. - */ -static size_t tcg_n_regions(void) -{ - size_t i; - - /* Use a single region if all we have is one vCPU thread */ -#if !defined(CONFIG_USER_ONLY) - MachineState *ms = MACHINE(qdev_get_machine()); - unsigned int max_cpus = ms->smp.max_cpus; -#endif - if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { - return 1; - } - - /* Try to have more regions than max_cpus, with each region being >= 2 MB */ - for (i = 8; i > 0; i--) { - size_t regions_per_thread = i; - size_t region_size; - - region_size = tcg_init_ctx.code_gen_buffer_size; - region_size /= max_cpus * regions_per_thread; - - if (region_size >= 2 * 1024u * 1024) { - return max_cpus * regions_per_thread; - } - } - /* If we can't, then just allocate one region per vCPU thread */ - return max_cpus; -} -#endif - -/* - * Initializes region partitioning. - * - * Called at init time from the parent thread (i.e. the one calling - * tcg_context_init), after the target's TCG globals have been set. - * - * Region partitioning works by splitting code_gen_buffer into separate regions, - * and then assigning regions to TCG threads so that the threads can translate - * code in parallel without synchronization. - * - * In softmmu the number of TCG threads is bounded by max_cpus, so we use at - * least max_cpus regions in MTTCG. In !MTTCG we use a single region. - * Note that the TCG options from the command-line (i.e. -accel accel=tcg,[...]) - * must have been parsed before calling this function, since it calls - * qemu_tcg_mttcg_enabled(). - * - * In user-mode we use a single region. Having multiple regions in user-mode - * is not supported, because the number of vCPU threads (recall that each thread - * spawned by the guest corresponds to a vCPU thread) is only bounded by the - * OS, and usually this number is huge (tens of thousands is not uncommon). - * Thus, given this large bound on the number of vCPU threads and the fact - * that code_gen_buffer is allocated at compile-time, we cannot guarantee - * that the availability of at least one region per vCPU thread. - * - * However, this user-mode limitation is unlikely to be a significant problem - * in practice. Multi-threaded guests share most if not all of their translated - * code, which makes parallel code generation less appealing than in softmmu. - */ -void tcg_region_init(void) -{ - void *buf = tcg_init_ctx.code_gen_buffer; - void *aligned; - size_t size = tcg_init_ctx.code_gen_buffer_size; - size_t page_size = qemu_real_host_page_size; - size_t region_size; - size_t n_regions; - size_t i; - - n_regions = tcg_n_regions(); - - /* The first region will be 'aligned - buf' bytes larger than the others */ - aligned = QEMU_ALIGN_PTR_UP(buf, page_size); - g_assert(aligned < tcg_init_ctx.code_gen_buffer + size); - /* - * Make region_size a multiple of page_size, using aligned as the start. - * As a result of this we might end up with a few extra pages at the end of - * the buffer; we will assign those to the last region. - */ - region_size = (size - (aligned - buf)) / n_regions; - region_size = QEMU_ALIGN_DOWN(region_size, page_size); - - /* A region must have at least 2 pages; one code, one guard */ - g_assert(region_size >= 2 * page_size); - - /* init the region struct */ - qemu_mutex_init(®ion.lock); - region.n = n_regions; - region.size = region_size - page_size; - region.stride = region_size; - region.start = buf; - region.start_aligned = aligned; - /* page-align the end, since its last page will be a guard page */ - region.end = QEMU_ALIGN_PTR_DOWN(buf + size, page_size); - /* account for that last guard page */ - region.end -= page_size; - - /* - * Set guard pages in the rw buffer, as that's the one into which - * buffer overruns could occur. Do not set guard pages in the rx - * buffer -- let that one use hugepages throughout. - */ - for (i = 0; i < region.n; i++) { - void *start, *end; - - tcg_region_bounds(i, &start, &end); - - /* - * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect - * rejects a permission change from RWX -> NONE. Guard pages are - * nice for bug detection but are not essential; ignore any failure. - */ - (void)qemu_mprotect_none(end, page_size); - } - - tcg_region_trees_init(); - - /* - * Leave the initial context initialized to the first region. - * This will be the context into which we generate the prologue. - * It is also the only context for CONFIG_USER_ONLY. - */ - tcg_region_initial_alloc__locked(&tcg_init_ctx); -} - -static void tcg_region_prologue_set(TCGContext *s) -{ - /* Deduct the prologue from the first region. */ - g_assert(region.start == s->code_gen_buffer); - region.start = s->code_ptr; - - /* Recompute boundaries of the first region. */ - tcg_region_assign(s, 0); - - /* Register the balance of the buffer with gdb. */ - tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.end - region.start); -} - #ifdef CONFIG_DEBUG_TCG const void *tcg_splitwx_to_rx(void *rw) { @@ -988,63 +504,6 @@ void tcg_register_thread(void) } #endif /* !CONFIG_USER_ONLY */ -/* - * Returns the size (in bytes) of all translated code (i.e. from all regions) - * currently in the cache. - * See also: tcg_code_capacity() - * Do not confuse with tcg_current_code_size(); that one applies to a single - * TCG context. - */ -size_t tcg_code_size(void) -{ - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); - unsigned int i; - size_t total; - - qemu_mutex_lock(®ion.lock); - total = region.agg_size_full; - for (i = 0; i < n_ctxs; i++) { - const TCGContext *s = qatomic_read(&tcg_ctxs[i]); - size_t size; - - size = qatomic_read(&s->code_gen_ptr) - s->code_gen_buffer; - g_assert(size <= s->code_gen_buffer_size); - total += size; - } - qemu_mutex_unlock(®ion.lock); - return total; -} - -/* - * Returns the code capacity (in bytes) of the entire cache, i.e. including all - * regions. - * See also: tcg_code_size() - */ -size_t tcg_code_capacity(void) -{ - size_t guard_size, capacity; - - /* no need for synchronization; these variables are set at init time */ - guard_size = region.stride - region.size; - capacity = region.end + guard_size - region.start; - capacity -= region.n * (guard_size + TCG_HIGHWATER); - return capacity; -} - -size_t tcg_tb_phys_invalidate_count(void) -{ - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); - unsigned int i; - size_t total = 0; - - for (i = 0; i < n_ctxs; i++) { - const TCGContext *s = qatomic_read(&tcg_ctxs[i]); - - total += qatomic_read(&s->tb_phys_invalidate_count); - } - return total; -} - /* pool based memory allocation */ void *tcg_malloc_internal(TCGContext *s, int size) { diff --git a/tcg/meson.build b/tcg/meson.build index 84064a341e..5be3915529 100644 --- a/tcg/meson.build +++ b/tcg/meson.build @@ -2,6 +2,7 @@ tcg_ss = ss.source_set() tcg_ss.add(files( 'optimize.c', + 'region.c', 'tcg.c', 'tcg-common.c', 'tcg-op.c', From patchwork Fri Jun 11 23:41:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2635C48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 08/34] accel/tcg: Inline cpu_gen_init Date: Fri, 11 Jun 2021 16:41:18 -0700 Message-Id: <20210611234144.653682-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" It consists of one function call and has only one caller. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 04764626bc..337fbb11fa 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -245,11 +245,6 @@ static void page_table_config_init(void) assert(v_l2_levels >= 0); } -static void cpu_gen_init(void) -{ - tcg_context_init(&tcg_init_ctx); -} - /* Encode VAL as a signed leb128 sequence at P. Return P incremented past the encoded value. */ static uint8_t *encode_sleb128(uint8_t *p, target_long val) @@ -1331,7 +1326,7 @@ void tcg_exec_init(unsigned long tb_size, int splitwx) bool ok; tcg_allowed = true; - cpu_gen_init(); + tcg_context_init(&tcg_init_ctx); page_init(); tb_htable_init(); From patchwork Fri Jun 11 23:41:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316687 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA4EBC48BE5 for ; Fri, 11 Jun 2021 23:51:16 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 341356136D for ; Fri, 11 Jun 2021 23:51:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 341356136D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:49500 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrqvj-0005Q2-C1 for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:51:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47160) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmi-0002a6-Ne for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:56 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]:35455) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqme-0002ci-Eo for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:56 -0400 Received: by mail-pg1-x52e.google.com with SMTP id o9so3687755pgd.2 for ; Fri, 11 Jun 2021 16:41:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2253jJ5p4Vo497H/gur1JJFAgAQrIuYpqdCY/mWMaZ8=; b=i4jWYGjhx1LBIdV3NB1NOp/IVyfgZMS2AtzugAFspIoMnLgZuMycdQhrpySjTy1vnp j1C6HBuTZ/0nxhc1O7m5mIzoqMzbmYx0TOTag1znvktH8b2YfI7XCGmV4zR18ajXdLRm yRo5UkfqIB/t6rZbeVFRmO2KO5RTGpE4CA2p7JaIQh8s0KfGR7yVzCRhoMHgf35cnxL7 +e6Jk2ZPPJqxaXFfEPIaN5xA/CaXDSpHTpiBuq343u0ecY4WJ4XBN8Lqi+/RarXakQQT 5FeQV3IRhVtW9gY74YfImQc4DrN2clr3CiD7paZ3+YKpSXmaRUzyI70gvVmdISBDH7cJ hwow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2253jJ5p4Vo497H/gur1JJFAgAQrIuYpqdCY/mWMaZ8=; b=sFYJ/8LSHm7duRHTiY90cc57i5QbTZfxiXv1j85/i7TqHo+cO39ZNVEMZ/eQCRRW7z lJYH5zxvnWb1x1ICvI2AFIivQiWn+Z7OnBO317OUX6UXwUxX/kee/1buALSU1XDYra4q dII+1bm29KgYhS+balUO43Tj/OVkwzZIc0+aTKQoHnDy5TL4twLFNlLz70Mhfzu7hGfq UiQy9DstyazpmI7BDOMzjjmnivLMTAhxi4z3r9cWAh/PBjoORna7ON7HxwhlsndDu4Nx 7IJ0GyCpdQJNhJ7BqOzEDRpxxue4kVnO2cbgymu+zK8fqRiOWY1356D8KRO94445b1di Rjzg== X-Gm-Message-State: AOAM531qECo2I08Xjy2AgGv/LZ2vMHVRFH5ZkqcVMnneCgS/N1oJL9RZ EyKERQO3MlXq9SecfO2x6j4gg4Ufv2lLMw== X-Google-Smtp-Source: ABdhPJzH0KHh0FzHR8S16zAjFSBdDiOn+0rEDPSfLDaW5tT/rc0+w1tJn4BPB9gvQ4vh9gYqztTo3w== X-Received: by 2002:a65:48c5:: with SMTP id o5mr4370491pgs.397.1623454910910; Fri, 11 Jun 2021 16:41:50 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 09/34] accel/tcg: Move alloc_code_gen_buffer to tcg/region.c Date: Fri, 11 Jun 2021 16:41:19 -0700 Message-Id: <20210611234144.653682-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Buffer management is integral to tcg. Do not leave the allocation to code outside of tcg/. This is code movement, with further cleanups to follow. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 2 +- accel/tcg/translate-all.c | 414 +----------------------------------- tcg/region.c | 431 +++++++++++++++++++++++++++++++++++++- 3 files changed, 428 insertions(+), 419 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 74cb345308..834785fc23 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -873,7 +873,7 @@ void *tcg_malloc_internal(TCGContext *s, int size); void tcg_pool_reset(TCGContext *s); TranslationBlock *tcg_tb_alloc(TCGContext *s); -void tcg_region_init(void); +void tcg_region_init(size_t tb_size, int splitwx); void tb_destroy(TranslationBlock *tb); void tcg_region_reset_all(void); diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 337fbb11fa..ad7a25d9f0 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -18,7 +18,6 @@ */ #include "qemu/osdep.h" -#include "qemu/units.h" #include "qemu-common.h" #define NO_CPU_IO_DEFS @@ -49,7 +48,6 @@ #include "exec/cputlb.h" #include "exec/translate-all.h" #include "qemu/bitmap.h" -#include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "qemu/timer.h" #include "qemu/main-loop.h" @@ -895,408 +893,6 @@ static void page_lock_pair(PageDesc **ret_p1, tb_page_addr_t phys1, } } -/* Minimum size of the code gen buffer. This number is randomly chosen, - but not so small that we can't have a fair number of TB's live. */ -#define MIN_CODE_GEN_BUFFER_SIZE (1 * MiB) - -/* Maximum size of the code gen buffer we'd like to use. Unless otherwise - indicated, this is constrained by the range of direct branches on the - host cpu, as used by the TCG implementation of goto_tb. */ -#if defined(__x86_64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__sparc__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc__) -# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) -#elif defined(__aarch64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__s390x__) - /* We have a +- 4GB range on the branches; leave some slop. */ -# define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) -#elif defined(__mips__) - /* We have a 256MB branch region, but leave room to make sure the - main executable is also within that region. */ -# define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) -#else -# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) -#endif - -#if TCG_TARGET_REG_BITS == 32 -#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB) -#ifdef CONFIG_USER_ONLY -/* - * For user mode on smaller 32 bit systems we may run into trouble - * allocating big chunks of data in the right place. On these systems - * we utilise a static code generation buffer directly in the binary. - */ -#define USE_STATIC_CODE_GEN_BUFFER -#endif -#else /* TCG_TARGET_REG_BITS == 64 */ -#ifdef CONFIG_USER_ONLY -/* - * As user-mode emulation typically means running multiple instances - * of the translator don't go too nuts with our default code gen - * buffer lest we make things too hard for the OS. - */ -#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (128 * MiB) -#else -/* - * We expect most system emulation to run one or two guests per host. - * Users running large scale system emulation may want to tweak their - * runtime setup via the tb-size control on the command line. - */ -#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (1 * GiB) -#endif -#endif - -#define DEFAULT_CODE_GEN_BUFFER_SIZE \ - (DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \ - ? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE) - -static size_t size_code_gen_buffer(size_t tb_size) -{ - /* Size the buffer. */ - if (tb_size == 0) { - size_t phys_mem = qemu_get_host_physmem(); - if (phys_mem == 0) { - tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; - } else { - tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); - } - } - if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { - tb_size = MIN_CODE_GEN_BUFFER_SIZE; - } - if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { - tb_size = MAX_CODE_GEN_BUFFER_SIZE; - } - return tb_size; -} - -#ifdef __mips__ -/* In order to use J and JAL within the code_gen_buffer, we require - that the buffer not cross a 256MB boundary. */ -static inline bool cross_256mb(void *addr, size_t size) -{ - return ((uintptr_t)addr ^ ((uintptr_t)addr + size)) & ~0x0ffffffful; -} - -/* We weren't able to allocate a buffer without crossing that boundary, - so make do with the larger portion of the buffer that doesn't cross. - Returns the new base of the buffer, and adjusts code_gen_buffer_size. */ -static inline void *split_cross_256mb(void *buf1, size_t size1) -{ - void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful); - size_t size2 = buf1 + size1 - buf2; - - size1 = buf2 - buf1; - if (size1 < size2) { - size1 = size2; - buf1 = buf2; - } - - tcg_ctx->code_gen_buffer_size = size1; - return buf1; -} -#endif - -#ifdef USE_STATIC_CODE_GEN_BUFFER -static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE] - __attribute__((aligned(CODE_GEN_ALIGN))); - -static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) -{ - void *buf, *end; - size_t size; - - if (splitwx > 0) { - error_setg(errp, "jit split-wx not supported"); - return false; - } - - /* page-align the beginning and end of the buffer */ - buf = static_code_gen_buffer; - end = static_code_gen_buffer + sizeof(static_code_gen_buffer); - buf = QEMU_ALIGN_PTR_UP(buf, qemu_real_host_page_size); - end = QEMU_ALIGN_PTR_DOWN(end, qemu_real_host_page_size); - - size = end - buf; - - /* Honor a command-line option limiting the size of the buffer. */ - if (size > tb_size) { - size = QEMU_ALIGN_DOWN(tb_size, qemu_real_host_page_size); - } - tcg_ctx->code_gen_buffer_size = size; - -#ifdef __mips__ - if (cross_256mb(buf, size)) { - buf = split_cross_256mb(buf, size); - size = tcg_ctx->code_gen_buffer_size; - } -#endif - - if (qemu_mprotect_rwx(buf, size)) { - error_setg_errno(errp, errno, "mprotect of jit buffer"); - return false; - } - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - - tcg_ctx->code_gen_buffer = buf; - return true; -} -#elif defined(_WIN32) -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) -{ - void *buf; - - if (splitwx > 0) { - error_setg(errp, "jit split-wx not supported"); - return false; - } - - buf = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, - PAGE_EXECUTE_READWRITE); - if (buf == NULL) { - error_setg_win32(errp, GetLastError(), - "allocate %zu bytes for jit buffer", size); - return false; - } - - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; - return true; -} -#else -static bool alloc_code_gen_buffer_anon(size_t size, int prot, - int flags, Error **errp) -{ - void *buf; - - buf = mmap(NULL, size, prot, flags, -1, 0); - if (buf == MAP_FAILED) { - error_setg_errno(errp, errno, - "allocate %zu bytes for jit buffer", size); - return false; - } - tcg_ctx->code_gen_buffer_size = size; - -#ifdef __mips__ - if (cross_256mb(buf, size)) { - /* - * Try again, with the original still mapped, to avoid re-acquiring - * the same 256mb crossing. - */ - size_t size2; - void *buf2 = mmap(NULL, size, prot, flags, -1, 0); - switch ((int)(buf2 != MAP_FAILED)) { - case 1: - if (!cross_256mb(buf2, size)) { - /* Success! Use the new buffer. */ - munmap(buf, size); - break; - } - /* Failure. Work with what we had. */ - munmap(buf2, size); - /* fallthru */ - default: - /* Split the original buffer. Free the smaller half. */ - buf2 = split_cross_256mb(buf, size); - size2 = tcg_ctx->code_gen_buffer_size; - if (buf == buf2) { - munmap(buf + size2, size - size2); - } else { - munmap(buf, size - size2); - } - size = size2; - break; - } - buf = buf2; - } -#endif - - /* Request large pages for the buffer. */ - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - - tcg_ctx->code_gen_buffer = buf; - return true; -} - -#ifndef CONFIG_TCG_INTERPRETER -#ifdef CONFIG_POSIX -#include "qemu/memfd.h" - -static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) -{ - void *buf_rw = NULL, *buf_rx = MAP_FAILED; - int fd = -1; - -#ifdef __mips__ - /* Find space for the RX mapping, vs the 256MiB regions. */ - if (!alloc_code_gen_buffer_anon(size, PROT_NONE, - MAP_PRIVATE | MAP_ANONYMOUS | - MAP_NORESERVE, errp)) { - return false; - } - /* The size of the mapping may have been adjusted. */ - size = tcg_ctx->code_gen_buffer_size; - buf_rx = tcg_ctx->code_gen_buffer; -#endif - - buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp); - if (buf_rw == NULL) { - goto fail; - } - -#ifdef __mips__ - void *tmp = mmap(buf_rx, size, PROT_READ | PROT_EXEC, - MAP_SHARED | MAP_FIXED, fd, 0); - if (tmp != buf_rx) { - goto fail_rx; - } -#else - buf_rx = mmap(NULL, size, PROT_READ | PROT_EXEC, MAP_SHARED, fd, 0); - if (buf_rx == MAP_FAILED) { - goto fail_rx; - } -#endif - - close(fd); - tcg_ctx->code_gen_buffer = buf_rw; - tcg_ctx->code_gen_buffer_size = size; - tcg_splitwx_diff = buf_rx - buf_rw; - - /* Request large pages for the buffer and the splitwx. */ - qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); - qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); - return true; - - fail_rx: - error_setg_errno(errp, errno, "failed to map shared memory for execute"); - fail: - if (buf_rx != MAP_FAILED) { - munmap(buf_rx, size); - } - if (buf_rw) { - munmap(buf_rw, size); - } - if (fd >= 0) { - close(fd); - } - return false; -} -#endif /* CONFIG_POSIX */ - -#ifdef CONFIG_DARWIN -#include - -extern kern_return_t mach_vm_remap(vm_map_t target_task, - mach_vm_address_t *target_address, - mach_vm_size_t size, - mach_vm_offset_t mask, - int flags, - vm_map_t src_task, - mach_vm_address_t src_address, - boolean_t copy, - vm_prot_t *cur_protection, - vm_prot_t *max_protection, - vm_inherit_t inheritance); - -static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) -{ - kern_return_t ret; - mach_vm_address_t buf_rw, buf_rx; - vm_prot_t cur_prot, max_prot; - - /* Map the read-write portion via normal anon memory. */ - if (!alloc_code_gen_buffer_anon(size, PROT_READ | PROT_WRITE, - MAP_PRIVATE | MAP_ANONYMOUS, errp)) { - return false; - } - - buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer; - buf_rx = 0; - ret = mach_vm_remap(mach_task_self(), - &buf_rx, - size, - 0, - VM_FLAGS_ANYWHERE, - mach_task_self(), - buf_rw, - false, - &cur_prot, - &max_prot, - VM_INHERIT_NONE); - if (ret != KERN_SUCCESS) { - /* TODO: Convert "ret" to a human readable error message. */ - error_setg(errp, "vm_remap for jit splitwx failed"); - munmap((void *)buf_rw, size); - return false; - } - - if (mprotect((void *)buf_rx, size, PROT_READ | PROT_EXEC) != 0) { - error_setg_errno(errp, errno, "mprotect for jit splitwx"); - munmap((void *)buf_rx, size); - munmap((void *)buf_rw, size); - return false; - } - - tcg_splitwx_diff = buf_rx - buf_rw; - return true; -} -#endif /* CONFIG_DARWIN */ -#endif /* CONFIG_TCG_INTERPRETER */ - -static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) -{ -#ifndef CONFIG_TCG_INTERPRETER -# ifdef CONFIG_DARWIN - return alloc_code_gen_buffer_splitwx_vmremap(size, errp); -# endif -# ifdef CONFIG_POSIX - return alloc_code_gen_buffer_splitwx_memfd(size, errp); -# endif -#endif - error_setg(errp, "jit split-wx not supported"); - return false; -} - -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) -{ - ERRP_GUARD(); - int prot, flags; - - if (splitwx) { - if (alloc_code_gen_buffer_splitwx(size, errp)) { - return true; - } - /* - * If splitwx force-on (1), fail; - * if splitwx default-on (-1), fall through to splitwx off. - */ - if (splitwx > 0) { - return false; - } - error_free_or_abort(errp); - } - - prot = PROT_READ | PROT_WRITE | PROT_EXEC; - flags = MAP_PRIVATE | MAP_ANONYMOUS; -#ifdef CONFIG_TCG_INTERPRETER - /* The tcg interpreter does not need execute permission. */ - prot = PROT_READ | PROT_WRITE; -#elif defined(CONFIG_DARWIN) - /* Applicable to both iOS and macOS (Apple Silicon). */ - if (!splitwx) { - flags |= MAP_JIT; - } -#endif - - return alloc_code_gen_buffer_anon(size, prot, flags, errp); -} -#endif /* USE_STATIC_CODE_GEN_BUFFER, WIN32, POSIX */ - static bool tb_cmp(const void *ap, const void *bp) { const TranslationBlock *a = ap; @@ -1323,19 +919,11 @@ static void tb_htable_init(void) size. */ void tcg_exec_init(unsigned long tb_size, int splitwx) { - bool ok; - tcg_allowed = true; tcg_context_init(&tcg_init_ctx); page_init(); tb_htable_init(); - - ok = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), - splitwx, &error_fatal); - assert(ok); - - /* TODO: allocating regions is hand-in-glove with code_gen_buffer. */ - tcg_region_init(); + tcg_region_init(tb_size, splitwx); #if defined(CONFIG_SOFTMMU) /* There's no guest base to take into account, so go ahead and diff --git a/tcg/region.c b/tcg/region.c index 6e34fcf775..162b4d6486 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -23,6 +23,8 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" +#include "qapi/error.h" #include "exec/exec-all.h" #include "tcg/tcg.h" #if !defined(CONFIG_USER_ONLY) @@ -406,6 +408,418 @@ static size_t tcg_n_regions(void) } #endif +/* + * Minimum size of the code gen buffer. This number is randomly chosen, + * but not so small that we can't have a fair number of TB's live. + */ +#define MIN_CODE_GEN_BUFFER_SIZE (1 * MiB) + +/* + * Maximum size of the code gen buffer we'd like to use. Unless otherwise + * indicated, this is constrained by the range of direct branches on the + * host cpu, as used by the TCG implementation of goto_tb. + */ +#if defined(__x86_64__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__sparc__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__powerpc64__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__powerpc__) +# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) +#elif defined(__aarch64__) +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) +#elif defined(__s390x__) + /* We have a +- 4GB range on the branches; leave some slop. */ +# define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) +#elif defined(__mips__) + /* + * We have a 256MB branch region, but leave room to make sure the + * main executable is also within that region. + */ +# define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) +#else +# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) +#endif + +#if TCG_TARGET_REG_BITS == 32 +#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB) +#ifdef CONFIG_USER_ONLY +/* + * For user mode on smaller 32 bit systems we may run into trouble + * allocating big chunks of data in the right place. On these systems + * we utilise a static code generation buffer directly in the binary. + */ +#define USE_STATIC_CODE_GEN_BUFFER +#endif +#else /* TCG_TARGET_REG_BITS == 64 */ +#ifdef CONFIG_USER_ONLY +/* + * As user-mode emulation typically means running multiple instances + * of the translator don't go too nuts with our default code gen + * buffer lest we make things too hard for the OS. + */ +#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (128 * MiB) +#else +/* + * We expect most system emulation to run one or two guests per host. + * Users running large scale system emulation may want to tweak their + * runtime setup via the tb-size control on the command line. + */ +#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (1 * GiB) +#endif +#endif + +#define DEFAULT_CODE_GEN_BUFFER_SIZE \ + (DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \ + ? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE) + +static size_t size_code_gen_buffer(size_t tb_size) +{ + /* Size the buffer. */ + if (tb_size == 0) { + size_t phys_mem = qemu_get_host_physmem(); + if (phys_mem == 0) { + tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; + } else { + tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); + } + } + if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { + tb_size = MIN_CODE_GEN_BUFFER_SIZE; + } + if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { + tb_size = MAX_CODE_GEN_BUFFER_SIZE; + } + return tb_size; +} + +#ifdef __mips__ +/* + * In order to use J and JAL within the code_gen_buffer, we require + * that the buffer not cross a 256MB boundary. + */ +static inline bool cross_256mb(void *addr, size_t size) +{ + return ((uintptr_t)addr ^ ((uintptr_t)addr + size)) & ~0x0ffffffful; +} + +/* + * We weren't able to allocate a buffer without crossing that boundary, + * so make do with the larger portion of the buffer that doesn't cross. + * Returns the new base of the buffer, and adjusts code_gen_buffer_size. + */ +static inline void *split_cross_256mb(void *buf1, size_t size1) +{ + void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful); + size_t size2 = buf1 + size1 - buf2; + + size1 = buf2 - buf1; + if (size1 < size2) { + size1 = size2; + buf1 = buf2; + } + + tcg_ctx->code_gen_buffer_size = size1; + return buf1; +} +#endif + +#ifdef USE_STATIC_CODE_GEN_BUFFER +static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE] + __attribute__((aligned(CODE_GEN_ALIGN))); + +static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) +{ + void *buf, *end; + size_t size; + + if (splitwx > 0) { + error_setg(errp, "jit split-wx not supported"); + return false; + } + + /* page-align the beginning and end of the buffer */ + buf = static_code_gen_buffer; + end = static_code_gen_buffer + sizeof(static_code_gen_buffer); + buf = QEMU_ALIGN_PTR_UP(buf, qemu_real_host_page_size); + end = QEMU_ALIGN_PTR_DOWN(end, qemu_real_host_page_size); + + size = end - buf; + + /* Honor a command-line option limiting the size of the buffer. */ + if (size > tb_size) { + size = QEMU_ALIGN_DOWN(tb_size, qemu_real_host_page_size); + } + tcg_ctx->code_gen_buffer_size = size; + +#ifdef __mips__ + if (cross_256mb(buf, size)) { + buf = split_cross_256mb(buf, size); + size = tcg_ctx->code_gen_buffer_size; + } +#endif + + if (qemu_mprotect_rwx(buf, size)) { + error_setg_errno(errp, errno, "mprotect of jit buffer"); + return false; + } + qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); + + tcg_ctx->code_gen_buffer = buf; + return true; +} +#elif defined(_WIN32) +static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +{ + void *buf; + + if (splitwx > 0) { + error_setg(errp, "jit split-wx not supported"); + return false; + } + + buf = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, + PAGE_EXECUTE_READWRITE); + if (buf == NULL) { + error_setg_win32(errp, GetLastError(), + "allocate %zu bytes for jit buffer", size); + return false; + } + + tcg_ctx->code_gen_buffer = buf; + tcg_ctx->code_gen_buffer_size = size; + return true; +} +#else +static bool alloc_code_gen_buffer_anon(size_t size, int prot, + int flags, Error **errp) +{ + void *buf; + + buf = mmap(NULL, size, prot, flags, -1, 0); + if (buf == MAP_FAILED) { + error_setg_errno(errp, errno, + "allocate %zu bytes for jit buffer", size); + return false; + } + tcg_ctx->code_gen_buffer_size = size; + +#ifdef __mips__ + if (cross_256mb(buf, size)) { + /* + * Try again, with the original still mapped, to avoid re-acquiring + * the same 256mb crossing. + */ + size_t size2; + void *buf2 = mmap(NULL, size, prot, flags, -1, 0); + switch ((int)(buf2 != MAP_FAILED)) { + case 1: + if (!cross_256mb(buf2, size)) { + /* Success! Use the new buffer. */ + munmap(buf, size); + break; + } + /* Failure. Work with what we had. */ + munmap(buf2, size); + /* fallthru */ + default: + /* Split the original buffer. Free the smaller half. */ + buf2 = split_cross_256mb(buf, size); + size2 = tcg_ctx->code_gen_buffer_size; + if (buf == buf2) { + munmap(buf + size2, size - size2); + } else { + munmap(buf, size - size2); + } + size = size2; + break; + } + buf = buf2; + } +#endif + + /* Request large pages for the buffer. */ + qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); + + tcg_ctx->code_gen_buffer = buf; + return true; +} + +#ifndef CONFIG_TCG_INTERPRETER +#ifdef CONFIG_POSIX +#include "qemu/memfd.h" + +static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) +{ + void *buf_rw = NULL, *buf_rx = MAP_FAILED; + int fd = -1; + +#ifdef __mips__ + /* Find space for the RX mapping, vs the 256MiB regions. */ + if (!alloc_code_gen_buffer_anon(size, PROT_NONE, + MAP_PRIVATE | MAP_ANONYMOUS | + MAP_NORESERVE, errp)) { + return false; + } + /* The size of the mapping may have been adjusted. */ + size = tcg_ctx->code_gen_buffer_size; + buf_rx = tcg_ctx->code_gen_buffer; +#endif + + buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp); + if (buf_rw == NULL) { + goto fail; + } + +#ifdef __mips__ + void *tmp = mmap(buf_rx, size, PROT_READ | PROT_EXEC, + MAP_SHARED | MAP_FIXED, fd, 0); + if (tmp != buf_rx) { + goto fail_rx; + } +#else + buf_rx = mmap(NULL, size, PROT_READ | PROT_EXEC, MAP_SHARED, fd, 0); + if (buf_rx == MAP_FAILED) { + goto fail_rx; + } +#endif + + close(fd); + tcg_ctx->code_gen_buffer = buf_rw; + tcg_ctx->code_gen_buffer_size = size; + tcg_splitwx_diff = buf_rx - buf_rw; + + /* Request large pages for the buffer and the splitwx. */ + qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); + qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); + return true; + + fail_rx: + error_setg_errno(errp, errno, "failed to map shared memory for execute"); + fail: + if (buf_rx != MAP_FAILED) { + munmap(buf_rx, size); + } + if (buf_rw) { + munmap(buf_rw, size); + } + if (fd >= 0) { + close(fd); + } + return false; +} +#endif /* CONFIG_POSIX */ + +#ifdef CONFIG_DARWIN +#include + +extern kern_return_t mach_vm_remap(vm_map_t target_task, + mach_vm_address_t *target_address, + mach_vm_size_t size, + mach_vm_offset_t mask, + int flags, + vm_map_t src_task, + mach_vm_address_t src_address, + boolean_t copy, + vm_prot_t *cur_protection, + vm_prot_t *max_protection, + vm_inherit_t inheritance); + +static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) +{ + kern_return_t ret; + mach_vm_address_t buf_rw, buf_rx; + vm_prot_t cur_prot, max_prot; + + /* Map the read-write portion via normal anon memory. */ + if (!alloc_code_gen_buffer_anon(size, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, errp)) { + return false; + } + + buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer; + buf_rx = 0; + ret = mach_vm_remap(mach_task_self(), + &buf_rx, + size, + 0, + VM_FLAGS_ANYWHERE, + mach_task_self(), + buf_rw, + false, + &cur_prot, + &max_prot, + VM_INHERIT_NONE); + if (ret != KERN_SUCCESS) { + /* TODO: Convert "ret" to a human readable error message. */ + error_setg(errp, "vm_remap for jit splitwx failed"); + munmap((void *)buf_rw, size); + return false; + } + + if (mprotect((void *)buf_rx, size, PROT_READ | PROT_EXEC) != 0) { + error_setg_errno(errp, errno, "mprotect for jit splitwx"); + munmap((void *)buf_rx, size); + munmap((void *)buf_rw, size); + return false; + } + + tcg_splitwx_diff = buf_rx - buf_rw; + return true; +} +#endif /* CONFIG_DARWIN */ +#endif /* CONFIG_TCG_INTERPRETER */ + +static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) +{ +#ifndef CONFIG_TCG_INTERPRETER +# ifdef CONFIG_DARWIN + return alloc_code_gen_buffer_splitwx_vmremap(size, errp); +# endif +# ifdef CONFIG_POSIX + return alloc_code_gen_buffer_splitwx_memfd(size, errp); +# endif +#endif + error_setg(errp, "jit split-wx not supported"); + return false; +} + +static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +{ + ERRP_GUARD(); + int prot, flags; + + if (splitwx) { + if (alloc_code_gen_buffer_splitwx(size, errp)) { + return true; + } + /* + * If splitwx force-on (1), fail; + * if splitwx default-on (-1), fall through to splitwx off. + */ + if (splitwx > 0) { + return false; + } + error_free_or_abort(errp); + } + + prot = PROT_READ | PROT_WRITE | PROT_EXEC; + flags = MAP_PRIVATE | MAP_ANONYMOUS; +#ifdef CONFIG_TCG_INTERPRETER + /* The tcg interpreter does not need execute permission. */ + prot = PROT_READ | PROT_WRITE; +#elif defined(CONFIG_DARWIN) + /* Applicable to both iOS and macOS (Apple Silicon). */ + if (!splitwx) { + flags |= MAP_JIT; + } +#endif + + return alloc_code_gen_buffer_anon(size, prot, flags, errp); +} +#endif /* USE_STATIC_CODE_GEN_BUFFER, WIN32, POSIX */ + /* * Initializes region partitioning. * @@ -434,16 +848,23 @@ static size_t tcg_n_regions(void) * in practice. Multi-threaded guests share most if not all of their translated * code, which makes parallel code generation less appealing than in softmmu. */ -void tcg_region_init(void) +void tcg_region_init(size_t tb_size, int splitwx) { - void *buf = tcg_init_ctx.code_gen_buffer; - void *aligned; - size_t size = tcg_init_ctx.code_gen_buffer_size; - size_t page_size = qemu_real_host_page_size; + void *buf, *aligned; + size_t size; + size_t page_size; size_t region_size; size_t n_regions; size_t i; + bool ok; + ok = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), + splitwx, &error_fatal); + assert(ok); + + buf = tcg_init_ctx.code_gen_buffer; + size = tcg_init_ctx.code_gen_buffer_size; + page_size = qemu_real_host_page_size; n_regions = tcg_n_regions(); /* The first region will be 'aligned - buf' bytes larger than the others */ From patchwork Fri Jun 11 23:41:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316651 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27274C48BE5 for ; Fri, 11 Jun 2021 23:43:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DD9A9613B8 for ; Fri, 11 Jun 2021 23:43:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DD9A9613B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52392 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrqoO-0005Nw-2p for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:43:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47108) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmg-0002Ty-TR for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:54 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]:40916) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmf-0002d8-4H for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:54 -0400 Received: by mail-pg1-x532.google.com with SMTP id j12so3672821pgh.7 for ; Fri, 11 Jun 2021 16:41:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=20wQQlls/fCaj92TazJBcMQ1M/HJlvVa/gvE7cqK+n4=; b=AKGQ2jPvAkyElvDqa9QIYvsAuMiBeSvLPL0aLeAbRPCiGw7aoynD8Zn3Px1FsLw8vT YSpgXI1VCKE+i/6zpkgkHeMHPM1Wl/g5gzjxA8ujEKlMYb9fAIF5/Y5/SSVpxIzQ8JOR 6ux1mbCk8VEbKZutYXjwYrlUYTuJmI9j4hUUkqIdmGconCmDwIVjXQH1YmsUm8CFxm6q hLH7wBBTtZbU+TfdHWwwSo40DxOOcqdWMXIZlWvqw3FXy0P2N/Ka3UgMbWsoc2fQtOJk EXObcgQD7mM3MsDI/4uIQCtNI01AuDEK+LiaS82WGRGxBGIeOm0+xkfFEUSbuAzRQq6C b9tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=20wQQlls/fCaj92TazJBcMQ1M/HJlvVa/gvE7cqK+n4=; b=rPciTwMV9SmeyGnGE/kADTgN5htQWRy9VEvtH4px1FOW3l3Lbryr8ay1iJJbpHgSKt CO4AK3hxJjV10b8Kf091CGzFNlahPbnqiycr4dop2odlU/w/3OnmPhD4WJ3y1v+i1ZOT 2ufvCrWeUs3CE+vvOYr2tOR4Zz8bE9ErAGur6uOIrTELUZED4Wbmqrtelrc/PoJEorUu oQu/WXoiS507MLruTvb3WzbmYciaqVVXAtACwgOqu3NeV4YlXInTZhQNSw/DPZSWJYz9 othGdxhOzxB1UVdOy6X9Cz01UPdpm/5vpPSKPfsTY4NUbbk5CONQFS5kCq1PJAk6Kaho o7eA== X-Gm-Message-State: AOAM533Jly4bBG1VDVO2Hm8JNF4IVTQspaUzYpywAS6mkjtKEaYoH2wn pNFLbGkV9OUbKxHVjKKhEtOQCMjCQuv1Ag== X-Google-Smtp-Source: ABdhPJyROnN+W0NKMcHEUqJqhBmGoF9qLYqIosNsTJmZxDT76fG9PuYQYl+RePDITk1jd+xcQf0/ww== X-Received: by 2002:a63:fe4a:: with SMTP id x10mr5944803pgj.132.1623454911566; Fri, 11 Jun 2021 16:41:51 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 10/34] accel/tcg: Rename tcg_init to tcg_init_machine Date: Fri, 11 Jun 2021 16:41:20 -0700 Message-Id: <20210611234144.653682-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We shortly want to use tcg_init for something else. Since the hook is called init_machine, match that. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/tcg-all.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index f132033999..30d81ff7f5 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -105,7 +105,7 @@ static void tcg_accel_instance_init(Object *obj) bool mttcg_enabled; -static int tcg_init(MachineState *ms) +static int tcg_init_machine(MachineState *ms) { TCGState *s = TCG_STATE(current_accel()); @@ -189,7 +189,7 @@ static void tcg_accel_class_init(ObjectClass *oc, void *data) { AccelClass *ac = ACCEL_CLASS(oc); ac->name = "tcg"; - ac->init_machine = tcg_init; + ac->init_machine = tcg_init_machine; ac->allowed = &tcg_allowed; object_class_property_add_str(oc, "thread", From patchwork Fri Jun 11 23:41:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316657 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D8E5C48BD1 for ; Fri, 11 Jun 2021 23:46:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A6D4613C3 for ; Fri, 11 Jun 2021 23:46:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3A6D4613C3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:60948 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrqr8-0002db-9L for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:46:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47116) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmh-0002VK-Al for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:55 -0400 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]:35456) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmf-0002dY-HI for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:41:55 -0400 Received: by mail-pg1-x52f.google.com with SMTP id o9so3687772pgd.2 for ; Fri, 11 Jun 2021 16:41:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=V0czrnxS9aM+DQ7xCluYyJs7kI06p24rRdcOwsnauus=; b=hbJJWqerp2RAPX2vQZwmCmmdjkQpyUle3JTbjNxEzep6VQ2bWu0r13atInerV0cVev o9fn/AxqLX28godeD6qVc3nQvvR45r3Ur+WSaL1YPhOb9htNqs7QSy3Lxx3ApN97/OHb /S8UJfyWc2YDDDmk5UI1JeYE7LxCf/2mqRxWXBGpaNOUh1qQJHM7f+vRLEh2K9N8GRmz dtWaH6yRiLjaTuKk5NjFMjZy2KAYLJSIedOtcZ4XSp8xOKVpAm5iMdMvSqJ0GV4DbhXS 89PYtBSMA7xWht6CECDyDRpb8X91OlmjPyWhDteljqlxxWwp/DjiU0GX+DYZU1J47I2P lDtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=V0czrnxS9aM+DQ7xCluYyJs7kI06p24rRdcOwsnauus=; b=nXBNiEqMUAsI57yC+m3I7Nt8BjngOvyx45KZ0OWbBzbCvJ3sx9SUBYuuGbv2z9bedB EdDv46jA/jy0kuy80H1srQf2G+uW7KhZf5rcKQgCdFvnl/+p/ymofwivCAcom9zvUnxc pCpvACtll8QwsfxYjg/tTJ5xU6Gu9qD+YwAXiXjED/qkRYpdqZd0j5tahuELCzAds/pE SGHZUN+1xkLuAdgeyZFgY60pb+NO2QlD5kQCeg2wabVL9tjWcQUmNsFS/B1o8ufuY/5W NHwuOg5T0mUoqFp/MriPJXqjGQwrKIGNSqhKkezWRs+PJQ6saTMNaHUcGIY/m3SuL0nF nyPg== X-Gm-Message-State: AOAM533wfh4o6AZI1CfiKvuSDv5snrsY4R9zx9i7N99dGbVHLDcEBFhM u6Tu5VqI7W/k0KJJgDCtzbGtZB50Xri+mg== X-Google-Smtp-Source: ABdhPJxGMcnKK5WqPOLkH3Ne6IjqaNmvOO98yFmDAdaLz1sXh10fFV0ua31rgO0JLt1cY1qtXmsG4A== X-Received: by 2002:a05:6a00:1a48:b029:2f4:4632:ff14 with SMTP id h8-20020a056a001a48b02902f44632ff14mr10524560pfv.44.1623454912289; Fri, 11 Jun 2021 16:41:52 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 11/34] tcg: Create tcg_init Date: Fri, 11 Jun 2021 16:41:21 -0700 Message-Id: <20210611234144.653682-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Perform both tcg_context_init and tcg_region_init. Do not leave this split to the caller. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 3 +-- tcg/tcg-internal.h | 1 + accel/tcg/translate-all.c | 3 +-- tcg/tcg.c | 9 ++++++++- 4 files changed, 11 insertions(+), 5 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 834785fc23..b3304ce095 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -873,7 +873,6 @@ void *tcg_malloc_internal(TCGContext *s, int size); void tcg_pool_reset(TCGContext *s); TranslationBlock *tcg_tb_alloc(TCGContext *s); -void tcg_region_init(size_t tb_size, int splitwx); void tb_destroy(TranslationBlock *tb); void tcg_region_reset_all(void); @@ -906,7 +905,7 @@ static inline void *tcg_malloc(int size) } } -void tcg_context_init(TCGContext *s); +void tcg_init(size_t tb_size, int splitwx); void tcg_register_thread(void); void tcg_prologue_init(TCGContext *s); void tcg_func_start(TCGContext *s); diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index b1dda343c2..f13c564d9b 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -30,6 +30,7 @@ extern TCGContext **tcg_ctxs; extern unsigned int n_tcg_ctxs; +void tcg_region_init(size_t tb_size, int splitwx); bool tcg_region_alloc(TCGContext *s); void tcg_region_initial_alloc(TCGContext *s); void tcg_region_prologue_set(TCGContext *s); diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index ad7a25d9f0..4f563b8724 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -920,10 +920,9 @@ static void tb_htable_init(void) void tcg_exec_init(unsigned long tb_size, int splitwx) { tcg_allowed = true; - tcg_context_init(&tcg_init_ctx); page_init(); tb_htable_init(); - tcg_region_init(tb_size, splitwx); + tcg_init(tb_size, splitwx); #if defined(CONFIG_SOFTMMU) /* There's no guest base to take into account, so go ahead and diff --git a/tcg/tcg.c b/tcg/tcg.c index 8c43c0f316..2625d9e502 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -576,8 +576,9 @@ static void process_op_defs(TCGContext *s); static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type, TCGReg reg, const char *name); -void tcg_context_init(TCGContext *s) +static void tcg_context_init(void) { + TCGContext *s = &tcg_init_ctx; int op, total_args, n, i; TCGOpDef *def; TCGArgConstraint *args_ct; @@ -654,6 +655,12 @@ void tcg_context_init(TCGContext *s) cpu_env = temp_tcgv_ptr(ts); } +void tcg_init(size_t tb_size, int splitwx) +{ + tcg_context_init(); + tcg_region_init(tb_size, splitwx); +} + /* * Allocate TBs right before their corresponding translated code, making * sure that TBs and code are on different cache lines. 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 12/34] accel/tcg: Merge tcg_exec_init into tcg_init_machine Date: Fri, 11 Jun 2021 16:41:22 -0700 Message-Id: <20210611234144.653682-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" There is only one caller, and shortly we will need access to the MachineState, which tcg_init_machine already has. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- accel/tcg/internal.h | 2 ++ include/sysemu/tcg.h | 2 -- accel/tcg/tcg-all.c | 16 +++++++++++++++- accel/tcg/translate-all.c | 21 ++------------------- bsd-user/main.c | 2 +- 5 files changed, 20 insertions(+), 23 deletions(-) diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h index e9c145e0fb..881bc1ede0 100644 --- a/accel/tcg/internal.h +++ b/accel/tcg/internal.h @@ -16,5 +16,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, int cflags); void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); +void page_init(void); +void tb_htable_init(void); #endif /* ACCEL_TCG_INTERNAL_H */ diff --git a/include/sysemu/tcg.h b/include/sysemu/tcg.h index 00349fb18a..53352450ff 100644 --- a/include/sysemu/tcg.h +++ b/include/sysemu/tcg.h @@ -8,8 +8,6 @@ #ifndef SYSEMU_TCG_H #define SYSEMU_TCG_H -void tcg_exec_init(unsigned long tb_size, int splitwx); - #ifdef CONFIG_TCG extern bool tcg_allowed; #define tcg_enabled() (tcg_allowed) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 30d81ff7f5..e990180c4b 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -32,6 +32,7 @@ #include "qemu/error-report.h" #include "qemu/accel.h" #include "qapi/qapi-builtin-visit.h" +#include "internal.h" struct TCGState { AccelState parent_obj; @@ -109,8 +110,21 @@ static int tcg_init_machine(MachineState *ms) { TCGState *s = TCG_STATE(current_accel()); - tcg_exec_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); + tcg_allowed = true; mttcg_enabled = s->mttcg_enabled; + + page_init(); + tb_htable_init(); + tcg_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); + +#if defined(CONFIG_SOFTMMU) + /* + * There's no guest base to take into account, so go ahead and + * initialize the prologue now. + */ + tcg_prologue_init(tcg_ctx); +#endif + return 0; } diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 4f563b8724..59609d62d5 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -408,7 +408,7 @@ bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit) return false; } -static void page_init(void) +void page_init(void) { page_size_init(); page_table_config_init(); @@ -907,30 +907,13 @@ static bool tb_cmp(const void *ap, const void *bp) a->page_addr[1] == b->page_addr[1]; } -static void tb_htable_init(void) +void tb_htable_init(void) { unsigned int mode = QHT_MODE_AUTO_RESIZE; qht_init(&tb_ctx.htable, tb_cmp, CODE_GEN_HTABLE_SIZE, mode); } -/* Must be called before using the QEMU cpus. 'tb_size' is the size - (in bytes) allocated to the translation buffer. Zero means default - size. */ -void tcg_exec_init(unsigned long tb_size, int splitwx) -{ - tcg_allowed = true; - page_init(); - tb_htable_init(); - tcg_init(tb_size, splitwx); - -#if defined(CONFIG_SOFTMMU) - /* There's no guest base to take into account, so go ahead and - initialize the prologue now. */ - tcg_prologue_init(tcg_ctx); -#endif -} - /* call with @p->lock held */ static inline void invalidate_page_bitmap(PageDesc *p) { diff --git a/bsd-user/main.c b/bsd-user/main.c index 270cf2ca70..fe66204b6b 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -813,7 +813,7 @@ int main(int argc, char **argv) envlist_free(envlist); /* - * Now that page sizes are configured in tcg_exec_init() we can do + * Now that page sizes are configured we can do * proper page alignment for guest_base. */ guest_base = HOST_PAGE_ALIGN(guest_base); From patchwork Fri Jun 11 23:41:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46611C48BE5 for ; Fri, 11 Jun 2021 23:58:36 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E1E0761288 for ; Fri, 11 Jun 2021 23:58:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E1E0761288 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:42336 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrr2o-0002zE-Uz for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:58:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47360) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmq-00031V-LR for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:04 -0400 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]:38835) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmg-0002ep-R8 for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:04 -0400 Received: by mail-pl1-x631.google.com with SMTP id 69so3599959plc.5 for ; Fri, 11 Jun 2021 16:41:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qR3R54ldm2hlks4jTNDifo1l/88jznlHccjT2381AZE=; b=HFqOKFv1yij89TQD7WLpcIcI/eicB91mmdQf2Lx/EmLYmGjWoKs/53PcYJEFJAF5BD Cv8uMZ+DFxb198ZMSrOGz7JRIysCxcm2AlevJbKsFOYxu3KJqnfxfO6QaBPK8pHio2H5 eFtoGBERNo9kMRRfnkEzhaXt03k/JSMJwCqSR4UGGNKpZykvri2TfkCZBYp7WtOYemcM /eqtAfMlsA6qWE2A3Sd2jiGn5uN3ZtH0jhtOC96vmINFQ1rsUkWWGADEACD4SLdg04dh oDmU8YTmmsGXmx0dUYuFyUZmHBhOiUxzD1iBr0ug/a6kOBFyQZQZ/4ptfctAUa28U9sc zAIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qR3R54ldm2hlks4jTNDifo1l/88jznlHccjT2381AZE=; b=WU6K3UOm1QHmQXCo/WFGUrHNlS07+SpqQnx2O/LTLBB5zt5/vbMD1qZZVRvHalMjtb ErcDqAByZCVSPARBmZPv1HqzTRkOlpnk/nbzd7EszMg7VOaxArZneZZ78s6zubS2laVy EONhTJYYDUCBg5XMu8y4fDTUFUsxaIQX8jXnFOz++UBuWukSWCouSt/H6KocIjAaH99Y RS6TIm1iY99fYMxNnLrUykPHc9lNIwOh3Pz4UzbO4NONF0R8ZNoGN9nI3x7MrNEJ+2BJ C0a2ggjfXNMnrF2B4CkcOwo3v3+bBWah/LVSoZHShr2EgJv74Ragh0eFGDdwWVqOB/8J JTAg== X-Gm-Message-State: AOAM532HnHqcy4G8NGMDQ3IV+rhpvNc9QU9OzxKNlcowXfA/rTbWFeCl UJQwm31t6nItGYt6QbitUoY6l8y0jplrOQ== X-Google-Smtp-Source: ABdhPJxXXCmMLbdPAJis9bNKHwBgd95j3q7mHpJt04TKHc06OF71xSYmV0ONy8yM/JXIhVOUl8NO3g== X-Received: by 2002:a17:90a:4a89:: with SMTP id f9mr11571593pjh.50.1623454913496; Fri, 11 Jun 2021 16:41:53 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 13/34] accel/tcg: Use MiB in tcg_init_machine Date: Fri, 11 Jun 2021 16:41:23 -0700 Message-Id: <20210611234144.653682-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- accel/tcg/tcg-all.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index e990180c4b..1ee89902c3 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -32,6 +32,7 @@ #include "qemu/error-report.h" #include "qemu/accel.h" #include "qapi/qapi-builtin-visit.h" +#include "qemu/units.h" #include "internal.h" struct TCGState { @@ -115,7 +116,7 @@ static int tcg_init_machine(MachineState *ms) page_init(); tb_htable_init(); - tcg_init(s->tb_size * 1024 * 1024, s->splitwx_enabled); + tcg_init(s->tb_size * MiB, s->splitwx_enabled); #if defined(CONFIG_SOFTMMU) /* From patchwork Fri Jun 11 23:41:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70F57C48BE5 for ; Fri, 11 Jun 2021 23:54:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EF0D3613B8 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 14/34] accel/tcg: Pass down max_cpus to tcg_init Date: Fri, 11 Jun 2021 16:41:24 -0700 Message-Id: <20210611234144.653682-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Start removing the include of hw/boards.h from tcg/. Pass down the max_cpus value from tcg_init_machine, where we have the MachineState already. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 2 +- tcg/tcg-internal.h | 2 +- accel/tcg/tcg-all.c | 10 +++++++++- tcg/region.c | 32 +++++++++++--------------------- tcg/tcg.c | 10 ++++------ 5 files changed, 26 insertions(+), 30 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index b3304ce095..2316a64139 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -905,7 +905,7 @@ static inline void *tcg_malloc(int size) } } -void tcg_init(size_t tb_size, int splitwx); +void tcg_init(size_t tb_size, int splitwx, unsigned max_cpus); void tcg_register_thread(void); void tcg_prologue_init(TCGContext *s); void tcg_func_start(TCGContext *s); diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index f13c564d9b..fcfeca232f 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -30,7 +30,7 @@ extern TCGContext **tcg_ctxs; extern unsigned int n_tcg_ctxs; -void tcg_region_init(size_t tb_size, int splitwx); +void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus); bool tcg_region_alloc(TCGContext *s); void tcg_region_initial_alloc(TCGContext *s); void tcg_region_prologue_set(TCGContext *s); diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 1ee89902c3..00803f76d8 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -33,6 +33,9 @@ #include "qemu/accel.h" #include "qapi/qapi-builtin-visit.h" #include "qemu/units.h" +#if !defined(CONFIG_USER_ONLY) +#include "hw/boards.h" +#endif #include "internal.h" struct TCGState { @@ -110,13 +113,18 @@ bool mttcg_enabled; static int tcg_init_machine(MachineState *ms) { TCGState *s = TCG_STATE(current_accel()); +#ifdef CONFIG_USER_ONLY + unsigned max_cpus = 1; +#else + unsigned max_cpus = ms->smp.max_cpus; +#endif tcg_allowed = true; mttcg_enabled = s->mttcg_enabled; page_init(); tb_htable_init(); - tcg_init(s->tb_size * MiB, s->splitwx_enabled); + tcg_init(s->tb_size * MiB, s->splitwx_enabled, max_cpus); #if defined(CONFIG_SOFTMMU) /* diff --git a/tcg/region.c b/tcg/region.c index 162b4d6486..877baf16f5 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -27,9 +27,6 @@ #include "qapi/error.h" #include "exec/exec-all.h" #include "tcg/tcg.h" -#if !defined(CONFIG_USER_ONLY) -#include "hw/boards.h" -#endif #include "tcg-internal.h" @@ -366,27 +363,20 @@ void tcg_region_reset_all(void) tcg_region_tree_reset_all(); } +static size_t tcg_n_regions(unsigned max_cpus) +{ #ifdef CONFIG_USER_ONLY -static size_t tcg_n_regions(void) -{ return 1; -} #else -/* - * It is likely that some vCPUs will translate more code than others, so we - * first try to set more regions than max_cpus, with those regions being of - * reasonable size. If that's not possible we make do by evenly dividing - * the code_gen_buffer among the vCPUs. - */ -static size_t tcg_n_regions(void) -{ + /* + * It is likely that some vCPUs will translate more code than others, + * so we first try to set more regions than max_cpus, with those regions + * being of reasonable size. If that's not possible we make do by evenly + * dividing the code_gen_buffer among the vCPUs. + */ size_t i; /* Use a single region if all we have is one vCPU thread */ -#if !defined(CONFIG_USER_ONLY) - MachineState *ms = MACHINE(qdev_get_machine()); - unsigned int max_cpus = ms->smp.max_cpus; -#endif if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { return 1; } @@ -405,8 +395,8 @@ static size_t tcg_n_regions(void) } /* If we can't, then just allocate one region per vCPU thread */ return max_cpus; -} #endif +} /* * Minimum size of the code gen buffer. This number is randomly chosen, @@ -848,7 +838,7 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) * in practice. Multi-threaded guests share most if not all of their translated * code, which makes parallel code generation less appealing than in softmmu. */ -void tcg_region_init(size_t tb_size, int splitwx) +void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { void *buf, *aligned; size_t size; @@ -865,7 +855,7 @@ void tcg_region_init(size_t tb_size, int splitwx) buf = tcg_init_ctx.code_gen_buffer; size = tcg_init_ctx.code_gen_buffer_size; page_size = qemu_real_host_page_size; - n_regions = tcg_n_regions(); + n_regions = tcg_n_regions(max_cpus); /* The first region will be 'aligned - buf' bytes larger than the others */ aligned = QEMU_ALIGN_PTR_UP(buf, page_size); diff --git a/tcg/tcg.c b/tcg/tcg.c index 2625d9e502..5cc384e205 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -576,7 +576,7 @@ static void process_op_defs(TCGContext *s); static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type, TCGReg reg, const char *name); -static void tcg_context_init(void) +static void tcg_context_init(unsigned max_cpus) { TCGContext *s = &tcg_init_ctx; int op, total_args, n, i; @@ -645,8 +645,6 @@ static void tcg_context_init(void) tcg_ctxs = &tcg_ctx; n_tcg_ctxs = 1; #else - MachineState *ms = MACHINE(qdev_get_machine()); - unsigned int max_cpus = ms->smp.max_cpus; tcg_ctxs = g_new(TCGContext *, max_cpus); #endif @@ -655,10 +653,10 @@ static void tcg_context_init(void) cpu_env = temp_tcgv_ptr(ts); } -void tcg_init(size_t tb_size, int splitwx) +void tcg_init(size_t tb_size, int splitwx, unsigned max_cpus) { - tcg_context_init(); - tcg_region_init(tb_size, splitwx); + tcg_context_init(max_cpus); + tcg_region_init(tb_size, splitwx, max_cpus); } /* From patchwork Fri Jun 11 23:41:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61E71C48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 15/34] tcg: Introduce tcg_max_ctxs Date: Fri, 11 Jun 2021 16:41:25 -0700 Message-Id: <20210611234144.653682-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Finish the divorce of tcg/ from hw/, and do not take the max cpu value from MachineState; just remember what we were passed in tcg_init. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/tcg-internal.h | 3 ++- tcg/region.c | 6 +++--- tcg/tcg.c | 23 ++++++++++------------- 3 files changed, 15 insertions(+), 17 deletions(-) diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index fcfeca232f..f9906523da 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -28,7 +28,8 @@ #define TCG_HIGHWATER 1024 extern TCGContext **tcg_ctxs; -extern unsigned int n_tcg_ctxs; +extern unsigned int tcg_cur_ctxs; +extern unsigned int tcg_max_ctxs; void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus); bool tcg_region_alloc(TCGContext *s); diff --git a/tcg/region.c b/tcg/region.c index 877baf16f5..57069a38ff 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -347,7 +347,7 @@ void tcg_region_initial_alloc(TCGContext *s) /* Call from a safe-work context */ void tcg_region_reset_all(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; qemu_mutex_lock(®ion.lock); @@ -934,7 +934,7 @@ void tcg_region_prologue_set(TCGContext *s) */ size_t tcg_code_size(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; size_t total; @@ -970,7 +970,7 @@ size_t tcg_code_capacity(void) size_t tcg_tb_phys_invalidate_count(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; size_t total = 0; diff --git a/tcg/tcg.c b/tcg/tcg.c index 5cc384e205..9880d5205e 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -43,11 +43,6 @@ #define NO_CPU_IO_DEFS #include "exec/exec-all.h" - -#if !defined(CONFIG_USER_ONLY) -#include "hw/boards.h" -#endif - #include "tcg/tcg-op.h" #if UINTPTR_MAX == UINT32_MAX @@ -155,7 +150,8 @@ static int tcg_out_ldst_finalize(TCGContext *s); #endif TCGContext **tcg_ctxs; -unsigned int n_tcg_ctxs; +unsigned int tcg_cur_ctxs; +unsigned int tcg_max_ctxs; TCGv_env cpu_env = 0; const void *tcg_code_gen_epilogue; uintptr_t tcg_splitwx_diff; @@ -475,7 +471,6 @@ void tcg_register_thread(void) #else void tcg_register_thread(void) { - MachineState *ms = MACHINE(qdev_get_machine()); TCGContext *s = g_malloc(sizeof(*s)); unsigned int i, n; @@ -491,8 +486,8 @@ void tcg_register_thread(void) } /* Claim an entry in tcg_ctxs */ - n = qatomic_fetch_inc(&n_tcg_ctxs); - g_assert(n < ms->smp.max_cpus); + n = qatomic_fetch_inc(&tcg_cur_ctxs); + g_assert(n < tcg_max_ctxs); qatomic_set(&tcg_ctxs[n], s); if (n > 0) { @@ -643,9 +638,11 @@ static void tcg_context_init(unsigned max_cpus) */ #ifdef CONFIG_USER_ONLY tcg_ctxs = &tcg_ctx; - n_tcg_ctxs = 1; + tcg_cur_ctxs = 1; + tcg_max_ctxs = 1; #else - tcg_ctxs = g_new(TCGContext *, max_cpus); + tcg_max_ctxs = max_cpus; + tcg_ctxs = g_new0(TCGContext *, max_cpus); #endif tcg_debug_assert(!tcg_regset_test_reg(s->reserved_regs, TCG_AREG0)); @@ -3937,7 +3934,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) static inline void tcg_profile_snapshot(TCGProfile *prof, bool counters, bool table) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; for (i = 0; i < n_ctxs; i++) { @@ -4000,7 +3997,7 @@ void tcg_dump_op_count(void) int64_t tcg_cpu_exec_time(void) { - unsigned int n_ctxs = qatomic_read(&n_tcg_ctxs); + unsigned int n_ctxs = qatomic_read(&tcg_cur_ctxs); unsigned int i; int64_t ret = 0; From patchwork Fri Jun 11 23:41:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 227C4C48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 16/34] tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h Date: Fri, 11 Jun 2021 16:41:26 -0700 Message-Id: <20210611234144.653682-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Remove the ifdef ladder and move each define into the appropriate header file. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 2 ++ tcg/mips/tcg-target.h | 6 ++++++ tcg/ppc/tcg-target.h | 2 ++ tcg/riscv/tcg-target.h | 1 + tcg/s390/tcg-target.h | 3 +++ tcg/sparc/tcg-target.h | 1 + tcg/tci/tcg-target.h | 1 + tcg/region.c | 33 +++++---------------------------- 10 files changed, 23 insertions(+), 28 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 5ec30dba25..ef55f7c185 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -15,6 +15,7 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 24 +#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) #undef TCG_TARGET_STACK_GROWSUP typedef enum { diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index d6222ba2db..57fd0c0c74 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -60,6 +60,7 @@ extern int arm_arch; #undef TCG_TARGET_STACK_GROWSUP #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 +#define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX typedef enum { TCG_REG_R0 = 0, diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index b693d3692d..ac10066c3e 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -31,9 +31,11 @@ #ifdef __x86_64__ # define TCG_TARGET_REG_BITS 64 # define TCG_TARGET_NB_REGS 32 +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) #else # define TCG_TARGET_REG_BITS 32 # define TCG_TARGET_NB_REGS 24 +# define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX #endif typedef enum { diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index c2c32fb38f..e81e824cab 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -39,6 +39,12 @@ #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 #define TCG_TARGET_NB_REGS 32 +/* + * We have a 256MB branch region, but leave room to make sure the + * main executable is also within that region. + */ +#define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) + typedef enum { TCG_REG_ZERO = 0, TCG_REG_AT, diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index d1339afc66..c13ed5640a 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -27,8 +27,10 @@ #ifdef _ARCH_PPC64 # define TCG_TARGET_REG_BITS 64 +# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) #else # define TCG_TARGET_REG_BITS 32 +# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) #endif #define TCG_TARGET_NB_REGS 64 diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 727c8df418..87ea94666b 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -34,6 +34,7 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 20 #define TCG_TARGET_NB_REGS 32 +#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) typedef enum { TCG_REG_ZERO, diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 641464eea4..b04b72b7eb 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -28,6 +28,9 @@ #define TCG_TARGET_INSN_UNIT_SIZE 2 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19 +/* We have a +- 4GB range on the branches; leave some slop. */ +#define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) + typedef enum TCGReg { TCG_REG_R0 = 0, TCG_REG_R1, diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index f66f5d07dc..86bb9a2d39 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -30,6 +30,7 @@ #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 #define TCG_TARGET_NB_REGS 32 +#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) typedef enum { TCG_REG_G0 = 0, diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 52af6d8bc5..d0b5f3fa64 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -43,6 +43,7 @@ #define TCG_TARGET_INTERPRETER 1 #define TCG_TARGET_INSN_UNIT_SIZE 1 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 +#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) #if UINTPTR_MAX == UINT32_MAX # define TCG_TARGET_REG_BITS 32 diff --git a/tcg/region.c b/tcg/region.c index 57069a38ff..13087aa0c9 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -401,37 +401,14 @@ static size_t tcg_n_regions(unsigned max_cpus) /* * Minimum size of the code gen buffer. This number is randomly chosen, * but not so small that we can't have a fair number of TB's live. + * + * Maximum size, MAX_CODE_GEN_BUFFER_SIZE, is defined in tcg-target.h. + * Unless otherwise indicated, this is constrained by the range of + * direct branches on the host cpu, as used by the TCG implementation + * of goto_tb. */ #define MIN_CODE_GEN_BUFFER_SIZE (1 * MiB) -/* - * Maximum size of the code gen buffer we'd like to use. Unless otherwise - * indicated, this is constrained by the range of direct branches on the - * host cpu, as used by the TCG implementation of goto_tb. - */ -#if defined(__x86_64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__sparc__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__powerpc__) -# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB) -#elif defined(__aarch64__) -# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) -#elif defined(__s390x__) - /* We have a +- 4GB range on the branches; leave some slop. */ -# define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) -#elif defined(__mips__) - /* - * We have a 256MB branch region, but leave room to make sure the - * main executable is also within that region. - */ -# define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB) -#else -# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) -#endif - #if TCG_TARGET_REG_BITS == 32 #define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB) #ifdef CONFIG_USER_ONLY From patchwork Fri Jun 11 23:41:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316695 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E8F1C48BD1 for ; Fri, 11 Jun 2021 23:55:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 80300613B8 for ; Fri, 11 Jun 2021 23:55:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 80300613B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33256 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrqzp-0005Au-Mr for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:55:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47276) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmn-0002pt-GM for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:01 -0400 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]:42634) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmj-0002gd-0W for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:01 -0400 Received: by mail-pl1-x62b.google.com with SMTP id v13so3599477ple.9 for ; Fri, 11 Jun 2021 16:41:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v3dqO5xG9NML/3lBzhEEI0lp1xg70tk/1JnUT4HyRn4=; b=SgzSfOLgLvR+/tldyUQnrXnw3IY2Z8dZdrWpIBwdGL8clujPdTWGOpSZjQf8/39uMh u68JqX7yNQeKioPWaR5aY5L1PoSjMkxvA607R90LDXYHMLdb7ucox2RTl6t819/ax/25 X3xPZDEru+9ELaSUZDHXfAHbrS/ogG12DD3/3AH4sOhPMEw7Nf+0yTv5Cte0X80XCtmA IowTR4XT69QITBK3j9z6an1b30gqEZW034coJIFmJY4+NMQtC8YogvxRbDFERy1meG3U Pmyt++uVnaOJXEsnPJXFlLSJWZoKBOOjTTNQNVa/rrM07m09sC3k5dvjTntLqD7pPGIF VeYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v3dqO5xG9NML/3lBzhEEI0lp1xg70tk/1JnUT4HyRn4=; b=L2v7voRhaTFgopzCWGcB2SU+TpKhmK18YBmzJOna5xTJ0OHnRjOO+jB5/faDu7ea6p H2npe/nm2/IqVtY1QHMZc2Fzs09W/SiAkHdwtYiZMiVFwtk7U+rGCN49YzFQkG/RJoc8 ICNlhIAoLWFv7yg38ZboAAlHGjeutP0tLmFb0mDAu/FBN8twZK1xiSb/vV02z7M6sqrp hu/Qk/2+B2G5osyGIgZ/cInXjdzE/K0RciqKcOWktlzRGrGoFdF5gKhCFscf6lOlRRYq eJC2nUic10KICQMaSIERbxXFOr3yPdbajtSsKTm4yAywIyi25DTMUVrgcDF/BIP8Bku3 aC0Q== X-Gm-Message-State: AOAM532h8EnNa0PJ2xRBV0mjKK9Z4SYHbQddQ+6xGZxcOVOznLlmiD00 vGPvB9ehce0ZlLJU/WtdUg0y06S8QcEgeQ== X-Google-Smtp-Source: ABdhPJzvN3GccV5JCFKyEFduD9anYsY/x2JvzibByrHtotUnkJHwnifABdyE37FP2FVZjLJBPBxgaw== X-Received: by 2002:a17:90a:de04:: with SMTP id m4mr6713608pjv.40.1623454915732; Fri, 11 Jun 2021 16:41:55 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 17/34] tcg: Replace region.end with region.total_size Date: Fri, 11 Jun 2021 16:41:27 -0700 Message-Id: <20210611234144.653682-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" A size is easier to work with than an end point, particularly during initial buffer allocation. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/region.c | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index 13087aa0c9..7a34c96d74 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -48,10 +48,10 @@ struct tcg_region_state { /* fields set at init time */ void *start; void *start_aligned; - void *end; size_t n; size_t size; /* size of one region */ size_t stride; /* .size + guard size */ + size_t total_size; /* size of entire buffer, >= n * stride */ /* fields protected by the lock */ size_t current; /* current region index */ @@ -278,8 +278,9 @@ static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) if (curr_region == 0) { start = region.start; } + /* The final region may have a few extra pages due to earlier rounding. */ if (curr_region == region.n - 1) { - end = region.end; + end = region.start_aligned + region.total_size; } *pstart = start; @@ -817,8 +818,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { - void *buf, *aligned; - size_t size; + void *buf, *aligned, *end; + size_t total_size; size_t page_size; size_t region_size; size_t n_regions; @@ -830,19 +831,20 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) assert(ok); buf = tcg_init_ctx.code_gen_buffer; - size = tcg_init_ctx.code_gen_buffer_size; + total_size = tcg_init_ctx.code_gen_buffer_size; page_size = qemu_real_host_page_size; n_regions = tcg_n_regions(max_cpus); /* The first region will be 'aligned - buf' bytes larger than the others */ aligned = QEMU_ALIGN_PTR_UP(buf, page_size); - g_assert(aligned < tcg_init_ctx.code_gen_buffer + size); + g_assert(aligned < tcg_init_ctx.code_gen_buffer + total_size); + /* * Make region_size a multiple of page_size, using aligned as the start. * As a result of this we might end up with a few extra pages at the end of * the buffer; we will assign those to the last region. */ - region_size = (size - (aligned - buf)) / n_regions; + region_size = (total_size - (aligned - buf)) / n_regions; region_size = QEMU_ALIGN_DOWN(region_size, page_size); /* A region must have at least 2 pages; one code, one guard */ @@ -856,9 +858,11 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) region.start = buf; region.start_aligned = aligned; /* page-align the end, since its last page will be a guard page */ - region.end = QEMU_ALIGN_PTR_DOWN(buf + size, page_size); + end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size); /* account for that last guard page */ - region.end -= page_size; + end -= page_size; + total_size = end - aligned; + region.total_size = total_size; /* * Set guard pages in the rw buffer, as that's the one into which @@ -899,7 +903,7 @@ void tcg_region_prologue_set(TCGContext *s) /* Register the balance of the buffer with gdb. */ tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.end - region.start); + region.start_aligned + region.total_size - region.start); } /* @@ -940,8 +944,10 @@ size_t tcg_code_capacity(void) /* no need for synchronization; these variables are set at init time */ guard_size = region.stride - region.size; - capacity = region.end + guard_size - region.start; - capacity -= region.n * (guard_size + TCG_HIGHWATER); + capacity = region.total_size; + capacity -= (region.n - 1) * guard_size; + capacity -= region.n * TCG_HIGHWATER; + return capacity; } From patchwork Fri Jun 11 23:41:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316709 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34FD8C48BE6 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 18/34] tcg: Rename region.start to region.after_prologue Date: Fri, 11 Jun 2021 16:41:28 -0700 Message-Id: <20210611234144.653682-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Give the field a name reflecting its actual meaning. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/region.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index 7a34c96d74..b143eaf69c 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -46,8 +46,8 @@ struct tcg_region_state { QemuMutex lock; /* fields set at init time */ - void *start; void *start_aligned; + void *after_prologue; size_t n; size_t size; /* size of one region */ size_t stride; /* .size + guard size */ @@ -276,7 +276,7 @@ static void tcg_region_bounds(size_t curr_region, void **pstart, void **pend) end = start + region.size; if (curr_region == 0) { - start = region.start; + start = region.after_prologue; } /* The final region may have a few extra pages due to earlier rounding. */ if (curr_region == region.n - 1) { @@ -855,7 +855,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) region.n = n_regions; region.size = region_size - page_size; region.stride = region_size; - region.start = buf; + region.after_prologue = buf; region.start_aligned = aligned; /* page-align the end, since its last page will be a guard page */ end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size); @@ -895,15 +895,16 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) void tcg_region_prologue_set(TCGContext *s) { /* Deduct the prologue from the first region. */ - g_assert(region.start == s->code_gen_buffer); - region.start = s->code_ptr; + g_assert(region.start_aligned == s->code_gen_buffer); + region.after_prologue = s->code_ptr; /* Recompute boundaries of the first region. */ tcg_region_assign(s, 0); /* Register the balance of the buffer with gdb. */ - tcg_register_jit(tcg_splitwx_to_rx(region.start), - region.start_aligned + region.total_size - region.start); + tcg_register_jit(tcg_splitwx_to_rx(region.after_prologue), + region.start_aligned + region.total_size - + region.after_prologue); } /* From patchwork Fri Jun 11 23:41:29 2021 Content-Type: text/plain; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 19/34] tcg: Tidy tcg_n_regions Date: Fri, 11 Jun 2021 16:41:29 -0700 Message-Id: <20210611234144.653682-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Compute the value using straight division and bounds, rather than a loop. Pass in tb_size rather than reading from tcg_init_ctx.code_gen_buffer_size, Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/region.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index b143eaf69c..037a01e4ed 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -364,38 +364,33 @@ void tcg_region_reset_all(void) tcg_region_tree_reset_all(); } -static size_t tcg_n_regions(unsigned max_cpus) +static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus) { #ifdef CONFIG_USER_ONLY return 1; #else + size_t n_regions; + /* * It is likely that some vCPUs will translate more code than others, * so we first try to set more regions than max_cpus, with those regions * being of reasonable size. If that's not possible we make do by evenly * dividing the code_gen_buffer among the vCPUs. */ - size_t i; - /* Use a single region if all we have is one vCPU thread */ if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { return 1; } - /* Try to have more regions than max_cpus, with each region being >= 2 MB */ - for (i = 8; i > 0; i--) { - size_t regions_per_thread = i; - size_t region_size; - - region_size = tcg_init_ctx.code_gen_buffer_size; - region_size /= max_cpus * regions_per_thread; - - if (region_size >= 2 * 1024u * 1024) { - return max_cpus * regions_per_thread; - } + /* + * Try to have more regions than max_cpus, with each region being >= 2 MB. + * If we can't, then just allocate one region per vCPU thread. + */ + n_regions = tb_size / (2 * MiB); + if (n_regions <= max_cpus) { + return max_cpus; } - /* If we can't, then just allocate one region per vCPU thread */ - return max_cpus; + return MIN(n_regions, max_cpus * 8); #endif } @@ -833,7 +828,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) buf = tcg_init_ctx.code_gen_buffer; total_size = tcg_init_ctx.code_gen_buffer_size; page_size = qemu_real_host_page_size; - n_regions = tcg_n_regions(max_cpus); + n_regions = tcg_n_regions(total_size, max_cpus); /* The first region will be 'aligned - buf' bytes larger than the others */ aligned = QEMU_ALIGN_PTR_UP(buf, page_size); From patchwork Fri Jun 11 23:41:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADED5C48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 20/34] tcg: Tidy split_cross_256mb Date: Fri, 11 Jun 2021 16:41:30 -0700 Message-Id: <20210611234144.653682-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Return output buffer and size via output pointer arguments, rather than returning size via tcg_ctx->code_gen_buffer_size. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/region.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index 037a01e4ed..445a278702 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -470,9 +470,10 @@ static inline bool cross_256mb(void *addr, size_t size) /* * We weren't able to allocate a buffer without crossing that boundary, * so make do with the larger portion of the buffer that doesn't cross. - * Returns the new base of the buffer, and adjusts code_gen_buffer_size. + * Returns the new base and size of the buffer in *obuf and *osize. */ -static inline void *split_cross_256mb(void *buf1, size_t size1) +static inline void split_cross_256mb(void **obuf, size_t *osize, + void *buf1, size_t size1) { void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful); size_t size2 = buf1 + size1 - buf2; @@ -483,8 +484,8 @@ static inline void *split_cross_256mb(void *buf1, size_t size1) buf1 = buf2; } - tcg_ctx->code_gen_buffer_size = size1; - return buf1; + *obuf = buf1; + *osize = size1; } #endif @@ -514,12 +515,10 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) if (size > tb_size) { size = QEMU_ALIGN_DOWN(tb_size, qemu_real_host_page_size); } - tcg_ctx->code_gen_buffer_size = size; #ifdef __mips__ if (cross_256mb(buf, size)) { - buf = split_cross_256mb(buf, size); - size = tcg_ctx->code_gen_buffer_size; + split_cross_256mb(&buf, &size, buf, size); } #endif @@ -530,6 +529,7 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); tcg_ctx->code_gen_buffer = buf; + tcg_ctx->code_gen_buffer_size = size; return true; } #elif defined(_WIN32) @@ -566,7 +566,6 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, "allocate %zu bytes for jit buffer", size); return false; } - tcg_ctx->code_gen_buffer_size = size; #ifdef __mips__ if (cross_256mb(buf, size)) { @@ -588,8 +587,7 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, /* fallthru */ default: /* Split the original buffer. Free the smaller half. */ - buf2 = split_cross_256mb(buf, size); - size2 = tcg_ctx->code_gen_buffer_size; + split_cross_256mb(&buf2, &size2, buf, size); if (buf == buf2) { munmap(buf + size2, size - size2); } else { @@ -606,6 +604,7 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); tcg_ctx->code_gen_buffer = buf; + tcg_ctx->code_gen_buffer_size = size; return true; } From patchwork Fri Jun 11 23:41:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D34C9C48BE5 for ; Sat, 12 Jun 2021 00:03:20 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F9BC613C8 for ; Sat, 12 Jun 2021 00:03:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4F9BC613C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:54830 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrr7P-00033S-Do for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:03:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47292) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmo-0002se-9t for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:02 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:50861) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqml-0002iv-IC for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:02 -0400 Received: by mail-pj1-x1032.google.com with SMTP id g4so6555196pjk.0 for ; Fri, 11 Jun 2021 16:41:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1l+8M2L0wM1oDKnQt56uL3Y/0V+moZ9SU9/ZN2FXsyc=; b=LpqQjzRDOp/KwKC7cR3el/L2ynR/z99L+eZO8A+EjkXKAwElngsq+IWbBwbYkY5kYX TL7wBkGUBz1d7CVHKdrIzBAfKYYEkEt0HSiph23n23POaxPSzR/cStEuqR7v/K7to9CV u0ICT3KNyMSxCU5rojczg4ApxhCyclf/eEuA4ENAnw+s7PAZNq7Qja9SHyCtMRqJzzv5 BNh9X273ldSMvCVmzr/Bg0/lObwn5N7nJagIPZ3R/W1zbF9NjmZC0ev2SpDJI6gBiQTy 6QAFWan0Y+iQuOpdKuYITS2rxlshzkWx3SHfvGnAGSyHmUhtWb0KPhMmMm66fKqRNIwx iiCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1l+8M2L0wM1oDKnQt56uL3Y/0V+moZ9SU9/ZN2FXsyc=; b=Dvub7SQnDHvqUr9sre3fCGwKXj7oq9pFwoTFbKaDpcpECB1HkiJsM3fRN434GruE/n 8aKpNf5I+2gt2EWW8XBo0LCs+92yeiSM6WRiIuFxLTMeJDxx4z13ywLtZ1PnlsOQQ0y/ LCavCsekhIEYQBovvfNZMrPHKmWb/NZXeAw4gKrVhEqKxRhEHQitTbuwfKnfArWHcVyn t+E3Um58IFK4pUjPKyHqBEjlfn9gsSAu/FmLQ1IdvSj7MuqNV2kFWZgtrunKar3dC1X9 +gsrf2MAgG8pcbLLEKo+lxuP40/i7W5B0sf3NCpqxbWrwqT7r3DJMXBUzdxiIBobvot/ 28pg== X-Gm-Message-State: AOAM530AKNkwLIx32qyEiVMo6f6Df5Yzt43Vc+y9Ao6VA4xdgDKW35/z b2qaElmadMkM7OqcGRKxEqfVXRjsrRRttg== X-Google-Smtp-Source: ABdhPJzuGol4r16wLm2vFJ4PLE6VdntTdMaen2VZgJaC1in4crs8tAFrgTukWjGuriDwu+WIvdOE7w== X-Received: by 2002:a17:90a:c8b:: with SMTP id v11mr11148113pja.114.1623454918187; Fri, 11 Jun 2021 16:41:58 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 21/34] tcg: Move in_code_gen_buffer and tests to region.c Date: Fri, 11 Jun 2021 16:41:31 -0700 Message-Id: <20210611234144.653682-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Shortly, the full code_gen_buffer will only be visible to region.c, so move in_code_gen_buffer out-of-line. Move the debugging versions of tcg_splitwx_to_{rx,rw} to region.c as well, so that the compiler gets to see the implementation of in_code_gen_buffer. This leaves exactly one use of in_code_gen_buffer outside of region.c, in cpu_restore_state. Which, being on the exception path, is not performance critical. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 11 +---------- tcg/region.c | 34 ++++++++++++++++++++++++++++++++++ tcg/tcg.c | 23 ----------------------- 3 files changed, 35 insertions(+), 33 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 2316a64139..f48b5aa166 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -695,16 +695,7 @@ extern const void *tcg_code_gen_epilogue; extern uintptr_t tcg_splitwx_diff; extern TCGv_env cpu_env; -static inline bool in_code_gen_buffer(const void *p) -{ - const TCGContext *s = &tcg_init_ctx; - /* - * Much like it is valid to have a pointer to the byte past the - * end of an array (so long as you don't dereference it), allow - * a pointer to the byte past the end of the code gen buffer. - */ - return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size; -} +bool in_code_gen_buffer(const void *p); #ifdef CONFIG_DEBUG_TCG const void *tcg_splitwx_to_rx(void *rw); diff --git a/tcg/region.c b/tcg/region.c index 445a278702..5beba41412 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -68,6 +68,40 @@ static struct tcg_region_state region; static void *region_trees; static size_t tree_size; +bool in_code_gen_buffer(const void *p) +{ + const TCGContext *s = &tcg_init_ctx; + /* + * Much like it is valid to have a pointer to the byte past the + * end of an array (so long as you don't dereference it), allow + * a pointer to the byte past the end of the code gen buffer. + */ + return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size; +} + +#ifdef CONFIG_DEBUG_TCG +const void *tcg_splitwx_to_rx(void *rw) +{ + /* Pass NULL pointers unchanged. */ + if (rw) { + g_assert(in_code_gen_buffer(rw)); + rw += tcg_splitwx_diff; + } + return rw; +} + +void *tcg_splitwx_to_rw(const void *rx) +{ + /* Pass NULL pointers unchanged. */ + if (rx) { + rx -= tcg_splitwx_diff; + /* Assert that we end with a pointer in the rw region. */ + g_assert(in_code_gen_buffer(rx)); + } + return (void *)rx; +} +#endif /* CONFIG_DEBUG_TCG */ + /* compare a pointer @ptr and a tb_tc @s */ static int ptr_cmp_tb_tc(const void *ptr, const struct tb_tc *s) { diff --git a/tcg/tcg.c b/tcg/tcg.c index 9880d5205e..4bb35b455b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -416,29 +416,6 @@ static const TCGTargetOpDef constraint_sets[] = { #include "tcg-target.c.inc" -#ifdef CONFIG_DEBUG_TCG -const void *tcg_splitwx_to_rx(void *rw) -{ - /* Pass NULL pointers unchanged. */ - if (rw) { - g_assert(in_code_gen_buffer(rw)); - rw += tcg_splitwx_diff; - } - return rw; -} - -void *tcg_splitwx_to_rw(const void *rx) -{ - /* Pass NULL pointers unchanged. */ - if (rx) { - rx -= tcg_splitwx_diff; - /* Assert that we end with a pointer in the rw region. */ - g_assert(in_code_gen_buffer(rx)); - } - return (void *)rx; -} -#endif /* CONFIG_DEBUG_TCG */ - static void alloc_tcg_plugin_context(TCGContext *s) { #ifdef CONFIG_PLUGIN From patchwork Fri Jun 11 23:41:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40C7EC48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 22/34] tcg: Allocate code_gen_buffer into struct tcg_region_state Date: Fri, 11 Jun 2021 16:41:32 -0700 Message-Id: <20210611234144.653682-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Do not mess around with setting values within tcg_init_ctx. Put the values into 'region' directly, which is where they will live for the lifetime of the program. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- tcg/region.c | 64 ++++++++++++++++++++++------------------------------ 1 file changed, 27 insertions(+), 37 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index 5beba41412..ed7efba4b4 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -70,13 +70,12 @@ static size_t tree_size; bool in_code_gen_buffer(const void *p) { - const TCGContext *s = &tcg_init_ctx; /* * Much like it is valid to have a pointer to the byte past the * end of an array (so long as you don't dereference it), allow * a pointer to the byte past the end of the code gen buffer. */ - return (size_t)(p - s->code_gen_buffer) <= s->code_gen_buffer_size; + return (size_t)(p - region.start_aligned) <= region.total_size; } #ifdef CONFIG_DEBUG_TCG @@ -562,8 +561,8 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) } qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf; + region.total_size = size; return true; } #elif defined(_WIN32) @@ -584,8 +583,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) return false; } - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf; + region.total_size = size; return true; } #else @@ -637,8 +636,8 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, /* Request large pages for the buffer. */ qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - tcg_ctx->code_gen_buffer = buf; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf; + region.total_size = size; return true; } @@ -659,8 +658,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) return false; } /* The size of the mapping may have been adjusted. */ - size = tcg_ctx->code_gen_buffer_size; - buf_rx = tcg_ctx->code_gen_buffer; + buf_rx = region.start_aligned; + size = region.total_size; #endif buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp); @@ -682,8 +681,8 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) #endif close(fd); - tcg_ctx->code_gen_buffer = buf_rw; - tcg_ctx->code_gen_buffer_size = size; + region.start_aligned = buf_rw; + region.total_size = size; tcg_splitwx_diff = buf_rx - buf_rw; /* Request large pages for the buffer and the splitwx. */ @@ -734,7 +733,7 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) return false; } - buf_rw = (mach_vm_address_t)tcg_ctx->code_gen_buffer; + buf_rw = region.start_aligned; buf_rx = 0; ret = mach_vm_remap(mach_task_self(), &buf_rx, @@ -846,11 +845,8 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { - void *buf, *aligned, *end; - size_t total_size; size_t page_size; size_t region_size; - size_t n_regions; size_t i; bool ok; @@ -858,39 +854,33 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) splitwx, &error_fatal); assert(ok); - buf = tcg_init_ctx.code_gen_buffer; - total_size = tcg_init_ctx.code_gen_buffer_size; - page_size = qemu_real_host_page_size; - n_regions = tcg_n_regions(total_size, max_cpus); - - /* The first region will be 'aligned - buf' bytes larger than the others */ - aligned = QEMU_ALIGN_PTR_UP(buf, page_size); - g_assert(aligned < tcg_init_ctx.code_gen_buffer + total_size); - /* * Make region_size a multiple of page_size, using aligned as the start. * As a result of this we might end up with a few extra pages at the end of * the buffer; we will assign those to the last region. */ - region_size = (total_size - (aligned - buf)) / n_regions; + region.n = tcg_n_regions(region.total_size, max_cpus); + page_size = qemu_real_host_page_size; + region_size = region.total_size / region.n; region_size = QEMU_ALIGN_DOWN(region_size, page_size); /* A region must have at least 2 pages; one code, one guard */ g_assert(region_size >= 2 * page_size); + region.stride = region_size; + + /* Reserve space for guard pages. */ + region.size = region_size - page_size; + region.total_size -= page_size; + + /* + * The first region will be smaller than the others, via the prologue, + * which has yet to be allocated. For now, the first region begins at + * the page boundary. + */ + region.after_prologue = region.start_aligned; /* init the region struct */ qemu_mutex_init(®ion.lock); - region.n = n_regions; - region.size = region_size - page_size; - region.stride = region_size; - region.after_prologue = buf; - region.start_aligned = aligned; - /* page-align the end, since its last page will be a guard page */ - end = QEMU_ALIGN_PTR_DOWN(buf + total_size, page_size); - /* account for that last guard page */ - end -= page_size; - total_size = end - aligned; - region.total_size = total_size; /* * Set guard pages in the rw buffer, as that's the one into which From patchwork Fri Jun 11 23:41:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DD13C48BD1 for ; Fri, 11 Jun 2021 23:56:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ECB5E613B8 for ; Fri, 11 Jun 2021 23:56:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ECB5E613B8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36062 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrr0o-0007A0-3Z for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:56:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47318) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmp-0002vw-9i for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:03 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]:54830) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmm-0002jJ-Kr for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:03 -0400 Received: by mail-pj1-x1033.google.com with SMTP id g24so6520291pji.4 for ; Fri, 11 Jun 2021 16:42:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xvQ1foWcYjEjn0WVi/whCjaQe18yQNKefXnuEUc9Cy0=; b=Pk//YZPGEMU5bXFcayMlPq9NGlVNIByok2GwmoKfXvN5D++WKa0xweCKkaXQU0EOxe sFxK37UR1ighgM+GsTdG1Wf7821D2ksqAVhKEju/23tjFQkDMcEGnh2yJxhdqjuYv0mk pIHhWuYW2yqXY6oDSQGGqrqFMkk687aBSx1zUB7Z1AavBBfJryLunZedvZJySlUTVELf xwVY01k1KAoSwGnljYTCsqLdL6stop10aY0jjJ98Oobg6cTaoIUW+HqN6n7QeqILVYTX RGjG4eQxtz5TMKwFR9bUfzf3d71xn1nA3lDTgdJ9dPfOVUqh7TW4XVcbmM2MGgE8Ovuh hffw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xvQ1foWcYjEjn0WVi/whCjaQe18yQNKefXnuEUc9Cy0=; b=N6vw4pfmooQkl3/p7EOHdKYZ6e5vVZVKAi78vhj7b+1e2IHEzU/A/XPFZGlaKTikL4 SSl41nw2qQ/PFbdDj77rLNKubzv5VEJNzYMERbB9ef9E0UC405wtaDD+fLePKMhpLAd1 UcvTpadYwayPlwDJiootmIgjZFoLuT3aFt+7jAcA3GQOgYDm+UBFDmo2UDxhsvG4sBW2 XwNuuzSFkNJD2TukPZaEo9V0TG8aMQT/2rdqVRg8L7Ku9hOEnZna0/Ej1AEe3E8goZWI bJUje3PHmbs+Ubrxa/Aq4CIYaqcRxydiRcwdpZws28a6wtxspRuXA592WFz2YD+HBDt6 rf3Q== X-Gm-Message-State: AOAM532GvP2YaXc/jHhKEKDnCTJmVCdTiUfq3cxmtxUlAppcaWaHHvGT JPBg7D0j9XUofedpBTckJ1/uLAxBZOh0Ww== X-Google-Smtp-Source: ABdhPJzZsFJ0dQLyIBZW/ojv9zRxsjvF2aATwBoVfmW+rnvwvuwFu9taWV4+OiSuUIUG3wXs8SCVew== X-Received: by 2002:a17:90a:4a0e:: with SMTP id e14mr11589836pjh.209.1623454919426; Fri, 11 Jun 2021 16:41:59 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 23/34] tcg: Return the map protection from alloc_code_gen_buffer Date: Fri, 11 Jun 2021 16:41:33 -0700 Message-Id: <20210611234144.653682-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Change the interface from a boolean error indication to a negative error vs a non-negative protection. For the moment this is only interface change, not making use of the new data. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- tcg/region.c | 63 +++++++++++++++++++++++++++------------------------- 1 file changed, 33 insertions(+), 30 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index ed7efba4b4..e6c80b35b1 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -526,14 +526,14 @@ static inline void split_cross_256mb(void **obuf, size_t *osize, static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE] __attribute__((aligned(CODE_GEN_ALIGN))); -static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) +static int alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) { void *buf, *end; size_t size; if (splitwx > 0) { error_setg(errp, "jit split-wx not supported"); - return false; + return -1; } /* page-align the beginning and end of the buffer */ @@ -563,16 +563,17 @@ static bool alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) region.start_aligned = buf; region.total_size = size; - return true; + + return PROT_READ | PROT_WRITE; } #elif defined(_WIN32) -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) { void *buf; if (splitwx > 0) { error_setg(errp, "jit split-wx not supported"); - return false; + return -1; } buf = VirtualAlloc(NULL, size, MEM_RESERVE | MEM_COMMIT, @@ -585,11 +586,12 @@ static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) region.start_aligned = buf; region.total_size = size; - return true; + + return PAGE_READ | PAGE_WRITE | PAGE_EXEC; } #else -static bool alloc_code_gen_buffer_anon(size_t size, int prot, - int flags, Error **errp) +static int alloc_code_gen_buffer_anon(size_t size, int prot, + int flags, Error **errp) { void *buf; @@ -597,7 +599,7 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, if (buf == MAP_FAILED) { error_setg_errno(errp, errno, "allocate %zu bytes for jit buffer", size); - return false; + return -1; } #ifdef __mips__ @@ -638,7 +640,7 @@ static bool alloc_code_gen_buffer_anon(size_t size, int prot, region.start_aligned = buf; region.total_size = size; - return true; + return prot; } #ifndef CONFIG_TCG_INTERPRETER @@ -652,9 +654,9 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) #ifdef __mips__ /* Find space for the RX mapping, vs the 256MiB regions. */ - if (!alloc_code_gen_buffer_anon(size, PROT_NONE, - MAP_PRIVATE | MAP_ANONYMOUS | - MAP_NORESERVE, errp)) { + if (alloc_code_gen_buffer_anon(size, PROT_NONE, + MAP_PRIVATE | MAP_ANONYMOUS | + MAP_NORESERVE, errp) < 0) { return false; } /* The size of the mapping may have been adjusted. */ @@ -688,7 +690,7 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) /* Request large pages for the buffer and the splitwx. */ qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); - return true; + return PROT_READ | PROT_WRITE; fail_rx: error_setg_errno(errp, errno, "failed to map shared memory for execute"); @@ -702,7 +704,7 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) if (fd >= 0) { close(fd); } - return false; + return -1; } #endif /* CONFIG_POSIX */ @@ -721,7 +723,7 @@ extern kern_return_t mach_vm_remap(vm_map_t target_task, vm_prot_t *max_protection, vm_inherit_t inheritance); -static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) +static int alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) { kern_return_t ret; mach_vm_address_t buf_rw, buf_rx; @@ -730,7 +732,7 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) /* Map the read-write portion via normal anon memory. */ if (!alloc_code_gen_buffer_anon(size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, errp)) { - return false; + return -1; } buf_rw = region.start_aligned; @@ -750,23 +752,23 @@ static bool alloc_code_gen_buffer_splitwx_vmremap(size_t size, Error **errp) /* TODO: Convert "ret" to a human readable error message. */ error_setg(errp, "vm_remap for jit splitwx failed"); munmap((void *)buf_rw, size); - return false; + return -1; } if (mprotect((void *)buf_rx, size, PROT_READ | PROT_EXEC) != 0) { error_setg_errno(errp, errno, "mprotect for jit splitwx"); munmap((void *)buf_rx, size); munmap((void *)buf_rw, size); - return false; + return -1; } tcg_splitwx_diff = buf_rx - buf_rw; - return true; + return PROT_READ | PROT_WRITE; } #endif /* CONFIG_DARWIN */ #endif /* CONFIG_TCG_INTERPRETER */ -static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) +static int alloc_code_gen_buffer_splitwx(size_t size, Error **errp) { #ifndef CONFIG_TCG_INTERPRETER # ifdef CONFIG_DARWIN @@ -777,24 +779,25 @@ static bool alloc_code_gen_buffer_splitwx(size_t size, Error **errp) # endif #endif error_setg(errp, "jit split-wx not supported"); - return false; + return -1; } -static bool alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) +static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) { ERRP_GUARD(); int prot, flags; if (splitwx) { - if (alloc_code_gen_buffer_splitwx(size, errp)) { - return true; + prot = alloc_code_gen_buffer_splitwx(size, errp); + if (prot >= 0) { + return prot; } /* * If splitwx force-on (1), fail; * if splitwx default-on (-1), fall through to splitwx off. */ if (splitwx > 0) { - return false; + return -1; } error_free_or_abort(errp); } @@ -848,11 +851,11 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) size_t page_size; size_t region_size; size_t i; - bool ok; + int have_prot; - ok = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), - splitwx, &error_fatal); - assert(ok); + have_prot = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), + splitwx, &error_fatal); + assert(have_prot >= 0); /* * Make region_size a multiple of page_size, using aligned as the start. From patchwork Fri Jun 11 23:41:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF803C48BE5 for ; Sat, 12 Jun 2021 00:06:05 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 889EF6124B for ; Sat, 12 Jun 2021 00:06:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 889EF6124B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:32988 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrrA4-0007JN-OS for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:06:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47330) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmp-0002xd-R0 for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:03 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]:45589) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmn-0002ji-81 for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:03 -0400 Received: by mail-pj1-x1031.google.com with SMTP id z3-20020a17090a3983b029016bc232e40bso6852360pjb.4 for ; Fri, 11 Jun 2021 16:42:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oGlm/QkFrT3k7s3B4Mdy2N+YuMxL0+85EjDFAhTeOqA=; b=Ec6x/vq2wkKpCa2bzY9c0MUR1Jgjz6JvfO5KTP/n+Fg0psi2PzlBpXcPINJx+Wfzj+ aGnhrzRyDEgswHNGnP/kq6FowPybs8rCbaBKAg7m8Wt4SFNl8nzoVlqn/s6Sof7LIBdW Co5Jmu1c9wUlAgTqIh/akT8OUrR8ycRTDx6t5MPfKs9UIQoq/p1ZrXF6QvkCoGzle33w DP9GsKCT9lHn2W0ex39gup8tEmxRoq1zM1Ce3ODlXhv5UxS276+GHvfe5V1Kphu+YGvj OSl/d4CzGGVB7fETBSTf/U0pdcBaA6IxNQqeC0yOQjuF0aSaN7yoq8odrDMQmBDcG6pu iPxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oGlm/QkFrT3k7s3B4Mdy2N+YuMxL0+85EjDFAhTeOqA=; b=giz0DK6xulNqt5XN5tL8v0HVx4faodv7wGCLDRShyTLoExFS3JXmdqVBQgBCZV0jET eYa0UN3ZPy2I0EJasgu5DTY0NW68sXaSMbB8MuffOFejCbTSlxgg2PL/GlM4oa3D+gJF qHepn5tnlxWq2YoQoVheV4H88or73ApZn+lHQetFNc4JY98g/W/lwv451Fqjy2Cdqu1Y sb8EuCwfhn79yYBil66tSBUStakW95+SpJCEq7MrjHw8Mb/0PdDkIVWhFwf7Zcck7sgJ TxbKAKqA6+5V5jt6Upj1T5DsUIPqP7lSNOWc8wfK2LDyxaWdluBsXK0ivnP5L0vP2JD6 cXWA== X-Gm-Message-State: AOAM531MyKS5OcBYV2l9BEVFZXnlkk9CJPDHbeY/2BjW/TT/tFu9Fi+J bi5OSmITQ/DU4thCGp+r9lwmk8Oc2qwmzg== X-Google-Smtp-Source: ABdhPJwmsmhiwQtT8W6R3p7XXJIqueh10qXqlzYD0sGPvco5Y23vd9j6J8EviBpQCLLO6TuVv02uYQ== X-Received: by 2002:a17:90a:4404:: with SMTP id s4mr11544556pjg.218.1623454920007; Fri, 11 Jun 2021 16:42:00 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:41:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 24/34] tcg: Sink qemu_madvise call to common code Date: Fri, 11 Jun 2021 16:41:34 -0700 Message-Id: <20210611234144.653682-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move the call out of the N versions of alloc_code_gen_buffer and into tcg_region_init. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- tcg/region.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index e6c80b35b1..2e541cd2bf 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -559,7 +559,6 @@ static int alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) error_setg_errno(errp, errno, "mprotect of jit buffer"); return false; } - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); region.start_aligned = buf; region.total_size = size; @@ -635,9 +634,6 @@ static int alloc_code_gen_buffer_anon(size_t size, int prot, } #endif - /* Request large pages for the buffer. */ - qemu_madvise(buf, size, QEMU_MADV_HUGEPAGE); - region.start_aligned = buf; region.total_size = size; return prot; @@ -687,9 +683,6 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp) region.total_size = size; tcg_splitwx_diff = buf_rx - buf_rw; - /* Request large pages for the buffer and the splitwx. */ - qemu_madvise(buf_rw, size, QEMU_MADV_HUGEPAGE); - qemu_madvise(buf_rx, size, QEMU_MADV_HUGEPAGE); return PROT_READ | PROT_WRITE; fail_rx: @@ -857,6 +850,13 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) splitwx, &error_fatal); assert(have_prot >= 0); + /* Request large pages for the buffer and the splitwx. */ + qemu_madvise(region.start_aligned, region.total_size, QEMU_MADV_HUGEPAGE); + if (tcg_splitwx_diff) { + qemu_madvise(region.start_aligned + tcg_splitwx_diff, + region.total_size, QEMU_MADV_HUGEPAGE); + } + /* * Make region_size a multiple of page_size, using aligned as the start. * As a result of this we might end up with a few extra pages at the end of From patchwork Fri Jun 11 23:41:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316745 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E2F4C48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 25/34] util/osdep: Add qemu_mprotect_rw Date: Fri, 11 Jun 2021 16:41:35 -0700 Message-Id: <20210611234144.653682-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" For --enable-tcg-interpreter on Windows, we will need this. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/qemu/osdep.h | 1 + util/osdep.c | 9 +++++++++ 2 files changed, 10 insertions(+) diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 4c6f2390be..236a045671 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -512,6 +512,7 @@ void sigaction_invoke(struct sigaction *action, #endif int qemu_madvise(void *addr, size_t len, int advice); +int qemu_mprotect_rw(void *addr, size_t size); int qemu_mprotect_rwx(void *addr, size_t size); int qemu_mprotect_none(void *addr, size_t size); diff --git a/util/osdep.c b/util/osdep.c index 66d01b9160..42a0a4986a 100644 --- a/util/osdep.c +++ b/util/osdep.c @@ -97,6 +97,15 @@ static int qemu_mprotect__osdep(void *addr, size_t size, int prot) #endif } +int qemu_mprotect_rw(void *addr, size_t size) +{ +#ifdef _WIN32 + return qemu_mprotect__osdep(addr, size, PAGE_READWRITE); +#else + return qemu_mprotect__osdep(addr, size, PROT_READ | PROT_WRITE); +#endif +} + int qemu_mprotect_rwx(void *addr, size_t size) { #ifdef _WIN32 From patchwork Fri Jun 11 23:41:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316711 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E8DEC48BD1 for ; Sat, 12 Jun 2021 00:00:12 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A4FA0613C6 for ; Sat, 12 Jun 2021 00:00:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A4FA0613C6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:48560 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrr4M-0007CY-NJ for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:00:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47370) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmr-00032o-1P for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:05 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]:33455) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmo-0002kN-F4 for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:04 -0400 Received: by mail-pj1-x102a.google.com with SMTP id k22-20020a17090aef16b0290163512accedso8024785pjz.0 for ; Fri, 11 Jun 2021 16:42:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2wvd/6SGk1w8OXui4/FBWGSYpErzZvV+B9LV37fcakY=; b=bdLFHHPwOlW4VyQm3We/eXb+tvzIbp+VmnB2Zly8tWpPgPtoeRvAv1cIGMxSgYlY3V f+Veegvt7fssgEJ40mQZFwEcIDHKqK5WYB6fGkyCYJSIRDdFeoUGqc2vUSvaONXmaPsw q8FigcpwXC4XRlAI38t8RWF9JyIBiYFk+pH5kgFf04Xm8XuVwpjDWjNwIdkL4D7VwlNY tuLckFRAzHYwoRv3M55EznPELFIm9XK6WFocRN9hNgxOuHBVbPVn4YSXRc3iir+eE/7u SmZ/fCWUCd0UE8G7o3d9e8k/0RvYyDRki+a4Yze+M73i1tYNQmROeewjg9NgPTtaBkvF 1Feg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2wvd/6SGk1w8OXui4/FBWGSYpErzZvV+B9LV37fcakY=; b=nROPJDFoXdkITSSMj/FqjTOHkLkOFalvJ9Xi9IxF6Ol1idsQbg5A6TvZ4Y43PsM4sm sIqGPoP+JtuwUQAz5WJJVtb2ra9RHsNjsyst0QEb489twO1/+Lsj+a3Qgmp6ac97+IXu NXFudXt8TekH3UX7h44bJb9ACIJqnGEvqm0m8+wnZRmzjqhRDBzb+wMJQbXnxBfKvNbv Sq6zxjrWDeYhrdAeaUDDTyR1qwSGIjuWUxKKKBP/QYswYGJc7GcGlzU9VrW51wm4ktQl sJA2YG3GOpdwfIWfTHCggaqUka+vtHQnLYvu5XivR3YMymniwf7y6evx5BW4vvAnom+y LF2Q== X-Gm-Message-State: AOAM533vFATkhG1NbDb78goMxsd2xZTDvLlKQL9MsXXh6ZYHP/uEpFrW oYStemTHrbAFwxhTQX4CAz106TbLCnbsyQ== X-Google-Smtp-Source: ABdhPJzg2181udEs2qkSjDl8G9fc52RnLdXhFA717eUGgrNoWN5fnZrnqJJ0kSdhZ93TWCJr36M2gQ== X-Received: by 2002:a17:902:c789:b029:110:4933:71ce with SMTP id w9-20020a170902c789b0290110493371cemr6151169pla.56.1623454921175; Fri, 11 Jun 2021 16:42:01 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 26/34] tcg: Round the tb_size default from qemu_get_host_physmem Date: Fri, 11 Jun 2021 16:41:36 -0700 Message-Id: <20210611234144.653682-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" If qemu_get_host_physmem returns an odd number of pages, then physmem / 8 will not be a multiple of the page size. The following was observed on a gitlab runner: ERROR qtest-arm/boot-serial-test - Bail out! ERROR:../util/osdep.c:80:qemu_mprotect__osdep: \ assertion failed: (!(size & ~qemu_real_host_page_mask)) Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- tcg/region.c | 47 +++++++++++++++++++++-------------------------- 1 file changed, 21 insertions(+), 26 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index 2e541cd2bf..e1790ce1e4 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -470,26 +470,6 @@ static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus) (DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \ ? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE) -static size_t size_code_gen_buffer(size_t tb_size) -{ - /* Size the buffer. */ - if (tb_size == 0) { - size_t phys_mem = qemu_get_host_physmem(); - if (phys_mem == 0) { - tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; - } else { - tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); - } - } - if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { - tb_size = MIN_CODE_GEN_BUFFER_SIZE; - } - if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { - tb_size = MAX_CODE_GEN_BUFFER_SIZE; - } - return tb_size; -} - #ifdef __mips__ /* * In order to use J and JAL within the code_gen_buffer, we require @@ -841,13 +821,29 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { - size_t page_size; + const size_t page_size = qemu_real_host_page_size; size_t region_size; size_t i; int have_prot; - have_prot = alloc_code_gen_buffer(size_code_gen_buffer(tb_size), - splitwx, &error_fatal); + /* Size the buffer. */ + if (tb_size == 0) { + size_t phys_mem = qemu_get_host_physmem(); + if (phys_mem == 0) { + tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; + } else { + tb_size = QEMU_ALIGN_DOWN(phys_mem / 8, page_size); + tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, tb_size); + } + } + if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { + tb_size = MIN_CODE_GEN_BUFFER_SIZE; + } + if (tb_size > MAX_CODE_GEN_BUFFER_SIZE) { + tb_size = MAX_CODE_GEN_BUFFER_SIZE; + } + + have_prot = alloc_code_gen_buffer(tb_size, splitwx, &error_fatal); assert(have_prot >= 0); /* Request large pages for the buffer and the splitwx. */ @@ -862,9 +858,8 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) * As a result of this we might end up with a few extra pages at the end of * the buffer; we will assign those to the last region. */ - region.n = tcg_n_regions(region.total_size, max_cpus); - page_size = qemu_real_host_page_size; - region_size = region.total_size / region.n; + region.n = tcg_n_regions(tb_size, max_cpus); + region_size = tb_size / region.n; region_size = QEMU_ALIGN_DOWN(region_size, page_size); /* A region must have at least 2 pages; one code, one guard */ From patchwork Fri Jun 11 23:41:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37592C48BE5 for ; Fri, 11 Jun 2021 23:59:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 04084613C3 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 27/34] tcg: Merge buffer protection and guard page protection Date: Fri, 11 Jun 2021 16:41:37 -0700 Message-Id: <20210611234144.653682-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Do not handle protections on a case-by-case basis in the various alloc_code_gen_buffer instances; do it within a single loop in tcg_region_init. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- tcg/region.c | 45 +++++++++++++++++++++++++++++++-------------- 1 file changed, 31 insertions(+), 14 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index e1790ce1e4..294cbd8e65 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -535,11 +535,6 @@ static int alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp) } #endif - if (qemu_mprotect_rwx(buf, size)) { - error_setg_errno(errp, errno, "mprotect of jit buffer"); - return false; - } - region.start_aligned = buf; region.total_size = size; @@ -823,8 +818,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { const size_t page_size = qemu_real_host_page_size; size_t region_size; - size_t i; - int have_prot; + int have_prot, need_prot; /* Size the buffer. */ if (tb_size == 0) { @@ -884,18 +878,41 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) * Set guard pages in the rw buffer, as that's the one into which * buffer overruns could occur. Do not set guard pages in the rx * buffer -- let that one use hugepages throughout. + * Work with the page protections set up with the initial mapping. */ - for (i = 0; i < region.n; i++) { + need_prot = PAGE_READ | PAGE_WRITE; +#ifndef CONFIG_TCG_INTERPRETER + if (tcg_splitwx_diff == 0) { + need_prot |= PAGE_EXEC; + } +#endif + for (size_t i = 0, n = region.n; i < n; i++) { void *start, *end; tcg_region_bounds(i, &start, &end); + if (have_prot != need_prot) { + int rc; - /* - * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect - * rejects a permission change from RWX -> NONE. Guard pages are - * nice for bug detection but are not essential; ignore any failure. - */ - (void)qemu_mprotect_none(end, page_size); + if (need_prot == (PAGE_READ | PAGE_WRITE | PAGE_EXEC)) { + rc = qemu_mprotect_rwx(start, end - start); + } else if (need_prot == (PAGE_READ | PAGE_WRITE)) { + rc = qemu_mprotect_rw(start, end - start); + } else { + g_assert_not_reached(); + } + if (rc) { + error_setg_errno(&error_fatal, errno, + "mprotect of jit buffer"); + } + } + if (have_prot != 0) { + /* + * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect + * rejects a permission change from RWX -> NONE. Guard pages are + * nice for bug detection but are not essential; ignore any failure. + */ + (void)qemu_mprotect_none(end, page_size); + } } tcg_region_trees_init(); From patchwork Fri Jun 11 23:41:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-23.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B2AAC48BD1 for ; Sat, 12 Jun 2021 00:02:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7EC6B613C8 for ; Sat, 12 Jun 2021 00:02:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7EC6B613C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52162 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrr6H-0001HO-Dc for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:02:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47392) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqms-000352-OI for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:07 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]:56102) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmp-0002lN-Su for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:06 -0400 Received: by mail-pj1-x1029.google.com with SMTP id k7so6524818pjf.5 for ; Fri, 11 Jun 2021 16:42:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yutB5Hql0pmq+RPOoPP4QbECTT+S/kQDBGlJZPPQ9bQ=; b=OGvRN9iBjuorOC574RzX+WSlNAbzHwtkztdR8lNqKi7aCcRXhN3zeJj8H6q8QYAoiQ Caw7DLXUhbHz+CV+wcwBhE48iIJr9SWDDhFl9EBwrjO/agq4Go8h0F5lwrrqyxQhm+/r O+wa80oSq8sIzV7jWsopLS6dR2HEaQm5Vscp/ZW9NAf9LR3UqZfJHmXaE9j5jo5BjlzD sIUL8olCDor2TG75hYxr+/Szwg3aChe/aA4Xxb0oTND5FeQ1UUEJiZy2DVpqk/lSkCa2 ZjabL1hVe5+7GiwyM7SqLPS/VnRC9EH9dbGXzPbz8SugRd/wZWsReYUmgZSbk7AYrtQk lbAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yutB5Hql0pmq+RPOoPP4QbECTT+S/kQDBGlJZPPQ9bQ=; b=fMECbPfGUCQf0BtLDHQbdYvJWW3ISA6/OqDSwcMaDhNWeUnLFqDiZhAygRJ5kX4tIL XLR/ddEVD170GVSDkocfym4KbZf7iKeogdEWrcil9UfqaSG1F5QGfD1mq7118P+w84DX gS2xaHcH2VlfFMzfgkxx21IwUQVd0YX0ycM4UGvu0lu+FBtRFcxnek2uiV9XiRCq6WkB O+HAwWceMBXrKTUSK+eTTY4zztg9EnsrqZ+tNESm7G6FSQ8ocluKGEWW1PBv0b726EIA icD1JA8sqCgr1HvK8mlFehchQLjvdgPdB2Jt4YV6YaOqPTpz9vgLvEdw7iulNnZoxZ6L rZYQ== X-Gm-Message-State: AOAM533M/ixeNNjjxL/GnxVtf8CLZNSn6Txu/O3d8dc4Rh6YFTME5lSp wmOFMipXojj0+L86FDKUAzhk2R6X9tpYMw== X-Google-Smtp-Source: ABdhPJwGJNl8olEDuAD2T11YhUFc4XmIQYSL9ENxBLBkQBdq7RYjCPrznFZl4GEOGgiAVuotJFS5nQ== X-Received: by 2002:a17:90a:8001:: with SMTP id b1mr11424065pjn.17.1623454922465; Fri, 11 Jun 2021 16:42:02 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 28/34] tcg: When allocating for !splitwx, begin with PROT_NONE Date: Fri, 11 Jun 2021 16:41:38 -0700 Message-Id: <20210611234144.653682-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" There's a change in mprotect() behaviour [1] in the latest macOS on M1 and it's not yet clear if it's going to be fixed by Apple. In this case, instead of changing permissions of N guard pages, we change permissions of N rwx regions. The same number of syscalls are required either way. [1] https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- tcg/region.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/tcg/region.c b/tcg/region.c index 294cbd8e65..0f6808afdb 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -770,12 +770,15 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) error_free_or_abort(errp); } - prot = PROT_READ | PROT_WRITE | PROT_EXEC; + /* + * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect + * rejects a permission change from RWX -> NONE when reserving the + * guard pages later. We can go the other way with the same number + * of syscalls, so always begin with PROT_NONE. + */ + prot = PROT_NONE; flags = MAP_PRIVATE | MAP_ANONYMOUS; -#ifdef CONFIG_TCG_INTERPRETER - /* The tcg interpreter does not need execute permission. */ - prot = PROT_READ | PROT_WRITE; -#elif defined(CONFIG_DARWIN) +#ifdef CONFIG_DARWIN /* Applicable to both iOS and macOS (Apple Silicon). */ if (!splitwx) { flags |= MAP_JIT; @@ -906,11 +909,7 @@ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) } } if (have_prot != 0) { - /* - * macOS 11.2 has a bug (Apple Feedback FB8994773) in which mprotect - * rejects a permission change from RWX -> NONE. Guard pages are - * nice for bug detection but are not essential; ignore any failure. - */ + /* Guard pages are nice for bug detection but are not essential. */ (void)qemu_mprotect_none(end, page_size); } } From patchwork Fri Jun 11 23:41:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316741 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9894C48BE5 for ; Sat, 12 Jun 2021 00:06:10 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 692716124B for ; Sat, 12 Jun 2021 00:06:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 692716124B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33300 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrrA9-0007VV-EH for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:06:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47426) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmu-000364-8B for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:08 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:37864) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmq-0002m8-D5 for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:07 -0400 Received: by mail-pj1-x1032.google.com with SMTP id 22-20020a17090a0c16b0290164a5354ad0so6725283pjs.2 for ; Fri, 11 Jun 2021 16:42:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=svHo4xej4hLH/cZ+9yekBSSnKW0cEWwyz3UL+6E6tak=; b=LsSnWWNhZCKZXxErGASaJSbSaVhnrMmLqcL986FDj0XABrKmWhkKC7fKSPr5fg31q1 DB7tr4/JV9cc5FpDgX3x7KMN8pebQxZDhSitSmNqX0o1n7gLbv8TS2pfwfyqoyp/tmIk rWmMWxc74IT/mAXOp9yjhRemrdtineOCL1D0WfGVHqguhOoYLx4GjjsNGOS0Tat7cjAM zulwdL3LdfuovuGbo5rAVxYlcgSNuwiA/ihow40J3vryD7COrl8tpYaIiuNBGBTGQ8Dr rq3hsHVhDVS+rw4ih+6ltQds6dSXc7T+KPmuIBWLU8duaib3AZzVsSZbKyw1tBqQsPpo epXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=svHo4xej4hLH/cZ+9yekBSSnKW0cEWwyz3UL+6E6tak=; b=UXzXDEoHetqDLrMXiv7Upw/9tZ+2BHv7+I2Miz0m6anUtZA8giao5SZCGUluLTfjeW Eire4yr2X6unJNH8MOGDSBTTcqYUl07zS3Hu3B1RCFzK67eSF6xLQ9KBo75nvtFKsGpU KxTLAME1WurrcrZdL5wiBAFphzi7q6kmdGHRVy6CR8tODF9mftUuBuAfxiahipHP93h4 NwJ8BCGZdgIYDN5wlJISX6OLThyGIvoLhk9wBh5IcosiRTC/cYAaS/LiBGgbixgF/pMY 9d9F5VECQ2mYO1ZF2kNHZ7bmFSawbSF/4Frhmi7qRJww7L+A1gt9ho6MOgoRewghFf32 90eQ== X-Gm-Message-State: AOAM533ookCP+DB5fWAx730LyxiuquRem6pwHx7bDghd1VPqgjvqfM/9 KQ/4mQeLwDcfq15lYrnUqp/I1sFYRT649w== X-Google-Smtp-Source: ABdhPJzAHaWRVbTB1XEy5jekOF1DjhuhctWRtaLkfHPH8hyyJR2ozmLt4p2mIfV9Zl9lvD8rtLpgOg== X-Received: by 2002:a17:903:8b:b029:119:7c28:727 with SMTP id o11-20020a170903008bb02901197c280727mr860199pld.3.1623454923084; Fri, 11 Jun 2021 16:42:03 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 29/34] tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ Date: Fri, 11 Jun 2021 16:41:39 -0700 Message-Id: <20210611234144.653682-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These variables belong to the jit side, not the user side. Since tcg_init_ctx is no longer used outside of tcg/, move the declaration to tcg-internal.h. Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 1 - tcg/tcg-internal.h | 1 + accel/tcg/translate-all.c | 3 --- tcg/tcg.c | 3 +++ 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index f48b5aa166..e95abac9f4 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -689,7 +689,6 @@ static inline bool temp_readonly(TCGTemp *ts) return ts->kind >= TEMP_FIXED; } -extern TCGContext tcg_init_ctx; extern __thread TCGContext *tcg_ctx; extern const void *tcg_code_gen_epilogue; extern uintptr_t tcg_splitwx_diff; diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h index f9906523da..181f86507a 100644 --- a/tcg/tcg-internal.h +++ b/tcg/tcg-internal.h @@ -27,6 +27,7 @@ #define TCG_HIGHWATER 1024 +extern TCGContext tcg_init_ctx; extern TCGContext **tcg_ctxs; extern unsigned int tcg_cur_ctxs; extern unsigned int tcg_max_ctxs; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 59609d62d5..7929a7e320 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -218,9 +218,6 @@ static int v_l2_levels; static void *l1_map[V_L1_MAX_SIZE]; -/* code generation context */ -TCGContext tcg_init_ctx; -__thread TCGContext *tcg_ctx; TBContext tb_ctx; static void page_table_config_init(void) diff --git a/tcg/tcg.c b/tcg/tcg.c index 4bb35b455b..81da553244 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -149,6 +149,9 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct); static int tcg_out_ldst_finalize(TCGContext *s); #endif +TCGContext tcg_init_ctx; +__thread TCGContext *tcg_ctx; + TCGContext **tcg_ctxs; unsigned int tcg_cur_ctxs; unsigned int tcg_max_ctxs; From patchwork Fri Jun 11 23:41:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FF14C48BD1 for ; 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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 30/34] tcg: Introduce tcg_remove_ops_after Date: Fri, 11 Jun 2021 16:41:40 -0700 Message-Id: <20210611234144.653682-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Introduce a function to remove everything emitted since a given point. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 10 ++++++++++ tcg/tcg.c | 13 +++++++++++++ 2 files changed, 23 insertions(+) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index e95abac9f4..1d056ed0ed 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -1071,6 +1071,16 @@ void tcg_op_remove(TCGContext *s, TCGOp *op); TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc); TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc); +/** + * tcg_remove_ops_after: + * @op: target operation + * + * Discard any opcodes emitted since @op. Expected usage is to save + * a starting point with tcg_last_op(), speculatively emit opcodes, + * then decide whether or not to keep those opcodes after the fact. + */ +void tcg_remove_ops_after(TCGOp *op); + void tcg_optimize(TCGContext *s); /* Allocate a new temporary and initialize it with a constant. */ diff --git a/tcg/tcg.c b/tcg/tcg.c index 81da553244..ca482c2301 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2083,6 +2083,19 @@ void tcg_op_remove(TCGContext *s, TCGOp *op) #endif } +void tcg_remove_ops_after(TCGOp *op) +{ + TCGContext *s = tcg_ctx; + + while (true) { + TCGOp *last = tcg_last_op(); + if (last == op) { + return; + } + tcg_op_remove(s, last); + } +} + static TCGOp *tcg_op_alloc(TCGOpcode opc) { TCGContext *s = tcg_ctx; From patchwork Fri Jun 11 23:41:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E3E5C48BD1 for ; Fri, 11 Jun 2021 23:48:54 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2FD2A6136D for ; Fri, 11 Jun 2021 23:48:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2FD2A6136D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:41316 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrqtR-0008Rf-8O for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 19:48:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47454) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmv-00036f-Su for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:10 -0400 Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]:35491) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqms-0002mj-BA for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:09 -0400 Received: by mail-pf1-x432.google.com with SMTP id h12so5700133pfe.2 for ; Fri, 11 Jun 2021 16:42:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DEGK7taWTLgaAQxBCsJBdKV8XPOvsryzrwUIPNhMs30=; b=RDS9NXO3+DcqOqnv2DsN5MNdOijH1reVjSyDyGV8MktpCEEGOPAwucFlVtC19IDmAW FL1sl2e1JhDY7W0DXQ9sGKIpjP6+E6DektVlBkeCCJwbDCh9befju9zMSA1a4p2jtwHy 0iwnUOLaRvWubB1t9eMjxYGTOBBBkhGsECQQK6d0mCl9dobr2dIqIwPmyNuzrPpM5YXX dft3jLUr2V72/4Wc40pCZV6Y2F7LRGS+8+TGWyDc3Tv89GTl0OljILyWMxeQ/hn79oxv x8nOMBA5tO+vwrRe7XoEaC1m28A6LGKyTZukcDkOVkRVi5xxDiHj/mQM/Ds/9c2pmtqF zpnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DEGK7taWTLgaAQxBCsJBdKV8XPOvsryzrwUIPNhMs30=; b=a2epc9UG0VfUH4WQYr4puLGrn+OJ4CPO8oo4b8pfPlzSQLKMjJBab3u9tI0QphWjZx HcpXwFxd/ECEuQPdeqym6Qb3MB3Hq6DmmracXRdAQrnVb6UrHMW9T3/m6Hgexcbzikxl Vyzc5amz16ztmqrQ75xozIQWvtAOjGwxlSl/NUKZEQ95jRSxc3yxDgyEKQuv7FlXK0yq eCswplFePXf000+B6w0YGl3rvBwjscDFcVyiBCyAXFNu0ma2QY5F4cMdet/6I2WdhB0M vCPh+J1BKLdwcbyJFLsuiZYDiaG6wPYnGxDhlO+FlyJYFv+DrHvdLGVO/yedxa9n3Nbd BScw== X-Gm-Message-State: AOAM532g/dpgIkxGYPEnoTB6EX4Af4AfpwWSg+VOdUTtj1BoSfJ92zjw lrm3+PWHFyTie/P5+5mL9QprZykRzB6rxA== X-Google-Smtp-Source: ABdhPJzwKqtshEhhB2FKzA13ddWLxNnGtObVE7eWS8aAD8pVQrU0Xad1qxMBoQ9Rc+T7rh/EnVkiRA== X-Received: by 2002:a65:64c8:: with SMTP id t8mr5969601pgv.96.1623454924415; Fri, 11 Jun 2021 16:42:04 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 31/34] tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_* Date: Fri, 11 Jun 2021 16:41:41 -0700 Message-Id: <20210611234144.653682-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Luis Pires , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" At some point during the development of tcg_constant_*, I changed my mind about whether such temps should be able to be passed to tcg_temp_free_*. The final version committed allows this, but the commentary was not updated to match. Fixes: c0522136adf Reported-by: Peter Maydell Reviewed-by: Alex Bennée Reviewed-by: Luis Pires Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 1d056ed0ed..064dab383b 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -1095,7 +1095,8 @@ TCGv_vec tcg_const_ones_vec_matching(TCGv_vec); /* * Locate or create a read-only temporary that is a constant. - * This kind of temporary need not and should not be freed. + * This kind of temporary need not be freed, but for convenience + * will be silently ignored by tcg_temp_free_*. */ TCGTemp *tcg_constant_internal(TCGType type, int64_t val); From patchwork Fri Jun 11 23:41:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2EE4C48BE6 for ; Sat, 12 Jun 2021 00:13:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 80501611C9 for ; Sat, 12 Jun 2021 00:13:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 80501611C9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:45964 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrrHI-0007oY-Nd for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:13:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47442) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmv-00036T-0l for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:09 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]:46775) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqms-0002nN-Di for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:08 -0400 Received: by mail-pj1-x102d.google.com with SMTP id o10-20020a17090aac0ab029016e92770073so913282pjq.5 for ; Fri, 11 Jun 2021 16:42:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JF1Hf1+TdXcOHMQWjuxHp6sHzQbmxSqgzI3Kb+3k2Wc=; b=mcSZhwgIQsUXktt+bP95/Tfa9HfZQARxFR16Ba0mQmtWQcMCJKtuHsAihjxXPYHMZp HOnNfvytNfI7F2ld9ex3ECVKVC0isv/3CMYvfqdKAu7mbhmsd3MJzST9JtG4vf/zlyPE +I1dKDggEKyalBPIcyZ0oZVw4TcMNtDZpB9xZvxJWox4B/Vk30AmqtdK3wolZEOtfA11 F07pE8t3HCnT5vBgZM2O0eh/NPnkFOBXmMw9a/PDu4QpPRDILZu5dMhEpGJ1JNiRjgac fUZGUsAtMl0OKZFfoYjg3VgJhKicXAk5zqepKpGWbBzvfigj4oLzp84NgTc38GTYg7dN 05uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JF1Hf1+TdXcOHMQWjuxHp6sHzQbmxSqgzI3Kb+3k2Wc=; b=YY/JxJpwMh4kxgpHK1qMuAKdLOhkGHs61t7TijNW41cxvCLVmpYQUWZeRayCb9z6SR a6THh48EbwgQf38g0cdzaXXO6y4Kmyql3Vz0p765g/euEjgm8yTYk026RmkRTYp6rxa1 O+I+s5Z9IvaUKHVWurIlCUc9BDaLgd/ikL7MK+bjNbiiY3nBtsTFVh40y+AiCehvWeS/ sDzHx1HiUj156DHNnnShqEeG1v3ssfMlkjxmry15crrsVQyD0z3mIAwA5FeOIQaz82s0 nUyCk7RKIJFLmkA1fz9fDvwlnV0xYuqUEzb1Ai0bibMyA8ypKtR8YAROMsyDT/zNoFvm fEbA== X-Gm-Message-State: AOAM533Pgqc5AWFBRblY15+YuPa08xUzvRhQBKrgY+Rrvq/JcbLotn7V ZWvcbl0chBMQLEZxN0FTiP7KDFuHL4Tpdw== X-Google-Smtp-Source: ABdhPJwNPAMZPZCYKjCEgmAJA1u4PNeR0o05PprzB6n3L+FNEQolSyR3WfP+nNbE7mUPHEcWCKRM9A== X-Received: by 2002:a17:902:9a85:b029:10f:45c4:b40f with SMTP id w5-20020a1709029a85b029010f45c4b40fmr6121450plp.32.1623454924966; Fri, 11 Jun 2021 16:42:04 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 32/34] tcg/arm: Fix tcg_out_op function signature Date: Fri, 11 Jun 2021 16:41:42 -0700 Message-Id: <20210611234144.653682-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Jose R. Ziviani" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Jose R. Ziviani" Commit 5e8892db93 fixed several function signatures but tcg_out_op for arm is missing. This patch fixes it as well. Signed-off-by: Jose R. Ziviani Message-Id: <20210610224450.23425-1-jziviani@suse.de> Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index f4c9cb8f9f..5157143246 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -1984,7 +1984,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) static void tcg_out_epilogue(TCGContext *s); static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, - const TCGArg *args, const int *const_args) + const TCGArg args[TCG_MAX_OP_ARGS], + const int const_args[TCG_MAX_OP_ARGS]) { TCGArg a0, a1, a2, a3, a4, a5; int c; From patchwork Fri Jun 11 23:41:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316743 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D570C48BD1 for ; Sat, 12 Jun 2021 00:08:25 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 02953613CA for ; Sat, 12 Jun 2021 00:08:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 02953613CA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36796 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrrCJ-0001Tu-Ut for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:08:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47462) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmw-00037g-At for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:10 -0400 Received: from mail-pf1-x42a.google.com ([2607:f8b0:4864:20::42a]:39766) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmt-0002nU-5h for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:10 -0400 Received: by mail-pf1-x42a.google.com with SMTP id k15so5692965pfp.6 for ; Fri, 11 Jun 2021 16:42:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b2B+8zz4r3rzDW6XJQUxvqU5pgzCPun35EtW6hJayB8=; b=nA/+k6IssAQirvFo5B6zylhJ8zl/YNDds04dx99IhTSLbdl6eO/BFmxdMvm7AKRb+c 0tg09IpDsUfIxMi3pVWfPWhmT9BubWXgOJQEN/DjbpqdeSaAH9/uKhv4n0NaA7dkgUZL FC8bBI7wCI2L7YJNaX6fRstBRjLR/FNMhdgYld4u1xcsP4JicB5tlnBgH5/LEQ+qK548 02d2UL8n9+0OPB/L7SgrbSt+xoQN56RSQLgRRJ/JdK70rvumTF5W3w2W7umu2UJUWgFx 7EOk/Ly9xCFsqBTJx9zx4aH8IXIpHDUFa9hLs/rJ/r4zFniDgPo+j8S5AuSh0iqRlEQ9 QBDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b2B+8zz4r3rzDW6XJQUxvqU5pgzCPun35EtW6hJayB8=; b=WJFVEfCH/69jYKt6e1wpBWPx8hwr+MVOLHk6jK5KT/KR9uczrDewH5Dx+J0DAhQkVj 18WYdmwCd4tIxf7v9ucolN1XKrfJSvFiR55f41QCR8wI3cY1QAIvJtESXzj88e6uKEOz 4MZogDliNT1he/O3d8BS5JTr/kzRFDcSTK0p8fkNEl2zQjmHAP+T7PFdFqrea1UV7H9f avIbv0OBLM5v9cwugDmOn2GeZkRntTWw4f8t4+A0brFt+7kuoqwyUBkqY53HDn8hYtfD iyJ53yxTsILkZZ3hL2P/8iR5Y7c8OFBIdgVHENQncw8L/iw6vvn4bOYs6lCLFPg0U1KN tQAw== X-Gm-Message-State: AOAM533pSJPeWqho0vnkpkmbvnst2w7kzBKsaoIofRCDYIzzSdB2pHFa r2PLEULkBS501tWHhAHRNgcthdi4pAg2VQ== X-Google-Smtp-Source: ABdhPJwauN2A/7CS5EmxJqEsNVmuGBaG6GOu3RgAqeR801O4Dt4uxesOg5C5kqIyee/eKV7XA7ZlGw== X-Received: by 2002:a63:1210:: with SMTP id h16mr5949953pgl.189.1623454925562; Fri, 11 Jun 2021 16:42:05 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 33/34] softfloat: Fix tp init in float32_exp2 Date: Fri, 11 Jun 2021 16:41:43 -0700 Message-Id: <20210611234144.653682-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Typo in the conversion to FloatParts64. Fixes: 572c4d862ff2 Fixes: Coverity CID 1457457 Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée Message-Id: <20210607223812.110596-1-richard.henderson@linaro.org> Signed-off-by: Richard Henderson --- fpu/softfloat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 1cb162882b..4d0160fe9c 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -4818,7 +4818,7 @@ float32 float32_exp2(float32 a, float_status *status) float_raise(float_flag_inexact, status); - float64_unpack_canonical(&xnp, float64_ln2, status); + float64_unpack_canonical(&tp, float64_ln2, status); xp = *parts_mul(&xp, &tp, status); xnp = xp; From patchwork Fri Jun 11 23:41:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12316759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9DD9C48BE5 for ; Sat, 12 Jun 2021 00:16:08 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C246613CA for ; Sat, 12 Jun 2021 00:16:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3C246613CA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:51150 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lrrJn-0002xM-DW for qemu-devel@archiver.kernel.org; Fri, 11 Jun 2021 20:16:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47472) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lrqmw-00038c-Vc for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:12 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]:52779) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lrqmu-0002ni-Lz for qemu-devel@nongnu.org; Fri, 11 Jun 2021 19:42:10 -0400 Received: by mail-pj1-x1033.google.com with SMTP id h16so6530857pjv.2 for ; Fri, 11 Jun 2021 16:42:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lWH9d8CyMl+D9rIbVRzVUg98zD+hFqxk964ZJWbRkCY=; b=b1ZHwq7GkL7G7s/Jq+KE481xt7rbKWgN17UVGAy0Rq0GT2TNPMd4JL9n7EsdeMbgqU VGU/pMuDD0AdeG/AIfah3M0dP+e/g2LAyn3Sj4gFBgNUxgPBtVWkrYqft3cAKXdSqKtt TDmUWk0qt+EaY3gZYCrAIZvwvrl7K1nEEoHzwTpHxIch5PfiUNqVMYD69x0qRHIIyzqP JyvUdE8DpfRu8I0l0nc7MejX7B1dJeuE2e/VZRkrDHPFcJ+Hb6fzCEAVIl5RLipwap9E UxHdfKLQzV0Hih88m3cOs6qDzztcMiY03kpPKW2hf2MjnXImPCXvYpWGi4L15vFuL7HN EDZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lWH9d8CyMl+D9rIbVRzVUg98zD+hFqxk964ZJWbRkCY=; b=Xll2dZPuzGwM1ZxQt21MGPgHVJfrLD26AySOgHZtHmVuUrq56zSHHlr97MsI/kqMuU H/6h15ePN0sp5q0IO4O07Bc5JuSSLqBGeP5FWGYJfSGh330GMu+aoA6eaTdXlPTZint4 marlzq1KNBgW1Lld6IOXah8/rY7edSNtBFevHIx0e4PBmlYba8S8mmkz5SYH7dfLtgXR WrH1QHnjZ9+/Hd8A9EYdYV/1F8cZQQ7Y5S4GtDY3D3t7lnPJty9BYy00VAeyHse2k1vb wviP5KEwumRrup7UqjBa0lRtceKXKk1FWSlQqfBmC4cpv6WR1z0A15Q4jNEy59B0Rz/r bJpw== X-Gm-Message-State: AOAM533JikkkfHY5N4J8kaaaLZlnfi3rQyvIQoVCxmY6w55ylRsYGhBa vfr9NwPzrg7na90lz7TWZGg3Szw3ELgXbw== X-Google-Smtp-Source: ABdhPJzVyUmkRmvNW1gMg04i2psiUrXhJTWtE79LglPHehDkjdtYlB1PbVOqoqXvGFAlGvbYebAJUw== X-Received: by 2002:a17:902:f54d:b029:107:b14c:423d with SMTP id h13-20020a170902f54db0290107b14c423dmr6151973plf.77.1623454926229; Fri, 11 Jun 2021 16:42:06 -0700 (PDT) Received: from localhost.localdomain (174-21-70-228.tukw.qwest.net. [174.21.70.228]) by smtp.gmail.com with ESMTPSA id q23sm6139829pgm.31.2021.06.11.16.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 16:42:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 34/34] docs/devel: Explain in more detail the TB chaining mechanisms Date: Fri, 11 Jun 2021 16:41:44 -0700 Message-Id: <20210611234144.653682-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210611234144.653682-1-richard.henderson@linaro.org> References: <20210611234144.653682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Luis Pires Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Luis Pires Signed-off-by: Luis Pires Message-Id: <20210601125143.191165-1-luis.pires@eldorado.org.br> Signed-off-by: Richard Henderson --- docs/devel/tcg.rst | 101 ++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 90 insertions(+), 11 deletions(-) diff --git a/docs/devel/tcg.rst b/docs/devel/tcg.rst index 4ebde44b9d..a65fb7b1c4 100644 --- a/docs/devel/tcg.rst +++ b/docs/devel/tcg.rst @@ -11,13 +11,14 @@ performances. QEMU's dynamic translation backend is called TCG, for "Tiny Code Generator". For more information, please take a look at ``tcg/README``. -Some notable features of QEMU's dynamic translator are: +The following sections outline some notable features and implementation +details of QEMU's dynamic translator. CPU state optimisations ----------------------- -The target CPUs have many internal states which change the way it -evaluates instructions. In order to achieve a good speed, the +The target CPUs have many internal states which change the way they +evaluate instructions. In order to achieve a good speed, the translation phase considers that some state information of the virtual CPU cannot change in it. The state is recorded in the Translation Block (TB). If the state changes (e.g. privilege level), a new TB will @@ -31,17 +32,95 @@ Direct block chaining --------------------- After each translated basic block is executed, QEMU uses the simulated -Program Counter (PC) and other cpu state information (such as the CS +Program Counter (PC) and other CPU state information (such as the CS segment base value) to find the next basic block. -In order to accelerate the most common cases where the new simulated PC -is known, QEMU can patch a basic block so that it jumps directly to the -next one. +In its simplest, less optimized form, this is done by exiting from the +current TB, going through the TB epilogue, and then back to the +main loop. That’s where QEMU looks for the next TB to execute, +translating it from the guest architecture if it isn’t already available +in memory. Then QEMU proceeds to execute this next TB, starting at the +prologue and then moving on to the translated instructions. -The most portable code uses an indirect jump. An indirect jump makes -it easier to make the jump target modification atomic. On some host -architectures (such as x86 or PowerPC), the ``JUMP`` opcode is -directly patched so that the block chaining has no overhead. +Exiting from the TB this way will cause the ``cpu_exec_interrupt()`` +callback to be re-evaluated before executing additional instructions. +It is mandatory to exit this way after any CPU state changes that may +unmask interrupts. + +In order to accelerate the cases where the TB for the new +simulated PC is already available, QEMU has mechanisms that allow +multiple TBs to be chained directly, without having to go back to the +main loop as described above. These mechanisms are: + +``lookup_and_goto_ptr`` +^^^^^^^^^^^^^^^^^^^^^^^ + +Calling ``tcg_gen_lookup_and_goto_ptr()`` will emit a call to +``helper_lookup_tb_ptr``. This helper will look for an existing TB that +matches the current CPU state. If the destination TB is available its +code address is returned, otherwise the address of the JIT epilogue is +returned. The call to the helper is always followed by the tcg ``goto_ptr`` +opcode, which branches to the returned address. In this way, we either +branch to the next TB or return to the main loop. + +``goto_tb + exit_tb`` +^^^^^^^^^^^^^^^^^^^^^ + +The translation code usually implements branching by performing the +following steps: + +1. Call ``tcg_gen_goto_tb()`` passing a jump slot index (either 0 or 1) + as a parameter. + +2. Emit TCG instructions to update the CPU state with any information + that has been assumed constant and is required by the main loop to + correctly locate and execute the next TB. For most guests, this is + just the PC of the branch destination, but others may store additional + data. The information updated in this step must be inferable from both + ``cpu_get_tb_cpu_state()`` and ``cpu_restore_state()``. + +3. Call ``tcg_gen_exit_tb()`` passing the address of the current TB and + the jump slot index again. + +Step 1, ``tcg_gen_goto_tb()``, will emit a ``goto_tb`` TCG +instruction that later on gets translated to a jump to an address +associated with the specified jump slot. Initially, this is the address +of step 2's instructions, which update the CPU state information. Step 3, +``tcg_gen_exit_tb()``, exits from the current TB returning a tagged +pointer composed of the last executed TB’s address and the jump slot +index. + +The first time this whole sequence is executed, step 1 simply jumps +to step 2. Then the CPU state information gets updated and we exit from +the current TB. As a result, the behavior is very similar to the less +optimized form described earlier in this section. + +Next, the main loop looks for the next TB to execute using the +current CPU state information (creating the TB if it wasn’t already +available) and, before starting to execute the new TB’s instructions, +patches the previously executed TB by associating one of its jump +slots (the one specified in the call to ``tcg_gen_exit_tb()``) with the +address of the new TB. + +The next time this previous TB is executed and we get to that same +``goto_tb`` step, it will already be patched (assuming the destination TB +is still in memory) and will jump directly to the first instruction of +the destination TB, without going back to the main loop. + +For the ``goto_tb + exit_tb`` mechanism to be used, the following +conditions need to be satisfied: + +* The change in CPU state must be constant, e.g., a direct branch and + not an indirect branch. + +* The direct branch cannot cross a page boundary. Memory mappings + may change, causing the code at the destination address to change. + +Note that, on step 3 (``tcg_gen_exit_tb()``), in addition to the +jump slot index, the address of the TB just executed is also returned. +This address corresponds to the TB that will be patched; it may be +different than the one that was directly executed from the main loop +if the latter had already been chained to other TBs. Self-modifying code and translated code invalidation ----------------------------------------------------