From patchwork Fri Jun 18 03:22:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Feng X-Patchwork-Id: 12330037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1738C2B9F4 for ; Fri, 18 Jun 2021 03:25:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 743EC61209 for ; Fri, 18 Jun 2021 03:25:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 743EC61209 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=j0xm5g1qbhEZSzKsjnhPym+pnMPGvPMo0TQqVndmz6Y=; b=C1tE7VQwKJMwTu 3cvGcowJ1YZ38yFAX7UJ7Lxi8vZQnKxO0DGzX88BaKvED6RNuozU8RR1LHuT37odaAyRHV513N7t7 ikzAJFKzE8kc5gnV08mgpZK8Q4gj+oj6HFN+0QBT4Xsb3uYN9tyqrYTc0TJgeYjs5VOHPTrsrWUy8 ixAhk0mW0d1fdgdQQru/YbPNMnwNQwkz5DqcCDmy5T/AHy2wQdJcI7Lbh3qu1PQK9BbmNHW2dn4ks ytQnIldSEQ4q4UZq4CvOJEQM6YyT9ZY2nPrrf7fz4q1kaiqR3optqwjFinMEma57uS+xlFZbO7LMq o4m24h65mDiTkgea3oQQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lu56G-00CSJ3-7I; Fri, 18 Jun 2021 03:23:20 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lu56A-00CSIS-3b for linux-arm-kernel@lists.infradead.org; Fri, 18 Jun 2021 03:23:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 534B013A1; Thu, 17 Jun 2021 20:23:07 -0700 (PDT) Received: from fengqi-OptiPlex-7070.shanghai.arm.com (fengqi-OptiPlex-7070.shanghai.arm.com [10.169.188.105]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 40FE93F70D; Thu, 17 Jun 2021 20:23:05 -0700 (PDT) From: Qi Feng To: linux-arm-kernel@lists.infradead.org Cc: mark.rutland@arm.com, andre.przywara@arm.com, wei.chen@arm.com, jaxson.han@arm.com, qi.feng@arm.com Subject: [boot-wrapper PATCH] Allow --enable-psci to choose between smc and hvc Date: Fri, 18 Jun 2021 11:22:45 +0800 Message-Id: <20210618032245.194448-1-qi.feng@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210617_202314_241906_84C1426A X-CRM114-Status: GOOD ( 10.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to Armv8-R AArch64 manual [1], Armv8-R AArch64 does not support smc: - Pseudocode for AArch64.CheckForSMCUndefOrTrap has this snippet: if !HaveEL(EL3) || PSTATE.EL == EL0 then UNDEFINED; And Armv8-R AArch64 does not have EL3. - In the document of HCR_EL2 TSC bit: If EL3 is not implemented and HCR_EL2.NV is 0, it is IMPLEMENTATION DEFINED whether this bit is: - RES0. - Implemented with the functionality as described in HCR_EL2.TSC. So hvc is needed in this situation. And due to the lack of libfdt, the psci method cannot be modified at runtime. To use smc, use --enable-psci or --enable-psci=smc. To use hvc, use --enable-psci=hvc. [1]: https://developer.arm.com/documentation/ddi0600/latest/ Signed-off-by: Qi Feng --- Makefile.am | 2 +- configure.ac | 14 +++++++++----- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/Makefile.am b/Makefile.am index ef6b793..a9ddd16 100644 --- a/Makefile.am +++ b/Makefile.am @@ -47,7 +47,7 @@ BOOTMETHOD := psci.o OFILES += psci.o PSCI_NODE := psci { \ compatible = \"arm,psci\"; \ - method = \"smc\"; \ + method = \"$(PSCI_METHOD)\"; \ cpu_on = <$(PSCI_CPU_ON)>; \ cpu_off = <$(PSCI_CPU_OFF)>; \ }; diff --git a/configure.ac b/configure.ac index 6914eb4..9aab4a1 100644 --- a/configure.ac +++ b/configure.ac @@ -83,13 +83,17 @@ AS_IF([test "x$X_IMAGE" != "x"], # Allow a user to pass --enable-psci AC_ARG_ENABLE([psci], AS_HELP_STRING([--enable-psci], [enable the psci boot method]), - [USE_PSCI=$enableval]) -AM_CONDITIONAL([PSCI], [test "x$USE_PSCI" = "xyes"]) -AS_IF([test "x$USE_PSCI" = "xyes"], [], [USE_PSCI=no]) - -AS_IF([test "x$USE_PSCI" != "xyes" -a "x$KERNEL_ES" = "x32"], + [case "${enableval}" in + yes|smc) USE_PSCI=smc ;; + hvc) USE_PSCI=hvc ;; + *) AC_MSG_ERROR([Bad value "${enableval}" for --enable-psci. Use "smc" or "hvc"]) ;; + esac]) +AM_CONDITIONAL([PSCI], [test "x$USE_PSCI" = "xyes" -o "x$USE_PSCI" = "xsmc" -o "x$USE_PSCI" = "xhvc"]) + +AS_IF([test "x$USE_PSCI" = "xno" -a "x$KERNEL_ES" = "x32"], [AC_MSG_ERROR([With an AArch32 kernel, boot method must be PSCI.])] ) +AC_SUBST([PSCI_METHOD], [$USE_PSCI]) # Allow a user to pass --with-initrd AC_ARG_WITH([initrd],