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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id r204sm1467374oih.11.2021.06.25.12.58.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Jun 2021 12:59:00 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org, hao.wu@intel.com, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH v5 1/4] fpga: generalize updating the card Date: Fri, 25 Jun 2021 12:58:46 -0700 Message-Id: <20210625195849.837976-3-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210625195849.837976-1-trix@redhat.com> References: <20210625195849.837976-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix There is a need to update the whole card. An fpga can contain non-fpga components whose firmware needs to be updated at the same time as the fpga rtl images and may need to be handled differently from the existing fpga reconfiguration in the fpga manager. Move the write_* ops out of fpga_manager_ops and into a new fpga_manager_update_ops struct. Add two update_ops back to fpga_manager_ops, reconfig for the exiting functionality and reimage for the new functionity. Rewire fpga devs to use reconfig ops Signed-off-by: Tom Rix --- drivers/fpga/altera-cvp.c | 8 ++++---- drivers/fpga/altera-pr-ip-core.c | 8 ++++---- drivers/fpga/altera-ps-spi.c | 8 ++++---- drivers/fpga/dfl-fme-mgr.c | 8 ++++---- drivers/fpga/fpga-mgr.c | 20 ++++++++++---------- drivers/fpga/ice40-spi.c | 8 ++++---- drivers/fpga/machxo2-spi.c | 8 ++++---- drivers/fpga/socfpga-a10.c | 10 +++++----- drivers/fpga/socfpga.c | 8 ++++---- drivers/fpga/stratix10-soc.c | 6 +++--- drivers/fpga/ts73xx-fpga.c | 6 +++--- drivers/fpga/xilinx-spi.c | 8 ++++---- drivers/fpga/zynq-fpga.c | 10 +++++----- drivers/fpga/zynqmp-fpga.c | 6 +++--- include/linux/fpga/fpga-mgr.h | 32 +++++++++++++++++++++----------- 15 files changed, 82 insertions(+), 72 deletions(-) diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c index ccf4546eff297..9363353798bc9 100644 --- a/drivers/fpga/altera-cvp.c +++ b/drivers/fpga/altera-cvp.c @@ -516,10 +516,10 @@ static int altera_cvp_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops altera_cvp_ops = { - .state = altera_cvp_state, - .write_init = altera_cvp_write_init, - .write = altera_cvp_write, - .write_complete = altera_cvp_write_complete, + .state = altera_cvp_state, + .reconfig.write_init = altera_cvp_write_init, + .reconfig.write = altera_cvp_write, + .reconfig.write_complete = altera_cvp_write_complete, }; static const struct cvp_priv cvp_priv_v1 = { diff --git a/drivers/fpga/altera-pr-ip-core.c b/drivers/fpga/altera-pr-ip-core.c index dfdf21ed34c4e..30c7b534df95b 100644 --- a/drivers/fpga/altera-pr-ip-core.c +++ b/drivers/fpga/altera-pr-ip-core.c @@ -167,10 +167,10 @@ static int alt_pr_fpga_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops alt_pr_ops = { - .state = alt_pr_fpga_state, - .write_init = alt_pr_fpga_write_init, - .write = alt_pr_fpga_write, - .write_complete = alt_pr_fpga_write_complete, + .state = alt_pr_fpga_state, + .reconfig.write_init = alt_pr_fpga_write_init, + .reconfig.write = alt_pr_fpga_write, + .reconfig.write_complete = alt_pr_fpga_write_complete, }; int alt_pr_register(struct device *dev, void __iomem *reg_base) diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera-ps-spi.c index 23bfd4d1ad0f7..2b01a3c53d374 100644 --- a/drivers/fpga/altera-ps-spi.c +++ b/drivers/fpga/altera-ps-spi.c @@ -231,10 +231,10 @@ static int altera_ps_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops altera_ps_ops = { - .state = altera_ps_state, - .write_init = altera_ps_write_init, - .write = altera_ps_write, - .write_complete = altera_ps_write_complete, + .state = altera_ps_state, + .reconfig.write_init = altera_ps_write_init, + .reconfig.write = altera_ps_write, + .reconfig.write_complete = altera_ps_write_complete, }; static const struct altera_ps_data *id_to_data(const struct spi_device_id *id) diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c index 313420405d5e8..a6d2ed399e580 100644 --- a/drivers/fpga/dfl-fme-mgr.c +++ b/drivers/fpga/dfl-fme-mgr.c @@ -260,10 +260,10 @@ static u64 fme_mgr_status(struct fpga_manager *mgr) } static const struct fpga_manager_ops fme_mgr_ops = { - .write_init = fme_mgr_write_init, - .write = fme_mgr_write, - .write_complete = fme_mgr_write_complete, - .status = fme_mgr_status, + .status = fme_mgr_status, + .reconfig.write_init = fme_mgr_write_init, + .reconfig.write = fme_mgr_write, + .reconfig.write_complete = fme_mgr_write_complete, }; static void fme_mgr_get_compat_id(void __iomem *fme_pr, diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index aa30889e23208..31c51d7e07cc8 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -47,8 +47,8 @@ static inline u64 fpga_mgr_status(struct fpga_manager *mgr) static inline int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size_t count) { - if (mgr->mops->write) - return mgr->mops->write(mgr, buf, count); + if (mgr->mops->reconfig.write) + return mgr->mops->reconfig.write(mgr, buf, count); return -EOPNOTSUPP; } @@ -62,8 +62,8 @@ static inline int fpga_mgr_write_complete(struct fpga_manager *mgr, int ret = 0; mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE; - if (mgr->mops->write_complete) - ret = mgr->mops->write_complete(mgr, info); + if (mgr->mops->reconfig.write_complete) + ret = mgr->mops->reconfig.write_complete(mgr, info); if (ret) { dev_err(&mgr->dev, "Error after writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR; @@ -78,16 +78,16 @@ static inline int fpga_mgr_write_init(struct fpga_manager *mgr, struct fpga_image_info *info, const char *buf, size_t count) { - if (mgr->mops->write_init) - return mgr->mops->write_init(mgr, info, buf, count); + if (mgr->mops->reconfig.write_init) + return mgr->mops->reconfig.write_init(mgr, info, buf, count); return 0; } static inline int fpga_mgr_write_sg(struct fpga_manager *mgr, struct sg_table *sgt) { - if (mgr->mops->write_sg) - return mgr->mops->write_sg(mgr, sgt); + if (mgr->mops->reconfig.write_sg) + return mgr->mops->reconfig.write_sg(mgr, sgt); return -EOPNOTSUPP; } @@ -232,7 +232,7 @@ static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, /* Write the FPGA image to the FPGA. */ mgr->state = FPGA_MGR_STATE_WRITE; - if (mgr->mops->write_sg) { + if (mgr->mops->reconfig.write_sg) { ret = fpga_mgr_write_sg(mgr, sgt); } else { struct sg_mapping_iter miter; @@ -309,7 +309,7 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, * contiguous kernel buffer and the driver doesn't require SG, non-SG * drivers will still work on the slow path. */ - if (mgr->mops->write) + if (mgr->mops->reconfig.write) return fpga_mgr_buf_load_mapped(mgr, info, buf, count); /* diff --git a/drivers/fpga/ice40-spi.c b/drivers/fpga/ice40-spi.c index 69dec5af23c36..3bdc3fe8ece97 100644 --- a/drivers/fpga/ice40-spi.c +++ b/drivers/fpga/ice40-spi.c @@ -126,10 +126,10 @@ static int ice40_fpga_ops_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops ice40_fpga_ops = { - .state = ice40_fpga_ops_state, - .write_init = ice40_fpga_ops_write_init, - .write = ice40_fpga_ops_write, - .write_complete = ice40_fpga_ops_write_complete, + .state = ice40_fpga_ops_state, + .reconfig.write_init = ice40_fpga_ops_write_init, + .reconfig.write = ice40_fpga_ops_write, + .reconfig.write_complete = ice40_fpga_ops_write_complete, }; static int ice40_fpga_probe(struct spi_device *spi) diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c index 114a64d2b7a4d..8b860e9a19c92 100644 --- a/drivers/fpga/machxo2-spi.c +++ b/drivers/fpga/machxo2-spi.c @@ -350,10 +350,10 @@ static int machxo2_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops machxo2_ops = { - .state = machxo2_spi_state, - .write_init = machxo2_write_init, - .write = machxo2_write, - .write_complete = machxo2_write_complete, + .state = machxo2_spi_state, + .reconfig.write_init = machxo2_write_init, + .reconfig.write = machxo2_write, + .reconfig.write_complete = machxo2_write_complete, }; static int machxo2_spi_probe(struct spi_device *spi) diff --git a/drivers/fpga/socfpga-a10.c b/drivers/fpga/socfpga-a10.c index 573d88bdf7307..e60bf844b4c40 100644 --- a/drivers/fpga/socfpga-a10.c +++ b/drivers/fpga/socfpga-a10.c @@ -458,11 +458,11 @@ static enum fpga_mgr_states socfpga_a10_fpga_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops socfpga_a10_fpga_mgr_ops = { - .initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4, - .state = socfpga_a10_fpga_state, - .write_init = socfpga_a10_fpga_write_init, - .write = socfpga_a10_fpga_write, - .write_complete = socfpga_a10_fpga_write_complete, + .initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4, + .state = socfpga_a10_fpga_state, + .reconfig.write_init = socfpga_a10_fpga_write_init, + .reconfig.write = socfpga_a10_fpga_write, + .reconfig.write_complete = socfpga_a10_fpga_write_complete, }; static int socfpga_a10_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 1f467173fc1f3..cc752a3f742c2 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -534,10 +534,10 @@ static enum fpga_mgr_states socfpga_fpga_ops_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops socfpga_fpga_ops = { - .state = socfpga_fpga_ops_state, - .write_init = socfpga_fpga_ops_configure_init, - .write = socfpga_fpga_ops_configure_write, - .write_complete = socfpga_fpga_ops_configure_complete, + .state = socfpga_fpga_ops_state, + .reconfig.write_init = socfpga_fpga_ops_configure_init, + .reconfig.write = socfpga_fpga_ops_configure_write, + .reconfig.write_complete = socfpga_fpga_ops_configure_complete, }; static int socfpga_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c index 047fd7f237069..ab1941d92cf60 100644 --- a/drivers/fpga/stratix10-soc.c +++ b/drivers/fpga/stratix10-soc.c @@ -389,9 +389,9 @@ static int s10_ops_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops s10_ops = { - .write_init = s10_ops_write_init, - .write = s10_ops_write, - .write_complete = s10_ops_write_complete, + .reconfig.write_init = s10_ops_write_init, + .reconfig.write = s10_ops_write, + .reconfig.write_complete = s10_ops_write_complete, }; static int s10_probe(struct platform_device *pdev) diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/ts73xx-fpga.c index 167abb0b08d40..cbbc6dec56856 100644 --- a/drivers/fpga/ts73xx-fpga.c +++ b/drivers/fpga/ts73xx-fpga.c @@ -93,9 +93,9 @@ static int ts73xx_fpga_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops ts73xx_fpga_ops = { - .write_init = ts73xx_fpga_write_init, - .write = ts73xx_fpga_write, - .write_complete = ts73xx_fpga_write_complete, + .reconfig.write_init = ts73xx_fpga_write_init, + .reconfig.write = ts73xx_fpga_write, + .reconfig.write_complete = ts73xx_fpga_write_complete, }; static int ts73xx_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c index fee4d0abf6bfe..4d092f30bf700 100644 --- a/drivers/fpga/xilinx-spi.c +++ b/drivers/fpga/xilinx-spi.c @@ -214,10 +214,10 @@ static int xilinx_spi_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops xilinx_spi_ops = { - .state = xilinx_spi_state, - .write_init = xilinx_spi_write_init, - .write = xilinx_spi_write, - .write_complete = xilinx_spi_write_complete, + .state = xilinx_spi_state, + .reconfig.write_init = xilinx_spi_write_init, + .reconfig.write = xilinx_spi_write, + .reconfig.write_complete = xilinx_spi_write_complete, }; static int xilinx_spi_probe(struct spi_device *spi) diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c index 9b75bd4f93d8e..bdfc257740cff 100644 --- a/drivers/fpga/zynq-fpga.c +++ b/drivers/fpga/zynq-fpga.c @@ -543,11 +543,11 @@ static enum fpga_mgr_states zynq_fpga_ops_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops zynq_fpga_ops = { - .initial_header_size = 128, - .state = zynq_fpga_ops_state, - .write_init = zynq_fpga_ops_write_init, - .write_sg = zynq_fpga_ops_write, - .write_complete = zynq_fpga_ops_write_complete, + .initial_header_size = 128, + .state = zynq_fpga_ops_state, + .reconfig.write_init = zynq_fpga_ops_write_init, + .reconfig.write_sg = zynq_fpga_ops_write, + .reconfig.write_complete = zynq_fpga_ops_write_complete, }; static int zynq_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c index 9efbd70aa6864..fbb66c1f9c871 100644 --- a/drivers/fpga/zynqmp-fpga.c +++ b/drivers/fpga/zynqmp-fpga.c @@ -78,9 +78,9 @@ static enum fpga_mgr_states zynqmp_fpga_ops_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops zynqmp_fpga_ops = { - .state = zynqmp_fpga_ops_state, - .write_init = zynqmp_fpga_ops_write_init, - .write = zynqmp_fpga_ops_write, + .state = zynqmp_fpga_ops_state, + .reconfig.write_init = zynqmp_fpga_ops_write_init, + .reconfig.write = zynqmp_fpga_ops_write, }; static int zynqmp_fpga_probe(struct platform_device *pdev) diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index 474c1f5063070..53f9402d6aa17 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -106,14 +106,29 @@ struct fpga_image_info { }; /** - * struct fpga_manager_ops - ops for low level fpga manager drivers - * @initial_header_size: Maximum number of bytes that should be passed into write_init - * @state: returns an enum value of the FPGA's state - * @status: returns status of the FPGA, including reconfiguration error code + * struct fpga_manager_update_ops - ops updating fpga * @write_init: prepare the FPGA to receive configuration data * @write: write count bytes of configuration data to the FPGA * @write_sg: write the scatter list of configuration data to the FPGA * @write_complete: set FPGA to operating state after writing is done + */ +struct fpga_manager_update_ops { + int (*write_init)(struct fpga_manager *mgr, + struct fpga_image_info *info, + const char *buf, size_t count); + int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); + int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt); + int (*write_complete)(struct fpga_manager *mgr, + struct fpga_image_info *info); +}; + +/** + * struct fpga_manager_ops - ops for low level fpga manager drivers + * @initial_header_size: Maximum number of bytes that should be passed into write_init + * @state: returns an enum value of the FPGA's state + * @status: returns status of the FPGA, including reconfiguration error code + * @partial_update: ops for doing partial reconfiguration + * @full_update: ops for doing a full card update, user,shell,fw ie. the works * @fpga_remove: optional: Set FPGA into a specific state during driver remove * @groups: optional attribute groups. * @@ -125,13 +140,8 @@ struct fpga_manager_ops { size_t initial_header_size; enum fpga_mgr_states (*state)(struct fpga_manager *mgr); u64 (*status)(struct fpga_manager *mgr); - int (*write_init)(struct fpga_manager *mgr, - struct fpga_image_info *info, - const char *buf, size_t count); - int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); - int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt); - int (*write_complete)(struct fpga_manager *mgr, - struct fpga_image_info *info); + struct fpga_manager_update_ops reconfig; + struct fpga_manager_update_ops reimage; void (*fpga_remove)(struct fpga_manager *mgr); const struct attribute_group **groups; }; From patchwork Fri Jun 25 19:58:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12345869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D139DC49EA7 for ; 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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id r204sm1467374oih.11.2021.06.25.12.59.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Jun 2021 12:59:03 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org, hao.wu@intel.com, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH v5 2/4] fpga: add FPGA_MGR_REIMAGE flag Date: Fri, 25 Jun 2021 12:58:47 -0700 Message-Id: <20210625195849.837976-4-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210625195849.837976-1-trix@redhat.com> References: <20210625195849.837976-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix If this flag is set the reimage ops will be used otherwise the reconfig ops will be used to write the image Signed-off-by: Tom Rix --- include/linux/fpga/fpga-mgr.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index 53f9402d6aa17..0791e22b07f88 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -67,12 +67,15 @@ enum fpga_mgr_states { * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first * * %FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed + * + * %FPGA_MGR_REIMAGE: Reimage the whole card, fpga bs and other device fw */ #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3) #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4) +#define FPGA_MGR_REIMAGE BIT(5) /** * struct fpga_image_info - information specific to an FPGA image From patchwork Fri Jun 25 19:58:48 2021 Content-Type: text/plain; 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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id r204sm1467374oih.11.2021.06.25.12.59.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Jun 2021 12:59:06 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org, hao.wu@intel.com, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH v5 3/4] fpga: pass fpga_manager_update_ops to the fpga_manager_write functions Date: Fri, 25 Jun 2021 12:58:48 -0700 Message-Id: <20210625195849.837976-5-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210625195849.837976-1-trix@redhat.com> References: <20210625195849.837976-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Refactor fpga_manager_write* functions for reimaging, pass the update_ops as a parameter. Continue the passing of the update_ops to the write wrapper functions. Only do the reconfig ops. Signed-off-by: Tom Rix --- drivers/fpga/fpga-mgr.c | 90 ++++++++++++++++++++++++----------------- 1 file changed, 53 insertions(+), 37 deletions(-) diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index 31c51d7e07cc8..c8a6bfa037933 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -45,10 +45,12 @@ static inline u64 fpga_mgr_status(struct fpga_manager *mgr) return 0; } -static inline int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size_t count) +static inline int fpga_mgr_write(struct fpga_manager *mgr, + const char *buf, size_t count, + const struct fpga_manager_update_ops *uops) { if (mgr->mops->reconfig.write) - return mgr->mops->reconfig.write(mgr, buf, count); + return uops->write(mgr, buf, count); return -EOPNOTSUPP; } @@ -57,13 +59,14 @@ static inline int fpga_mgr_write(struct fpga_manager *mgr, const char *buf, size * finish and set the FPGA into operating mode. */ static inline int fpga_mgr_write_complete(struct fpga_manager *mgr, - struct fpga_image_info *info) + struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops) { int ret = 0; mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE; - if (mgr->mops->reconfig.write_complete) - ret = mgr->mops->reconfig.write_complete(mgr, info); + if (uops->write_complete) + ret = uops->write_complete(mgr, info); if (ret) { dev_err(&mgr->dev, "Error after writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR; @@ -76,18 +79,20 @@ static inline int fpga_mgr_write_complete(struct fpga_manager *mgr, static inline int fpga_mgr_write_init(struct fpga_manager *mgr, struct fpga_image_info *info, - const char *buf, size_t count) + const char *buf, size_t count, + const struct fpga_manager_update_ops *uops) { - if (mgr->mops->reconfig.write_init) - return mgr->mops->reconfig.write_init(mgr, info, buf, count); + if (uops->write_init) + return uops->write_init(mgr, info, buf, count); return 0; } static inline int fpga_mgr_write_sg(struct fpga_manager *mgr, - struct sg_table *sgt) + struct sg_table *sgt, + const struct fpga_manager_update_ops *uops) { - if (mgr->mops->reconfig.write_sg) - return mgr->mops->reconfig.write_sg(mgr, sgt); + if (uops->write_sg) + return uops->write_sg(mgr, sgt); return -EOPNOTSUPP; } @@ -143,16 +148,17 @@ EXPORT_SYMBOL_GPL(fpga_image_info_free); */ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr, struct fpga_image_info *info, - const char *buf, size_t count) + const char *buf, size_t count, + const struct fpga_manager_update_ops *uops) { int ret; mgr->state = FPGA_MGR_STATE_WRITE_INIT; if (!mgr->mops->initial_header_size) - ret = fpga_mgr_write_init(mgr, info, NULL, 0); + ret = fpga_mgr_write_init(mgr, info, NULL, 0, uops); else ret = fpga_mgr_write_init( - mgr, info, buf, min(mgr->mops->initial_header_size, count)); + mgr, info, buf, min(mgr->mops->initial_header_size, count), uops); if (ret) { dev_err(&mgr->dev, "Error preparing FPGA for writing\n"); @@ -165,7 +171,8 @@ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr, static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, struct fpga_image_info *info, - struct sg_table *sgt) + struct sg_table *sgt, + const struct fpga_manager_update_ops *uops) { struct sg_mapping_iter miter; size_t len; @@ -173,7 +180,7 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, int ret; if (!mgr->mops->initial_header_size) - return fpga_mgr_write_init_buf(mgr, info, NULL, 0); + return fpga_mgr_write_init_buf(mgr, info, NULL, 0, uops); /* * First try to use miter to map the first fragment to access the @@ -183,7 +190,7 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, if (sg_miter_next(&miter) && miter.length >= mgr->mops->initial_header_size) { ret = fpga_mgr_write_init_buf(mgr, info, miter.addr, - miter.length); + miter.length, uops); sg_miter_stop(&miter); return ret; } @@ -196,7 +203,7 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf, mgr->mops->initial_header_size); - ret = fpga_mgr_write_init_buf(mgr, info, buf, len); + ret = fpga_mgr_write_init_buf(mgr, info, buf, len, uops); kfree(buf); @@ -208,6 +215,7 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, * @mgr: fpga manager * @info: fpga image specific information * @sgt: scatterlist table + * @uops: which update ops to use * * Step the low level fpga manager through the device-specific steps of getting * an FPGA ready to be configured, writing the image to it, then doing whatever @@ -222,24 +230,25 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, */ static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info, - struct sg_table *sgt) + struct sg_table *sgt, + const struct fpga_manager_update_ops *uops) { int ret; - ret = fpga_mgr_write_init_sg(mgr, info, sgt); + ret = fpga_mgr_write_init_sg(mgr, info, sgt, uops); if (ret) return ret; /* Write the FPGA image to the FPGA. */ mgr->state = FPGA_MGR_STATE_WRITE; - if (mgr->mops->reconfig.write_sg) { - ret = fpga_mgr_write_sg(mgr, sgt); + if (uops->write_sg) { + ret = fpga_mgr_write_sg(mgr, sgt, uops); } else { struct sg_mapping_iter miter; sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG); while (sg_miter_next(&miter)) { - ret = fpga_mgr_write(mgr, miter.addr, miter.length); + ret = fpga_mgr_write(mgr, miter.addr, miter.length, uops); if (ret) break; } @@ -252,16 +261,17 @@ static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, return ret; } - return fpga_mgr_write_complete(mgr, info); + return fpga_mgr_write_complete(mgr, info, uops); } static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, struct fpga_image_info *info, - const char *buf, size_t count) + const char *buf, size_t count, + const struct fpga_manager_update_ops *uops) { int ret; - ret = fpga_mgr_write_init_buf(mgr, info, buf, count); + ret = fpga_mgr_write_init_buf(mgr, info, buf, count, uops); if (ret) return ret; @@ -269,14 +279,14 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, * Write the FPGA image to the FPGA. */ mgr->state = FPGA_MGR_STATE_WRITE; - ret = fpga_mgr_write(mgr, buf, count); + ret = fpga_mgr_write(mgr, buf, count, uops); if (ret) { dev_err(&mgr->dev, "Error while writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_ERR; return ret; } - return fpga_mgr_write_complete(mgr, info); + return fpga_mgr_write_complete(mgr, info, uops); } /** @@ -285,6 +295,7 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, * @info: fpga image info * @buf: buffer contain fpga image * @count: byte count of buf + * @uops: which update ops to use * * Step the low level fpga manager through the device-specific steps of getting * an FPGA ready to be configured, writing the image to it, then doing whatever @@ -295,7 +306,8 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, */ static int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info, - const char *buf, size_t count) + const char *buf, size_t count, + const struct fpga_manager_update_ops *uops) { struct page **pages; struct sg_table sgt; @@ -309,8 +321,8 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, * contiguous kernel buffer and the driver doesn't require SG, non-SG * drivers will still work on the slow path. */ - if (mgr->mops->reconfig.write) - return fpga_mgr_buf_load_mapped(mgr, info, buf, count); + if (uops && uops->write) + return fpga_mgr_buf_load_mapped(mgr, info, buf, count, uops); /* * Convert the linear kernel pointer into a sg_table of pages for use @@ -345,7 +357,7 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, if (rc) return rc; - rc = fpga_mgr_buf_load_sg(mgr, info, &sgt); + rc = fpga_mgr_buf_load_sg(mgr, info, &sgt, uops); sg_free_table(&sgt); return rc; @@ -356,6 +368,7 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, * @mgr: fpga manager * @info: fpga image specific information * @image_name: name of image file on the firmware search path + * @uops: which update ops to use * * Request an FPGA image using the firmware class, then write out to the FPGA. * Update the state before each step to provide info on what step failed if @@ -367,7 +380,8 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, */ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, struct fpga_image_info *info, - const char *image_name) + const char *image_name, + const struct fpga_manager_update_ops *uops) { struct device *dev = &mgr->dev; const struct firmware *fw; @@ -384,7 +398,7 @@ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, return ret; } - ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size); + ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size, uops); release_firmware(fw); @@ -403,12 +417,14 @@ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, */ int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info) { + const struct fpga_manager_update_ops *uops = &mgr->mops->reconfig; + if (info->sgt) - return fpga_mgr_buf_load_sg(mgr, info, info->sgt); + return fpga_mgr_buf_load_sg(mgr, info, info->sgt, uops); if (info->buf && info->count) - return fpga_mgr_buf_load(mgr, info, info->buf, info->count); + return fpga_mgr_buf_load(mgr, info, info->buf, info->count, uops); if (info->firmware_name) - return fpga_mgr_firmware_load(mgr, info, info->firmware_name); + return fpga_mgr_firmware_load(mgr, info, info->firmware_name, uops); return -EINVAL; } EXPORT_SYMBOL_GPL(fpga_mgr_load); From patchwork Fri Jun 25 19:58:49 2021 Content-Type: text/plain; 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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id r204sm1467374oih.11.2021.06.25.12.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Jun 2021 12:59:09 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org, hao.wu@intel.com, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH v5 4/4] fpga: use reimage ops in fpga_mgr_load() Date: Fri, 25 Jun 2021 12:58:49 -0700 Message-Id: <20210625195849.837976-6-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210625195849.837976-1-trix@redhat.com> References: <20210625195849.837976-1-trix@redhat.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix If the fpga_image_info flags FPGA_MGR_REIMAGE bit is set swap out the reconfig ops for the reimage ops and do the load. Signed-off-by: Tom Rix --- drivers/fpga/fpga-mgr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index c8a6bfa037933..5e53a0508087a 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -419,6 +419,9 @@ int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info) { const struct fpga_manager_update_ops *uops = &mgr->mops->reconfig; + if (info->flags & FPGA_MGR_REIMAGE) + uops = &mgr->mops->reimage; + if (info->sgt) return fpga_mgr_buf_load_sg(mgr, info, info->sgt, uops); if (info->buf && info->count)