From patchwork Mon Jul 5 08:18:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358411 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6CDDC07E98 for ; Mon, 5 Jul 2021 08:19:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A24E8613C8 for ; Mon, 5 Jul 2021 08:19:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230053AbhGEIWH (ORCPT ); Mon, 5 Jul 2021 04:22:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230000AbhGEIWH (ORCPT ); Mon, 5 Jul 2021 04:22:07 -0400 Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4C5DC061574; Mon, 5 Jul 2021 01:19:29 -0700 (PDT) Received: by mail-pf1-x429.google.com with SMTP id b12so14951619pfv.6; Mon, 05 Jul 2021 01:19:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lwJZ+FRHmPdVwm0/Cne9BWGWHB7Nx2ph+8GMBriVPGo=; b=qghfU1Ic26rrzYU0rkpTSWDcEhb5c0NOIgjgWfhYyp5axzpVaF2tWiTEhum0GRfWhM Y0G/UPaghUKDzGYLyilG8VdUkM8yhrjsPXIDct8QTi8xO50pcLumVGtnv6acUX2ME8Qb g5OsIjaoRxtxwjVdUsiXXXmt1Y9sVN2ubtppGC8rqkBnyvD6nQ4l3ZyJ/LsnZYdO0K+2 C7UFf0YQDr6LeFAGJnVuR2dOvnT/lRdpz+m93stZPw3eTbvQ98EvcEenTRXWk4SlKL0U bj+hY54Hif9QH8SuDY71yRHkWQwHug7w4wVQ4IvCDhzVrhXqlc5QkNQoRyqooJlzwk4N uAxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lwJZ+FRHmPdVwm0/Cne9BWGWHB7Nx2ph+8GMBriVPGo=; b=lVW9gqB5fL8ZyXCgppdwuH84rtlCP/VXFIJ3tIqGKgAsOzpHZRBl/cadQKcjgU2Kc6 312tN1qHfK822hO/K+G7cIFO1W32ku1Is8CQ8LwVZAHhmmqB6uj5VqZjie0XjedvUiRR cgpXUjoecTgpm61RmFh1+umqopU/sTr3vaDGf0Jg12eYgKC3Slrf3prnj7bhbPgpoEET MuNWgUa4nNTzLpAK08+9epvjvXiRQmTyDihD3R1oZKZrCjj/yM1wyyXL7VaEer7OmGbY 7/WUCOpvK9RdPPY+aqiN72V1baCjHeb61YnUqrjeZcj6j9sVi2njGGNIH09iwGFduqYg +bbQ== X-Gm-Message-State: AOAM532oMUT6Oafho4Ke0IC0BlEipq7H2WKZypVhi3D7NBKfezN6Sqsa O8yyx0tU0I50eJr068cr8Ps= X-Google-Smtp-Source: ABdhPJzDzeeL4WGvM1opfkx9OeUUJ5r5Ef7PkA03J1pzloGnM3C4c5JHEqnlXWV5KzY6fSkJyIDvIQ== X-Received: by 2002:aa7:943b:0:b029:321:809a:f0b with SMTP id y27-20020aa7943b0000b0290321809a0f0bmr794524pfo.32.1625473169361; Mon, 05 Jul 2021 01:19:29 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.19.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:19:28 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 01/17] counter: 104-quad-8: Return error when invalid mode during ceiling_write Date: Mon, 5 Jul 2021 17:18:49 +0900 Message-Id: <8a7614a06dbc60650fe60c31fa47d398890200f8.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The 104-QUAD-8 only has two count modes where a ceiling value makes sense: Range Limit and Modulo-N. Outside of these two modes, setting a ceiling value is an invalid operation -- so let's report it as such by returning -EINVAL. Fixes: fc069262261c ("counter: 104-quad-8: Add lock guards - generic interface") Acked-by: Syed Nayyar Waris Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 09a9a77cce06..81f9642777fb 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -715,12 +715,13 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter, case 1: case 3: quad8_preset_register_set(priv, count->id, ceiling); - break; + mutex_unlock(&priv->lock); + return len; } mutex_unlock(&priv->lock); - return len; + return -EINVAL; } static ssize_t quad8_count_preset_enable_read(struct counter_device *counter, From patchwork Mon Jul 5 08:18:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358413 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F295FC07E9A for ; Mon, 5 Jul 2021 08:19:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CFE0D6128B for ; Mon, 5 Jul 2021 08:19:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230171AbhGEIWP (ORCPT ); Mon, 5 Jul 2021 04:22:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230129AbhGEIWL (ORCPT ); Mon, 5 Jul 2021 04:22:11 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2B68C061574; Mon, 5 Jul 2021 01:19:34 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id c15so9825258pls.13; Mon, 05 Jul 2021 01:19:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oiCsS1CJNDnSbfaf+2PAtZwF9aGCmVSPvg8D4KNEluQ=; b=F4Gf3sV/W5W5Bt0EzmzTvOGkXw10z3AwAcIBONxPcKBFmAKkvr4LTCUfiTU3FnYU8o dTkxSjfbrjb3zpMaTZWMuWhNwiZEX2ZyY9xBixTkkZ3d+36sttRbbqdnCqWAIAAkjrsA 3A62qOdDcssrr4H5Br3DzY3UxtHUQIZ+fcixdsf2PRpV5LcxjItoCJs5tBC08w+DEoXg fmve+j2A3zC6ZZTTuKsMnkpON9RI7AKv86vIqjLj8O+rnnbvq4nqGKSJooZpbpi0KaJH +sgoDaU5XTP6kOHFgH73mcqRE/oG3yi6ru/MAD+e5WmmVJYDFBf4pixaNAvlKpZtYbyw ilCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oiCsS1CJNDnSbfaf+2PAtZwF9aGCmVSPvg8D4KNEluQ=; b=UF+92oe7GyYlP/180HII9TFI9zNnHaersupS+YBxkZIt4b71E1KrPuFKWBZC1WJCkD 87ij887CjPcAudv41CiSy58oG0tnl8y5iZGLKzIFu2aAgV1XYwH/ci5d3RoqNZatzmy9 iAsYK7C1SK+pZEf6msaoYcnZpuVdFfOCDsGpWiaJ4bSnEAnIEEROX4DgiuAdmdQAMuL1 BeqU17gPtbMtNJU/eO8BeIPzY71ViZ05kvvNOpWT9kr2YpbHMO9dxEnDnrArY+LKX86H t8Bfr1TAhj3GG1a/ON7b1AJx9NH0j0GNUGvwtE1xPdUX3JZsFYafB8SFKTXDXXyWkhWy BI1Q== X-Gm-Message-State: AOAM531PAl23vKjVqbI4TWZH7qQp+Fogi+SAM7wneEEBZhuysD/O6CGj D7ZwfkDtWlT+cV4ITh53EfA= X-Google-Smtp-Source: ABdhPJwkg672vlNRqbslq6k5QcThAP27W9SxBUN1xmZn4nn/XNXqnfLd9RSLPC0Y8JYs58FO+sghnQ== X-Received: by 2002:a17:90a:c28a:: with SMTP id f10mr14607732pjt.15.1625473174589; Mon, 05 Jul 2021 01:19:34 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.19.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:19:34 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray , Fabrice Gasnier Subject: [PATCH v12 02/17] counter: Return error code on invalid modes Date: Mon, 5 Jul 2021 17:18:50 +0900 Message-Id: <6d4bfe6d7acfbeaf09a6c7d6324b0cbf8e23f35a.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Only a select set of modes (function, action, etc.) are valid for a given device configuration. This patch ensures that invalid modes result in a return -EINVAL. Such a situation should never occur in reality, but it's good to define a default switch cases for the sake of making the intent of the code clear. Cc: Kamel Bouhara Cc: Maxime Coquelin Cc: Alexandre Torgue Cc: David Lechner Acked-by: Syed Nayyar Waris Reviewed-by: Fabrice Gasnier Signed-off-by: William Breathitt Gray Acked-by: David Lechner --- drivers/counter/104-quad-8.c | 20 ++++++++++++------ drivers/counter/microchip-tcb-capture.c | 6 ++++++ drivers/counter/stm32-lptimer-cnt.c | 10 +++++---- drivers/counter/ti-eqep.c | 27 +++++++++++++++---------- 4 files changed, 42 insertions(+), 21 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 81f9642777fb..b358b2b2b883 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -273,6 +273,10 @@ static int quad8_function_set(struct counter_device *counter, *scale = 2; mode_cfg |= QUAD8_CMR_QUADRATURE_X4; break; + default: + /* should never reach this path */ + mutex_unlock(&priv->lock); + return -EINVAL; } } @@ -349,7 +353,7 @@ static int quad8_action_get(struct counter_device *counter, case QUAD8_COUNT_FUNCTION_PULSE_DIRECTION: if (synapse->signal->id == signal_a_id) *action = QUAD8_SYNAPSE_ACTION_RISING_EDGE; - break; + return 0; case QUAD8_COUNT_FUNCTION_QUADRATURE_X1: if (synapse->signal->id == signal_a_id) { quad8_direction_get(counter, count, &direction); @@ -359,17 +363,18 @@ static int quad8_action_get(struct counter_device *counter, else *action = QUAD8_SYNAPSE_ACTION_FALLING_EDGE; } - break; + return 0; case QUAD8_COUNT_FUNCTION_QUADRATURE_X2: if (synapse->signal->id == signal_a_id) *action = QUAD8_SYNAPSE_ACTION_BOTH_EDGES; - break; + return 0; case QUAD8_COUNT_FUNCTION_QUADRATURE_X4: *action = QUAD8_SYNAPSE_ACTION_BOTH_EDGES; - break; + return 0; + default: + /* should never reach this path */ + return -EINVAL; } - - return 0; } static const struct counter_ops quad8_ops = { @@ -529,6 +534,9 @@ static int quad8_count_mode_set(struct counter_device *counter, case COUNTER_COUNT_MODE_MODULO_N: cnt_mode = 3; break; + default: + /* should never reach this path */ + return -EINVAL; } mutex_lock(&priv->lock); diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index 51b8af80f98b..0c9a61962911 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -133,6 +133,9 @@ static int mchp_tc_count_function_set(struct counter_device *counter, bmr |= ATMEL_TC_QDEN | ATMEL_TC_POSEN; cmr |= ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_ABETRG | ATMEL_TC_XC0; break; + default: + /* should never reach this path */ + return -EINVAL; } regmap_write(priv->regmap, ATMEL_TC_BMR, bmr); @@ -226,6 +229,9 @@ static int mchp_tc_count_action_set(struct counter_device *counter, case MCHP_TC_SYNAPSE_ACTION_BOTH_EDGE: edge = ATMEL_TC_ETRGEDG_BOTH; break; + default: + /* should never reach this path */ + return -EINVAL; } return regmap_write_bits(priv->regmap, diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c index c19d998df5ba..78f383b77bd2 100644 --- a/drivers/counter/stm32-lptimer-cnt.c +++ b/drivers/counter/stm32-lptimer-cnt.c @@ -206,9 +206,10 @@ static int stm32_lptim_cnt_function_set(struct counter_device *counter, priv->quadrature_mode = 1; priv->polarity = STM32_LPTIM_SYNAPSE_ACTION_BOTH_EDGES; return 0; + default: + /* should never reach this path */ + return -EINVAL; } - - return -EINVAL; } static ssize_t stm32_lptim_cnt_enable_read(struct counter_device *counter, @@ -326,9 +327,10 @@ static int stm32_lptim_cnt_action_get(struct counter_device *counter, case STM32_LPTIM_ENCODER_BOTH_EDGE: *action = priv->polarity; return 0; + default: + /* should never reach this path */ + return -EINVAL; } - - return -EINVAL; } static int stm32_lptim_cnt_action_set(struct counter_device *counter, diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index 65df9ef5b5bc..c303eb17c111 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -157,7 +157,7 @@ static int ti_eqep_action_get(struct counter_device *counter, * QEPA and QEPB trigger QCLK. */ *action = TI_EQEP_SYNAPSE_ACTION_BOTH_EDGES; - break; + return 0; case TI_EQEP_COUNT_FUNC_DIR_COUNT: /* In direction-count mode only rising edge of QEPA is counted * and QEPB gives direction. @@ -165,12 +165,14 @@ static int ti_eqep_action_get(struct counter_device *counter, switch (synapse->signal->id) { case TI_EQEP_SIGNAL_QEPA: *action = TI_EQEP_SYNAPSE_ACTION_RISING_EDGE; - break; - default: + return 0; + case TI_EQEP_SIGNAL_QEPB: *action = TI_EQEP_SYNAPSE_ACTION_NONE; - break; + return 0; + default: + /* should never reach this path */ + return -EINVAL; } - break; case TI_EQEP_COUNT_FUNC_UP_COUNT: case TI_EQEP_COUNT_FUNC_DOWN_COUNT: /* In up/down-count modes only QEPA is counted and QEPB is not @@ -186,15 +188,18 @@ static int ti_eqep_action_get(struct counter_device *counter, *action = TI_EQEP_SYNAPSE_ACTION_BOTH_EDGES; else *action = TI_EQEP_SYNAPSE_ACTION_RISING_EDGE; - break; - default: + return 0; + case TI_EQEP_SIGNAL_QEPB: *action = TI_EQEP_SYNAPSE_ACTION_NONE; - break; + return 0; + default: + /* should never reach this path */ + return -EINVAL; } - break; + default: + /* should never reach this path */ + return -EINVAL; } - - return 0; } static const struct counter_ops ti_eqep_counter_ops = { From patchwork Mon Jul 5 08:18:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358415 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBC1CC07E9B for ; Mon, 5 Jul 2021 08:19:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A89CA61408 for ; Mon, 5 Jul 2021 08:19:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230115AbhGEIWR (ORCPT ); Mon, 5 Jul 2021 04:22:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230038AbhGEIWR (ORCPT ); Mon, 5 Jul 2021 04:22:17 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02E61C061760; Mon, 5 Jul 2021 01:19:40 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id b5-20020a17090a9905b029016fc06f6c5bso11317504pjp.5; Mon, 05 Jul 2021 01:19:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=stljVzismgi0bhtAbjcWPPl7QduNl8XesIvoC90of/Y=; b=lBPm735wq5Hqmn4+hV8uefqyLgB0/8ouc4pmGNEZp5sEeqfeqAGTrbQA1vEs7aKfad /YBPzTALvNXtsRU1RrQLhzoBAKtt7m1fM21AhMkuP0i9vqO2Re+sJgJ/l8CfRxfiJyF+ aC2WY2B6Zq0p36dN2xlZiD5Wa2nG7v93qq6U+zvmCUWMTXDOtxc1guY1Z93q2Hg6/V8q qM39Qto420qcAqQIttNRd0VZJ8P8GgATtWn5mDBtsW/thp7fek4cV0rOC3tJPsbr2jH+ 1RTWIzEoNZYaA3wpz/IOP+hlHpC+zYsUZo4PSdd8Yk+JHgGkw+1ETOV8SSCKxRIx5J0w VsHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=stljVzismgi0bhtAbjcWPPl7QduNl8XesIvoC90of/Y=; b=OTq3uuN+aZCrw7AamE812+xfIwKlVU5MnWE8BJS80HKAv9Ls3xUSElnlvLtKTWYaIo eAG4MBAkiqWbkSX6Qjvuk+e9AmvqxsMojXHrMFZ7C3YfAu1PNlpTYJ5p7ErdwQDsWqup fNFX0Tc3EtfxkYZfEeqsVykU1NYaWXfZ4K6rq+9pGPTov5ZScBp8f4KntXWUN9yCFAD9 iRgZWUjywBWb270C/PENRjnz7CC36SoFvJ01ROuc1XZgRVeRCtDJtoFEb8lxJYRTN4l5 YlyVh/HiFEDlaQ2iz6H0GLfZFBIRkFBOZcyOD/Q0GK785nfiBJF9XV3rrPSTGyGZ9MrN UDiA== X-Gm-Message-State: AOAM532j1je7oglggjPD6s5Tesj4fUDOYQ0kJiymwx+zqOEsrKrrVS32 8wBJ8hO22DyCnCHFxBJDyHo= X-Google-Smtp-Source: ABdhPJyXYShWjeZFwxJcv49xdwSleXlIQku3KIv3x6cjovjto725dXxQSUSismAGJ6fdMKwFyNY/Ig== X-Received: by 2002:a17:90a:4295:: with SMTP id p21mr13654533pjg.149.1625473179621; Mon, 05 Jul 2021 01:19:39 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.19.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:19:39 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray , Fabrice Gasnier Subject: [PATCH v12 03/17] counter: Standardize to ERANGE for limit exceeded errors Date: Mon, 5 Jul 2021 17:18:51 +0900 Message-Id: <26c3e75fad4010d74ab563884e2cd0215efb05ed.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org ERANGE is a semantically better error code to return when an argument value falls outside the supported limit range of a device. Cc: Jarkko Nikula Cc: Oleksij Rempel Cc: Maxime Coquelin Cc: Alexandre Torgue Acked-by: Syed Nayyar Waris Reviewed-by: David Lechner Reviewed-by: Fabrice Gasnier Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 6 +++--- drivers/counter/intel-qep.c | 2 +- drivers/counter/interrupt-cnt.c | 3 +++ drivers/counter/stm32-lptimer-cnt.c | 2 +- 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index b358b2b2b883..d54efdb8d393 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -154,7 +154,7 @@ static int quad8_count_write(struct counter_device *counter, /* Only 24-bit values are supported */ if (val > 0xFFFFFF) - return -EINVAL; + return -ERANGE; mutex_lock(&priv->lock); @@ -669,7 +669,7 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter, /* Only 24-bit values are supported */ if (preset > 0xFFFFFF) - return -EINVAL; + return -ERANGE; mutex_lock(&priv->lock); @@ -714,7 +714,7 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter, /* Only 24-bit values are supported */ if (ceiling > 0xFFFFFF) - return -EINVAL; + return -ERANGE; mutex_lock(&priv->lock); diff --git a/drivers/counter/intel-qep.c b/drivers/counter/intel-qep.c index 8d7ae28fbd67..85dd328ae1f6 100644 --- a/drivers/counter/intel-qep.c +++ b/drivers/counter/intel-qep.c @@ -320,7 +320,7 @@ static ssize_t spike_filter_ns_write(struct counter_device *counter, } if (length > INTEL_QEPFLT_MAX_COUNT(length)) - return -EINVAL; + return -ERANGE; mutex_lock(&qep->lock); if (qep->enabled) { diff --git a/drivers/counter/interrupt-cnt.c b/drivers/counter/interrupt-cnt.c index 5df7cd13d4c7..66cac4900327 100644 --- a/drivers/counter/interrupt-cnt.c +++ b/drivers/counter/interrupt-cnt.c @@ -107,6 +107,9 @@ static int interrupt_cnt_write(struct counter_device *counter, { struct interrupt_cnt_priv *priv = counter->priv; + if (val != (typeof(priv->count.counter))val) + return -ERANGE; + atomic_set(&priv->count, val); return 0; diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c index 78f383b77bd2..49aeb9e393f3 100644 --- a/drivers/counter/stm32-lptimer-cnt.c +++ b/drivers/counter/stm32-lptimer-cnt.c @@ -283,7 +283,7 @@ static ssize_t stm32_lptim_cnt_ceiling_write(struct counter_device *counter, return ret; if (ceiling > STM32_LPTIM_MAX_ARR) - return -EINVAL; + return -ERANGE; priv->ceiling = ceiling; From patchwork Mon Jul 5 08:18:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358417 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44910C07E98 for ; Mon, 5 Jul 2021 08:19:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2DAA16128B for ; Mon, 5 Jul 2021 08:19:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230041AbhGEIWW (ORCPT ); Mon, 5 Jul 2021 04:22:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230038AbhGEIWW (ORCPT ); Mon, 5 Jul 2021 04:22:22 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3F99C061574; Mon, 5 Jul 2021 01:19:44 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id f11so9883577plg.0; Mon, 05 Jul 2021 01:19:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TLjqZWQe/YbRhTdSUAIfqvZl6++obXP7V1QPjhbJF6E=; b=OuwD8OQhTm0+i0QMnu9LTr5hAe4C6oSyIhDZLdZuLDAMvMtZbqrTU2LefLISiPTMnp dJbjtszD7slUcbFPSjvetjP3J1rs+VuAlJdM2mX9VFEQ8tk+vOvzy0JBY082JCBGJWc4 AXVaEBsWCyFMGXBD38+bddCcslBcLKFbwiR6H0x2tz6ptGrtITmb/Iq/HtkVBz2uUmok e09Rt3alkgsYXZX0w+NpYtmcRS6hUSsgnhCQS0RkxHRMWwvIeCEMYvMQGrnm5H2rtMpj 4ybOxIwiex0klgyhz18VGTxfJbwjyxKnqjiQ490zf3FcJ7JO0fOaYPhaZKkyxT8qRf9d xdJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TLjqZWQe/YbRhTdSUAIfqvZl6++obXP7V1QPjhbJF6E=; b=Swl/4N5kbqjXP95VmF3ESQfjG7BVq1bW7UeD5iqAPuMFVqEf+pj43YqfyINxWjCni9 ephFh6F2Pup5l6IGULjtYjQAAAhVmJ4ZAvJl6lXrCk+4Qi2CKVW5yq+HJRxxIXSGkLOO JODQLWb0Vo0za3Z+6DrJ7nySijaE1Gy3QFGnC1zlx0IXDe55lewL91F60muW+Kw/NCnU KWnfcnWtDe9A4DDsHd6JOO/Li9e1yCH9d6M1Hj5z/DwRIkejwBhXiei0ctqvXBmSqWxM zAFoiucSZVHNDpY50WuXKrl/0ngVcwxnbfDtuMimL3JtvlGURs2suZnCaB9XCdFSeVvq TiPA== X-Gm-Message-State: AOAM531dKxWKZLW7Rz2LehJiWyeDSme201tMSCVPZ6Tpg+Hrh9nmUvun wlsfZIPyqOgah/CaZMuGgSM= X-Google-Smtp-Source: ABdhPJz8fepR79/o5GzN1WXH3GHz3xhtG4k+lNswucdHFmkYsrTU1HodxTdFOjUpqWSYnGgr7dFcsQ== X-Received: by 2002:a17:90a:c484:: with SMTP id j4mr11159190pjt.218.1625473184433; Mon, 05 Jul 2021 01:19:44 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.19.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:19:44 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 04/17] counter: Rename counter_signal_value to counter_signal_level Date: Mon, 5 Jul 2021 17:18:52 +0900 Message-Id: <65d237358e9e50ab10b8bc74202eddd2bbb8050a.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Signal values will always be levels so let's be explicit it about it to make the intent of the code clear. Cc: Oleksij Rempel Cc: Kamel Bouhara Acked-by: Syed Nayyar Waris Reviewed-by: David Lechner Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 5 +++-- drivers/counter/counter.c | 12 ++++++------ drivers/counter/interrupt-cnt.c | 4 ++-- drivers/counter/microchip-tcb-capture.c | 4 ++-- include/linux/counter.h | 12 ++++++------ 5 files changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index d54efdb8d393..b4dd07cf51eb 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -97,7 +97,8 @@ struct quad8 { #define QUAD8_CMR_QUADRATURE_X4 0x18 static int quad8_signal_read(struct counter_device *counter, - struct counter_signal *signal, enum counter_signal_value *val) + struct counter_signal *signal, + enum counter_signal_level *level) { const struct quad8 *const priv = counter->priv; unsigned int state; @@ -109,7 +110,7 @@ static int quad8_signal_read(struct counter_device *counter, state = inb(priv->base + QUAD8_REG_INDEX_INPUT_LEVELS) & BIT(signal->id - 16); - *val = (state) ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW; + *level = (state) ? COUNTER_SIGNAL_LEVEL_HIGH : COUNTER_SIGNAL_LEVEL_LOW; return 0; } diff --git a/drivers/counter/counter.c b/drivers/counter/counter.c index 6a683d086008..cb92673552b5 100644 --- a/drivers/counter/counter.c +++ b/drivers/counter/counter.c @@ -289,9 +289,9 @@ struct counter_signal_unit { struct counter_signal *signal; }; -static const char *const counter_signal_value_str[] = { - [COUNTER_SIGNAL_LOW] = "low", - [COUNTER_SIGNAL_HIGH] = "high" +static const char *const counter_signal_level_str[] = { + [COUNTER_SIGNAL_LEVEL_LOW] = "low", + [COUNTER_SIGNAL_LEVEL_HIGH] = "high" }; static ssize_t counter_signal_show(struct device *dev, @@ -302,13 +302,13 @@ static ssize_t counter_signal_show(struct device *dev, const struct counter_signal_unit *const component = devattr->component; struct counter_signal *const signal = component->signal; int err; - enum counter_signal_value val; + enum counter_signal_level level; - err = counter->ops->signal_read(counter, signal, &val); + err = counter->ops->signal_read(counter, signal, &level); if (err) return err; - return sprintf(buf, "%s\n", counter_signal_value_str[val]); + return sprintf(buf, "%s\n", counter_signal_level_str[level]); } struct counter_name_unit { diff --git a/drivers/counter/interrupt-cnt.c b/drivers/counter/interrupt-cnt.c index 66cac4900327..d06367bef8f0 100644 --- a/drivers/counter/interrupt-cnt.c +++ b/drivers/counter/interrupt-cnt.c @@ -130,7 +130,7 @@ static int interrupt_cnt_function_get(struct counter_device *counter, static int interrupt_cnt_signal_read(struct counter_device *counter, struct counter_signal *signal, - enum counter_signal_value *val) + enum counter_signal_level *level) { struct interrupt_cnt_priv *priv = counter->priv; int ret; @@ -142,7 +142,7 @@ static int interrupt_cnt_signal_read(struct counter_device *counter, if (ret < 0) return ret; - *val = ret ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW; + *level = ret ? COUNTER_SIGNAL_LEVEL_HIGH : COUNTER_SIGNAL_LEVEL_LOW; return 0; } diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index 0c9a61962911..6be3adf74114 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -158,7 +158,7 @@ static int mchp_tc_count_function_set(struct counter_device *counter, static int mchp_tc_count_signal_read(struct counter_device *counter, struct counter_signal *signal, - enum counter_signal_value *val) + enum counter_signal_level *lvl) { struct mchp_tc_data *const priv = counter->priv; bool sigstatus; @@ -171,7 +171,7 @@ static int mchp_tc_count_signal_read(struct counter_device *counter, else sigstatus = (sr & ATMEL_TC_MTIOA); - *val = sigstatus ? COUNTER_SIGNAL_HIGH : COUNTER_SIGNAL_LOW; + *lvl = sigstatus ? COUNTER_SIGNAL_LEVEL_HIGH : COUNTER_SIGNAL_LEVEL_LOW; return 0; } diff --git a/include/linux/counter.h b/include/linux/counter.h index 9dbd5df4cd34..79f5dcaf6ba0 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -290,16 +290,16 @@ struct counter_device_state { const struct attribute_group **groups; }; -enum counter_signal_value { - COUNTER_SIGNAL_LOW = 0, - COUNTER_SIGNAL_HIGH +enum counter_signal_level { + COUNTER_SIGNAL_LEVEL_LOW, + COUNTER_SIGNAL_LEVEL_HIGH, }; /** * struct counter_ops - Callbacks from driver * @signal_read: optional read callback for Signal attribute. The read - * value of the respective Signal should be passed back via - * the val parameter. + * level of the respective Signal should be passed back via + * the level parameter. * @count_read: optional read callback for Count attribute. The read * value of the respective Count should be passed back via * the val parameter. @@ -324,7 +324,7 @@ enum counter_signal_value { struct counter_ops { int (*signal_read)(struct counter_device *counter, struct counter_signal *signal, - enum counter_signal_value *val); + enum counter_signal_level *level); int (*count_read)(struct counter_device *counter, struct counter_count *count, unsigned long *val); int (*count_write)(struct counter_device *counter, From patchwork Mon Jul 5 08:18:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358419 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A617C07E9A for ; Mon, 5 Jul 2021 08:19:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 665EC613D1 for ; Mon, 5 Jul 2021 08:19:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230188AbhGEIW1 (ORCPT ); Mon, 5 Jul 2021 04:22:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230106AbhGEIW0 (ORCPT ); Mon, 5 Jul 2021 04:22:26 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35DAFC061574; Mon, 5 Jul 2021 01:19:50 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id u14so17574504pga.11; Mon, 05 Jul 2021 01:19:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oI/jb4FSNRxGimD7smahqlBTafXVAVl5TCLVppcZnms=; b=Zzi4a9al6/1wJyTHfHx+i07hUZY8EAiEP/HBa0xiPu0capxJEuPuLN2xSoaf/8ikAY FzOi+TbRwtVNIpWywR+dcgIG2jwMI5pvcqWh1yzYNDZ7Z6BLzNdZsqPEtknkgEoB5ay6 VDyeV7uSIANdR9pKABqNEA9X3QQdJE7Bv4+kAhienz6wdklI9cqntBIDIH2IqFc+v63T 1VAX3/X10d9kMWCpA/i5ZNUHS8F7QMe/dxgQphIu1Rbl5PgeDIGlpf4/JOxSFEgv22kZ YdjSZXKT7/7s7WX+90J/M+INPZlGqYfBhbyB+TT+pDEgbMkA0442067adhWWjEnTwDgj GqlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oI/jb4FSNRxGimD7smahqlBTafXVAVl5TCLVppcZnms=; b=M66kAZFuoTs/0OzcqdbcJZ38/lZt7EwuRU4MrUSqHD+NgAMXszW8zC4fgmIDhbZcG9 2tXSk4UZ4HbMUyms2dTPIpAa9kFGTWvuprXTmm/CQoV46t/tPMT45w86HEn3N+WCSkcu vOKHJac7s0y38P+KCBpnErLtirOqOqdGJHGRqA5tcsGPH7V2q5NXb5Rv5DZcAs8RZ8c5 jIwI0bNDVkD1oPbls7zR16UTkR6fNbJ8ODAK9Aoir0/mwBh/YSDDoLARQyAfIGrw146Y C6qJ9/5ck+LoH5L86NQ7rFE468euJNmPDvZiCAw1SeEb9Ip9Dn+a1bwhNPnwTUF/WuJg yWzw== X-Gm-Message-State: AOAM5333F8lXSOV19eGDlFYWIs6Q37tj9A6InVUY5ll/eieuSVbU1VOo N7NlDgOdB/oT5pZEvRUbijQ= X-Google-Smtp-Source: ABdhPJzmVGKUBqCQkJWWRopKwFVTi23gnY8aEi0VgxSfnoNX+3C4N1Lm96JLK9gMSevUAXdqkV3JEw== X-Received: by 2002:a63:582:: with SMTP id 124mr14435780pgf.299.1625473189737; Mon, 05 Jul 2021 01:19:49 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:19:49 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray , Fabrice Gasnier Subject: [PATCH v12 05/17] counter: Rename counter_count_function to counter_function Date: Mon, 5 Jul 2021 17:18:53 +0900 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The phrase "Counter Count function" is verbose and unintentionally implies that function is a Count extension. This patch adjusts the Counter subsystem code to use the more direct "Counter function" phrase to make the intent of this code clearer. Cc: Jarkko Nikula Cc: Patrick Havelange Cc: Oleksij Rempel Cc: Kamel Bouhara Cc: Maxime Coquelin Cc: Alexandre Torgue Cc: David Lechner Acked-by: Syed Nayyar Waris Reviewed-by: Fabrice Gasnier Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 10 +++---- drivers/counter/counter.c | 38 ++++++++++++------------- drivers/counter/ftm-quaddec.c | 5 ++-- drivers/counter/intel-qep.c | 4 +-- drivers/counter/interrupt-cnt.c | 4 +-- drivers/counter/microchip-tcb-capture.c | 4 +-- drivers/counter/stm32-lptimer-cnt.c | 6 ++-- drivers/counter/stm32-timer-cnt.c | 10 +++---- drivers/counter/ti-eqep.c | 10 +++---- include/linux/counter.h | 20 ++++++------- 10 files changed, 55 insertions(+), 56 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index b4dd07cf51eb..5283ff128c17 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -194,11 +194,11 @@ enum quad8_count_function { QUAD8_COUNT_FUNCTION_QUADRATURE_X4 }; -static const enum counter_count_function quad8_count_functions_list[] = { - [QUAD8_COUNT_FUNCTION_PULSE_DIRECTION] = COUNTER_COUNT_FUNCTION_PULSE_DIRECTION, - [QUAD8_COUNT_FUNCTION_QUADRATURE_X1] = COUNTER_COUNT_FUNCTION_QUADRATURE_X1_A, - [QUAD8_COUNT_FUNCTION_QUADRATURE_X2] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A, - [QUAD8_COUNT_FUNCTION_QUADRATURE_X4] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4 +static const enum counter_function quad8_count_functions_list[] = { + [QUAD8_COUNT_FUNCTION_PULSE_DIRECTION] = COUNTER_FUNCTION_PULSE_DIRECTION, + [QUAD8_COUNT_FUNCTION_QUADRATURE_X1] = COUNTER_FUNCTION_QUADRATURE_X1_A, + [QUAD8_COUNT_FUNCTION_QUADRATURE_X2] = COUNTER_FUNCTION_QUADRATURE_X2_A, + [QUAD8_COUNT_FUNCTION_QUADRATURE_X4] = COUNTER_FUNCTION_QUADRATURE_X4 }; static int quad8_function_get(struct counter_device *counter, diff --git a/drivers/counter/counter.c b/drivers/counter/counter.c index cb92673552b5..de921e8a3f72 100644 --- a/drivers/counter/counter.c +++ b/drivers/counter/counter.c @@ -744,15 +744,15 @@ static ssize_t counter_count_store(struct device *dev, return len; } -static const char *const counter_count_function_str[] = { - [COUNTER_COUNT_FUNCTION_INCREASE] = "increase", - [COUNTER_COUNT_FUNCTION_DECREASE] = "decrease", - [COUNTER_COUNT_FUNCTION_PULSE_DIRECTION] = "pulse-direction", - [COUNTER_COUNT_FUNCTION_QUADRATURE_X1_A] = "quadrature x1 a", - [COUNTER_COUNT_FUNCTION_QUADRATURE_X1_B] = "quadrature x1 b", - [COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A] = "quadrature x2 a", - [COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B] = "quadrature x2 b", - [COUNTER_COUNT_FUNCTION_QUADRATURE_X4] = "quadrature x4" +static const char *const counter_function_str[] = { + [COUNTER_FUNCTION_INCREASE] = "increase", + [COUNTER_FUNCTION_DECREASE] = "decrease", + [COUNTER_FUNCTION_PULSE_DIRECTION] = "pulse-direction", + [COUNTER_FUNCTION_QUADRATURE_X1_A] = "quadrature x1 a", + [COUNTER_FUNCTION_QUADRATURE_X1_B] = "quadrature x1 b", + [COUNTER_FUNCTION_QUADRATURE_X2_A] = "quadrature x2 a", + [COUNTER_FUNCTION_QUADRATURE_X2_B] = "quadrature x2 b", + [COUNTER_FUNCTION_QUADRATURE_X4] = "quadrature x4" }; static ssize_t counter_function_show(struct device *dev, @@ -764,7 +764,7 @@ static ssize_t counter_function_show(struct device *dev, const struct counter_count_unit *const component = devattr->component; struct counter_count *const count = component->count; size_t func_index; - enum counter_count_function function; + enum counter_function function; err = counter->ops->function_get(counter, count, &func_index); if (err) @@ -773,7 +773,7 @@ static ssize_t counter_function_show(struct device *dev, count->function = func_index; function = count->functions_list[func_index]; - return sprintf(buf, "%s\n", counter_count_function_str[function]); + return sprintf(buf, "%s\n", counter_function_str[function]); } static ssize_t counter_function_store(struct device *dev, @@ -785,14 +785,14 @@ static ssize_t counter_function_store(struct device *dev, struct counter_count *const count = component->count; const size_t num_functions = count->num_functions; size_t func_index; - enum counter_count_function function; + enum counter_function function; int err; struct counter_device *const counter = dev_get_drvdata(dev); /* Find requested Count function mode */ for (func_index = 0; func_index < num_functions; func_index++) { function = count->functions_list[func_index]; - if (sysfs_streq(buf, counter_count_function_str[function])) + if (sysfs_streq(buf, counter_function_str[function])) break; } /* Return error if requested Count function mode not found */ @@ -880,25 +880,25 @@ static int counter_count_ext_register( } struct counter_func_avail_unit { - const enum counter_count_function *functions_list; + const enum counter_function *functions_list; size_t num_functions; }; -static ssize_t counter_count_function_available_show(struct device *dev, +static ssize_t counter_function_available_show(struct device *dev, struct device_attribute *attr, char *buf) { const struct counter_device_attr *const devattr = to_counter_attr(attr); const struct counter_func_avail_unit *const component = devattr->component; - const enum counter_count_function *const func_list = component->functions_list; + const enum counter_function *const func_list = component->functions_list; const size_t num_functions = component->num_functions; size_t i; - enum counter_count_function function; + enum counter_function function; ssize_t len = 0; for (i = 0; i < num_functions; i++) { function = func_list[i]; len += sprintf(buf + len, "%s\n", - counter_count_function_str[function]); + counter_function_str[function]); } return len; @@ -968,7 +968,7 @@ static int counter_count_attributes_create( parm.group = group; parm.prefix = ""; parm.name = "function_available"; - parm.show = counter_count_function_available_show; + parm.show = counter_function_available_show; parm.store = NULL; parm.component = avail_comp; err = counter_attribute_create(&parm); diff --git a/drivers/counter/ftm-quaddec.c b/drivers/counter/ftm-quaddec.c index 9371532406ca..53c15f84909b 100644 --- a/drivers/counter/ftm-quaddec.c +++ b/drivers/counter/ftm-quaddec.c @@ -171,9 +171,8 @@ enum ftm_quaddec_count_function { FTM_QUADDEC_COUNT_ENCODER_MODE_1, }; -static const enum counter_count_function ftm_quaddec_count_functions[] = { - [FTM_QUADDEC_COUNT_ENCODER_MODE_1] = - COUNTER_COUNT_FUNCTION_QUADRATURE_X4 +static const enum counter_function ftm_quaddec_count_functions[] = { + [FTM_QUADDEC_COUNT_ENCODER_MODE_1] = COUNTER_FUNCTION_QUADRATURE_X4 }; static int ftm_quaddec_count_read(struct counter_device *counter, diff --git a/drivers/counter/intel-qep.c b/drivers/counter/intel-qep.c index 85dd328ae1f6..f4be9d78c84c 100644 --- a/drivers/counter/intel-qep.c +++ b/drivers/counter/intel-qep.c @@ -127,8 +127,8 @@ static int intel_qep_count_read(struct counter_device *counter, return 0; } -static const enum counter_count_function intel_qep_count_functions[] = { - COUNTER_COUNT_FUNCTION_QUADRATURE_X4, +static const enum counter_function intel_qep_count_functions[] = { + COUNTER_FUNCTION_QUADRATURE_X4, }; static int intel_qep_function_get(struct counter_device *counter, diff --git a/drivers/counter/interrupt-cnt.c b/drivers/counter/interrupt-cnt.c index d06367bef8f0..1de4243db488 100644 --- a/drivers/counter/interrupt-cnt.c +++ b/drivers/counter/interrupt-cnt.c @@ -115,8 +115,8 @@ static int interrupt_cnt_write(struct counter_device *counter, return 0; } -static const enum counter_count_function interrupt_cnt_functions[] = { - COUNTER_COUNT_FUNCTION_INCREASE, +static const enum counter_function interrupt_cnt_functions[] = { + COUNTER_FUNCTION_INCREASE, }; static int interrupt_cnt_function_get(struct counter_device *counter, diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index 6be3adf74114..4c57d43e7d66 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -38,8 +38,8 @@ enum mchp_tc_count_function { }; static const enum counter_count_function mchp_tc_count_functions[] = { - [MCHP_TC_FUNCTION_INCREASE] = COUNTER_COUNT_FUNCTION_INCREASE, - [MCHP_TC_FUNCTION_QUADRATURE] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4, + [MCHP_TC_FUNCTION_INCREASE] = COUNTER_FUNCTION_INCREASE, + [MCHP_TC_FUNCTION_QUADRATURE] = COUNTER_FUNCTION_QUADRATURE_X4, }; enum mchp_tc_synapse_action { diff --git a/drivers/counter/stm32-lptimer-cnt.c b/drivers/counter/stm32-lptimer-cnt.c index 49aeb9e393f3..13656957c45f 100644 --- a/drivers/counter/stm32-lptimer-cnt.c +++ b/drivers/counter/stm32-lptimer-cnt.c @@ -134,9 +134,9 @@ enum stm32_lptim_cnt_function { STM32_LPTIM_ENCODER_BOTH_EDGE, }; -static const enum counter_count_function stm32_lptim_cnt_functions[] = { - [STM32_LPTIM_COUNTER_INCREASE] = COUNTER_COUNT_FUNCTION_INCREASE, - [STM32_LPTIM_ENCODER_BOTH_EDGE] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4, +static const enum counter_function stm32_lptim_cnt_functions[] = { + [STM32_LPTIM_COUNTER_INCREASE] = COUNTER_FUNCTION_INCREASE, + [STM32_LPTIM_ENCODER_BOTH_EDGE] = COUNTER_FUNCTION_QUADRATURE_X4, }; enum stm32_lptim_synapse_action { diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c index 603b30ada839..3fb0debd7425 100644 --- a/drivers/counter/stm32-timer-cnt.c +++ b/drivers/counter/stm32-timer-cnt.c @@ -50,11 +50,11 @@ enum stm32_count_function { STM32_COUNT_ENCODER_MODE_3, }; -static const enum counter_count_function stm32_count_functions[] = { - [STM32_COUNT_SLAVE_MODE_DISABLED] = COUNTER_COUNT_FUNCTION_INCREASE, - [STM32_COUNT_ENCODER_MODE_1] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A, - [STM32_COUNT_ENCODER_MODE_2] = COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B, - [STM32_COUNT_ENCODER_MODE_3] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4, +static const enum counter_function stm32_count_functions[] = { + [STM32_COUNT_SLAVE_MODE_DISABLED] = COUNTER_FUNCTION_INCREASE, + [STM32_COUNT_ENCODER_MODE_1] = COUNTER_FUNCTION_QUADRATURE_X2_A, + [STM32_COUNT_ENCODER_MODE_2] = COUNTER_FUNCTION_QUADRATURE_X2_B, + [STM32_COUNT_ENCODER_MODE_3] = COUNTER_FUNCTION_QUADRATURE_X4, }; static int stm32_count_read(struct counter_device *counter, diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index c303eb17c111..94fe58bb3eab 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -294,11 +294,11 @@ static struct counter_signal ti_eqep_signals[] = { }, }; -static const enum counter_count_function ti_eqep_position_functions[] = { - [TI_EQEP_COUNT_FUNC_QUAD_COUNT] = COUNTER_COUNT_FUNCTION_QUADRATURE_X4, - [TI_EQEP_COUNT_FUNC_DIR_COUNT] = COUNTER_COUNT_FUNCTION_PULSE_DIRECTION, - [TI_EQEP_COUNT_FUNC_UP_COUNT] = COUNTER_COUNT_FUNCTION_INCREASE, - [TI_EQEP_COUNT_FUNC_DOWN_COUNT] = COUNTER_COUNT_FUNCTION_DECREASE, +static const enum counter_function ti_eqep_position_functions[] = { + [TI_EQEP_COUNT_FUNC_QUAD_COUNT] = COUNTER_FUNCTION_QUADRATURE_X4, + [TI_EQEP_COUNT_FUNC_DIR_COUNT] = COUNTER_FUNCTION_PULSE_DIRECTION, + [TI_EQEP_COUNT_FUNC_UP_COUNT] = COUNTER_FUNCTION_INCREASE, + [TI_EQEP_COUNT_FUNC_DOWN_COUNT] = COUNTER_FUNCTION_DECREASE, }; static const enum counter_synapse_action ti_eqep_position_synapse_actions[] = { diff --git a/include/linux/counter.h b/include/linux/counter.h index 79f5dcaf6ba0..d16ce2819b48 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -162,15 +162,15 @@ struct counter_count_ext { void *priv; }; -enum counter_count_function { - COUNTER_COUNT_FUNCTION_INCREASE = 0, - COUNTER_COUNT_FUNCTION_DECREASE, - COUNTER_COUNT_FUNCTION_PULSE_DIRECTION, - COUNTER_COUNT_FUNCTION_QUADRATURE_X1_A, - COUNTER_COUNT_FUNCTION_QUADRATURE_X1_B, - COUNTER_COUNT_FUNCTION_QUADRATURE_X2_A, - COUNTER_COUNT_FUNCTION_QUADRATURE_X2_B, - COUNTER_COUNT_FUNCTION_QUADRATURE_X4 +enum counter_function { + COUNTER_FUNCTION_INCREASE = 0, + COUNTER_FUNCTION_DECREASE, + COUNTER_FUNCTION_PULSE_DIRECTION, + COUNTER_FUNCTION_QUADRATURE_X1_A, + COUNTER_FUNCTION_QUADRATURE_X1_B, + COUNTER_FUNCTION_QUADRATURE_X2_A, + COUNTER_FUNCTION_QUADRATURE_X2_B, + COUNTER_FUNCTION_QUADRATURE_X4 }; /** @@ -192,7 +192,7 @@ struct counter_count { const char *name; size_t function; - const enum counter_count_function *functions_list; + const enum counter_function *functions_list; size_t num_functions; struct counter_synapse *synapses; From patchwork Mon Jul 5 08:18:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358421 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 194D0C07E99 for ; Mon, 5 Jul 2021 08:20:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F079A6128B for ; Mon, 5 Jul 2021 08:20:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230109AbhGEIWn (ORCPT ); Mon, 5 Jul 2021 04:22:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230222AbhGEIWj (ORCPT ); Mon, 5 Jul 2021 04:22:39 -0400 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D070C061760; Mon, 5 Jul 2021 01:20:01 -0700 (PDT) Received: by mail-pj1-x1034.google.com with SMTP id x21-20020a17090aa395b029016e25313bfcso11339748pjp.2; Mon, 05 Jul 2021 01:20:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/8w3H0E2Vn1sT5Yu/HP9gvbQ2v5uZuQwgYPJqq4exoQ=; b=kzs+3wre7cUn9/u8OvLOPsE7notGqdhoTOpQdz/vOdw4aoHFEO44zojcX5kiP58QOy VvzXwCjlJj+LsgcV3aIsJFHhLw3tDk9KgSrtGzVevCI/w10EW5covU8TgJ739S/tskdB JjFTj97gQBLb1cqOQ8M2VGrukqbAiHq/gvRRk0vLdPWVNW7B3GLMOjLQQ4XNu8DgNMR9 ETYFcZi9T8AKdGeIKqHHtbZpgsRSWmZrurL+xeb6yjTNV7z0uCBSAYKUAOe1pEHkcIdH wIWWcWwSauWI60T0sRNFp3g3xuAtJiDwhk4f7KkWwWNvYCkfldlEmqIXtf2RxppJCE6A aEQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/8w3H0E2Vn1sT5Yu/HP9gvbQ2v5uZuQwgYPJqq4exoQ=; b=esfKN+jPeVWbVSO11jM3V5S+WfkJIFEo+Q69Bg94v/6yHY1prTn/mTEJodg/bX5XvZ 6pt5xNkCJwRmbmglM0JknEFEy3C+sYokDMxFFHM0jtV+Inoe1slxPMC/4fSnA5ar6AN4 Ta5ly8DK8uorqWXCilT5iUPjsXaA/syXnAaY53GiXTzy5NmSgInJ1iDUb67b4IJBocD4 7jq6/UTdmHSW0yOpBt1VYbPrjCnFYczsz8ByzZhgdjJbaji0odiyg9V0DT7VGh5EiMEp /u5a+49UmbHHa6t/xA3nVXCQvYbd6m7qrsjy7BXIZaMzGClrXlPUJ0hVaL5RleMqsT2i +S1A== X-Gm-Message-State: AOAM5308EYTzo3ugYnBrxEj4aRMJS8kc4Lv7m+0Vo20JR28L0oVL5Zk/ +2ipp134Bcl8O6GEEpD5z+8= X-Google-Smtp-Source: ABdhPJzMf9xgDADDSXNkZDgrDUTtf/aU8hFXFiMa55I0/wRtPoKEtzrPNESksCIb7z7v26x3cM5TKw== X-Received: by 2002:a17:90a:73ca:: with SMTP id n10mr13975765pjk.16.1625473200779; Mon, 05 Jul 2021 01:20:00 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.19.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:00 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 07/17] counter: Update counter.h comments to reflect sysfs internalization Date: Mon, 5 Jul 2021 17:18:55 +0900 Message-Id: <4223302f61b77b82b3927bd3280d0df791418d76.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter subsystem architecture and driver implementations have changed in order to handle Counter sysfs interactions in a more consistent way. This patch updates the Generic Counter interface header file comments to reflect the changes. Signed-off-by: William Breathitt Gray --- drivers/counter/counter-core.c | 3 +++ include/linux/counter.h | 43 ++++++++++++++++------------------ 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/counter/counter-core.c b/drivers/counter/counter-core.c index 15f735ef296e..9442e3b91468 100644 --- a/drivers/counter/counter-core.c +++ b/drivers/counter/counter-core.c @@ -41,6 +41,9 @@ static struct bus_type counter_bus_type = { * This function registers a Counter to the system. A sysfs "counter" directory * will be created and populated with sysfs attributes correlating with the * Counter Signals, Synapses, and Counts respectively. + * + * RETURNS: + * 0 on success, negative error number on failure. */ int counter_register(struct counter_device *const counter) { diff --git a/include/linux/counter.h b/include/linux/counter.h index b69277f5c4c5..e7fd6d81a929 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -188,11 +188,10 @@ struct counter_comp { /** * struct counter_signal - Counter Signal node - * @id: unique ID used to identify signal - * @name: device-specific Signal name; ideally, this should match the name - * as it appears in the datasheet documentation - * @ext: optional array of Counter Signal extensions - * @num_ext: number of Counter Signal extensions specified in @ext + * @id: unique ID used to identify the Signal + * @name: device-specific Signal name + * @ext: optional array of Signal extensions + * @num_ext: number of Signal extensions specified in @ext */ struct counter_signal { int id; @@ -206,7 +205,7 @@ struct counter_signal { * struct counter_synapse - Counter Synapse node * @actions_list: array of available action modes * @num_actions: number of action modes specified in @actions_list - * @signal: pointer to associated signal + * @signal: pointer to the associated Signal */ struct counter_synapse { const enum counter_synapse_action *actions_list; @@ -217,15 +216,14 @@ struct counter_synapse { /** * struct counter_count - Counter Count node - * @id: unique ID used to identify Count - * @name: device-specific Count name; ideally, this should match - * the name as it appears in the datasheet documentation - * @functions_list: array available function modes + * @id: unique ID used to identify the Count + * @name: device-specific Count name + * @functions_list: array of available function modes * @num_functions: number of function modes specified in @functions_list - * @synapses: array of synapses for initialization - * @num_synapses: number of synapses specified in @synapses - * @ext: optional array of Counter Count extensions - * @num_ext: number of Counter Count extensions specified in @ext + * @synapses: array of Synapses for initialization + * @num_synapses: number of Synapses specified in @synapses + * @ext: optional array of Count extensions + * @num_ext: number of Count extensions specified in @ext */ struct counter_count { int id; @@ -243,15 +241,14 @@ struct counter_count { /** * struct counter_ops - Callbacks from driver - * @signal_read: optional read callback for Signal attribute. The read - * level of the respective Signal should be passed back via - * the level parameter. - * @count_read: optional read callback for Count attribute. The read - * value of the respective Count should be passed back via - * the val parameter. - * @count_write: optional write callback for Count attribute. The write - * value for the respective Count is passed in via the val + * @signal_read: read callback for Signals. The read level of the + * respective Signal should be passed back via the level + * parameter. + * @count_read: read callback for Counts. The read value of the + * respective Count should be passed back via the value * parameter. + * @count_write: write callback for Counts. The write value for the + * respective Count is passed in via the value parameter. * @function_read: read callback the Count function modes. The read * function mode of the respective Count should be passed * back via the function parameter. @@ -291,7 +288,7 @@ struct counter_ops { /** * struct counter_device - Counter data structure - * @name: name of the device as it appears in the datasheet + * @name: name of the device * @parent: optional parent device providing the counters * @ops: callbacks from driver * @signals: array of Signals From patchwork Mon Jul 5 08:18:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358423 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC12AC07E9B for ; Mon, 5 Jul 2021 08:20:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C87946128B for ; Mon, 5 Jul 2021 08:20:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230185AbhGEIWo (ORCPT ); Mon, 5 Jul 2021 04:22:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230208AbhGEIWm (ORCPT ); Mon, 5 Jul 2021 04:22:42 -0400 Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FA54C0613DB; Mon, 5 Jul 2021 01:20:06 -0700 (PDT) Received: by mail-pl1-x635.google.com with SMTP id e17so514030plh.8; Mon, 05 Jul 2021 01:20:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A67nL6VY5QuqzX4d9vtFWwhex7SYuitKz1DcH71mkPY=; b=V02DqOs7FO+Rxpaao17rnMSfpXkDn6hELLAi7trWMki59XCnOCqkYlX9nRQJNi4npP 3DtNib8TrNIXhXHRQX2aBymxlx+ll+ScUHP9Aduqdt7J+pe1Y31hCLiXFxSZRz/J/nf6 R5p+FoyA7JI/DNd+ZdgIhs10Ctf3yhm/p/FGCjWIo3qGRuaX/QJlJNRlVvisrT6zszI/ v3VRPpFDGMRXz4DWlY6mvrO/25VCgox8JIyqVB742v6k9w1VLBqteHdMIUo3H8/RERRs UHAQ0F81hTVdTt3YyIef7ZG1b4zsKa7LKxyPW4EOKsl/n5HZC5maOESwT+6PpKUhpBzZ w9Bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=A67nL6VY5QuqzX4d9vtFWwhex7SYuitKz1DcH71mkPY=; b=X6a9Bm2iopeWD3dyApfTa+aiSafsrfNA33OIH8O1SX1NMbS6SNuKaAP3npGb28yTZU BGV35UmSIeLdxVJzFEvidcl1J2hPNbuIWIjYLMo1SFHjt/U9uKBw/JVxFoL6o7BJgBQO PeOG+FAo72jNOk3WZrtJwwMjnNHl14gLfQX244iXktMsgmqcbTTF7WTqUEPAAADJi/dq i7nfVNfEASoGu96Kf+pBlhBBsnD9jB2JaBPHf4dMVJcx0wrTkaZ6NQXwklKiHIamkAe/ aUPa8yC9U290jQ5VUChRGt6ONJgP0wrRlJDXjDUQeQWjXIc6tg+pOcGjxLySpcQ5S9h5 8KQg== X-Gm-Message-State: AOAM531W3F3cHk/p6MRjKUX6canp14niMRgmDStyBYBlJ2PcvtFCS/ca Qx39Ozifo/L8ZgCYKF+6gBs= X-Google-Smtp-Source: ABdhPJy7ASUjr1Me3ibXp+zSB7NGG5pLHoVFw5uw43je2IpvW2bBPLUVl+JXYKpYZibCK5ljuf1Mtg== X-Received: by 2002:a17:90b:103:: with SMTP id p3mr14172079pjz.217.1625473205641; Mon, 05 Jul 2021 01:20:05 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:05 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 08/17] docs: counter: Update to reflect sysfs internalization Date: Mon, 5 Jul 2021 17:18:56 +0900 Message-Id: <3e0a3f7a32bba0f56f5830ff1548ef417e63880e.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Counter subsystem architecture and driver implementations have changed in order to handle Counter sysfs interactions in a more consistent way. This patch updates the Generic Counter interface documentation to reflect the changes. Signed-off-by: William Breathitt Gray Reviewed-by: David Lechner --- Documentation/ABI/testing/sysfs-bus-counter | 9 +- Documentation/driver-api/generic-counter.rst | 243 ++++++++++++++----- 2 files changed, 185 insertions(+), 67 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 20fe5afd4f9e..dee79b606847 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -286,7 +286,14 @@ What: /sys/bus/counter/devices/counterX/signalY/signal KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org Description: - Signal data of Signal Y represented as a string. + Signal level state of Signal Y. The following signal level + states are available: + + low: + Low level state. + + high: + High level state. What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode KernelVersion: 5.2 diff --git a/Documentation/driver-api/generic-counter.rst b/Documentation/driver-api/generic-counter.rst index 64fe7db080e5..f6397218aa4c 100644 --- a/Documentation/driver-api/generic-counter.rst +++ b/Documentation/driver-api/generic-counter.rst @@ -250,8 +250,8 @@ for defining a counter device. .. kernel-doc:: drivers/counter/counter.c :export: -Implementation -============== +Driver Implementation +===================== To support a counter device, a driver must first allocate the available Counter Signals via counter_signal structures. These Signals should @@ -267,25 +267,61 @@ respective counter_count structure. These counter_count structures are set to the counts array member of an allocated counter_device structure before the Counter is registered to the system. -Driver callbacks should be provided to the counter_device structure via -a constant counter_ops structure in order to communicate with the -device: to read and write various Signals and Counts, and to set and get -the "action mode" and "function mode" for various Synapses and Counts -respectively. +Driver callbacks must be provided to the counter_device structure in +order to communicate with the device: to read and write various Signals +and Counts, and to set and get the "action mode" and "function mode" for +various Synapses and Counts respectively. A defined counter_device structure may be registered to the system by passing it to the counter_register function, and unregistered by passing it to the counter_unregister function. Similarly, the -devm_counter_register and devm_counter_unregister functions may be used -if device memory-managed registration is desired. - -Extension sysfs attributes can be created for auxiliary functionality -and data by passing in defined counter_device_ext, counter_count_ext, -and counter_signal_ext structures. In these cases, the -counter_device_ext structure is used for global/miscellaneous exposure -and configuration of the respective Counter device, while the -counter_count_ext and counter_signal_ext structures allow for auxiliary -exposure and configuration of a specific Count or Signal respectively. +devm_counter_register function may be used if device memory-managed +registration is desired. + +The struct counter_comp structure is used to define counter extensions +for Signals, Synapses, and Counts. + +The "type" member specifies the type of high-level data (e.g. BOOL, +COUNT_DIRECTION, etc.) handled by this extension. The "``*_read``" and +"``*_write``" members can then be set by the counter device driver with +callbacks to handle that data using native C data types (i.e. u8, u64, +etc.). + +Convenience macros such as ``COUNTER_COMP_COUNT_U64`` are provided for +use by driver authors. In particular, driver authors are expected to use +the provided macros for standard Counter subsystem attributes in order +to maintain a consistent interface for userspace. For example, a counter +device driver may define several standard attributes like so:: + + struct counter_comp count_ext[] = { + COUNTER_COMP_DIRECTION(count_direction_read), + COUNTER_COMP_ENABLE(count_enable_read, count_enable_write), + COUNTER_COMP_CEILING(count_ceiling_read, count_ceiling_write), + }; + +This makes it simple to see, add, and modify the attributes that are +supported by this driver ("direction", "enable", and "ceiling") and to +maintain this code without getting lost in a web of struct braces. + +Callbacks must match the function type expected for the respective +component or extension. These function types are defined in the struct +counter_comp structure as the "``*_read``" and "``*_write``" union +members. + +The corresponding callback prototypes for the extensions mentioned in +the previous example above would be:: + + int count_direction_read(struct counter_device *counter, + struct counter_count *count, + enum counter_count_direction *direction); + int count_enable_read(struct counter_device *counter, + struct counter_count *count, u8 *enable); + int count_enable_write(struct counter_device *counter, + struct counter_count *count, u8 enable); + int count_ceiling_read(struct counter_device *counter, + struct counter_count *count, u64 *ceiling); + int count_ceiling_write(struct counter_device *counter, + struct counter_count *count, u64 ceiling); Determining the type of extension to create is a matter of scope. @@ -313,52 +349,127 @@ Determining the type of extension to create is a matter of scope. chip overheated via a device extension called "error_overtemp": /sys/bus/counter/devices/counterX/error_overtemp -Architecture -============ - -When the Generic Counter interface counter module is loaded, the -counter_init function is called which registers a bus_type named -"counter" to the system. Subsequently, when the module is unloaded, the -counter_exit function is called which unregisters the bus_type named -"counter" from the system. - -Counter devices are registered to the system via the counter_register -function, and later removed via the counter_unregister function. The -counter_register function establishes a unique ID for the Counter -device and creates a respective sysfs directory, where X is the -mentioned unique ID: - - /sys/bus/counter/devices/counterX - -Sysfs attributes are created within the counterX directory to expose -functionality, configurations, and data relating to the Counts, Signals, -and Synapses of the Counter device, as well as options and information -for the Counter device itself. - -Each Signal has a directory created to house its relevant sysfs -attributes, where Y is the unique ID of the respective Signal: - - /sys/bus/counter/devices/counterX/signalY - -Similarly, each Count has a directory created to house its relevant -sysfs attributes, where Y is the unique ID of the respective Count: - - /sys/bus/counter/devices/counterX/countY - -For a more detailed breakdown of the available Generic Counter interface -sysfs attributes, please refer to the -Documentation/ABI/testing/sysfs-bus-counter file. - -The Signals and Counts associated with the Counter device are registered -to the system as well by the counter_register function. The -signal_read/signal_write driver callbacks are associated with their -respective Signal attributes, while the count_read/count_write and -function_get/function_set driver callbacks are associated with their -respective Count attributes; similarly, the same is true for the -action_get/action_set driver callbacks and their respective Synapse -attributes. If a driver callback is left undefined, then the respective -read/write permission is left disabled for the relevant attributes. - -Similarly, extension sysfs attributes are created for the defined -counter_device_ext, counter_count_ext, and counter_signal_ext -structures that are passed in. +Subsystem Architecture +====================== + +Counter drivers pass and take data natively (i.e. ``u8``, ``u64``, etc.) +and the shared counter module handles the translation between the sysfs +interface. This guarantees a standard userspace interface for all +counter drivers, and enables a Generic Counter chrdev interface via a +generalized device driver ABI. + +A high-level view of how a count value is passed down from a counter +driver is exemplified by the following. The driver callbacks are first +registered to the Counter core component for use by the Counter +userspace interface components:: + + Driver callbacks registration: + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +----------------------------+ + | Counter device driver | + +----------------------------+ + | Processes data from device | + +----------------------------+ + | + ------------------- + / driver callbacks / + ------------------- + | + V + +----------------------+ + | Counter core | + +----------------------+ + | Routes device driver | + | callbacks to the | + | userspace interfaces | + +----------------------+ + | + ------------------- + / driver callbacks / + ------------------- + | + +---------------+ + | + V + +--------------------+ + | Counter sysfs | + +--------------------+ + | Translates to the | + | standard Counter | + | sysfs output | + +--------------------+ + +Thereafter, data can be transferred directly between the Counter device +driver and Counter userspace interface:: + + Count data request: + ~~~~~~~~~~~~~~~~~~~ + ---------------------- + / Counter device \ + +----------------------+ + | Count register: 0x28 | + +----------------------+ + | + ----------------- + / raw count data / + ----------------- + | + V + +----------------------------+ + | Counter device driver | + +----------------------------+ + | Processes data from device | + |----------------------------| + | Type: u64 | + | Value: 42 | + +----------------------------+ + | + ---------- + / u64 / + ---------- + | + +---------------+ + | + V + +--------------------+ + | Counter sysfs | + +--------------------+ + | Translates to the | + | standard Counter | + | sysfs output | + |--------------------| + | Type: const char * | + | Value: "42" | + +--------------------+ + | + --------------- + / const char * / + --------------- + | + V + +--------------------------------------------------+ + | `/sys/bus/counter/devices/counterX/countY/count` | + +--------------------------------------------------+ + \ Count: "42" / + -------------------------------------------------- + +There are three primary components involved: + +Counter device driver +--------------------- +Communicates with the hardware device to read/write data; e.g. counter +drivers for quadrature encoders, timers, etc. + +Counter core +------------ +Registers the counter device driver to the system so that the respective +callbacks are called during userspace interaction. + +Counter sysfs +------------- +Translates counter data to the standard Counter sysfs interface format +and vice versa. + +Please refer to the ``Documentation/ABI/testing/sysfs-bus-counter`` file +for a detailed breakdown of the available Generic Counter interface +sysfs attributes. From patchwork Mon Jul 5 08:18:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358425 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EFF1C07E9C for ; Mon, 5 Jul 2021 08:20:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ED5CF613C8 for ; Mon, 5 Jul 2021 08:20:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230241AbhGEIWu (ORCPT ); Mon, 5 Jul 2021 04:22:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230038AbhGEIWs (ORCPT ); Mon, 5 Jul 2021 04:22:48 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99A3DC061762; Mon, 5 Jul 2021 01:20:11 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id cx9-20020a17090afd89b0290170a3e085edso11354302pjb.0; Mon, 05 Jul 2021 01:20:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o8Aoh9kpAZGn2mM/3p/CEiOQACzWzUhkq+U7pGOzSQ4=; b=OuOEf2Eh7t3o7o4J11OEIcu4IEZVkoKwKiTmTKnA5BzB6YJ4t++LPu9vfvJjgov3UN kN1gLPaJIUjEcF6FGynNwrSoKogzQIiREASsCqJ/LYwyjd0rIBz91dTm69RXImTIelCW Uu7TUhPaocbB6xvnddnfKh3YPPUPjGjM+cAaWCjCVGEzqoV0lJtp42fVT4MLbqx+hG5j tC81RBR8bl0KztyL+X1oKxgfCHg58pVYob6rwReIb21M83ANeG7gU1jxzJOSNCExqZbJ 6sGSQV42NsjWKIRAPXtryHdsgpS62VB0VsVvs3+fYQrdotG7Ef1b+5ysTOWO0VJViBsV PMKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=o8Aoh9kpAZGn2mM/3p/CEiOQACzWzUhkq+U7pGOzSQ4=; b=cNdeCUXu98lnHdnFQ+VfDOp4yjhHalP2eofKOtyctaodcZSpDEvKyxVcWqSuxc1Niw ekzcXaK+Y0kJuWmGcu0Z1PXod9C5oxRbRC6vhCeHdur8Ir1NDtSOCZJ3TjjRKU4ak5Ow 5q6bIvtp5TPf/UHzax+Np71CGQpJvZ7ZwC+fGSqGjBkrSt/OJPeCW6riGPw2acUef5H9 ZOJQDaFdNMzWuOkY5B4wD2dvoiXq1SHGP9L8TURySbr+Q9osDA60GcTJ/GKllQTqLltc fO2F71UGOMkP0k+yydTHgEiS7GAzn3iN7Im1ac4CGdd4ogFPgwwcxnK3al4y2zL5dfzj UFlA== X-Gm-Message-State: AOAM530wiibXgV13lDQ9Si1eeUf29kX5WaLpI6aFMVtGyy6rAR/y4W7U Z3/TAhPI/Xsb2Aaci9m9Kko= X-Google-Smtp-Source: ABdhPJw09frGTEbknOhzRR+nQCL90ZGIey5C8BakjKCbokongNRwT8lm8qTm3yddOeueQxu3e7yzog== X-Received: by 2002:a17:902:eac6:b029:128:d5ed:4d06 with SMTP id p6-20020a170902eac6b0290128d5ed4d06mr11596150pld.77.1625473210948; Mon, 05 Jul 2021 01:20:10 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:10 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 09/17] counter: Move counter enums to uapi header Date: Mon, 5 Jul 2021 17:18:57 +0900 Message-Id: <2891870283e591a57b58fb0e47bb226c5fa0f7c9.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This is in preparation for a subsequent patch implementing a character device interface for the Counter subsystem. Reviewed-by: David Lechner Signed-off-by: William Breathitt Gray --- MAINTAINERS | 1 + include/linux/counter.h | 42 +-------------------------- include/uapi/linux/counter.h | 56 ++++++++++++++++++++++++++++++++++++ 3 files changed, 58 insertions(+), 41 deletions(-) create mode 100644 include/uapi/linux/counter.h diff --git a/MAINTAINERS b/MAINTAINERS index 2cac15216ba9..5de4d2164844 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4687,6 +4687,7 @@ F: Documentation/ABI/testing/sysfs-bus-counter F: Documentation/driver-api/generic-counter.rst F: drivers/counter/ F: include/linux/counter.h +F: include/uapi/linux/counter.h CP2615 I2C DRIVER M: Bence Csókás diff --git a/include/linux/counter.h b/include/linux/counter.h index e7fd6d81a929..eee85db8e332 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -9,6 +9,7 @@ #include #include #include +#include struct counter_device; struct counter_count; @@ -27,47 +28,6 @@ enum counter_comp_type { COUNTER_COMP_COUNT_MODE, }; -enum counter_scope { - COUNTER_SCOPE_DEVICE, - COUNTER_SCOPE_SIGNAL, - COUNTER_SCOPE_COUNT, -}; - -enum counter_count_direction { - COUNTER_COUNT_DIRECTION_FORWARD, - COUNTER_COUNT_DIRECTION_BACKWARD, -}; - -enum counter_count_mode { - COUNTER_COUNT_MODE_NORMAL, - COUNTER_COUNT_MODE_RANGE_LIMIT, - COUNTER_COUNT_MODE_NON_RECYCLE, - COUNTER_COUNT_MODE_MODULO_N, -}; - -enum counter_function { - COUNTER_FUNCTION_INCREASE, - COUNTER_FUNCTION_DECREASE, - COUNTER_FUNCTION_PULSE_DIRECTION, - COUNTER_FUNCTION_QUADRATURE_X1_A, - COUNTER_FUNCTION_QUADRATURE_X1_B, - COUNTER_FUNCTION_QUADRATURE_X2_A, - COUNTER_FUNCTION_QUADRATURE_X2_B, - COUNTER_FUNCTION_QUADRATURE_X4, -}; - -enum counter_signal_level { - COUNTER_SIGNAL_LEVEL_LOW, - COUNTER_SIGNAL_LEVEL_HIGH, -}; - -enum counter_synapse_action { - COUNTER_SYNAPSE_ACTION_NONE, - COUNTER_SYNAPSE_ACTION_RISING_EDGE, - COUNTER_SYNAPSE_ACTION_FALLING_EDGE, - COUNTER_SYNAPSE_ACTION_BOTH_EDGES, -}; - /** * struct counter_comp - Counter component node * @type: Counter component data type diff --git a/include/uapi/linux/counter.h b/include/uapi/linux/counter.h new file mode 100644 index 000000000000..6113938a6044 --- /dev/null +++ b/include/uapi/linux/counter.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Userspace ABI for Counter character devices + * Copyright (C) 2020 William Breathitt Gray + */ +#ifndef _UAPI_COUNTER_H_ +#define _UAPI_COUNTER_H_ + +/* Component scope definitions */ +enum counter_scope { + COUNTER_SCOPE_DEVICE, + COUNTER_SCOPE_SIGNAL, + COUNTER_SCOPE_COUNT, +}; + +/* Count direction values */ +enum counter_count_direction { + COUNTER_COUNT_DIRECTION_FORWARD, + COUNTER_COUNT_DIRECTION_BACKWARD, +}; + +/* Count mode values */ +enum counter_count_mode { + COUNTER_COUNT_MODE_NORMAL, + COUNTER_COUNT_MODE_RANGE_LIMIT, + COUNTER_COUNT_MODE_NON_RECYCLE, + COUNTER_COUNT_MODE_MODULO_N, +}; + +/* Count function values */ +enum counter_function { + COUNTER_FUNCTION_INCREASE, + COUNTER_FUNCTION_DECREASE, + COUNTER_FUNCTION_PULSE_DIRECTION, + COUNTER_FUNCTION_QUADRATURE_X1_A, + COUNTER_FUNCTION_QUADRATURE_X1_B, + COUNTER_FUNCTION_QUADRATURE_X2_A, + COUNTER_FUNCTION_QUADRATURE_X2_B, + COUNTER_FUNCTION_QUADRATURE_X4, +}; + +/* Signal values */ +enum counter_signal_level { + COUNTER_SIGNAL_LEVEL_LOW, + COUNTER_SIGNAL_LEVEL_HIGH, +}; + +/* Action mode values */ +enum counter_synapse_action { + COUNTER_SYNAPSE_ACTION_NONE, + COUNTER_SYNAPSE_ACTION_RISING_EDGE, + COUNTER_SYNAPSE_ACTION_FALLING_EDGE, + COUNTER_SYNAPSE_ACTION_BOTH_EDGES, +}; + +#endif /* _UAPI_COUNTER_H_ */ From patchwork Mon Jul 5 08:18:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358427 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89549C07E99 for ; Mon, 5 Jul 2021 08:20:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 73FA76128B for ; Mon, 5 Jul 2021 08:20:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230172AbhGEIW5 (ORCPT ); Mon, 5 Jul 2021 04:22:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54196 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230208AbhGEIWy (ORCPT ); Mon, 5 Jul 2021 04:22:54 -0400 Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2F26C061574; Mon, 5 Jul 2021 01:20:16 -0700 (PDT) Received: by mail-pg1-x531.google.com with SMTP id y17so17583864pgf.12; Mon, 05 Jul 2021 01:20:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xa34kM1lvgnGP8cPqHYAa0nkubZJ3HQvbou4GMc9QxQ=; b=NSGt0MlYTG1ijSOKIcKvseSDlx/zuI7kBAqzgBGrp3t6ydefqegD03MnN8mBYrMhDl 9v3wDyc1w9N1jhXMXElmg+Ycyb/XBB73fUG7heZMOQYMmP1nxarF6RGIx5LgT9iZamHl aI/3HvxeWxMLXgZWdZRAgLu81P1xk5gS3SVTjzeFSUNNb4nbUO1IlXGXkZHDqLquM0K4 0YBXT1cCWjPRvFvj5bgQ1mgwHt/05F8TaU7pCqbcR4l+MPM0ClWiiHo39zEDVodYEiJd NKiIGH8e8P2mF2OPxCdjzBazQF+5Ew3QAaeGLfFX+5XEuAh6xwFH7g2TbZHv5GF4E/0n 2HdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xa34kM1lvgnGP8cPqHYAa0nkubZJ3HQvbou4GMc9QxQ=; b=XRzg8SSPYyXZqwWjUxR/c8BIM6zxrA9xjon7b2D15+T6C2VOt+UlPGzAjIqbwIqkdG VAL6YpPq0xiersSTVTayLjFDr4ecLET1nEvt04MLhZPHXoCnRvrbE0pwKADPFz9u6LM6 lQwC3BRylW3h28XNJZ9LlxLKSiUHIUZyuiPxDIth7ZKlfEtunQoLz9V9uhKIUWa7QlBk e9hiu/k1mpwazrNLXP3wKsWueVbZElIS9dKKcoCP63HaC7EH4f//Z7+P2RNS20F9gSe/ jPGlIZh2Z3VgIQwkuIfIhIjGbiae7mhZS5oxfcHF22tSemF5YOun9oy0Hv8rIjgEnY0e StzA== X-Gm-Message-State: AOAM530pUUTT1uAK8cJ/20xiwaa7BUbZ57zwLzUQxQtVaoMUS92xcmTn WjH5eycb87WZddWBuECtSUs= X-Google-Smtp-Source: ABdhPJxc/hpQJtTT67sCNQd1BmELu1We3b8txPD58xTzgiBmIA5PuxcAhJ6hJVKPqezzW87pyZNDHQ== X-Received: by 2002:a05:6a00:1508:b029:30a:2b2:b2ea with SMTP id q8-20020a056a001508b029030a02b2b2eamr14127751pfu.30.1625473216156; Mon, 05 Jul 2021 01:20:16 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:15 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray , Dan Carpenter Subject: [PATCH v12 10/17] counter: Add character device interface Date: Mon, 5 Jul 2021 17:18:58 +0900 Message-Id: <10cf764604827dea1b842cfe7a3cd31ca8ef6539.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This patch introduces a character device interface for the Counter subsystem. Device data is exposed through standard character device read operations. Device data is gathered when a Counter event is pushed by the respective Counter device driver. Configuration is handled via ioctl operations on the respective Counter character device node. Cc: David Lechner Cc: Gwendal Grignou Cc: Dan Carpenter Cc: Oleksij Rempel Signed-off-by: William Breathitt Gray --- drivers/counter/Makefile | 2 +- drivers/counter/counter-chrdev.c | 494 +++++++++++++++++++++++++++++++ drivers/counter/counter-chrdev.h | 14 + drivers/counter/counter-core.c | 44 ++- include/linux/counter.h | 45 +++ include/uapi/linux/counter.h | 77 +++++ 6 files changed, 670 insertions(+), 6 deletions(-) create mode 100644 drivers/counter/counter-chrdev.c create mode 100644 drivers/counter/counter-chrdev.h diff --git a/drivers/counter/Makefile b/drivers/counter/Makefile index 1ab7e087fdc2..8fde6c100ebc 100644 --- a/drivers/counter/Makefile +++ b/drivers/counter/Makefile @@ -4,7 +4,7 @@ # obj-$(CONFIG_COUNTER) += counter.o -counter-y := counter-core.o counter-sysfs.o +counter-y := counter-core.o counter-sysfs.o counter-chrdev.o obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c new file mode 100644 index 000000000000..92805b1f65b8 --- /dev/null +++ b/drivers/counter/counter-chrdev.c @@ -0,0 +1,494 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Generic Counter character device interface + * Copyright (C) 2020 William Breathitt Gray + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "counter-chrdev.h" + +struct counter_comp_node { + struct list_head l; + struct counter_component component; + struct counter_comp comp; + void *parent; +}; + +static ssize_t counter_chrdev_read(struct file *filp, char __user *buf, + size_t len, loff_t *f_ps) +{ + struct counter_device *const counter = filp->private_data; + int err; + unsigned int copied; + + if (len < sizeof(struct counter_event)) + return -EINVAL; + + do { + if (kfifo_is_empty(&counter->events)) { + if (filp->f_flags & O_NONBLOCK) + return -EAGAIN; + + err = wait_event_interruptible(counter->events_wait, + !kfifo_is_empty(&counter->events)); + if (err < 0) + return err; + } + + if (mutex_lock_interruptible(&counter->events_lock)) + return -ERESTARTSYS; + err = kfifo_to_user(&counter->events, buf, len, &copied); + mutex_unlock(&counter->events_lock); + if (err < 0) + return err; + } while (!copied); + + return copied; +} + +static __poll_t counter_chrdev_poll(struct file *filp, + struct poll_table_struct *pollt) +{ + struct counter_device *const counter = filp->private_data; + __poll_t events = 0; + + poll_wait(filp, &counter->events_wait, pollt); + + if (!kfifo_is_empty(&counter->events)) + events = EPOLLIN | EPOLLRDNORM; + + return events; +} + +static void counter_events_list_free(struct list_head *const events_list) +{ + struct counter_event_node *p, *n; + struct counter_comp_node *q, *o; + + list_for_each_entry_safe(p, n, events_list, l) { + /* Free associated component nodes */ + list_for_each_entry_safe(q, o, &p->comp_list, l) { + list_del(&q->l); + kfree(q); + } + + /* Free event node */ + list_del(&p->l); + kfree(p); + } +} + +static int counter_set_event_node(struct counter_device *const counter, + struct counter_watch *const watch, + const struct counter_comp_node *const cfg) +{ + unsigned long flags; + struct counter_event_node *event_node; + int err = 0; + struct counter_comp_node *comp_node; + + spin_lock_irqsave(&counter->events_list_lock, flags); + + /* Search for event in the list */ + list_for_each_entry(event_node, &counter->next_events_list, l) + if (event_node->event == watch->event && + event_node->channel == watch->channel) + break; + + /* If event is not already in the list */ + if (&event_node->l == &counter->next_events_list) { + /* Allocate new event node */ + event_node = kmalloc(sizeof(*event_node), GFP_ATOMIC); + if (!event_node) { + err = -ENOMEM; + goto exit_early; + } + + /* Configure event node and add to the list */ + event_node->event = watch->event; + event_node->channel = watch->channel; + INIT_LIST_HEAD(&event_node->comp_list); + list_add(&event_node->l, &counter->next_events_list); + } + + /* Check if component watch has already been set before */ + list_for_each_entry(comp_node, &event_node->comp_list, l) + if (comp_node->parent == cfg->parent && + comp_node->comp.count_u8_read == cfg->comp.count_u8_read) { + err = -EINVAL; + goto exit_early; + } + + /* Allocate component node */ + comp_node = kmalloc(sizeof(*comp_node), GFP_ATOMIC); + if (!comp_node) { + /* Free event node if no one else is watching */ + if (list_empty(&event_node->comp_list)) { + list_del(&event_node->l); + kfree(event_node); + } + err = -ENOMEM; + goto exit_early; + } + *comp_node = *cfg; + + /* Add component node to event node */ + list_add_tail(&comp_node->l, &event_node->comp_list); + +exit_early: + spin_unlock_irqrestore(&counter->events_list_lock, flags); + + return err; +} + +static int counter_disable_events(struct counter_device *const counter) +{ + unsigned long flags; + int err = 0; + + spin_lock_irqsave(&counter->events_list_lock, flags); + + counter_events_list_free(&counter->events_list); + + if (counter->ops->events_configure) + err = counter->ops->events_configure(counter); + + spin_unlock_irqrestore(&counter->events_list_lock, flags); + + counter_events_list_free(&counter->next_events_list); + + return err; +} + +static int counter_add_watch(struct counter_device *const counter, + const unsigned long arg) +{ + void __user *const uwatch = (void __user *)arg; + struct counter_watch watch; + struct counter_comp_node comp_node = {}; + size_t parent, id; + struct counter_comp *ext; + size_t num_ext; + int err; + + if (copy_from_user(&watch, uwatch, sizeof(watch))) + return -EFAULT; + + if (watch.component.type == COUNTER_COMPONENT_NONE) + goto no_component; + + parent = watch.component.parent; + + /* Configure parent component info for comp node */ + switch (watch.component.scope) { + case COUNTER_SCOPE_DEVICE: + ext = counter->ext; + num_ext = counter->num_ext; + break; + case COUNTER_SCOPE_SIGNAL: + if (parent >= counter->num_signals) + return -EINVAL; + parent = array_index_nospec(parent, counter->num_signals); + + comp_node.parent = counter->signals + parent; + + ext = counter->signals[parent].ext; + num_ext = counter->signals[parent].num_ext; + break; + case COUNTER_SCOPE_COUNT: + if (parent >= counter->num_counts) + return -EINVAL; + parent = array_index_nospec(parent, counter->num_counts); + + comp_node.parent = counter->counts + parent; + + ext = counter->counts[parent].ext; + num_ext = counter->counts[parent].num_ext; + break; + default: + return -EINVAL; + } + + id = watch.component.id; + + /* Configure component info for comp node */ + switch (watch.component.type) { + case COUNTER_COMPONENT_SIGNAL: + if (watch.component.scope != COUNTER_SCOPE_SIGNAL) + return -EINVAL; + + comp_node.comp.type = COUNTER_COMP_SIGNAL_LEVEL; + comp_node.comp.signal_u32_read = counter->ops->signal_read; + break; + case COUNTER_COMPONENT_COUNT: + if (watch.component.scope != COUNTER_SCOPE_COUNT) + return -EINVAL; + + comp_node.comp.type = COUNTER_COMP_U64; + comp_node.comp.count_u64_read = counter->ops->count_read; + break; + case COUNTER_COMPONENT_FUNCTION: + if (watch.component.scope != COUNTER_SCOPE_COUNT) + return -EINVAL; + + comp_node.comp.type = COUNTER_COMP_FUNCTION; + comp_node.comp.count_u32_read = counter->ops->function_read; + break; + case COUNTER_COMPONENT_SYNAPSE_ACTION: + if (watch.component.scope != COUNTER_SCOPE_COUNT) + return -EINVAL; + if (id >= counter->counts[parent].num_synapses) + return -EINVAL; + id = array_index_nospec(id, counter->counts[parent].num_synapses); + + comp_node.comp.type = COUNTER_COMP_SYNAPSE_ACTION; + comp_node.comp.action_read = counter->ops->action_read; + comp_node.comp.priv = counter->counts[parent].synapses + id; + break; + case COUNTER_COMPONENT_EXTENSION: + if (id >= num_ext) + return -EINVAL; + id = array_index_nospec(id, num_ext); + + comp_node.comp = ext[id]; + break; + default: + return -EINVAL; + } + /* Check if any read callback is set; this is part of a union */ + if (!comp_node.comp.count_u8_read) + return -EOPNOTSUPP; + +no_component: + if (counter->ops->watch_validate) { + err = counter->ops->watch_validate(counter, &watch); + if (err < 0) + return err; + } + + comp_node.component = watch.component; + + return counter_set_event_node(counter, &watch, &comp_node); +} + +static long counter_chrdev_ioctl(struct file *filp, unsigned int cmd, + unsigned long arg) +{ + struct counter_device *const counter = filp->private_data; + unsigned long flags; + int err = 0; + + switch (cmd) { + case COUNTER_ADD_WATCH_IOCTL: + return counter_add_watch(counter, arg); + case COUNTER_ENABLE_EVENTS_IOCTL: + spin_lock_irqsave(&counter->events_list_lock, flags); + + counter_events_list_free(&counter->events_list); + list_replace_init(&counter->next_events_list, + &counter->events_list); + + if (counter->ops->events_configure) + err = counter->ops->events_configure(counter); + + spin_unlock_irqrestore(&counter->events_list_lock, flags); + return err; + case COUNTER_DISABLE_EVENTS_IOCTL: + return counter_disable_events(counter); + default: + return -ENOIOCTLCMD; + } +} + +static int counter_chrdev_open(struct inode *inode, struct file *filp) +{ + struct counter_device *const counter = container_of(inode->i_cdev, + typeof(*counter), + chrdev); + + get_device(&counter->dev); + filp->private_data = counter; + + return nonseekable_open(inode, filp); +} + +static int counter_chrdev_release(struct inode *inode, struct file *filp) +{ + struct counter_device *const counter = filp->private_data; + int err; + + err = counter_disable_events(counter); + if (err < 0) + return err; + + put_device(&counter->dev); + + return 0; +} + +static const struct file_operations counter_fops = { + .llseek = no_llseek, + .read = counter_chrdev_read, + .poll = counter_chrdev_poll, + .unlocked_ioctl = counter_chrdev_ioctl, + .open = counter_chrdev_open, + .release = counter_chrdev_release, +}; + +int counter_chrdev_add(struct counter_device *const counter) +{ + /* Initialize Counter events lists */ + INIT_LIST_HEAD(&counter->events_list); + INIT_LIST_HEAD(&counter->next_events_list); + spin_lock_init(&counter->events_list_lock); + init_waitqueue_head(&counter->events_wait); + mutex_init(&counter->events_lock); + + /* Initialize character device */ + cdev_init(&counter->chrdev, &counter_fops); + + /* Allocate Counter events queue */ + return kfifo_alloc(&counter->events, 64, GFP_ATOMIC); +} + +void counter_chrdev_remove(struct counter_device *const counter) +{ + kfifo_free(&counter->events); +} + +static int counter_get_data(struct counter_device *const counter, + const struct counter_comp_node *const comp_node, + u64 *const value) +{ + const struct counter_comp *const comp = &comp_node->comp; + void *const parent = comp_node->parent; + u8 value_u8 = 0; + u32 value_u32 = 0; + int ret; + + if (comp_node->component.type == COUNTER_COMPONENT_NONE) + return 0; + + switch (comp->type) { + case COUNTER_COMP_U8: + case COUNTER_COMP_BOOL: + switch (comp_node->component.scope) { + case COUNTER_SCOPE_DEVICE: + ret = comp->device_u8_read(counter, &value_u8); + break; + case COUNTER_SCOPE_SIGNAL: + ret = comp->signal_u8_read(counter, parent, &value_u8); + break; + case COUNTER_SCOPE_COUNT: + ret = comp->count_u8_read(counter, parent, &value_u8); + break; + } + *value = value_u8; + return ret; + case COUNTER_COMP_SIGNAL_LEVEL: + case COUNTER_COMP_FUNCTION: + case COUNTER_COMP_ENUM: + case COUNTER_COMP_COUNT_DIRECTION: + case COUNTER_COMP_COUNT_MODE: + switch (comp_node->component.scope) { + case COUNTER_SCOPE_DEVICE: + ret = comp->device_u32_read(counter, &value_u32); + break; + case COUNTER_SCOPE_SIGNAL: + ret = comp->signal_u32_read(counter, parent, + &value_u32); + break; + case COUNTER_SCOPE_COUNT: + ret = comp->count_u32_read(counter, parent, &value_u32); + break; + } + *value = value_u32; + return ret; + case COUNTER_COMP_U64: + switch (comp_node->component.scope) { + case COUNTER_SCOPE_DEVICE: + return comp->device_u64_read(counter, value); + case COUNTER_SCOPE_SIGNAL: + return comp->signal_u64_read(counter, parent, value); + case COUNTER_SCOPE_COUNT: + return comp->count_u64_read(counter, parent, value); + default: + return -EINVAL; + } + case COUNTER_COMP_SYNAPSE_ACTION: + ret = comp->action_read(counter, parent, comp->priv, + &value_u32); + *value = value_u32; + return ret; + default: + return -EINVAL; + } +} + +/** + * counter_push_event - queue event for userspace reading + * @counter: pointer to Counter structure + * @event: triggered event + * @channel: event channel + * + * Note: If no one is watching for the respective event, it is silently + * discarded. + */ +void counter_push_event(struct counter_device *const counter, const u8 event, + const u8 channel) +{ + struct counter_event ev = {}; + unsigned int copied = 0; + unsigned long flags; + struct counter_event_node *event_node; + struct counter_comp_node *comp_node; + + ev.timestamp = ktime_get_ns(); + ev.watch.event = event; + ev.watch.channel = channel; + + /* Could be in an interrupt context, so use a raw spin lock */ + spin_lock_irqsave(&counter->events_list_lock, flags); + + /* Search for event in the list */ + list_for_each_entry(event_node, &counter->events_list, l) + if (event_node->event == event && + event_node->channel == channel) + break; + + /* If event is not in the list */ + if (&event_node->l == &counter->events_list) + goto exit_early; + + /* Read and queue relevant comp for userspace */ + list_for_each_entry(comp_node, &event_node->comp_list, l) { + ev.watch.component = comp_node->component; + ev.status = -counter_get_data(counter, comp_node, &ev.value); + + copied += kfifo_in(&counter->events, &ev, 1); + } + + if (copied) + wake_up_poll(&counter->events_wait, EPOLLIN); + +exit_early: + spin_unlock_irqrestore(&counter->events_list_lock, flags); +} +EXPORT_SYMBOL_GPL(counter_push_event); diff --git a/drivers/counter/counter-chrdev.h b/drivers/counter/counter-chrdev.h new file mode 100644 index 000000000000..5529d16703c4 --- /dev/null +++ b/drivers/counter/counter-chrdev.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Counter character device interface + * Copyright (C) 2020 William Breathitt Gray + */ +#ifndef _COUNTER_CHRDEV_H_ +#define _COUNTER_CHRDEV_H_ + +#include + +int counter_chrdev_add(struct counter_device *const counter); +void counter_chrdev_remove(struct counter_device *const counter); + +#endif /* _COUNTER_CHRDEV_H_ */ diff --git a/drivers/counter/counter-core.c b/drivers/counter/counter-core.c index 9442e3b91468..dd7f3f69328e 100644 --- a/drivers/counter/counter-core.c +++ b/drivers/counter/counter-core.c @@ -3,14 +3,20 @@ * Generic Counter interface * Copyright (C) 2020 William Breathitt Gray */ +#include #include #include +#include #include +#include #include #include #include +#include #include +#include +#include "counter-chrdev.h" #include "counter-sysfs.h" /* Provides a unique ID for each counter device */ @@ -34,6 +40,8 @@ static struct bus_type counter_bus_type = { .dev_name = "counter", }; +static dev_t counter_devt; + /** * counter_register - register Counter to the system * @counter: pointer to Counter to register @@ -60,6 +68,7 @@ int counter_register(struct counter_device *const counter) dev->id = id; dev->type = &counter_device_type; dev->bus = &counter_bus_type; + dev->devt = MKDEV(MAJOR(counter_devt), id); if (counter->parent) { dev->parent = counter->parent; dev->of_node = counter->parent->of_node; @@ -67,18 +76,25 @@ int counter_register(struct counter_device *const counter) device_initialize(dev); dev_set_drvdata(dev, counter); + /* Add Counter character device */ + err = counter_chrdev_add(counter); + if (err < 0) + goto err_free_id; + /* Add Counter sysfs attributes */ err = counter_sysfs_add(counter); if (err < 0) - goto err_free_id; + goto err_remove_chrdev; /* Add device to system */ - err = device_add(dev); + err = cdev_device_add(&counter->chrdev, dev); if (err < 0) - goto err_free_id; + goto err_remove_chrdev; return 0; +err_remove_chrdev: + counter_chrdev_remove(counter); err_free_id: put_device(dev); return err; @@ -96,7 +112,8 @@ void counter_unregister(struct counter_device *const counter) if (!counter) return; - device_unregister(&counter->dev); + cdev_device_del(&counter->chrdev, &counter->dev); + put_device(&counter->dev); } EXPORT_SYMBOL_GPL(counter_unregister); @@ -130,13 +147,30 @@ int devm_counter_register(struct device *dev, } EXPORT_SYMBOL_GPL(devm_counter_register); +#define COUNTER_DEV_MAX 256 + static int __init counter_init(void) { - return bus_register(&counter_bus_type); + int err; + + err = bus_register(&counter_bus_type); + if (err < 0) + return err; + + err = alloc_chrdev_region(&counter_devt, 0, COUNTER_DEV_MAX, "counter"); + if (err < 0) + goto err_unregister_bus; + + return 0; + +err_unregister_bus: + bus_unregister(&counter_bus_type); + return err; } static void __exit counter_exit(void) { + unregister_chrdev_region(counter_devt, COUNTER_DEV_MAX); bus_unregister(&counter_bus_type); } diff --git a/include/linux/counter.h b/include/linux/counter.h index eee85db8e332..3f0bbe4ff702 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -6,9 +6,14 @@ #ifndef _COUNTER_H_ #define _COUNTER_H_ +#include #include #include +#include +#include +#include #include +#include #include struct counter_device; @@ -199,6 +204,20 @@ struct counter_count { size_t num_ext; }; +/** + * struct counter_event_node - Counter Event node + * @l: list of current watching Counter events + * @event: event that triggers + * @channel: event channel + * @comp_list: list of components to watch when event triggers + */ +struct counter_event_node { + struct list_head l; + u8 event; + u8 channel; + struct list_head comp_list; +}; + /** * struct counter_ops - Callbacks from driver * @signal_read: read callback for Signals. The read level of the @@ -221,6 +240,13 @@ struct counter_count { * @action_write: write callback for Synapse action modes. The action mode * to write for the respective Synapse is passed in via the * action parameter. + * @events_configure: write callback to configure events. The list of struct + * counter_event_node may be accessed via the events_list + * member of the counter parameter. + * @watch_validate: callback to validate a watch. The Counter component + * watch configuration is passed in via the watch + * parameter. A return value of 0 indicates a valid Counter + * component watch configuration. */ struct counter_ops { int (*signal_read)(struct counter_device *counter, @@ -244,6 +270,9 @@ struct counter_ops { struct counter_count *count, struct counter_synapse *synapse, enum counter_synapse_action action); + int (*events_configure)(struct counter_device *counter); + int (*watch_validate)(struct counter_device *counter, + const struct counter_watch *watch); }; /** @@ -259,6 +288,13 @@ struct counter_ops { * @num_ext: number of Counter device extensions specified in @ext * @priv: optional private data supplied by driver * @dev: internal device structure + * @chrdev: internal character device structure + * @events_list: list of current watching Counter events + * @events_list_lock: lock to protect Counter events list operations + * @next_events_list: list of next watching Counter events + * @events: queue of detected Counter events + * @events_wait: wait queue to allow blocking reads of Counter events + * @events_lock: lock to protect Counter events queue read operations */ struct counter_device { const char *name; @@ -277,12 +313,21 @@ struct counter_device { void *priv; struct device dev; + struct cdev chrdev; + struct list_head events_list; + spinlock_t events_list_lock; + struct list_head next_events_list; + DECLARE_KFIFO_PTR(events, struct counter_event); + wait_queue_head_t events_wait; + struct mutex events_lock; }; int counter_register(struct counter_device *const counter); void counter_unregister(struct counter_device *const counter); int devm_counter_register(struct device *dev, struct counter_device *const counter); +void counter_push_event(struct counter_device *const counter, const u8 event, + const u8 channel); #define COUNTER_COMP_DEVICE_U8(_name, _read, _write) \ { \ diff --git a/include/uapi/linux/counter.h b/include/uapi/linux/counter.h index 6113938a6044..e55dfc9de887 100644 --- a/include/uapi/linux/counter.h +++ b/include/uapi/linux/counter.h @@ -6,6 +6,19 @@ #ifndef _UAPI_COUNTER_H_ #define _UAPI_COUNTER_H_ +#include +#include + +/* Component type definitions */ +enum counter_component_type { + COUNTER_COMPONENT_NONE, + COUNTER_COMPONENT_SIGNAL, + COUNTER_COMPONENT_COUNT, + COUNTER_COMPONENT_FUNCTION, + COUNTER_COMPONENT_SYNAPSE_ACTION, + COUNTER_COMPONENT_EXTENSION, +}; + /* Component scope definitions */ enum counter_scope { COUNTER_SCOPE_DEVICE, @@ -13,6 +26,70 @@ enum counter_scope { COUNTER_SCOPE_COUNT, }; +/** + * struct counter_component - Counter component identification + * @type: component type (one of enum counter_component_type) + * @scope: component scope (one of enum counter_scope) + * @parent: parent ID (matching the ID suffix of the respective parent sysfs + * path as described by the ABI documentation file + * Documentation/ABI/testing/sysfs-bus-counter; e.g. if the component + * attribute path is /sys/bus/counter/devices/counter4/count2/count, + * the parent is count2 and thus parent ID is 2) + * @id: component ID (matching the ID provided by the respective *_component_id + * sysfs attribute of the desired component; for example, if the component + * attribute path is /sys/bus/counter/devices/counter4/count2/ceiling, the + * respective /sys/bus/counter/devices/counter4/count2/ceiling_component_id + * attribute will provide the necessary component ID) + * ) + */ +struct counter_component { + __u8 type; + __u8 scope; + __u8 parent; + __u8 id; +}; + +/* Event type definitions */ +enum counter_event_type { + COUNTER_EVENT_OVERFLOW, + COUNTER_EVENT_UNDERFLOW, + COUNTER_EVENT_OVERFLOW_UNDERFLOW, + COUNTER_EVENT_THRESHOLD, + COUNTER_EVENT_INDEX, +}; + +/** + * struct counter_watch - Counter component watch configuration + * @component: component to watch when event triggers + * @event: event that triggers (one of enum counter_event_type) + * @channel: event channel (typically 0 unless the device supports concurrent + * events of the same type) + */ +struct counter_watch { + struct counter_component component; + __u8 event; + __u8 channel; +}; + +/* ioctl commands */ +#define COUNTER_ADD_WATCH_IOCTL _IOW(0x3E, 0x00, struct counter_watch) +#define COUNTER_ENABLE_EVENTS_IOCTL _IO(0x3E, 0x01) +#define COUNTER_DISABLE_EVENTS_IOCTL _IO(0x3E, 0x02) + +/** + * struct counter_event - Counter event data + * @timestamp: best estimate of time of event occurrence, in nanoseconds + * @value: component value + * @watch: component watch configuration + * @status: return status (system error number) + */ +struct counter_event { + __aligned_u64 timestamp; + __aligned_u64 value; + struct counter_watch watch; + __u8 status; +}; + /* Count direction values */ enum counter_count_direction { COUNTER_COUNT_DIRECTION_FORWARD, From patchwork Mon Jul 5 08:18:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358429 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1671C07E98 for ; Mon, 5 Jul 2021 08:20:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CA6C46128B for ; Mon, 5 Jul 2021 08:20:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230239AbhGEIXA (ORCPT ); Mon, 5 Jul 2021 04:23:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230248AbhGEIW7 (ORCPT ); Mon, 5 Jul 2021 04:22:59 -0400 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86DB7C061764; Mon, 5 Jul 2021 01:20:21 -0700 (PDT) Received: by mail-pg1-x52d.google.com with SMTP id g22so17608955pgl.7; Mon, 05 Jul 2021 01:20:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NmCGQEco/c2Qxge73VA7yqOK4Qy2QVkfMpvqHDa9hK4=; b=i+7yPXSQ8stQ3dAqGLD2iuUUMNWblCGhdLMcIhsuQU711/X0Tf8BenkvkPx/nr6VVk e/3y7Fj/8Ze0Hw34eqUosHbevAXQAEY1674O2Y35WTdIIWEuo5vbv5JJ+Rtj3gW6lpmm QHQgyYPu0BgkuFJLV5DFrWcoh9jpV7ScxNJ6/GcwiDIoifVtytWLpK+cGnI+UIWURyGY rofsIiPqPO8xe7+olxpcrlksalV8xhTIlMX5p5wjctjmVJdtHMHLHESd0iZddRs0/3A4 kuc2o9tr6p3FgQu2IaB4b/3tXXw9fkXQG93og/E0uuGsX+tf04bIDPN1HsGPH6tCc6nq Irtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NmCGQEco/c2Qxge73VA7yqOK4Qy2QVkfMpvqHDa9hK4=; b=oyxY8HotoP/n+z7IUcH5C8/n1XbfhYJ0cnNFNnljq5N7N1QXX8rpn+t6TFZUPB4BeA VcQmg60753S2dsjfjJ0c5522xnoZjEMW3mcHNUedrabOr+l2xw48G5BdK6Alqud2YriP H/Ot1vjB5a2yRIsbMnBHPu2P+ETuytTPLu8GLA+EIC2prbhmVs3A5XMRCgSY/exv4HnE 4jna9Ezrq8grxmfz79x7/q0dN6TBYODuC2AdEc9QgM84WLLsm/5spHLSvSmgs+KNj+4j xNhAClUcB0tZfo+LXf17FKM/0H3/CInCxZP+oK67nDwllwkhrIKynxlLmqxo7xC+flWQ QKYA== X-Gm-Message-State: AOAM533gtKMxh/vVcZ4IUFhB5RpyshMJvntq2bduNDxiTSxvLgCp1eDe iralXJrjNtD6kElqYbBJhYU= X-Google-Smtp-Source: ABdhPJyBGOMpVgouBHvpoy/isWteZXUyBfRTaELYC9dGP1JnuAdaU6izEuNTzPKFW+9YE0OS2Tk8rA== X-Received: by 2002:a63:1214:: with SMTP id h20mr14144305pgl.355.1625473221113; Mon, 05 Jul 2021 01:20:21 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:20 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 11/17] docs: counter: Document character device interface Date: Mon, 5 Jul 2021 17:18:59 +0900 Message-Id: <186e7a1cd7dc822cc9290683b463c3e675959e1a.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This patch adds high-level documentation about the Counter subsystem character device interface. Signed-off-by: William Breathitt Gray --- Documentation/driver-api/generic-counter.rst | 185 ++++++++++++++---- .../userspace-api/ioctl/ioctl-number.rst | 1 + 2 files changed, 145 insertions(+), 41 deletions(-) diff --git a/Documentation/driver-api/generic-counter.rst b/Documentation/driver-api/generic-counter.rst index f6397218aa4c..62a702e7f994 100644 --- a/Documentation/driver-api/generic-counter.rst +++ b/Documentation/driver-api/generic-counter.rst @@ -223,19 +223,6 @@ whether an input line is differential or single-ended) and instead focus on the core idea of what the data and process represent (e.g. position as interpreted from quadrature encoding data). -Userspace Interface -=================== - -Several sysfs attributes are generated by the Generic Counter interface, -and reside under the /sys/bus/counter/devices/counterX directory, where -counterX refers to the respective counter device. Please see -Documentation/ABI/testing/sysfs-bus-counter for detailed -information on each Generic Counter interface sysfs attribute. - -Through these sysfs attributes, programs and scripts may interact with -the Generic Counter paradigm Counts, Signals, and Synapses of respective -counter devices. - Driver API ========== @@ -388,16 +375,16 @@ userspace interface components:: / driver callbacks / ------------------- | - +---------------+ - | - V - +--------------------+ - | Counter sysfs | - +--------------------+ - | Translates to the | - | standard Counter | - | sysfs output | - +--------------------+ + +---------------+---------------+ + | | + V V + +--------------------+ +---------------------+ + | Counter sysfs | | Counter chrdev | + +--------------------+ +---------------------+ + | Translates to the | | Translates to the | + | standard Counter | | standard Counter | + | sysfs output | | character device | + +--------------------+ +---------------------+ Thereafter, data can be transferred directly between the Counter device driver and Counter userspace interface:: @@ -428,23 +415,30 @@ driver and Counter userspace interface:: / u64 / ---------- | - +---------------+ - | - V - +--------------------+ - | Counter sysfs | - +--------------------+ - | Translates to the | - | standard Counter | - | sysfs output | - |--------------------| - | Type: const char * | - | Value: "42" | - +--------------------+ - | - --------------- - / const char * / - --------------- + +---------------+---------------+ + | | + V V + +--------------------+ +---------------------+ + | Counter sysfs | | Counter chrdev | + +--------------------+ +---------------------+ + | Translates to the | | Translates to the | + | standard Counter | | standard Counter | + | sysfs output | | character device | + |--------------------| |---------------------| + | Type: const char * | | Type: u64 | + | Value: "42" | | Value: 42 | + +--------------------+ +---------------------+ + | | + --------------- ----------------------- + / const char * / / struct counter_event / + --------------- ----------------------- + | | + | V + | +-----------+ + | | read | + | +-----------+ + | \ Count: 42 / + | ----------- | V +--------------------------------------------------+ @@ -453,7 +447,7 @@ driver and Counter userspace interface:: \ Count: "42" / -------------------------------------------------- -There are three primary components involved: +There are four primary components involved: Counter device driver --------------------- @@ -473,3 +467,112 @@ and vice versa. Please refer to the ``Documentation/ABI/testing/sysfs-bus-counter`` file for a detailed breakdown of the available Generic Counter interface sysfs attributes. + +Counter chrdev +-------------- +Translates counter data to the standard Counter character device; data +is transferred via standard character device read calls, while Counter +events are configured via ioctl calls. + +Sysfs Interface +=============== + +Several sysfs attributes are generated by the Generic Counter interface, +and reside under the ``/sys/bus/counter/devices/counterX`` directory, +where ``X`` is to the respective counter device id. Please see +``Documentation/ABI/testing/sysfs-bus-counter`` for detailed information +on each Generic Counter interface sysfs attribute. + +Through these sysfs attributes, programs and scripts may interact with +the Generic Counter paradigm Counts, Signals, and Synapses of respective +counter devices. + +Counter Character Device +======================== + +Counter character device nodes are created under the ``/dev`` directory +as ``counterX``, where ``X`` is the respective counter device id. +Defines for the standard Counter data types are exposed via the +userspace ``include/uapi/linux/counter.h`` file. + +Counter events +-------------- +Counter device drivers can support Counter events by utilizing the +``counter_push_event`` function:: + + void counter_push_event(struct counter_device *const counter, const u8 event, + const u8 channel); + +The event id is specified by the ``event`` parameter; the event channel +id is specified by the ``channel`` parameter. When this function is +called, the Counter data associated with the respective event is +gathered, and a ``struct counter_event`` is generated for each datum and +pushed to userspace. + +Counter events can be configured by users to report various Counter +data of interest. This can be conceptualized as a list of Counter +component read calls to perform. For example:: + + +~~~~~~~~~~~~~~~~~~~~~~~~+~~~~~~~~~~~~~~~~~~~~~~~~+ + | COUNTER_EVENT_OVERFLOW | COUNTER_EVENT_INDEX | + +~~~~~~~~~~~~~~~~~~~~~~~~+~~~~~~~~~~~~~~~~~~~~~~~~+ + | Channel 0 | Channel 0 | + +------------------------+------------------------+ + | * Count 0 | * Signal 0 | + | * Count 1 | * Signal 0 Extension 0 | + | * Signal 3 | * Extension 4 | + | * Count 4 Extension 2 +------------------------+ + | * Signal 5 Extension 0 | Channel 1 | + | +------------------------+ + | | * Signal 4 | + | | * Signal 4 Extension 0 | + | | * Count 7 | + +------------------------+------------------------+ + +When ``counter_push_event(counter, COUNTER_EVENT_INDEX, 1)`` is called +for example, it will go down the list for the ``COUNTER_EVENT_INDEX`` +event channel 1 and execute the read callbacks for Signal 4, Signal 4 +Extension 0, and Count 4 -- the data returned for each is pushed to a +kfifo as a ``struct counter_event``, which userspace can retrieve via a +standard read operation on the respective character device node. + +Userspace +--------- +Userspace applications can configure Counter events via ioctl operations +on the Counter character device node. There following ioctl codes are +supported and provided by the ``linux/counter.h`` userspace header file: + +* COUNTER_ADD_WATCH_IOCTL: + Queues a Counter watch for the specified event. The queued watches + will not be applied until ``COUNTER_ENABLE_EVENTS_IOCTL`` is called. + +* COUNTER_ENABLE_EVENTS_IOCTL: + Enables monitoring the events specified by the Counter watches that + were queued by ``COUNTER_ADD_WATCH_IOCTL``. If events are already + enabled, the new set of watches replaces the old one. Calling this + ioctl also has the effect of clearing the queue of watches added by + ``COUNTER_ADD_WATCH_IOCTL``. + +* COUNTER_DISABLE_EVENTS_IOCTL: + Stops monitoring the previously enabled events. + +To configure events to gather Counter data, users first populate a +``struct counter_watch`` with the relevant event id, event channel id, +and the information for the desired Counter component from which to +read, and then pass it via the ``COUNTER_ADD_WATCH_IOCTL`` ioctl +command. + +Note that an event can be watched without gathering Counter data by +setting the ``component.type`` member equal to +``COUNTER_COMPONENT_NONE``. With this configuration the Counter +character device will simply populate the event timestamps for those +respective ``struct counter_event`` elements and ignore the component +value. + +The ``COUNTER_ADD_WATCH_IOCTL`` command will buffer these Counter +watches. When ready, the ``COUNTER_ENABLE_EVENTS_IOCTL`` ioctl command +may be used to activate these Counter watches. + +Userspace applications can then execute a ``read`` operation (optionally +calling ``poll`` first) on the Counter character device node to retrieve +``struct counter_event`` elements with the desired data. diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst index 9bfc2b510c64..cad12ae3f945 100644 --- a/Documentation/userspace-api/ioctl/ioctl-number.rst +++ b/Documentation/userspace-api/ioctl/ioctl-number.rst @@ -88,6 +88,7 @@ Code Seq# Include File Comments 0x20 all drivers/cdrom/cm206.h 0x22 all scsi/sg.h +0x3E 00-0F linux/counter.h '!' 00-1F uapi/linux/seccomp.h '#' 00-3F IEEE 1394 Subsystem Block for the entire subsystem From patchwork Mon Jul 5 08:19:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358431 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D79EC07E98 for ; Mon, 5 Jul 2021 08:20:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 85F0B613C8 for ; Mon, 5 Jul 2021 08:20:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230256AbhGEIXF (ORCPT ); Mon, 5 Jul 2021 04:23:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230234AbhGEIXD (ORCPT ); Mon, 5 Jul 2021 04:23:03 -0400 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC5C7C061574; Mon, 5 Jul 2021 01:20:26 -0700 (PDT) Received: by mail-pf1-x436.google.com with SMTP id i184so3066489pfc.12; Mon, 05 Jul 2021 01:20:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WEoXEwgX5iWWo/dnp2VsT56S/+tcKKvLnwPVhmJvS8w=; b=j8c20pFT+e80fe7K162YBeaqnrqwYY+02/uvywvvg4nRmmeVU3DAW5PuSrf5nFkq5a vW9jHNPOeD0cx2yVMP3byMd6aqVpX3bStcXL1z9xbi82XUUpmMDzM8Q6UEH/4FxpHmPw b21UOJJyR6SMLqOXoRkTxqEi4mLT3Ynr1jzxIjvKp/bs8M2s4MN6En9ltKxmBJIDslHz J7dRv4zsJhUhvjriX5CCL8uDsS6aNfiXNvbsqyow3dWIbsjUekKoDtKrWjqfm593ZjE7 l6VOAu1cyykoJEI2HTng27VW8YXM/5rrpi/zJlLQ/n5BAeketso1Sfp6LW2GXEL/LaM9 JCCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WEoXEwgX5iWWo/dnp2VsT56S/+tcKKvLnwPVhmJvS8w=; b=Rinbe0eQ7OukYcG3G2hTd0OQ4Y7qvQbPRhMge1NSrTePv9vCEYJiKcY580lSvNlYsf QTDcxjqETe7AvRYg9NZSC7F0OSnA5Uj+Px+6hx8GhO7f3c+YtwNaBCwCul+2iZYQJT9B BHd8s2G9dQRFKsOmMjqAZPbUEABQua521Nkv6g3a7xXBPqAhHQ749W1oHIb5kgCgKkF3 W/OXY4q2IHarhJUmaJUFWRIQ1lqBR3vWioA5rraErsGxm91cy1QU0Uu9Zdo6d698Bt7j Lc+r+M0cFyCkcG0VmqUTcKH979Ly2wacDYJ+PNr6VKYK9N8aWQh69qU3Thn6jpUq61oJ WS1w== X-Gm-Message-State: AOAM533FMivmmUE46R0Q0SScBhXPhM7xtQ8NxuSHWMJi/UGKF095fTEK rncT8vUSgptl8g8G0+IXVcg= X-Google-Smtp-Source: ABdhPJxN9QAOAXIr9SXGd6GyaqaCWGkt5uKOJs/UgwHDgeJY4IxXI+AgIG3MXQtITzOF/4kYGXno6w== X-Received: by 2002:a63:4c19:: with SMTP id z25mr14446284pga.160.1625473226326; Mon, 05 Jul 2021 01:20:26 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:25 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray , Pavel Machek Subject: [PATCH v12 12/17] tools/counter: Create Counter tools Date: Mon, 5 Jul 2021 17:19:00 +0900 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This creates an example Counter program under tools/counter/* to exemplify the Counter character device interface. Cc: Pavel Machek Signed-off-by: William Breathitt Gray --- MAINTAINERS | 1 + tools/Makefile | 13 ++--- tools/counter/Build | 1 + tools/counter/Makefile | 53 ++++++++++++++++++ tools/counter/counter_example.c | 95 +++++++++++++++++++++++++++++++++ 5 files changed, 157 insertions(+), 6 deletions(-) create mode 100644 tools/counter/Build create mode 100644 tools/counter/Makefile create mode 100644 tools/counter/counter_example.c diff --git a/MAINTAINERS b/MAINTAINERS index 5de4d2164844..e96797f57f04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4688,6 +4688,7 @@ F: Documentation/driver-api/generic-counter.rst F: drivers/counter/ F: include/linux/counter.h F: include/uapi/linux/counter.h +F: tools/counter/ CP2615 I2C DRIVER M: Bence Csókás diff --git a/tools/Makefile b/tools/Makefile index 7e9d34ddd74c..4c26400ffc03 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -12,6 +12,7 @@ help: @echo ' acpi - ACPI tools' @echo ' bpf - misc BPF tools' @echo ' cgroup - cgroup tools' + @echo ' counter - Counter tools' @echo ' cpupower - a tool for all things x86 CPU power' @echo ' debugging - tools for debugging' @echo ' firewire - the userspace part of nosy, an IEEE-1394 traffic sniffer' @@ -65,7 +66,7 @@ acpi: FORCE cpupower: FORCE $(call descend,power/$@) -cgroup firewire hv guest bootconfig spi usb virtio vm bpf iio gpio objtool leds wmi pci firmware debugging tracing: FORCE +cgroup counter firewire hv guest bootconfig spi usb virtio vm bpf iio gpio objtool leds wmi pci firmware debugging tracing: FORCE $(call descend,$@) bpf/%: FORCE @@ -100,7 +101,7 @@ freefall: FORCE kvm_stat: FORCE $(call descend,kvm/$@) -all: acpi cgroup cpupower gpio hv firewire liblockdep \ +all: acpi cgroup counter cpupower gpio hv firewire liblockdep \ perf selftests bootconfig spi turbostat usb \ virtio vm bpf x86_energy_perf_policy \ tmon freefall iio objtool kvm_stat wmi \ @@ -112,7 +113,7 @@ acpi_install: cpupower_install: $(call descend,power/$(@:_install=),install) -cgroup_install firewire_install gpio_install hv_install iio_install perf_install bootconfig_install spi_install usb_install virtio_install vm_install bpf_install objtool_install wmi_install pci_install debugging_install tracing_install: +cgroup_install counter_install firewire_install gpio_install hv_install iio_install perf_install bootconfig_install spi_install usb_install virtio_install vm_install bpf_install objtool_install wmi_install pci_install debugging_install tracing_install: $(call descend,$(@:_install=),install) liblockdep_install: @@ -133,7 +134,7 @@ freefall_install: kvm_stat_install: $(call descend,kvm/$(@:_install=),install) -install: acpi_install cgroup_install cpupower_install gpio_install \ +install: acpi_install cgroup_install counter_install cpupower_install gpio_install \ hv_install firewire_install iio_install liblockdep_install \ perf_install selftests_install turbostat_install usb_install \ virtio_install vm_install bpf_install x86_energy_perf_policy_install \ @@ -147,7 +148,7 @@ acpi_clean: cpupower_clean: $(call descend,power/cpupower,clean) -cgroup_clean hv_clean firewire_clean bootconfig_clean spi_clean usb_clean virtio_clean vm_clean wmi_clean bpf_clean iio_clean gpio_clean objtool_clean leds_clean pci_clean firmware_clean debugging_clean tracing_clean: +cgroup_clean counter_clean hv_clean firewire_clean bootconfig_clean spi_clean usb_clean virtio_clean vm_clean wmi_clean bpf_clean iio_clean gpio_clean objtool_clean leds_clean pci_clean firmware_clean debugging_clean tracing_clean: $(call descend,$(@:_clean=),clean) liblockdep_clean: @@ -181,7 +182,7 @@ freefall_clean: build_clean: $(call descend,build,clean) -clean: acpi_clean cgroup_clean cpupower_clean hv_clean firewire_clean \ +clean: acpi_clean cgroup_clean counter_clean cpupower_clean hv_clean firewire_clean \ perf_clean selftests_clean turbostat_clean bootconfig_clean spi_clean usb_clean virtio_clean \ vm_clean bpf_clean iio_clean x86_energy_perf_policy_clean tmon_clean \ freefall_clean build_clean libbpf_clean libsubcmd_clean liblockdep_clean \ diff --git a/tools/counter/Build b/tools/counter/Build new file mode 100644 index 000000000000..33f4a51d715e --- /dev/null +++ b/tools/counter/Build @@ -0,0 +1 @@ +counter_example-y += counter_example.o diff --git a/tools/counter/Makefile b/tools/counter/Makefile new file mode 100644 index 000000000000..5ebc195fd9c0 --- /dev/null +++ b/tools/counter/Makefile @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0 +include ../scripts/Makefile.include + +bindir ?= /usr/bin + +ifeq ($(srctree),) +srctree := $(patsubst %/,%,$(dir $(CURDIR))) +srctree := $(patsubst %/,%,$(dir $(srctree))) +endif + +# Do not use make's built-in rules +# (this improves performance and avoids hard-to-debug behaviour); +MAKEFLAGS += -r + +override CFLAGS += -O2 -Wall -g -D_GNU_SOURCE -I$(OUTPUT)include + +ALL_TARGETS := counter_example +ALL_PROGRAMS := $(patsubst %,$(OUTPUT)%,$(ALL_TARGETS)) + +all: $(ALL_PROGRAMS) + +export srctree OUTPUT CC LD CFLAGS +include $(srctree)/tools/build/Makefile.include + +# +# We need the following to be outside of kernel tree +# +$(OUTPUT)include/linux/counter.h: ../../include/uapi/linux/counter.h + mkdir -p $(OUTPUT)include/linux 2>&1 || true + ln -sf $(CURDIR)/../../include/uapi/linux/counter.h $@ + +prepare: $(OUTPUT)include/linux/counter.h + +COUNTER_EXAMPLE := $(OUTPUT)counter_example.o +$(COUNTER_EXAMPLE): prepare FORCE + $(Q)$(MAKE) $(build)=counter_example +$(OUTPUT)counter_example: $(COUNTER_EXAMPLE) + $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $< -o $@ + +clean: + rm -f $(ALL_PROGRAMS) + rm -rf $(OUTPUT)include/linux/counter.h + find $(if $(OUTPUT),$(OUTPUT),.) -name '*.o' -delete -o -name '\.*.d' -delete + +install: $(ALL_PROGRAMS) + install -d -m 755 $(DESTDIR)$(bindir); \ + for program in $(ALL_PROGRAMS); do \ + install $$program $(DESTDIR)$(bindir); \ + done + +FORCE: + +.PHONY: all install clean FORCE prepare diff --git a/tools/counter/counter_example.c b/tools/counter/counter_example.c new file mode 100644 index 000000000000..71dfec673c11 --- /dev/null +++ b/tools/counter/counter_example.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Counter - example userspace application + * + * The userspace application opens /dev/counter0, configures the + * COUNTER_EVENT_INDEX event channel 0 to gather Count 0 count and Count + * 1 count, and prints out the data as it becomes available on the + * character device node. + * + * Copyright (C) 2021 William Breathitt Gray + */ +#include +#include +#include +#include +#include +#include +#include + +struct counter_watch watches[2] = { + { + /* Component data: Count 0 count */ + .component.type = COUNTER_COMPONENT_COUNT, + .component.scope = COUNTER_SCOPE_COUNT, + .component.parent = 0, + /* Event type: Index */ + .event = COUNTER_EVENT_INDEX, + /* Device event channel 0 */ + .channel = 0, + }, + { + /* Component data: Count 1 count */ + .component.type = COUNTER_COMPONENT_COUNT, + .component.scope = COUNTER_SCOPE_COUNT, + .component.parent = 1, + /* Event type: Index */ + .event = COUNTER_EVENT_INDEX, + /* Device event channel 0 */ + .channel = 0, + }, +}; + +int main(void) +{ + int fd; + int ret; + struct counter_event event_data[2]; + + fd = open("/dev/counter0", O_RDWR); + if (fd == -1) { + perror("Unable to open /dev/counter0"); + return -errno; + } + + ret = ioctl(fd, COUNTER_ADD_WATCH_IOCTL, watches); + if (ret == -1) { + perror("Error adding watches[0]"); + return -errno; + } + ret = ioctl(fd, COUNTER_ADD_WATCH_IOCTL, watches + 1); + if (ret == -1) { + perror("Error adding watches[1]"); + return -errno; + } + ret = ioctl(fd, COUNTER_ENABLE_EVENTS_IOCTL); + if (ret == -1) { + perror("Error enabling events"); + return -errno; + } + + for (;;) { + ret = read(fd, event_data, sizeof(event_data)); + if (ret == -1) { + perror("Failed to read event data"); + return -errno; + } + + if (ret != sizeof(event_data)) { + fprintf(stderr, "Failed to read event data\n"); + return -EIO; + } + + printf("Timestamp 0: %llu\tCount 0: %llu\n" + "Error Message 0: %s\n" + "Timestamp 1: %llu\tCount 1: %llu\n" + "Error Message 1: %s\n", + (unsigned long long)event_data[0].timestamp, + (unsigned long long)event_data[0].value, + strerror(event_data[0].status), + (unsigned long long)event_data[1].timestamp, + (unsigned long long)event_data[1].value, + strerror(event_data[1].status)); + } + + return 0; +} From patchwork Mon Jul 5 08:19:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358433 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FF14C07E98 for ; Mon, 5 Jul 2021 08:20:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 57C346128B for ; Mon, 5 Jul 2021 08:20:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230101AbhGEIXJ (ORCPT ); Mon, 5 Jul 2021 04:23:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230248AbhGEIXI (ORCPT ); Mon, 5 Jul 2021 04:23:08 -0400 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E36EEC061574; Mon, 5 Jul 2021 01:20:31 -0700 (PDT) Received: by mail-pj1-x1034.google.com with SMTP id b14-20020a17090a7aceb029017261c7d206so8290645pjl.5; Mon, 05 Jul 2021 01:20:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=19qNksG3pa57GXuH7o9u4eMtasQffXDZRLPl8079NZc=; b=C2v0XNBOjPHtRXzsMG/CkTGP4HlXIOO5rA2U+wqtQGtDpyK71SgVm6XA1wwK+w5Cn0 nZeT5fNgukYWU1/tQaSd9eLM1qSYOjQlb9naBmVErGG3gLqv1qIWJUx6oCy0j8B+Zkdt NbVzFPEqcPUqSd+ue9EXydHOShSP0UKlNh1JJH8nUvErsGrIDbqP0Hn78zywq1jPvnHZ ZDgNqPC9nC+CosTd7yVGvpI7MLiLdrQa8zzAYWGHm5m19qKi8hLershHmPD4IKLAbef1 0/2sA+jG/IE2VA1OmBg9N97r2fPikMGKBFCk886TabbII4gFtgwqJQkw1dCtxVSk/7Ul i0vA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=19qNksG3pa57GXuH7o9u4eMtasQffXDZRLPl8079NZc=; b=jdSwv5PIeDquz02NwgdmRJH1/DlH9YpRWpn5f+0LKXQidC1kNWI+7nH43q62ocOLzF Y9WvW0DzUly0NRJzXhzlGmU1hD+QMr60j1IrH//mwXpFmDn3tWdlGg9nO7GbOAlAQkG6 gUtres/np40u0SKn6+hSAOeBBmyWtSNkYkU9vEWIWInNw4wtnj3nV7a5DxPjP8K6dueY MZTa7pYNqp6rbCmT68uvqpfGM1VTiLXOJbSbHG110LT/4hdm09lQ2FvWjDJhY8YvAXrH tTwo0zr3H9RXcelReap10veMvLRQo6LZ/T1GSgAy+g0hONq+7uGTr8n7QBVqlsIEPwmy 9Qvg== X-Gm-Message-State: AOAM531IeuB16ihucDZPJQNmaCbVgS8TRkZFoueRIfMjzlUTiVS8j1DO TiRtZrI1qxVmGwbeG5W5c1s= X-Google-Smtp-Source: ABdhPJzWzeNQTmMBqUqK131AtbTR2wxqO1FajJEp6WAeWyl3ugWYQ5QRCVnGkGji2B5VlXgGQYXDuA== X-Received: by 2002:a17:902:b7c2:b029:128:c1cd:241e with SMTP id v2-20020a170902b7c2b0290128c1cd241emr11604678plz.14.1625473231528; Mon, 05 Jul 2021 01:20:31 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:31 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray , Dan Carpenter Subject: [PATCH v12 13/17] counter: Implement signalZ_action_component_id sysfs attribute Date: Mon, 5 Jul 2021 17:19:01 +0900 Message-Id: <472b3f1cce1bbfedd2031cdb70d0348f3802e821.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Generic Counter chrdev interface expects users to supply component IDs in order to select Synapses for requests. In order for users to know what component ID belongs to which Synapse this information must be exposed. The signalZ_action_component_id attribute provides a way for users to discover what component ID belongs to the respective Synapse. Cc: David Lechner Cc: Gwendal Grignou Cc: Dan Carpenter Signed-off-by: William Breathitt Gray Reviewed-by: David Lechner --- Documentation/ABI/testing/sysfs-bus-counter | 7 ++++ drivers/counter/counter-sysfs.c | 45 +++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index dee79b606847..9809d8a47431 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -203,6 +203,13 @@ Description: both edges: Any state transition. +What: /sys/bus/counter/devices/counterX/countY/signalZ_action_component_id +KernelVersion: 5.15 +Contact: linux-iio@vger.kernel.org +Description: + Read-only attribute that indicates the component ID of the + respective Synapse of Count Y for Signal Z. + What: /sys/bus/counter/devices/counterX/countY/spike_filter_ns KernelVersion: 5.14 Contact: linux-iio@vger.kernel.org diff --git a/drivers/counter/counter-sysfs.c b/drivers/counter/counter-sysfs.c index 07588130600a..bb49a10f160b 100644 --- a/drivers/counter/counter-sysfs.c +++ b/drivers/counter/counter-sysfs.c @@ -533,6 +533,46 @@ static int counter_name_attr_create(struct device *const dev, return 0; } +static ssize_t counter_comp_id_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + const size_t id = (size_t)to_counter_attribute(attr)->comp.priv; + + return sprintf(buf, "%zu\n", id); +} + +static int counter_comp_id_attr_create(struct device *const dev, + struct counter_attribute_group *const group, + const char *name, const size_t id) +{ + struct counter_attribute *counter_attr; + + /* Allocate Counter attribute */ + counter_attr = devm_kzalloc(dev, sizeof(*counter_attr), GFP_KERNEL); + if (!counter_attr) + return -ENOMEM; + + /* Generate component ID name */ + name = devm_kasprintf(dev, GFP_KERNEL, "%s_component_id", name); + if (!name) + return -ENOMEM; + + /* Configure Counter attribute */ + counter_attr->comp.priv = (void *)id; + + /* Configure device attribute */ + sysfs_attr_init(&counter_attr->dev_attr.attr); + counter_attr->dev_attr.attr.name = name; + counter_attr->dev_attr.attr.mode = 0444; + counter_attr->dev_attr.show = counter_comp_id_show; + + /* Store list node */ + list_add(&counter_attr->l, &group->attr_list); + group->num_attr++; + + return 0; +} + static struct counter_comp counter_signal_comp = { .type = COUNTER_COMP_SIGNAL_LEVEL, .name = "signal", @@ -627,6 +667,11 @@ static int counter_sysfs_synapses_add(struct counter_device *const counter, COUNTER_SCOPE_COUNT, count); if (err < 0) return err; + + /* Create Synapse component ID attribute */ + err = counter_comp_id_attr_create(dev, group, comp.name, i); + if (err < 0) + return err; } return 0; From patchwork Mon Jul 5 08:19:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358435 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE663C07E98 for ; Mon, 5 Jul 2021 08:20:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BD03F6128B for ; Mon, 5 Jul 2021 08:20:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230282AbhGEIXT (ORCPT ); Mon, 5 Jul 2021 04:23:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230312AbhGEIXO (ORCPT ); Mon, 5 Jul 2021 04:23:14 -0400 Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F516C061760; Mon, 5 Jul 2021 01:20:37 -0700 (PDT) Received: by mail-pf1-x429.google.com with SMTP id f17so4525700pfj.8; Mon, 05 Jul 2021 01:20:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aCuW7jGka7YaAB6OGVNNNB5YUCrDqMyCoehChrk05rk=; b=Iz5HZaRHXG+ZKsWQlHa/YTOi1fSkwnchI5ov1WcBJEuGvmenw47v+oMpV+xzmnz+D9 29YxZ2cgbH8fAhy0K1EYuVOcvpsgJ+6PqOxFDEOhGn1GHfdGRvsWIrxZRp5cV+FQUMkp EPtBx9zDI732RFKToJrzxJD4KHjMGUa2Zf+jjKL0ivOoobguhwMYquqi7y2l48MjCMw7 veWGXUXNpiCgX3mnL3VUD2wwUM3aAR/T+CpcBvco/ovJqHnQcqVwFshWfLum1qbZC1pk EPM88A41K66pkOkgoEvR8c8bQIN331n7LObcVUKkXnAHJMeV3cY1j9lvxRwipgDkySmI 91YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aCuW7jGka7YaAB6OGVNNNB5YUCrDqMyCoehChrk05rk=; b=dSfgAdt/lY9q2DAoOwBKhcc8vdJWZSnmWGu+An+YjZhOoLbUn2KTmcx1LtBGedG3RL byy7jKAhzXlwxA+YbPw8S+nn0Ag9W1KYoX9spJMCHiU9s1ZUvT3CDTgJzM9+Ff1e4ucg S1HE/AFdGOaDwmknNyQzEox22Yy3nLpAyY1Gjzsp/IZdEhesMFQubj9ekp0ePwLZl6qS B47didvkIf+1cxpuXG0+GzobGVAZiASq/yein6lf+ov9BYUZXV0z0qCIi3+TU3/aJ5Fa hSaj0PRY7y46L1ZFB0uDgWOYN+3kbtDGPJmB/Y9ywxK7TQVENqRw4QtGvgSQy4bRxV4s ILKg== X-Gm-Message-State: AOAM533ADUJtSpzo7UsnSFDD8LhWdSPLP4CTI2YO86BEcvhE//iXbgVN 0MxtUh1Cm4crLMvbosTSn40= X-Google-Smtp-Source: ABdhPJz8tIldCp8sx5EP1phU9dJqsp6hnuME1dktJHajuC/FiNhAjVHF8raNcC/yPJ6RpjpEBIBgTA== X-Received: by 2002:a62:5105:0:b029:305:324:17ae with SMTP id f5-20020a6251050000b0290305032417aemr14182068pfb.28.1625473236786; Mon, 05 Jul 2021 01:20:36 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:36 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray , Dan Carpenter Subject: [PATCH v12 14/17] counter: Implement *_component_id sysfs attributes Date: Mon, 5 Jul 2021 17:19:02 +0900 Message-Id: <0e04a9e6455faf171e5dd7885676e55b5321b1ea.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The Generic Counter chrdev interface expects users to supply component IDs in order to select extensions for requests. In order for users to know what component ID belongs to which extension this information must be exposed. The *_component_id attribute provides a way for users to discover what component ID belongs to which respective extension. Cc: David Lechner Cc: Gwendal Grignou Cc: Dan Carpenter Signed-off-by: William Breathitt Gray --- Documentation/ABI/testing/sysfs-bus-counter | 16 ++++++++++- drivers/counter/counter-sysfs.c | 30 ++++++++++++++++----- 2 files changed, 39 insertions(+), 7 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 9809d8a47431..e0e99adb0ecc 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -203,12 +203,26 @@ Description: both edges: Any state transition. +What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id +What: /sys/bus/counter/devices/counterX/countY/floor_component_id +What: /sys/bus/counter/devices/counterX/countY/count_mode_component_id +What: /sys/bus/counter/devices/counterX/countY/direction_component_id +What: /sys/bus/counter/devices/counterX/countY/enable_component_id +What: /sys/bus/counter/devices/counterX/countY/error_noise_component_id +What: /sys/bus/counter/devices/counterX/countY/prescaler_component_id +What: /sys/bus/counter/devices/counterX/countY/preset_component_id +What: /sys/bus/counter/devices/counterX/countY/preset_enable_component_id What: /sys/bus/counter/devices/counterX/countY/signalZ_action_component_id +What: /sys/bus/counter/devices/counterX/signalY/cable_fault_component_id +What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id +What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id +What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id +What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id KernelVersion: 5.15 Contact: linux-iio@vger.kernel.org Description: Read-only attribute that indicates the component ID of the - respective Synapse of Count Y for Signal Z. + respective extension or Synapse. What: /sys/bus/counter/devices/counterX/countY/spike_filter_ns KernelVersion: 5.14 diff --git a/drivers/counter/counter-sysfs.c b/drivers/counter/counter-sysfs.c index bb49a10f160b..eb1505bfbd89 100644 --- a/drivers/counter/counter-sysfs.c +++ b/drivers/counter/counter-sysfs.c @@ -587,6 +587,7 @@ static int counter_signal_attrs_create(struct counter_device *const counter, int err; struct counter_comp comp; size_t i; + struct counter_comp *ext; /* Create main Signal attribute */ comp = counter_signal_comp; @@ -602,8 +603,13 @@ static int counter_signal_attrs_create(struct counter_device *const counter, /* Create an attribute for each extension */ for (i = 0; i < signal->num_ext; i++) { - err = counter_attr_create(dev, group, signal->ext + i, scope, - signal); + ext = signal->ext + i; + + err = counter_attr_create(dev, group, ext, scope, signal); + if (err < 0) + return err; + + err = counter_comp_id_attr_create(dev, group, ext->name, i); if (err < 0) return err; } @@ -694,6 +700,7 @@ static int counter_count_attrs_create(struct counter_device *const counter, int err; struct counter_comp comp; size_t i; + struct counter_comp *ext; /* Create main Count attribute */ comp = counter_count_comp; @@ -718,8 +725,13 @@ static int counter_count_attrs_create(struct counter_device *const counter, /* Create an attribute for each extension */ for (i = 0; i < count->num_ext; i++) { - err = counter_attr_create(dev, group, count->ext + i, scope, - count); + ext = count->ext + i; + + err = counter_attr_create(dev, group, ext, scope, count); + if (err < 0) + return err; + + err = counter_comp_id_attr_create(dev, group, ext->name, i); if (err < 0) return err; } @@ -783,6 +795,7 @@ static int counter_sysfs_attr_add(struct counter_device *const counter, struct device *const dev = &counter->dev; int err; size_t i; + struct counter_comp *ext; /* Add Signals sysfs attributes */ err = counter_sysfs_signals_add(counter, group); @@ -815,8 +828,13 @@ static int counter_sysfs_attr_add(struct counter_device *const counter, /* Create an attribute for each extension */ for (i = 0; i < counter->num_ext; i++) { - err = counter_attr_create(dev, group, counter->ext + i, scope, - NULL); + ext = counter->ext + i; + + err = counter_attr_create(dev, group, ext, scope, NULL); + if (err < 0) + return err; + + err = counter_comp_id_attr_create(dev, group, ext->name, i); if (err < 0) return err; } From patchwork Mon Jul 5 08:19:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358437 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2329BC07E9C for ; Mon, 5 Jul 2021 08:20:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0D0E8613F3 for ; Mon, 5 Jul 2021 08:20:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230360AbhGEIXV (ORCPT ); Mon, 5 Jul 2021 04:23:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230301AbhGEIXT (ORCPT ); Mon, 5 Jul 2021 04:23:19 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 678FBC061574; Mon, 5 Jul 2021 01:20:42 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id x21-20020a17090aa395b029016e25313bfcso11340817pjp.2; Mon, 05 Jul 2021 01:20:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eJ5JyREZ5LpvYsK+0QASIvJ867/NXe9Cl2Yvt7ud23M=; b=RZX/aDqOz1vpn3LnYmIfFKdCCfW9QoOgr8SuZYs2YISBtw40q6xjy6GobZ2c2fH35r /HmSEQ7BLqid1XFINBFPY6rM8ot7AfjjJq+cfttLAQlJ4ebTpbqaeNZ5WBvJMNzONgGm bfisqgFcACnnvlIX2GwS2M9oCFkMdQr2egtne1J3vdBHdK7R0EImjDqKfyc+WIGMM6CK rNAqM2ATbt3HLYpPd5UxELrRLzGFG5gpyVdpQom4qClkVW4pm73pS7Zn33s5PJ/Qm7+Z mo/9Sr1MvS3yBgTxlw8rKf4/HafUAugGHrjkT13Ix8ExjowlQV+sfi9WoG3QKXswWwHx 9wDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eJ5JyREZ5LpvYsK+0QASIvJ867/NXe9Cl2Yvt7ud23M=; b=S0ab49nx+BDk7qsRfN3dJMiFj0h/aqxafCqpOIGUkKkm1UlLnsAW8t4juz9Ods859B RQl7x6LZ9uy4e0V2WUf6ZXsYuKTzBksBu9ugZyDEzbhSoEKNOtEHODfn/m5HzShnCazB dFk3FU6ICmnGdwbaOicumejT+l9XkXdXZx3tvUnBkRODrtsJ8Z3w3H7+5g06Bp/MO39M IN4NolxbQfmAItlifdtYc9RlhdpIcIxqVZvAtoY75m7xeDdVwk2bx3OTqIfGLhK2vgAt KhXFDCRfqJeCtRU+6FTWjr0bWfPBdu7ovnIkvQa5DVQZr5qt7IckpQv8rs+VdEvsC1Pc iafA== X-Gm-Message-State: AOAM531VSZsF+Zh4GYKSHo2S7QsRLqOPj5evANjHInzB9KeLTtVbycjO XPCHiGPvLLH6BybLLi7wSDU= X-Google-Smtp-Source: ABdhPJwfFE1Okx71Js6IHRadfTJYlKRDeh+tPkSdb2+dq9wLCFYZ/j3/+hU+6FP7yjA5EuTR8UwbTg== X-Received: by 2002:a17:90a:c484:: with SMTP id j4mr11163356pjt.218.1625473242038; Mon, 05 Jul 2021 01:20:42 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:41 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 15/17] counter: Implement events_queue_size sysfs attribute Date: Mon, 5 Jul 2021 17:19:03 +0900 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The events_queue_size sysfs attribute provides a way for users to dynamically configure the Counter events queue size for the Counter character device interface. The size is in number of struct counter_event data structures. The number of elements will be rounded-up to a power of 2 due to a requirement of the kfifo_alloc function called during reallocation of the queue. Cc: Oleksij Rempel Signed-off-by: William Breathitt Gray Reported-by: kernel test robot Reported-by: Dan Carpenter --- Documentation/ABI/testing/sysfs-bus-counter | 8 ++++ drivers/counter/counter-chrdev.c | 4 ++ drivers/counter/counter-sysfs.c | 44 +++++++++++++++++++++ include/linux/counter.h | 2 + 4 files changed, 58 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index e0e99adb0ecc..84ebb1ed28ed 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -233,6 +233,14 @@ Description: shorter or equal to configured value are ignored. Value 0 means filter is disabled. +What: /sys/bus/counter/devices/counterX/events_queue_size +KernelVersion: 5.15 +Contact: linux-iio@vger.kernel.org +Description: + Size of the Counter events queue in number of struct + counter_event data structures. The number of elements will be + rounded-up to a power of 2. + What: /sys/bus/counter/devices/counterX/name KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c index 92805b1f65b8..13644c87d02a 100644 --- a/drivers/counter/counter-chrdev.c +++ b/drivers/counter/counter-chrdev.c @@ -323,6 +323,9 @@ static int counter_chrdev_open(struct inode *inode, struct file *filp) typeof(*counter), chrdev); + if (!mutex_trylock(&counter->chrdev_lock)) + return -EBUSY; + get_device(&counter->dev); filp->private_data = counter; @@ -339,6 +342,7 @@ static int counter_chrdev_release(struct inode *inode, struct file *filp) return err; put_device(&counter->dev); + mutex_unlock(&counter->chrdev_lock); return 0; } diff --git a/drivers/counter/counter-sysfs.c b/drivers/counter/counter-sysfs.c index eb1505bfbd89..bf038eff4587 100644 --- a/drivers/counter/counter-sysfs.c +++ b/drivers/counter/counter-sysfs.c @@ -8,7 +8,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -782,12 +784,48 @@ static int counter_num_counts_read(struct counter_device *counter, u8 *val) return 0; } +static int counter_events_queue_size_read(struct counter_device *counter, + u64 *val) +{ + *val = kfifo_size(&counter->events); + return 0; +} + +static int counter_events_queue_size_write(struct counter_device *counter, + u64 val) +{ + int err; + DECLARE_KFIFO_PTR(events, struct counter_event); + + /* Verify chrdev is not currently being used */ + if (!mutex_trylock(&counter->chrdev_lock)) + return -EBUSY; + + /* Allocate new events queue */ + err = kfifo_alloc(&events, val, GFP_ATOMIC); + if (err) + return err; + + /* Swap in new events queue */ + kfifo_free(&counter->events); + counter->events.kfifo = events.kfifo; + + mutex_unlock(&counter->chrdev_lock); + + return 0; +} + static struct counter_comp counter_num_signals_comp = COUNTER_COMP_DEVICE_U8("num_signals", counter_num_signals_read, NULL); static struct counter_comp counter_num_counts_comp = COUNTER_COMP_DEVICE_U8("num_counts", counter_num_counts_read, NULL); +static struct counter_comp counter_events_queue_size_comp = + COUNTER_COMP_DEVICE_U64("events_queue_size", + counter_events_queue_size_read, + counter_events_queue_size_write); + static int counter_sysfs_attr_add(struct counter_device *const counter, struct counter_attribute_group *group) { @@ -826,6 +864,12 @@ static int counter_sysfs_attr_add(struct counter_device *const counter, if (err < 0) return err; + /* Create num_counts attribute */ + err = counter_attr_create(dev, group, &counter_events_queue_size_comp, + scope, NULL); + if (err < 0) + return err; + /* Create an attribute for each extension */ for (i = 0; i < counter->num_ext; i++) { ext = counter->ext + i; diff --git a/include/linux/counter.h b/include/linux/counter.h index 3f0bbe4ff702..854fcaf49c32 100644 --- a/include/linux/counter.h +++ b/include/linux/counter.h @@ -289,6 +289,7 @@ struct counter_ops { * @priv: optional private data supplied by driver * @dev: internal device structure * @chrdev: internal character device structure + * @chrdev_lock: lock to limit chrdev to a single open at a time * @events_list: list of current watching Counter events * @events_list_lock: lock to protect Counter events list operations * @next_events_list: list of next watching Counter events @@ -314,6 +315,7 @@ struct counter_device { struct device dev; struct cdev chrdev; + struct mutex chrdev_lock; struct list_head events_list; spinlock_t events_list_lock; struct list_head next_events_list; From patchwork Mon Jul 5 08:19:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358439 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0055CC07E99 for ; Mon, 5 Jul 2021 08:20:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DF62A6128B for ; Mon, 5 Jul 2021 08:20:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230364AbhGEIXe (ORCPT ); Mon, 5 Jul 2021 04:23:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230263AbhGEIXZ (ORCPT ); Mon, 5 Jul 2021 04:23:25 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8C79C061574; Mon, 5 Jul 2021 01:20:47 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id h1-20020a17090a3d01b0290172d33bb8bcso1866711pjc.0; Mon, 05 Jul 2021 01:20:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HeByZWfWDzFovzvjp6wXVFR3lWTc9L7uXKk6mjE/Rik=; b=lp5QJiXnqvojnbn5sUDCffDKoC1mIoLModu/UMEBmrE75IrO/rNFuY9IjjC+9LSZV3 JrPixGrE3m7NySZ7QSGXd1aQ8cU9DksE5Qhn8edAMfIGqYPG6w4m+UDptX/F6OFOcSG7 wNmUxcoO8z5dXG+Wew1cMeSgbhIuV7QbgavTJaOt1ZB+xqC39+vT0p+QPyh3+vWljZFh WjmHj33p5JYUNXarSVXbosrzB1p6oowLmdYDVoi+25VTmIC08A16CtZVuSXTOBtIbUmd ABCpqVBB+kPgTufG+GJtQD4Li3YcNEHqkyxcmOXaH/kQ5MiYfbrHPpCyugGJi1FArU2w k+AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HeByZWfWDzFovzvjp6wXVFR3lWTc9L7uXKk6mjE/Rik=; b=kn2Hqomvg+s9N5nqYlxkrLkM9UvG94E198Vtn0gDsuw6Y5F1xlp0Nzv2KFU6uzv61t 5s50nTpf3OujlnJ8PKvoEq4KxN1RDu0fjwfmmMc8w9e4bcCTXuyoITSuL+9oOf2Z0HQB Ati31jkvZ3c3IEsO5xhwYWBFfaPaz59Nv8ktTj6oVeq8E5oaj7dKFbGpDaiIHcn6rlrq LbJxHWMx83OkxaJHLE3QDrv14F0PufWIBAxs1xE3RMZZQJnW6BrwWmJikAth6iiLKyML 58UCaWM9DGVbdDvJ6rJN5umBXC3mPT0D11oxQc7RQoYGdDDDzFm5/Qfd96tWlarBXssO gSSQ== X-Gm-Message-State: AOAM5331a4AUYOXmg2hSypz/glZGpaz2gYZvqlFclfxErCR4Wl0JLcn+ 3N/Aor4nZYxPgeQRA7sqTs8= X-Google-Smtp-Source: ABdhPJwUFAtrv60N6ePL4E2lgoStKoSnReVWgzTf3PFrJMvQppMpy6BIjVVWNGvGwag1fa0vXzhd+Q== X-Received: by 2002:a17:90a:df10:: with SMTP id gp16mr14256856pjb.164.1625473247267; Mon, 05 Jul 2021 01:20:47 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:46 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 16/17] counter: 104-quad-8: Replace mutex with spinlock Date: Mon, 5 Jul 2021 17:19:04 +0900 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This patch replaces the mutex I/O lock with a spinlock. This is in preparation for a subsequent patch adding IRQ support for 104-QUAD-8 devices; we can't sleep in an interrupt context, so we'll need to use a spinlock instead. Acked-by: Syed Nayyar Waris Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 90 +++++++++++++++++++++--------------- 1 file changed, 53 insertions(+), 37 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index d1161c27c488..a56751bf1e9b 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -16,6 +16,7 @@ #include #include #include +#include #define QUAD8_EXTENT 32 @@ -28,6 +29,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); /** * struct quad8 - device private data structure + * @lock: lock to prevent clobbering device states during R/W ops * @counter: instance of the counter_device * @fck_prescaler: array of filter clock prescaler configurations * @preset: array of preset values @@ -42,7 +44,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); * @base: base port address of the device */ struct quad8 { - struct mutex lock; + spinlock_t lock; struct counter_device counter; unsigned int fck_prescaler[QUAD8_NUM_COUNTERS]; unsigned int preset[QUAD8_NUM_COUNTERS]; @@ -123,6 +125,7 @@ static int quad8_count_read(struct counter_device *counter, unsigned int flags; unsigned int borrow; unsigned int carry; + unsigned long irqflags; int i; flags = inb(base_offset + 1); @@ -132,7 +135,7 @@ static int quad8_count_read(struct counter_device *counter, /* Borrow XOR Carry effectively doubles count range */ *val = (unsigned long)(borrow ^ carry) << 24; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); /* Reset Byte Pointer; transfer Counter to Output Latch */ outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_CNTR_OUT, @@ -141,7 +144,7 @@ static int quad8_count_read(struct counter_device *counter, for (i = 0; i < 3; i++) *val |= (unsigned long)inb(base_offset) << (8 * i); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -151,13 +154,14 @@ static int quad8_count_write(struct counter_device *counter, { struct quad8 *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id; + unsigned long irqflags; int i; /* Only 24-bit values are supported */ if (val > 0xFFFFFF) return -ERANGE; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); /* Reset Byte Pointer */ outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1); @@ -182,7 +186,7 @@ static int quad8_count_write(struct counter_device *counter, /* Reset Error flag */ outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_E, base_offset + 1); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -200,8 +204,9 @@ static int quad8_function_read(struct counter_device *counter, { struct quad8 *const priv = counter->priv; const int id = count->id; + unsigned long irqflags; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); if (priv->quadrature_mode[id]) switch (priv->quadrature_scale[id]) { @@ -218,7 +223,7 @@ static int quad8_function_read(struct counter_device *counter, else *function = COUNTER_FUNCTION_PULSE_DIRECTION; - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -233,10 +238,11 @@ static int quad8_function_write(struct counter_device *counter, unsigned int *const scale = priv->quadrature_scale + id; unsigned int *const synchronous_mode = priv->synchronous_mode + id; const int base_offset = priv->base + 2 * id + 1; + unsigned long irqflags; unsigned int mode_cfg; unsigned int idr_cfg; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); mode_cfg = priv->count_mode[id] << 1; idr_cfg = priv->index_polarity[id] << 1; @@ -271,7 +277,7 @@ static int quad8_function_write(struct counter_device *counter, break; default: /* should never reach this path */ - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return -EINVAL; } } @@ -279,7 +285,7 @@ static int quad8_function_write(struct counter_device *counter, /* Load mode configuration to Counter Mode Register */ outb(QUAD8_CTR_CMR | mode_cfg, base_offset); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -405,9 +411,10 @@ static int quad8_index_polarity_set(struct counter_device *counter, struct quad8 *const priv = counter->priv; const size_t channel_id = signal->id - 16; const int base_offset = priv->base + 2 * channel_id + 1; + unsigned long irqflags; unsigned int idr_cfg = index_polarity << 1; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); idr_cfg |= priv->synchronous_mode[channel_id]; @@ -416,7 +423,7 @@ static int quad8_index_polarity_set(struct counter_device *counter, /* Load Index Control configuration to Index Control Register */ outb(QUAD8_CTR_IDR | idr_cfg, base_offset); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -445,15 +452,16 @@ static int quad8_synchronous_mode_set(struct counter_device *counter, struct quad8 *const priv = counter->priv; const size_t channel_id = signal->id - 16; const int base_offset = priv->base + 2 * channel_id + 1; + unsigned long irqflags; unsigned int idr_cfg = synchronous_mode; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); idr_cfg |= priv->index_polarity[channel_id] << 1; /* Index function must be non-synchronous in non-quadrature mode */ if (synchronous_mode && !priv->quadrature_mode[channel_id]) { - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return -EINVAL; } @@ -462,7 +470,7 @@ static int quad8_synchronous_mode_set(struct counter_device *counter, /* Load Index Control configuration to Index Control Register */ outb(QUAD8_CTR_IDR | idr_cfg, base_offset); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -509,6 +517,7 @@ static int quad8_count_mode_write(struct counter_device *counter, unsigned int count_mode; unsigned int mode_cfg; const int base_offset = priv->base + 2 * count->id + 1; + unsigned long irqflags; /* Map Generic Counter count mode to 104-QUAD-8 count mode */ switch (cnt_mode) { @@ -529,7 +538,7 @@ static int quad8_count_mode_write(struct counter_device *counter, return -EINVAL; } - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); priv->count_mode[count->id] = count_mode; @@ -543,7 +552,7 @@ static int quad8_count_mode_write(struct counter_device *counter, /* Load mode configuration to Counter Mode Register */ outb(QUAD8_CTR_CMR | mode_cfg, base_offset); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -563,9 +572,10 @@ static int quad8_count_enable_write(struct counter_device *counter, { struct quad8 *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id; + unsigned long irqflags; unsigned int ior_cfg; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); priv->ab_enable[count->id] = enable; @@ -574,7 +584,7 @@ static int quad8_count_enable_write(struct counter_device *counter, /* Load I/O control configuration */ outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -625,16 +635,17 @@ static int quad8_count_preset_write(struct counter_device *counter, struct counter_count *count, u64 preset) { struct quad8 *const priv = counter->priv; + unsigned long irqflags; /* Only 24-bit values are supported */ if (preset > 0xFFFFFF) return -ERANGE; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); quad8_preset_register_set(priv, count->id, preset); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -643,8 +654,9 @@ static int quad8_count_ceiling_read(struct counter_device *counter, struct counter_count *count, u64 *ceiling) { struct quad8 *const priv = counter->priv; + unsigned long irqflags; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); /* Range Limit and Modulo-N count modes use preset value as ceiling */ switch (priv->count_mode[count->id]) { @@ -658,7 +670,7 @@ static int quad8_count_ceiling_read(struct counter_device *counter, break; } - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -667,23 +679,24 @@ static int quad8_count_ceiling_write(struct counter_device *counter, struct counter_count *count, u64 ceiling) { struct quad8 *const priv = counter->priv; + unsigned long irqflags; /* Only 24-bit values are supported */ if (ceiling > 0xFFFFFF) return -ERANGE; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); /* Range Limit and Modulo-N count modes use preset value as ceiling */ switch (priv->count_mode[count->id]) { case 1: case 3: quad8_preset_register_set(priv, count->id, ceiling); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return -EINVAL; } @@ -705,12 +718,13 @@ static int quad8_count_preset_enable_write(struct counter_device *counter, { struct quad8 *const priv = counter->priv; const int base_offset = priv->base + 2 * count->id + 1; + unsigned long irqflags; unsigned int ior_cfg; /* Preset enable is active low in Input/Output Control register */ preset_enable = !preset_enable; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); priv->preset_enable[count->id] = preset_enable; @@ -719,7 +733,7 @@ static int quad8_count_preset_enable_write(struct counter_device *counter, /* Load I/O control configuration to Input / Output Control Register */ outb(QUAD8_CTR_IOR | ior_cfg, base_offset); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -730,22 +744,23 @@ static int quad8_signal_cable_fault_read(struct counter_device *counter, { struct quad8 *const priv = counter->priv; const size_t channel_id = signal->id / 2; + unsigned long irqflags; bool disabled; unsigned int status; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); disabled = !(priv->cable_fault_enable & BIT(channel_id)); if (disabled) { - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return -EINVAL; } /* Logic 0 = cable fault */ status = inb(priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); /* Mask respective channel and invert logic */ *cable_fault = !(status & BIT(channel_id)); @@ -771,9 +786,10 @@ static int quad8_signal_cable_fault_enable_write(struct counter_device *counter, { struct quad8 *const priv = counter->priv; const size_t channel_id = signal->id / 2; + unsigned long irqflags; unsigned int cable_fault_enable; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); if (enable) priv->cable_fault_enable |= BIT(channel_id); @@ -785,7 +801,7 @@ static int quad8_signal_cable_fault_enable_write(struct counter_device *counter, outb(cable_fault_enable, priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -808,8 +824,9 @@ static int quad8_signal_fck_prescaler_write(struct counter_device *counter, struct quad8 *const priv = counter->priv; const size_t channel_id = signal->id / 2; const int base_offset = priv->base + 2 * channel_id; + unsigned long irqflags; - mutex_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, irqflags); priv->fck_prescaler[channel_id] = prescaler; @@ -821,7 +838,7 @@ static int quad8_signal_fck_prescaler_write(struct counter_device *counter, outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC, base_offset + 1); - mutex_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, irqflags); return 0; } @@ -990,8 +1007,7 @@ static int quad8_probe(struct device *dev, unsigned int id) priv->counter.priv = priv; priv->base = base[id]; - /* Initialize mutex */ - mutex_init(&priv->lock); + spin_lock_init(&priv->lock); /* Reset all counters and disable interrupt function */ outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP); From patchwork Mon Jul 5 08:19:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 12358441 X-Patchwork-Delegate: jic23@cam.ac.uk Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4250C07E98 for ; Mon, 5 Jul 2021 08:21:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B989A613C8 for ; Mon, 5 Jul 2021 08:21:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230476AbhGEIXh (ORCPT ); Mon, 5 Jul 2021 04:23:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230405AbhGEIX3 (ORCPT ); Mon, 5 Jul 2021 04:23:29 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A381C061762; Mon, 5 Jul 2021 01:20:52 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id 21so16081489pfp.3; Mon, 05 Jul 2021 01:20:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SLModsDB3wMnG/j1vYcLsvOXnN7kXwrxO57vJIaEopw=; b=HNvkFCEtqiQbPQZvTVXgorV64sl8Sj73lZ8sFYYAhPezmIm/o3z6kJr3NLIa+ej7um 0lvCcQzqSxqOUawBjjmvjjqYQGS4asD1qNE2icP0PCJxK+Sb4l5JzQ15nv/7ERHAz5ii 273PP5c9tT4dFwmgmCqvXh5NT2bV0gZEFsplU8roO5xGlopLX74CaLPusDu4uAqm70IJ KOAfDN2gdaXIX6tUUTSgpTBFkppHRS4TxBQDrNI5XWhqht6Ce1K9r2gmOLF6xx1ODquF 87NdFmyUzOoOI11YARqkFujBHAVB6i7jnZwqDiXc2TRIPxhtC21cwBpaFpjLHBBCfrXJ 9jmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SLModsDB3wMnG/j1vYcLsvOXnN7kXwrxO57vJIaEopw=; b=SzX7WBUDZP4PMownb7W7A5K4a8eZ9EcpZehfy2p2gal/Z0Kmcq8OK73lpc4IYmv/0R JxGpKTi+w1c07ADwwSP3MKR8diTusKAY4jkvrFy2j7Qbi4WOjmhyB/7YUekBjDrYI2Kg Gs8s3+Ee2mou/DF8ZMXzGt/8uRge3gFw0EulDnn276LbAcWLA3JMsw/V5EvafMN87l+4 eyhGriXOXbnVWrK0VnfLth67isJ77Kzml4McBeSuQJtCaD0u6TfJ5ShYIgGU/aAzzh+w LJq7z5L/9yZJk9l0fzFVpYrt/vdiRygFuBzEaXKGweVlo5EheRGUbaqxEVp6H1S7Ng+/ Udbw== X-Gm-Message-State: AOAM531fmmGJnL/ny16ZpfvFhmEA05ATzKZWlg19SHY4R9jRM7oW8q3f GGIBx+7c/D/uc4LP545/Nw4= X-Google-Smtp-Source: ABdhPJwatu1yMaUnpMUxUaCPc5844xs4anFBaabvm2sFfv+1CE+6fnHtVXQV8v+9DgH1Y7dSc2AgDg== X-Received: by 2002:a05:6a00:1709:b029:308:747d:b7be with SMTP id h9-20020a056a001709b0290308747db7bemr14075198pfc.41.1625473252187; Mon, 05 Jul 2021 01:20:52 -0700 (PDT) Received: from localhost.localdomain ([156.146.35.76]) by smtp.gmail.com with ESMTPSA id y11sm12209986pfo.160.2021.07.05.01.20.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jul 2021 01:20:51 -0700 (PDT) From: William Breathitt Gray To: jic23@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, kernel@pengutronix.de, a.fatoum@pengutronix.de, kamel.bouhara@bootlin.com, gwendal@chromium.org, alexandre.belloni@bootlin.com, david@lechnology.com, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, syednwaris@gmail.com, patrick.havelange@essensium.com, fabrice.gasnier@st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, o.rempel@pengutronix.de, jarkko.nikula@linux.intel.com, William Breathitt Gray Subject: [PATCH v12 17/17] counter: 104-quad-8: Add IRQ support for the ACCES 104-QUAD-8 Date: Mon, 5 Jul 2021 17:19:05 +0900 Message-Id: <4ce9f9d36b756801457523e3832f09c36fa8e9ef.1625471640.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The LSI/CSI LS7266R1 chip provides programmable output via the FLG pins. When interrupts are enabled on the ACCES 104-QUAD-8, they occur whenever FLG1 is active. Four functions are available for the FLG1 signal: Carry, Compare, Carry-Borrow, and Index. Carry: Interrupt generated on active low Carry signal. Carry signal toggles every time the respective channel's counter overflows. Compare: Interrupt generated on active low Compare signal. Compare signal toggles every time respective channel's preset register is equal to the respective channel's counter. Carry-Borrow: Interrupt generated on active low Carry signal and active low Borrow signal. Carry signal toggles every time the respective channel's counter overflows. Borrow signal toggles every time the respective channel's counter underflows. Index: Interrupt generated on active high Index signal. These four functions correspond respectivefly to the following four Counter event types: COUNTER_EVENT_OVERFLOW, COUNTER_EVENT_THRESHOLD, COUNTER_EVENT_OVERFLOW_UNDERFLOW, and COUNTER_EVENT_INDEX. Interrupts push Counter events to event channel X, where 'X' is the respective channel whose FLG1 activated. This patch adds IRQ support for the ACCES 104-QUAD-8. The interrupt line numbers for the devices may be configured via the irq array module parameter. Acked-by: Syed Nayyar Waris Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 167 +++++++++++++++++++++++++++++++++-- drivers/counter/Kconfig | 6 +- 2 files changed, 164 insertions(+), 9 deletions(-) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index a56751bf1e9b..1cbd60aaed69 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -25,6 +26,10 @@ static unsigned int num_quad8; module_param_hw_array(base, uint, ioport, &num_quad8, 0); MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); +static unsigned int irq[max_num_isa_dev(QUAD8_EXTENT)]; +module_param_hw_array(irq, uint, irq, NULL, 0); +MODULE_PARM_DESC(irq, "ACCES 104-QUAD-8 interrupt line numbers"); + #define QUAD8_NUM_COUNTERS 8 /** @@ -38,6 +43,8 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); * @quadrature_scale: array of quadrature mode scale configurations * @ab_enable: array of A and B inputs enable configurations * @preset_enable: array of set_to_preset_on_index attribute configurations + * @irq_trigger: array of current IRQ trigger function configurations + * @next_irq_trigger: array of next IRQ trigger function configurations * @synchronous_mode: array of index function synchronous mode configurations * @index_polarity: array of index function polarity configurations * @cable_fault_enable: differential encoder cable status enable configurations @@ -53,13 +60,17 @@ struct quad8 { unsigned int quadrature_scale[QUAD8_NUM_COUNTERS]; unsigned int ab_enable[QUAD8_NUM_COUNTERS]; unsigned int preset_enable[QUAD8_NUM_COUNTERS]; + unsigned int irq_trigger[QUAD8_NUM_COUNTERS]; + unsigned int next_irq_trigger[QUAD8_NUM_COUNTERS]; unsigned int synchronous_mode[QUAD8_NUM_COUNTERS]; unsigned int index_polarity[QUAD8_NUM_COUNTERS]; unsigned int cable_fault_enable; unsigned int base; }; +#define QUAD8_REG_INTERRUPT_STATUS 0x10 #define QUAD8_REG_CHAN_OP 0x11 +#define QUAD8_REG_INDEX_INTERRUPT 0x12 #define QUAD8_REG_INDEX_INPUT_LEVELS 0x16 #define QUAD8_DIFF_ENCODER_CABLE_STATUS 0x17 /* Borrow Toggle flip-flop */ @@ -92,8 +103,8 @@ struct quad8 { #define QUAD8_RLD_CNTR_OUT 0x10 /* Transfer Preset Register LSB to FCK Prescaler */ #define QUAD8_RLD_PRESET_PSC 0x18 -#define QUAD8_CHAN_OP_ENABLE_COUNTERS 0x00 #define QUAD8_CHAN_OP_RESET_COUNTERS 0x01 +#define QUAD8_CHAN_OP_ENABLE_INTERRUPT_FUNC 0x04 #define QUAD8_CMR_QUADRATURE_X1 0x08 #define QUAD8_CMR_QUADRATURE_X2 0x10 #define QUAD8_CMR_QUADRATURE_X4 0x18 @@ -378,13 +389,103 @@ static int quad8_action_read(struct counter_device *counter, } } +enum { + QUAD8_EVENT_NONE = -1, + QUAD8_EVENT_CARRY = 0, + QUAD8_EVENT_COMPARE = 1, + QUAD8_EVENT_CARRY_BORROW = 2, + QUAD8_EVENT_INDEX = 3, +}; + +static int quad8_events_configure(struct counter_device *counter) +{ + struct quad8 *const priv = counter->priv; + unsigned long irq_enabled = 0; + unsigned long irqflags; + size_t channel; + unsigned long ior_cfg; + unsigned long base_offset; + + spin_lock_irqsave(&priv->lock, irqflags); + + /* Enable interrupts for the requested channels, disable for the rest */ + for (channel = 0; channel < QUAD8_NUM_COUNTERS; channel++) { + if (priv->next_irq_trigger[channel] == QUAD8_EVENT_NONE) + continue; + + if (priv->irq_trigger[channel] != priv->next_irq_trigger[channel]) { + /* Save new IRQ function configuration */ + priv->irq_trigger[channel] = priv->next_irq_trigger[channel]; + + /* Load configuration to I/O Control Register */ + ior_cfg = priv->ab_enable[channel] | + priv->preset_enable[channel] << 1 | + priv->irq_trigger[channel] << 3; + base_offset = priv->base + 2 * channel + 1; + outb(QUAD8_CTR_IOR | ior_cfg, base_offset); + } + + /* Reset next IRQ trigger function configuration */ + priv->next_irq_trigger[channel] = QUAD8_EVENT_NONE; + + /* Enable IRQ line */ + irq_enabled |= BIT(channel); + } + + outb(irq_enabled, priv->base + QUAD8_REG_INDEX_INTERRUPT); + + spin_unlock_irqrestore(&priv->lock, irqflags); + + return 0; +} + +static int quad8_watch_validate(struct counter_device *counter, + const struct counter_watch *watch) +{ + struct quad8 *const priv = counter->priv; + + if (watch->channel > QUAD8_NUM_COUNTERS - 1) + return -EINVAL; + + switch (watch->event) { + case COUNTER_EVENT_OVERFLOW: + if (priv->next_irq_trigger[watch->channel] == QUAD8_EVENT_NONE) + priv->next_irq_trigger[watch->channel] = QUAD8_EVENT_CARRY; + else if (priv->next_irq_trigger[watch->channel] != QUAD8_EVENT_CARRY) + return -EINVAL; + return 0; + case COUNTER_EVENT_THRESHOLD: + if (priv->next_irq_trigger[watch->channel] == QUAD8_EVENT_NONE) + priv->next_irq_trigger[watch->channel] = QUAD8_EVENT_COMPARE; + else if (priv->next_irq_trigger[watch->channel] != QUAD8_EVENT_COMPARE) + return -EINVAL; + return 0; + case COUNTER_EVENT_OVERFLOW_UNDERFLOW: + if (priv->next_irq_trigger[watch->channel] == QUAD8_EVENT_NONE) + priv->next_irq_trigger[watch->channel] = QUAD8_EVENT_CARRY_BORROW; + else if (priv->next_irq_trigger[watch->channel] != QUAD8_EVENT_CARRY_BORROW) + return -EINVAL; + return 0; + case COUNTER_EVENT_INDEX: + if (priv->next_irq_trigger[watch->channel] == QUAD8_EVENT_NONE) + priv->next_irq_trigger[watch->channel] = QUAD8_EVENT_INDEX; + else if (priv->next_irq_trigger[watch->channel] != QUAD8_EVENT_INDEX) + return -EINVAL; + return 0; + default: + return -EINVAL; + } +} + static const struct counter_ops quad8_ops = { .signal_read = quad8_signal_read, .count_read = quad8_count_read, .count_write = quad8_count_write, .function_read = quad8_function_read, .function_write = quad8_function_write, - .action_read = quad8_action_read + .action_read = quad8_action_read, + .events_configure = quad8_events_configure, + .watch_validate = quad8_watch_validate, }; static const char *const quad8_index_polarity_modes[] = { @@ -579,7 +680,8 @@ static int quad8_count_enable_write(struct counter_device *counter, priv->ab_enable[count->id] = enable; - ior_cfg = enable | priv->preset_enable[count->id] << 1; + ior_cfg = enable | priv->preset_enable[count->id] << 1 | + priv->irq_trigger[count->id] << 3; /* Load I/O control configuration */ outb(QUAD8_CTR_IOR | ior_cfg, base_offset + 1); @@ -728,7 +830,8 @@ static int quad8_count_preset_enable_write(struct counter_device *counter, priv->preset_enable[count->id] = preset_enable; - ior_cfg = priv->ab_enable[count->id] | preset_enable << 1; + ior_cfg = priv->ab_enable[count->id] | preset_enable << 1 | + priv->irq_trigger[count->id] << 3; /* Load I/O control configuration to Input / Output Control Register */ outb(QUAD8_CTR_IOR | ior_cfg, base_offset); @@ -980,11 +1083,54 @@ static struct counter_count quad8_counts[] = { QUAD8_COUNT(7, "Channel 8 Count") }; +static irqreturn_t quad8_irq_handler(int irq, void *private) +{ + struct quad8 *const priv = private; + const unsigned long base = priv->base; + unsigned long irq_status; + unsigned long channel; + u8 event; + + irq_status = inb(base + QUAD8_REG_INTERRUPT_STATUS); + if (!irq_status) + return IRQ_NONE; + + for_each_set_bit(channel, &irq_status, QUAD8_NUM_COUNTERS) { + switch (priv->irq_trigger[channel]) { + case QUAD8_EVENT_CARRY: + event = COUNTER_EVENT_OVERFLOW; + break; + case QUAD8_EVENT_COMPARE: + event = COUNTER_EVENT_THRESHOLD; + break; + case QUAD8_EVENT_CARRY_BORROW: + event = COUNTER_EVENT_OVERFLOW_UNDERFLOW; + break; + case QUAD8_EVENT_INDEX: + event = COUNTER_EVENT_INDEX; + break; + default: + /* should never reach this path */ + WARN_ONCE(true, "invalid interrupt trigger function %u configured for channel %lu\n", + priv->irq_trigger[channel], channel); + continue; + } + + counter_push_event(&priv->counter, event, channel); + } + + /* Clear pending interrupts on device */ + outb(QUAD8_CHAN_OP_ENABLE_INTERRUPT_FUNC, base + QUAD8_REG_CHAN_OP); + + return IRQ_HANDLED; +} + static int quad8_probe(struct device *dev, unsigned int id) { struct quad8 *priv; int i, j; unsigned int base_offset; + int err; if (!devm_request_region(dev, base[id], QUAD8_EXTENT, dev_name(dev))) { dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", @@ -1009,6 +1155,8 @@ static int quad8_probe(struct device *dev, unsigned int id) spin_lock_init(&priv->lock); + /* Reset Index/Interrupt Register */ + outb(0x00, base[id] + QUAD8_REG_INDEX_INTERRUPT); /* Reset all counters and disable interrupt function */ outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP); /* Set initial configuration for all counters */ @@ -1035,11 +1183,18 @@ static int quad8_probe(struct device *dev, unsigned int id) outb(QUAD8_CTR_IOR, base_offset + 1); /* Disable index function; negative index polarity */ outb(QUAD8_CTR_IDR, base_offset + 1); + /* Initialize next IRQ trigger function configuration */ + priv->next_irq_trigger[i] = QUAD8_EVENT_NONE; } /* Disable Differential Encoder Cable Status for all channels */ outb(0xFF, base[id] + QUAD8_DIFF_ENCODER_CABLE_STATUS); - /* Enable all counters */ - outb(QUAD8_CHAN_OP_ENABLE_COUNTERS, base[id] + QUAD8_REG_CHAN_OP); + /* Enable all counters and enable interrupt function */ + outb(QUAD8_CHAN_OP_ENABLE_INTERRUPT_FUNC, base[id] + QUAD8_REG_CHAN_OP); + + err = devm_request_irq(dev, irq[id], quad8_irq_handler, IRQF_SHARED, + priv->counter.name, priv); + if (err) + return err; return devm_counter_register(dev, &priv->counter); } diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig index d5d2540b30c2..3dcdb681c4e4 100644 --- a/drivers/counter/Kconfig +++ b/drivers/counter/Kconfig @@ -23,11 +23,11 @@ config 104_QUAD_8 A counter's respective error flag may be cleared by performing a write operation on the respective count value attribute. Although the 104-QUAD-8 counters have a 25-bit range, only the lower 24 bits may be - set, either directly or via the counter's preset attribute. Interrupts - are not supported by this driver. + set, either directly or via the counter's preset attribute. The base port addresses for the devices may be configured via the base - array module parameter. + array module parameter. The interrupt line numbers for the devices may + be configured via the irq array module parameter. config INTERRUPT_CNT tristate "Interrupt counter driver"