From patchwork Thu Jul 8 01:08:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 12364341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29DB9C07E9B for ; Thu, 8 Jul 2021 01:06:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0C87461C4E for ; Thu, 8 Jul 2021 01:06:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230135AbhGHBJf (ORCPT ); Wed, 7 Jul 2021 21:09:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230121AbhGHBJf (ORCPT ); Wed, 7 Jul 2021 21:09:35 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05319C061762 for ; Wed, 7 Jul 2021 18:06:53 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id w13so2986454wmc.3 for ; Wed, 07 Jul 2021 18:06:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=k5FkRjNZy41OX+EdXWg5hya79h3Lui7+0lZKw+e++co=; b=zBWGbpx9rnx1UKZSwiLjOKyHDCKKTCmgs512msP07UbuwmVofqElp7rgLtVu/RkXP9 aBpeXJl28hdOKRWBxXNmFilmiVc5b2qIG+0Ox8PIpQpAT72n5tJ08qFcQM8te3ZfUMCW doShe49oeTGRKGpKw9pB9BIdsAhJOUyVc9mr8/VDuhWmTp3gTldGC2vngUA5tXfTdLe/ 7wLHcmfhTtKU4MnnmGdv5T82AHsGIFjS/OKphEtmYnrJOAFdtrR+PP4SFq4IwV7E+eWm Agn3bcncSI3P5/t+P18zIoeJB5W8elGh5inNsfsgvqIVDUiCEFr31sDI2Uhx+yAAOQEj tFiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=k5FkRjNZy41OX+EdXWg5hya79h3Lui7+0lZKw+e++co=; b=EBplQEIXRSPecoXuMbXTOBKcRxLENCWPRrrAyIEbkaHLQHzz4f34Mj1HnnZdrMKYtK Av0Ekkq9he+TVk33cohk7nja9gCT6sMdMF+Tuo41XurJdd+yYuBjsV4G2AnSWTM0ByOH pNHbrBKfEjAND7iFC1+V5mF3FsFM2XXLpjyZujo3NGHczzQ/HBKfP8JR1GM8DX5eqzMr 3E2F3aMQJ4el/UuVCK92DAdCM8xllysZQRc8r4KsVYxnEIZsdP+ynN7zm6bLb0xaCjGy fkl/6xJFDAFGCgzsNtJhLQy1gMbw4NeMf4v5HMw0+2n3ctogAxMbLQ5NHkHv/x8mJa4k bz+A== X-Gm-Message-State: AOAM533e9otZW+pG91h+lbjuAh2n5N1jNNATU83J2VN+ECsL2H4yeIfR DBxI7w0kOLA7TQqMVb8CS+agcg== X-Google-Smtp-Source: ABdhPJwaL+JBQcScAvm0Mm4Yr3n+x21rLW0uP2e+4FxlMgrITVFswjnUBEBzhPAkE+2cjH1h1N8kvg== X-Received: by 2002:a7b:c00a:: with SMTP id c10mr2021945wmb.100.1625706411532; Wed, 07 Jul 2021 18:06:51 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id g3sm537368wrv.64.2021.07.07.18.06.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Jul 2021 18:06:51 -0700 (PDT) From: Bryan O'Donoghue To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Cc: dmitry.baryshkov@linaro.org, jonathan@marek.ca, robert.foss@linaro.org, bryan.odonoghue@linaro.org Subject: [PATCH 1/2] clk: qcom: camcc-sm8250: Fix absent mmcx regulator reference Date: Thu, 8 Jul 2021 02:08:38 +0100 Message-Id: <20210708010839.692242-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210708010839.692242-1-bryan.odonoghue@linaro.org> References: <20210708010839.692242-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The current implementation omits the necessary mmcx supply, which means if you are running the code for this block and a prior clock driver, like say the videocc hasn't run, then a reset will be generated the first time we touch these registers. Fixes: 5d66ca79b58c ("clk: qcom: Add camera clock controller driver for SM8250") Signed-off-by: Bryan O'Donoghue --- drivers/clk/qcom/camcc-sm8250.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/qcom/camcc-sm8250.c b/drivers/clk/qcom/camcc-sm8250.c index 439eaafdcc86..c51112546bfc 100644 --- a/drivers/clk/qcom/camcc-sm8250.c +++ b/drivers/clk/qcom/camcc-sm8250.c @@ -2212,6 +2212,7 @@ static struct gdsc bps_gdsc = { }, .flags = HW_CTRL | POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc ipe_0_gdsc = { @@ -2221,6 +2222,7 @@ static struct gdsc ipe_0_gdsc = { }, .flags = HW_CTRL | POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc sbi_gdsc = { @@ -2230,6 +2232,7 @@ static struct gdsc sbi_gdsc = { }, .flags = HW_CTRL | POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc ife_0_gdsc = { @@ -2239,6 +2242,7 @@ static struct gdsc ife_0_gdsc = { }, .flags = POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc ife_1_gdsc = { @@ -2248,6 +2252,7 @@ static struct gdsc ife_1_gdsc = { }, .flags = POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct gdsc titan_top_gdsc = { @@ -2257,6 +2262,7 @@ static struct gdsc titan_top_gdsc = { }, .flags = POLL_CFG_GDSCR, .pwrsts = PWRSTS_OFF_ON, + .supply = "mmcx", }; static struct clk_regmap *cam_cc_sm8250_clocks[] = { From patchwork Thu Jul 8 01:08:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 12364339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 180EBC11F67 for ; Thu, 8 Jul 2021 01:06:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0056261C77 for ; Thu, 8 Jul 2021 01:06:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230121AbhGHBJg (ORCPT ); Wed, 7 Jul 2021 21:09:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230123AbhGHBJf (ORCPT ); Wed, 7 Jul 2021 21:09:35 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6FEEC061574 for ; Wed, 7 Jul 2021 18:06:53 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id i94so5264840wri.4 for ; Wed, 07 Jul 2021 18:06:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L18azrwFyoptGIEYIWz4nD01VfhinXc3JMH8ke/EdqU=; b=zSlPWvWxFWwStd4svDYpSPO9zLKhhIY5gWm22oVhQLDexG7e2eDmlQa2OWAJPlcUO3 Ym8U3mixkQVLfYIUPj8YO8yhx9wEc6OvaEEKFF/eGQZj5id4H7/yJ9ZUpZsmpePKYH9w tax5mgo3+mLWYy6dInoslXduTgWFX1J3RgLsV2C3Jw5IgK8wV4s+mbXovaSiGc1GKl8E /4vq4/Goo8WjfGf9B4StmqcOkPT7taoYKeqeoEjsBOs6wYRaUyK367IIt0fJSUOmnGKe RKB9G3eyF0D7K/Qh3r4nkaum4uovIicNGL/98jZDoSsEzYbzUC9SujdVxmqpRFhE5F5z S2ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L18azrwFyoptGIEYIWz4nD01VfhinXc3JMH8ke/EdqU=; b=EfUpL6qEzn+FyEgqASsdiPwrWhaMBo39o9xR5krjYbI/+XsbOv0/KaqvJAcwEHg9gT jLRVQY+n9mdk0jzM1KW3pO2gI8lPtoFIQyWZPQ8GbwpEyFG4hhueCi8t6ekgd9RqF7uR tDO3WmBoNC9PLmyXYVfbOvUDUAlSjNN4iyWj0jcRB84gCOaG556dbcSrgEzfYwIWKReJ GVPHMZf69PiiU8MSNSINDAI+JZC60J72SmeSPOtE/IDGDNVa8xyvDKNNWWB3FnqWKWpS 6WfQGte9sq6TqLhmVPqcyVpQuUMutmeiemXyJOC7FCBE8XpMtghU6ptuhTY8RuO9VGxx la6g== X-Gm-Message-State: AOAM530vxXcjdNXWfXrRFLge6PplAWe2uKSeOfQvXxKMv8dndSbnKk76 QhsnD/iOE2tRIzSeoCbDbDaXnw== X-Google-Smtp-Source: ABdhPJzg50KqYsEHqX3lE3nbmxnrv+KURkb3on0jHu8a+ew9DdZx8yJ6m/SWiyxWjjXbpBAyOUr6iA== X-Received: by 2002:adf:f346:: with SMTP id e6mr13838777wrp.28.1625706412517; Wed, 07 Jul 2021 18:06:52 -0700 (PDT) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id g3sm537368wrv.64.2021.07.07.18.06.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Jul 2021 18:06:52 -0700 (PDT) From: Bryan O'Donoghue To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Cc: dmitry.baryshkov@linaro.org, jonathan@marek.ca, robert.foss@linaro.org, bryan.odonoghue@linaro.org Subject: [PATCH 2/2] arm64: dts: qcom: sm8250: Add camcc DT node Date: Thu, 8 Jul 2021 02:08:39 +0100 Message-Id: <20210708010839.692242-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210708010839.692242-1-bryan.odonoghue@linaro.org> References: <20210708010839.692242-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the camcc DT node for the Camera Clock Controller on sm8250. Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4c0de12aaba6..7ac6ae50779c 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -18,6 +18,7 @@ #include #include #include +#include / { interrupt-parent = <&intc>; @@ -2369,6 +2370,19 @@ videocc: clock-controller@abf0000 { #power-domain-cells = <1>; }; + clock_camcc: clock-controller@ad00000 { + compatible = "qcom,sm8250-camcc"; + reg = <0 0x0ad00000 0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>; + clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; + mmcx-supply = <&mmcx_reg>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: mdss@ae00000 { compatible = "qcom,sdm845-mdss"; reg = <0 0x0ae00000 0 0x1000>;