From patchwork Wed Jul 21 10:53:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12390705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F586C636CE for ; Wed, 21 Jul 2021 11:34:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DE10F60FED for ; Wed, 21 Jul 2021 11:34:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238500AbhGUKxg (ORCPT ); Wed, 21 Jul 2021 06:53:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240074AbhGUKNW (ORCPT ); Wed, 21 Jul 2021 06:13:22 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7499C0613E4; Wed, 21 Jul 2021 03:53:34 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id f9so1670871wrq.11; Wed, 21 Jul 2021 03:53:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lwqqgfe+46GMK+Di/kXbABZcUvyvwaUzvFfRwi5tfrA=; b=oaXzlAEuBCyvPp3+cfoCWgzw8cEPJfPpK+7YMyI5LjHEC4boWtQm7EHLDuxEURQh+n fVzEzzKhZXv4NhDDLlJoVf9ueNXllQmDF+SGhYMEVt5KXDCY7+ZOUAxwzcdZIQEGZzTt dun/m2Z/0iGOLy2W4ufXbScjNeYtIgB5au1C/lqWpEd+tpgqu4LryHW2MFHpi8H1k20B REPwymgxfWgcDUqnsOQWD8Yh2LOFT3kwLgHqgCfF0by+e/YhoijjuYBVe1dp+oOf+eJE IT5RpHCRGgDK5PtgNF5qW6u5RGy5HthhKtiiCDdLqt1542Mav447kbcF6D7wIYRbs+T4 EqHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lwqqgfe+46GMK+Di/kXbABZcUvyvwaUzvFfRwi5tfrA=; b=WM/pM0ysaYNpf4us+ywh+0BKPvdqVQwXFORMYGtAAZc0tomgYHptwhQaXeQVQiOFLW Sw4NzbVw8qztw48ChfL0589tnVPEs2720wd/IrEab60r5Qz95S/sKsr1F1vH4vDGbkZy yigRWPvQdejzw81SonSloDP38SMJlF3NMMZqAVatYg4gxJccBRPj9GTaBrkAf0kqaXXc l8CyEqIhnfY3PRuVL2vcY73xbsiK2zf1JcDfcKAHKfIr2tqLZxE25vauAH1E3fPI+zv1 aW4ZsLMbJQJ1/1l9NguPD/DDrc7g51IRV1s/HW4te1q35kL5b+2TIQC7A2vlqzXnH9zR PjCA== X-Gm-Message-State: AOAM533VP6oZiGplG5VEom507ulqTpF4l9+LYRjY5FUL8P129KsxjUTD dguQi1geBB2W4AF40Rt2X3g= X-Google-Smtp-Source: ABdhPJxuoy7H65TPPpbytdGkDdgvVYWAeKRSXJhVRUvPa6xYtd+q5oqqmdUrE+qwDgqBbcscP56jAw== X-Received: by 2002:a5d:6b8e:: with SMTP id n14mr40850901wrx.96.1626864813315; Wed, 21 Jul 2021 03:53:33 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id o14sm26933641wrj.66.2021.07.21.03.53.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 03:53:33 -0700 (PDT) From: citral23 To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, citral23 Subject: [PATCH 1/6] iio/adc: ingenic: rename has_aux2 to has_aux_md Date: Wed, 21 Jul 2021 12:53:12 +0200 Message-Id: <20210721105317.36742-2-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210721105317.36742-1-cbranchereau@gmail.com> References: <20210721105317.36742-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The purpose of this property is to set the AUX_MD bits if true, no to describe the hardware. Rename it to a more appropriate name. Signed-off-by: Christophe Branchereau Reviewed-by: Paul Cercueil --- drivers/iio/adc/ingenic-adc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 34c03a264f74..40f2d8c2cf72 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -92,7 +92,7 @@ struct ingenic_adc_soc_data { const int *battery_scale_avail; size_t battery_scale_avail_size; unsigned int battery_vref_mode: 1; - unsigned int has_aux2: 1; + unsigned int has_aux_md: 1; const struct iio_chan_spec *channels; unsigned int num_channels; int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc); @@ -506,7 +506,7 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = { .battery_scale_avail = jz4725b_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = jz4725b_adc_init_clk_div, @@ -520,7 +520,7 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .battery_scale_avail = jz4740_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ @@ -534,7 +534,7 @@ static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { .battery_scale_avail = jz4770_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4770_adc_battery_scale_avail), .battery_vref_mode = false, - .has_aux2 = true, + .has_aux_md = true, .channels = jz4770_channels, .num_channels = ARRAY_SIZE(jz4770_channels), .init_clk_div = jz4770_adc_init_clk_div, @@ -581,7 +581,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, /* We cannot sample AUX/AUX2 in parallel. */ mutex_lock(&adc->aux_lock); - if (adc->soc_data->has_aux2 && engine == 0) { + if (adc->soc_data->has_aux_md && engine == 0) { bit = BIT(chan->channel == INGENIC_ADC_AUX2); ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); } From patchwork Wed Jul 21 10:53:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12390695 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E178C07E9B for ; Wed, 21 Jul 2021 11:34:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EBEE46108B for ; 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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id o14sm26933641wrj.66.2021.07.21.03.53.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 03:53:33 -0700 (PDT) From: citral23 To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, citral23 Subject: [PATCH 2/6] dt-bindings: iio/adc: add an INGENIC_ADC_AUX0 entry Date: Wed, 21 Jul 2021 12:53:13 +0200 Message-Id: <20210721105317.36742-3-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210721105317.36742-1-cbranchereau@gmail.com> References: <20210721105317.36742-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The JZ4760(B) socs have 3 AUX inputs, add an entry to prepare including the one named AUX in the sadc driver. Leaving the rest untouched as it's ABI. Signed-off-by: citral23 Reviewed-by: Paul Cercueil --- include/dt-bindings/iio/adc/ingenic,adc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/iio/adc/ingenic,adc.h b/include/dt-bindings/iio/adc/ingenic,adc.h index 4627a00e369e..a6ccc031635b 100644 --- a/include/dt-bindings/iio/adc/ingenic,adc.h +++ b/include/dt-bindings/iio/adc/ingenic,adc.h @@ -13,5 +13,6 @@ #define INGENIC_ADC_TOUCH_YN 6 #define INGENIC_ADC_TOUCH_XD 7 #define INGENIC_ADC_TOUCH_YD 8 +#define INGENIC_ADC_AUX0 9 #endif From patchwork Wed Jul 21 10:53:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12390701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA81DC636CA for ; Wed, 21 Jul 2021 11:34:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A5FC26108B for ; Wed, 21 Jul 2021 11:34:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238287AbhGUKx3 (ORCPT ); Wed, 21 Jul 2021 06:53:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240075AbhGUKNW (ORCPT ); Wed, 21 Jul 2021 06:13:22 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69124C061786; Wed, 21 Jul 2021 03:53:36 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id u1so1710140wrs.1; Wed, 21 Jul 2021 03:53:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VY/9svY8ri8J4HJB23mBSJ/+qTZUMwQ0pz41nlKr5Ho=; b=YWnO+USkjnO5T2m5gLAxX67ySUlO6++H2MCylJvm2p79QjAH8L51dWHjdB5aVay9kG JyO6dJQmu9Z1SguNUh7w+2oqP0Uxiz1XaoOaWmBk1pM9RGJMYGnS64YPoZBgKBNGhfnI t5IrU8t994999JKdPGzdSduTI9MSkq8PMhGJwQC0+fVBGDU3VjGFgH/3oXQW/mJzI8Gv ZyUCCXVwU9yMnoqU6DXigfdHsGQPFu+PQDZEfGdMgtowZFdSCoPHZehxB62LbfTLnQkP N2nTFlyarBGtaVZ1tAchYBJmt1VIFNGye1mxm+OlOre0PdhN3um+wYENiaUP1vL3OfFB w47g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VY/9svY8ri8J4HJB23mBSJ/+qTZUMwQ0pz41nlKr5Ho=; b=XSVOfQ3Iseyr41EZnSEY9DiL+/xQIJpFH14pq/vHvskgfY0bk7vanCxg8mL6fXxzvJ kO1jwr1N7eattUpKHexN6JSB0u/ienTHoiUnkKm7CoLh5cBmXgefs2Qwuz+bv6Xlu+U5 HF2XVRlbLH8vtpcPf+MDxb+K6ymQ7Di9cACWpjUzChPv2+2ud1hKpWBclEod2/onRfs7 Rkg96LthTArilsFcZVJrwVWou/F1J/LhCX03tvxBPSVHrrRmhBJz4rgf41HwxfdoCtMv KixMYearZMGYf+hbfoWKOk6wbV13PwHnzhsQ7TBfrzUSqvJaf0fsj3naVnHRDrCg28j8 UP8w== X-Gm-Message-State: AOAM533YuHQCvuE/+va3YVC2wZViIyhCAnjJtDlrbx4kRdC84ZHQeRNH ojL9tTnUMnF71AN1kzanTO0= X-Google-Smtp-Source: ABdhPJwEM7tQ+AFc/Peod8XhYAnaYCA6Afxl9x/dhxCyZk4i9BVstPwidcDJ1SLPirxcdROow7YB8w== X-Received: by 2002:a5d:64cc:: with SMTP id f12mr16661084wri.201.1626864814868; Wed, 21 Jul 2021 03:53:34 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id o14sm26933641wrj.66.2021.07.21.03.53.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 03:53:34 -0700 (PDT) From: citral23 To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, citral23 Subject: [PATCH 3/6] iio/adc: ingenic: add JZ4760 support to the sadc driver Date: Wed, 21 Jul 2021 12:53:14 +0200 Message-Id: <20210721105317.36742-4-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210721105317.36742-1-cbranchereau@gmail.com> References: <20210721105317.36742-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Signed-off-by: citral23 --- drivers/iio/adc/ingenic-adc.c | 64 +++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 40f2d8c2cf72..285e7aa8e37a 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -71,6 +71,7 @@ #define JZ4725B_ADC_BATTERY_HIGH_VREF_BITS 10 #define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986) #define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12 +#define JZ4760_ADC_BATTERY_VREF 2500 #define JZ4770_ADC_BATTERY_VREF 1200 #define JZ4770_ADC_BATTERY_VREF_BITS 12 @@ -295,6 +296,10 @@ static const int jz4740_adc_battery_scale_avail[] = { JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS, }; +static const int jz4760_adc_battery_scale_avail[] = { + JZ4760_ADC_BATTERY_VREF, JZ4770_ADC_BATTERY_VREF_BITS, +}; + static const int jz4770_adc_battery_raw_avail[] = { 0, 1, (1 << JZ4770_ADC_BATTERY_VREF_BITS) - 1, }; @@ -339,6 +344,8 @@ static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc) return 0; } + + static int jz4770_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc) { struct clk *parent_clk; @@ -400,6 +407,47 @@ static const struct iio_chan_spec jz4740_channels[] = { }, }; +static const struct iio_chan_spec jz4760_channels[] = { + { + .extend_name = "aux0", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX0, + .scan_index = -1, + }, + { + .extend_name = "aux", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX, + .scan_index = -1, + }, + { + .extend_name = "battery", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_BATTERY, + .scan_index = -1, + }, + { + .extend_name = "aux2", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX2, + .scan_index = -1, + }, +}; + static const struct iio_chan_spec jz4770_channels[] = { { .type = IIO_VOLTAGE, @@ -526,6 +574,20 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ }; +static const struct ingenic_adc_soc_data jz4760_adc_soc_data = { + .battery_high_vref = JZ4760_ADC_BATTERY_VREF, + .battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS, + .battery_raw_avail = jz4770_adc_battery_raw_avail, + .battery_raw_avail_size = ARRAY_SIZE(jz4770_adc_battery_raw_avail), + .battery_scale_avail = jz4760_adc_battery_scale_avail, + .battery_scale_avail_size = ARRAY_SIZE(jz4760_adc_battery_scale_avail), + .battery_vref_mode = false, + .has_aux_md = true, + .channels = jz4760_channels, + .num_channels = ARRAY_SIZE(jz4760_channels), + .init_clk_div = jz4770_adc_init_clk_div, +}; + static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { .battery_high_vref = JZ4770_ADC_BATTERY_VREF, .battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS, @@ -621,6 +683,7 @@ static int ingenic_adc_read_raw(struct iio_dev *iio_dev, return ingenic_adc_read_chan_info_raw(iio_dev, chan, val); case IIO_CHAN_INFO_SCALE: switch (chan->channel) { + case INGENIC_ADC_AUX0: case INGENIC_ADC_AUX: case INGENIC_ADC_AUX2: *val = JZ_ADC_AUX_VREF; @@ -832,6 +895,7 @@ static int ingenic_adc_probe(struct platform_device *pdev) static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, + { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, }; From patchwork Wed Jul 21 10:53:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12390699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 801A5C07E9B for ; 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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id o14sm26933641wrj.66.2021.07.21.03.53.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 03:53:35 -0700 (PDT) From: citral23 To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, citral23 Subject: [PATCH 4/6] iio/adc: ingenic: add JZ4760B support to the sadc driver Date: Wed, 21 Jul 2021 12:53:15 +0200 Message-Id: <20210721105317.36742-5-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210721105317.36742-1-cbranchereau@gmail.com> References: <20210721105317.36742-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The JZ4760B variant differs slightly from the JZ4760, in that it has a bit called VBAT_SEL in the CFG register. In order to correctly sample the battery voltage on existing handhelds using this SOC, the bit must be cleared. We leave the possibility to set the bit, by using the "ingenic,use-internal-divider" in the devicetree. Signed-off-by: citral23 --- drivers/iio/adc/ingenic-adc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 285e7aa8e37a..618150475421 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -37,6 +37,7 @@ #define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10) #define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16) #define JZ_ADC_REG_CFG_CMD_SEL BIT(22) +#define JZ_ADC_REG_CFG_VBAT_SEL BIT(30) #define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10)) #define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0 #define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16 @@ -869,6 +870,10 @@ static int ingenic_adc_probe(struct platform_device *pdev) /* Put hardware in a known passive state. */ writeb(0x00, adc->base + JZ_ADC_REG_ENABLE); writeb(0xff, adc->base + JZ_ADC_REG_CTRL); + + if (!device_property_present(dev, "ingenic,use-internal-divider")) /* JZ4760B specific */ + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0); + usleep_range(2000, 3000); /* Must wait at least 2ms. */ clk_disable(adc->clk); @@ -896,6 +901,7 @@ static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, + { .compatible = "ingenic,jz4760b-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, }; From patchwork Wed Jul 21 10:53:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12390703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62EE7C12002 for ; Wed, 21 Jul 2021 11:34:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 513806108B for ; Wed, 21 Jul 2021 11:34:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238457AbhGUKxe (ORCPT ); Wed, 21 Jul 2021 06:53:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240073AbhGUKNW (ORCPT ); Wed, 21 Jul 2021 06:13:22 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0F4DC061788; Wed, 21 Jul 2021 03:53:37 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id d12so1650588wre.13; Wed, 21 Jul 2021 03:53:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fTnZJfUUX7U9Vo16rWquZ2im3Sa9CLdFbpSdYfT291U=; b=hsec7tKhSjlTXQq2YtOIE88y8F6CcAj/5rk33LgavBNIiFyb1MvHw/KmFUwqWgPsTQ V3Wdsod2aqJBQYI0DvgqzJlcrsHEsDO/vgK1VtjAQ9cNpsnI+2fwbfSghd+WdFJakDdU NRy0r+O3FMad9T/oFJaUS+roFRDi3MF7QhD3+L6LRCHZl9/5gOWXaLFHhNfykULu/bkX EsFVOv3ACM5w1NhlUbZlLbk4F34MISeNlxdsztVekfTT455NfazXGUsXMk+g0ZmthRH/ cT2eo03ZYCJsOrU9HgRmq39ZLLe2o8rxuFbWN20mO9bUGTmfMaVfwP623Vg0E+cc+4QW XR9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fTnZJfUUX7U9Vo16rWquZ2im3Sa9CLdFbpSdYfT291U=; b=L+/DZovY3DeIo1iU8nq2La350T1uAcl8tSyiJ4BiSVfjUViErn9nyfJbhujLXd0iW5 BB6AG04dAHL8zi2OHGaZR3PaAtDSm8/oPnvgmDa1JA4i1O0k4Xu0/krm861+nXaqDACX xyUpIdtlufmkdRnwWOKxoyM1aEQVWwt1KcbkAcl+y7joJFO1FwXfyj9DZgm6lepUM8QZ 6D570ml7IBT+fVeeXwGNw3f6Gyu3pYDKDcGidf5CBoCQ4EokAxZNdUBi5G3ZhJpDhuO6 vOsMv8VrNlzMFJioadO6H1RExJwXQ8Zu699URLc3On6UV90jMU/OdmtVK73N0q0C8Lcg ZXcw== X-Gm-Message-State: AOAM530dnFtZeRfQHEkMBWiA9Gf6IHkfkBPr39thAms2Cz3Z86ISmPlr RABQg08DfDy9H8CoDCgFhkWuBS3UGbGgaj8N X-Google-Smtp-Source: ABdhPJyJbKuav1J0Ru6SFz5i5LiXEgKSvYCwniaHXYGhRw7HKlVq2gRB5NVAp+x49PN+RzabIMXLhg== X-Received: by 2002:a5d:6804:: with SMTP id w4mr41411375wru.417.1626864816413; Wed, 21 Jul 2021 03:53:36 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id o14sm26933641wrj.66.2021.07.21.03.53.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 03:53:36 -0700 (PDT) From: citral23 To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, citral23 Subject: [PATCH 5/6] iio/adc: ingenic: modify Date: Wed, 21 Jul 2021 12:53:16 +0200 Message-Id: <20210721105317.36742-6-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210721105317.36742-1-cbranchereau@gmail.com> References: <20210721105317.36742-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org The current code does not allow to set MD to 0 to sample AUX0, fix it for the JZ4760(B). Signed-off-by: citral23 --- drivers/iio/adc/ingenic-adc.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 618150475421..1edaae439a32 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -632,7 +632,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, struct iio_chan_spec const *chan, int *val) { - int bit, ret, engine = (chan->channel == INGENIC_ADC_BATTERY); + int cmd, ret, engine = (chan->channel == INGENIC_ADC_BATTERY); struct ingenic_adc *adc = iio_priv(iio_dev); ret = clk_enable(adc->clk); @@ -642,11 +642,22 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, return ret; } - /* We cannot sample AUX/AUX2 in parallel. */ + /* We cannot sample the aux channels in parallel. */ mutex_lock(&adc->aux_lock); if (adc->soc_data->has_aux_md && engine == 0) { - bit = BIT(chan->channel == INGENIC_ADC_AUX2); - ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); + switch (chan->channel) { + case INGENIC_ADC_AUX0: + cmd = 0; + break; + case INGENIC_ADC_AUX: + cmd = 1; + break; + case INGENIC_ADC_AUX2: + cmd = 2; + break; + } + + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, cmd); } ret = ingenic_adc_capture(adc, engine); @@ -654,6 +665,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, goto out; switch (chan->channel) { + case INGENIC_ADC_AUX0: case INGENIC_ADC_AUX: case INGENIC_ADC_AUX2: *val = readw(adc->base + JZ_ADC_REG_ADSDAT); From patchwork Wed Jul 21 10:53:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12390697 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 861B3C12002 for ; Wed, 21 Jul 2021 11:34:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5DFAA6108B for ; Wed, 21 Jul 2021 11:34:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238207AbhGUKxR (ORCPT ); Wed, 21 Jul 2021 06:53:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240044AbhGUKNV (ORCPT ); Wed, 21 Jul 2021 06:13:21 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6451C061793; Wed, 21 Jul 2021 03:53:38 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id l6so1081238wmq.0; Wed, 21 Jul 2021 03:53:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LJLPqjjadNqhWPoGAN+pkYM5Do/hyvJF240tN9r8QeY=; b=BBHF9cWJXUV0DxxVI5a6ZoitdphhzhjsBHqsoeK/iOSSpkbhNpWDC2G21o6D+ivFh6 Q88ZuIK3Oc3iqF2I4HnZ8/aOKY28bSFOTQK79Qhw9J6YwRPkyjwI+ts1K6sC0FTaZFpn 20MYCNk8R689/agbnGHFQSDUVTn5ue0L5FvJXjx0BOMFbO3oxAMHemuddEtzJVjdYD51 hxyQY4ZMwr+qw4Py+d5ESsNeR2HdeFotrEYcsUG4f9bM8YH6ZXXeat2eqMU47NaSEMdJ 32r3Jo9amfPs/+nN4yrPlzPAb+Hu9Y6XWmRRbSS78LTJXEvc4qdHhR0Aytp1wWSyQyRC bvFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LJLPqjjadNqhWPoGAN+pkYM5Do/hyvJF240tN9r8QeY=; b=b3mWjAnobzDueA9pO9HN4MPwRCO9Ez93C9zUyr7vI7W5arfb3axk1waBkqOsW9qBBo Hv4CIpUZocfqIvXRtLuUEKiP1t+imvsEOiuM2FCap66HqhrerEB3++zNrUuZI1nHPFho UMgoMwGaY/l16bx5juRNvrBYtFQmwtjE8cq7UKnvaQ315C0CwZQh6ScAawWzDjIs8wYO ylMZuMB0ejvGVhRc4j68AnD84xA/LN5sAbfQN0PVqBXVemBSTQFk+OHJxvfgrW5lYn+I gu7HvI4M+zhQa2RAaWqSDscSxrDGo4GjiSoqYshUTKqn4auoUXulnQXqZmclA5jFK4ZY eKZg== X-Gm-Message-State: AOAM532TTikwldgrf8k2E8OPaZofBXCDyeO5u4IRAnYaLQo97JzMq74n C0pQATwRkj7y2f1HdPFNixo= X-Google-Smtp-Source: ABdhPJwllgUANedBfKfd5LvirYSQm3kDpMoeWT4BPjiHaqIL4/PLmQnOYTN3WG2XLrbM6SRZWkqnZg== X-Received: by 2002:a1c:5458:: with SMTP id p24mr28502629wmi.131.1626864817224; Wed, 21 Jul 2021 03:53:37 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id o14sm26933641wrj.66.2021.07.21.03.53.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 03:53:37 -0700 (PDT) From: citral23 To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, citral23 Subject: [PATCH 6/6] dt-bindings: iio/adc: ingenic: add the JZ4760(B) socs to the sadc Documentation Date: Wed, 21 Jul 2021 12:53:17 +0200 Message-Id: <20210721105317.36742-7-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210721105317.36742-1-cbranchereau@gmail.com> References: <20210721105317.36742-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Signed-off-by: citral23 --- .../devicetree/bindings/iio/adc/ingenic,adc.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml index 433a3fb55a2e..1b423adba61d 100644 --- a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml @@ -23,6 +23,8 @@ properties: enum: - ingenic,jz4725b-adc - ingenic,jz4740-adc + - ingenic,jz4760-adc + - ingenic,jz4760b-adc - ingenic,jz4770-adc '#io-channel-cells': @@ -43,6 +45,12 @@ properties: interrupts: maxItems: 1 + ingenic,use-internal-divider: + description: + This property can be used to set VBAT_SEL in the JZ4760B CFG register + to sample the battery voltage from the internal divider. If absent, it + will sample the external divider. + required: - compatible - '#io-channel-cells' @@ -53,6 +61,7 @@ required: additionalProperties: false + examples: - | #include