From patchwork Fri Jul 23 11:29:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudio Fontana X-Patchwork-Id: 12395955 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23C3DC4338F for ; Fri, 23 Jul 2021 11:31:51 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9CB6F608FE for ; Fri, 23 Jul 2021 11:31:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9CB6F608FE Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:43104 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m6tPB-0005Xe-PS for qemu-devel@archiver.kernel.org; Fri, 23 Jul 2021 07:31:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m6tMv-0003Zm-O7 for qemu-devel@nongnu.org; Fri, 23 Jul 2021 07:29:30 -0400 Received: from smtp-out1.suse.de ([195.135.220.28]:54606) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m6tMq-000281-KO for qemu-devel@nongnu.org; Fri, 23 Jul 2021 07:29:29 -0400 Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 48ADA21E29; Fri, 23 Jul 2021 11:29:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1627039763; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=hLEV1q7Zp9Rw43Am7wFNZwBQD0B34B6HuRlsfq8IUiQ=; b=aMhfz+qYeBzvdEWETEJsbLv0F+59Wvuzqmkq5Fazcj/sLKJiwsStDFg3PkM4b2FMmjO4Ey ytyTy2+le9eOwcJDq4K1FFLRE1E+gJuiI9QGxC3jiwv7TPjze/N6wTseN8xpRZe9wHnMzW Q8cPhVxoqFjNSrreAYpP/YZHJ5/nuS0= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1627039763; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=hLEV1q7Zp9Rw43Am7wFNZwBQD0B34B6HuRlsfq8IUiQ=; b=EeY1bNmmM4s0nEqjvZIoqZ5lV9tAJhWoqp5NsIhFpxpkl4BSc3I0WpG+8YO1rtD0MqcKmj rJH2A4fHuLzHFYDA== Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id F211F13E02; Fri, 23 Jul 2021 11:29:22 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id NxDvOBKo+mCgHAAAMHmgww (envelope-from ); Fri, 23 Jul 2021 11:29:22 +0000 From: Claudio Fontana To: Peter Maydell , Paolo Bonzini Subject: [PATCH for-6.1 v2] i386: do not call cpudef-only models functions for max, host, base Date: Fri, 23 Jul 2021 13:29:21 +0200 Message-Id: <20210723112921.12637-1-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Received-SPF: pass client-ip=195.135.220.28; envelope-from=cfontana@suse.de; helo=smtp-out1.suse.de X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Bulekov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Claudio Fontana , Eduardo Habkost , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Some cpu properties have to be set only for cpu models in builtin_x86_defs, registered with x86_register_cpu_model_type, and not for cpu models "base", "max", and the subclass "host". These properties are the ones set by function x86_cpu_apply_props, (also including kvm_default_props, tcg_default_props), and the "vendor" property for the KVM and HVF accelerators. After recent refactoring of cpu, which also affected these properties, they were instead set unconditionally for all x86 cpus. This has been detected as a bug with Nested on AMD with cpu "host", as svm was not turned on by default, due to the wrongful setting of kvm_default_props via x86_cpu_apply_props, which set svm to "off". Rectify the bug introduced in commit "i386: split cpu accelerators" and document the functions that are builtin_x86_defs-only. Signed-off-by: Claudio Fontana Tested-by: Alexander Bulekov Fixes: f5cc5a5c ("i386: split cpu accelerators from cpu.c,"...) Resolves: https://gitlab.com/qemu-project/qemu/-/issues/477 --- target/i386/cpu.c | 19 ++++++- target/i386/host-cpu.c | 13 +++-- target/i386/kvm/kvm-cpu.c | 105 ++++++++++++++++++++------------------ target/i386/tcg/tcg-cpu.c | 11 ++-- 4 files changed, 89 insertions(+), 59 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 48b55ebd0a..edb97ebbbe 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4919,6 +4919,9 @@ static uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, return r; } +/* + * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. + */ void x86_cpu_apply_props(X86CPU *cpu, PropValue *props) { PropValue *pv; @@ -4931,7 +4934,11 @@ void x86_cpu_apply_props(X86CPU *cpu, PropValue *props) } } -/* Apply properties for the CPU model version specified in model */ +/* + * Apply properties for the CPU model version specified in model. + * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. + */ + static void x86_cpu_apply_version_props(X86CPU *cpu, X86CPUModel *model) { const X86CPUVersionDefinition *vdef; @@ -4960,7 +4967,9 @@ static void x86_cpu_apply_version_props(X86CPU *cpu, X86CPUModel *model) assert(vdef->version == version); } -/* Load data from X86CPUDefinition into a X86CPU object +/* + * Load data from X86CPUDefinition into a X86CPU object. + * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. */ static void x86_cpu_load_model(X86CPU *cpu, X86CPUModel *model) { @@ -5051,6 +5060,12 @@ static void x86_register_cpu_model_type(const char *name, X86CPUModel *model) type_register(&ti); } + +/* + * register builtin_x86_defs; + * "max", "base" and subclasses ("host") are not registered here. + * See x86_cpu_register_types for all model registrations. + */ static void x86_register_cpudef_types(const X86CPUDefinition *def) { X86CPUModel *m; diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c index 4ea9e354ea..10f8aba86e 100644 --- a/target/i386/host-cpu.c +++ b/target/i386/host-cpu.c @@ -150,13 +150,16 @@ void host_cpu_vendor_fms(char *vendor, int *family, int *model, int *stepping) void host_cpu_instance_init(X86CPU *cpu) { - uint32_t ebx = 0, ecx = 0, edx = 0; - char vendor[CPUID_VENDOR_SZ + 1]; + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); - host_cpuid(0, 0, NULL, &ebx, &ecx, &edx); - x86_cpu_vendor_words2str(vendor, ebx, edx, ecx); + if (xcc->model) { + uint32_t ebx = 0, ecx = 0, edx = 0; + char vendor[CPUID_VENDOR_SZ + 1]; - object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort); + host_cpuid(0, 0, NULL, &ebx, &ecx, &edx); + x86_cpu_vendor_words2str(vendor, ebx, edx, ecx); + object_property_set_str(OBJECT(cpu), "vendor", vendor, &error_abort); + } } void host_cpu_max_instance_init(X86CPU *cpu) diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index bbe817764d..d95028018e 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -52,47 +52,6 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) return host_cpu_realizefn(cs, errp); } -/* - * KVM-specific features that are automatically added/removed - * from all CPU models when KVM is enabled. - * - * NOTE: features can be enabled by default only if they were - * already available in the oldest kernel version supported - * by the KVM accelerator (see "OS requirements" section at - * docs/system/target-i386.rst) - */ -static PropValue kvm_default_props[] = { - { "kvmclock", "on" }, - { "kvm-nopiodelay", "on" }, - { "kvm-asyncpf", "on" }, - { "kvm-steal-time", "on" }, - { "kvm-pv-eoi", "on" }, - { "kvmclock-stable-bit", "on" }, - { "x2apic", "on" }, - { "kvm-msi-ext-dest-id", "off" }, - { "acpi", "off" }, - { "monitor", "off" }, - { "svm", "off" }, - { NULL, NULL }, -}; - -void x86_cpu_change_kvm_default(const char *prop, const char *value) -{ - PropValue *pv; - for (pv = kvm_default_props; pv->prop; pv++) { - if (!strcmp(pv->prop, prop)) { - pv->value = value; - break; - } - } - - /* - * It is valid to call this function only for properties that - * are already present in the kvm_default_props table. - */ - assert(pv->prop); -} - static bool lmce_supported(void) { uint64_t mce_cap = 0; @@ -150,21 +109,69 @@ static void kvm_cpu_xsave_init(void) } } +/* + * KVM-specific features that are automatically added/removed + * from cpudef models when KVM is enabled. + * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. + * + * NOTE: features can be enabled by default only if they were + * already available in the oldest kernel version supported + * by the KVM accelerator (see "OS requirements" section at + * docs/system/target-i386.rst) + */ +static PropValue kvm_default_props[] = { + { "kvmclock", "on" }, + { "kvm-nopiodelay", "on" }, + { "kvm-asyncpf", "on" }, + { "kvm-steal-time", "on" }, + { "kvm-pv-eoi", "on" }, + { "kvmclock-stable-bit", "on" }, + { "x2apic", "on" }, + { "kvm-msi-ext-dest-id", "off" }, + { "acpi", "off" }, + { "monitor", "off" }, + { "svm", "off" }, + { NULL, NULL }, +}; + +/* + * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. + */ +void x86_cpu_change_kvm_default(const char *prop, const char *value) +{ + PropValue *pv; + for (pv = kvm_default_props; pv->prop; pv++) { + if (!strcmp(pv->prop, prop)) { + pv->value = value; + break; + } + } + + /* + * It is valid to call this function only for properties that + * are already present in the kvm_default_props table. + */ + assert(pv->prop); +} + static void kvm_cpu_instance_init(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); host_cpu_instance_init(cpu); - if (!kvm_irqchip_in_kernel()) { - x86_cpu_change_kvm_default("x2apic", "off"); - } else if (kvm_irqchip_is_split() && kvm_enable_x2apic()) { - x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on"); - } - - /* Special cases not set in the X86CPUDefinition structs: */ + if (xcc->model) { + /* only applies to builtin_x86_defs cpus */ + if (!kvm_irqchip_in_kernel()) { + x86_cpu_change_kvm_default("x2apic", "off"); + } else if (kvm_irqchip_is_split() && kvm_enable_x2apic()) { + x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on"); + } - x86_cpu_apply_props(cpu, kvm_default_props); + /* Special cases not set in the X86CPUDefinition structs: */ + x86_cpu_apply_props(cpu, kvm_default_props); + } if (cpu->max_features) { kvm_cpu_max_instance_init(cpu); diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index e96ec9bbcc..e86bc93384 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -99,7 +99,8 @@ static void tcg_cpu_xsave_init(void) } /* - * TCG-specific defaults that override all CPU models when using TCG + * TCG-specific defaults that override cpudef models when using TCG. + * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. */ static PropValue tcg_default_props[] = { { "vme", "off" }, @@ -109,8 +110,12 @@ static PropValue tcg_default_props[] = { static void tcg_cpu_instance_init(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); - /* Special cases not set in the X86CPUDefinition structs: */ - x86_cpu_apply_props(cpu, tcg_default_props); + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); + + if (xcc->model) { + /* Special cases not set in the X86CPUDefinition structs: */ + x86_cpu_apply_props(cpu, tcg_default_props); + } tcg_cpu_xsave_init(); } From patchwork Tue Nov 30 13:42:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Woodhouse X-Patchwork-Id: 12647355 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A191CC433EF for ; Tue, 30 Nov 2021 14:02:58 +0000 (UTC) Received: from localhost ([::1]:47664 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ms3ii-0003HU-7f for qemu-devel@archiver.kernel.org; Tue, 30 Nov 2021 09:02:57 -0500 Received: from eggs.gnu.org ([209.51.188.92]:56816) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ms3P5-0007bD-9t for qemu-devel@nongnu.org; Tue, 30 Nov 2021 08:42:39 -0500 Received: from [2607:7c80:54:e::133] (port=35974 helo=bombadil.infradead.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ms3P2-0002mb-SL for qemu-devel@nongnu.org; Tue, 30 Nov 2021 08:42:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=MAFvzvm9yPzRbdbUhmI26AoKprJGkAW3fVX8qCPQWkg=; b=0kkd6n7a5RqHhesfC0FHUDrkzD aZ8/yplmPD83ZVCQeGJPBIt1fKRY3Oi+jFlkD6l5P+lFIhVENSEkcAPKkoPCkXzo5WrNb43NZzVrA W26OceKMSt+3DGQRKMrQmww1deI/XTXtJO8boNf7J2sWLoIpxVrquiH+diI2B02hWqiCKgXyGqFkT 7TtFA4oG+Brf299CC9ggrSd6wbD3aRIzm8/hvHCTTdpVa+vpDSN7VazXV5h1i0issnsOWm2Kfcktu OXMQst5llSmkzVOExaiBlxpnS/uAkfX/mozxKcTMnUrHDxg/6vfaUUyKCfYWPzWfyv+lLnYTzYjLG U3BG17bA==; Received: from 54-240-197-235.amazon.com ([54.240.197.235] helo=freeip.amazon.com) by bombadil.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1ms3Ox-005NYH-Rz; Tue, 30 Nov 2021 13:42:32 +0000 Message-ID: <26e2621ab6cef4d8c3e944dc9ebb6d2d0d5e9d2d.camel@infradead.org> Subject: [PATCH 2/2] intel_iommu: Fix irqchip / X2APIC configuration checks From: David Woodhouse To: Claudio Fontana , "peter.maydell@linaro.org" , "pbonzini@redhat.com" Date: Tue, 30 Nov 2021 13:42:29 +0000 In-Reply-To: <41878a65209a3e1fc00bdafd216004c9f71b90fa.camel@infradead.org> References: <20210723112921.12637-1-cfontana@suse.de> <1102c315addf2f2fffc49222ab5be118e7ae9b0f.camel@amazon.co.uk> <483ebe21-2972-90c0-bc9a-ce922518632d@suse.de> <93efa230-fb6b-fdc7-a696-c555676da2b4@suse.de> <9990ade1-ccfa-a712-94c0-1667f5b3094f@suse.de> <41878a65209a3e1fc00bdafd216004c9f71b90fa.camel@infradead.org> User-Agent: Evolution 3.36.5-0ubuntu1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by bombadil.infradead.org. See http://www.infradead.org/rpr.html X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:7c80:54:e::133 (failed) Received-SPF: none client-ip=2607:7c80:54:e::133; envelope-from=BATV+3d53dfa5199d6a29bf1d+6673+infradead.org+dwmw2@bombadil.srs.infradead.org; helo=bombadil.infradead.org X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "alxndr@bu.edu" , "philmd@redhat.com" , "lovemrd@gmail.com" , "ehabkost@redhat.com" , "qemu-devel@nongnu.org" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We don't need to check kvm_enable_x2apic(). It's perfectly OK to support interrupt remapping even if we can't address CPUs above 254. Kind of pointless, but still functional. The check on kvm_enable_x2apic() needs to happen *anyway* in order to allow CPUs above 254 even without an IOMMU, so allow that to happen elsewhere. However, we do require the *split* irqchip in order to rewrite I/OAPIC destinations. So fix that check while we're here. Signed-off-by: David Woodhouse Acked-by: Claudio Fontana --- hw/i386/intel_iommu.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 294499ee20..b0439d0fbf 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3746,15 +3746,10 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; } if (s->intr_eim == ON_OFF_AUTO_ON && !s->buggy_eim) { - if (!kvm_irqchip_in_kernel()) { + if (!kvm_irqchip_is_split()) { error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split"); return false; } - if (!kvm_enable_x2apic()) { - error_setg(errp, "eim=on requires support on the KVM side" - "(X2APIC_API, first shipped in v4.7)"); - return false; - } } /* Currently only address widths supported are 39 and 48 bits */