From patchwork Mon Jul 26 18:06:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 12400457 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA1D9C4320A for ; Mon, 26 Jul 2021 18:07:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A4EAF60F9E for ; Mon, 26 Jul 2021 18:07:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232302AbhGZR05 (ORCPT ); Mon, 26 Jul 2021 13:26:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231248AbhGZR04 (ORCPT ); Mon, 26 Jul 2021 13:26:56 -0400 Received: from mail-io1-xd30.google.com (mail-io1-xd30.google.com [IPv6:2607:f8b0:4864:20::d30]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36630C061765; Mon, 26 Jul 2021 11:07:24 -0700 (PDT) Received: by mail-io1-xd30.google.com with SMTP id m13so12963906iol.7; Mon, 26 Jul 2021 11:07:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/DAVMzxy/IYYUDYXRGPCeffz2GlNoI3MdFX4pa4Idb0=; b=ZZtSRtShVMZU3pPl9LYsw8iPqe5Y8FA+qIAFWyEkzo4dsU5i5n12K3ADJzrwUk7usd BJCbDfq7dIBnBZKZLWPcQ7e2zYtUEBka/210mx2H4yr6hADX1EUX/o7aTTqbAafQdiBc sPx/+nVxgOXmafoguWHhrgaQw9lRZF/ot4iphNvqFTKhf318aLD0MAevIBEauMyQGzY1 Z1o9vmFgbH10wRUyGtTyZHLnOhcAWwAxHv5PWOEX6KpcMbTyzJeWIIOvBg7/NQS+7Q7R W+5AWlKOLprHYkYSj5e+FEzurg1qxpPjGdAgqUioXKXxK5buXi/toyplIhMYYNCgRS1f Logw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/DAVMzxy/IYYUDYXRGPCeffz2GlNoI3MdFX4pa4Idb0=; b=Flg7RZG5gxcv/YZPm/Fiapmu3OhGcsbAs+yqeaoirK/HlcoAm7v6TPuSiQgr5klSFX mBwjYXfE/x0zPfrcSGEZkah2rwk4wCCn1jCxZNKP4vYC20iZ+Z3sDqE3pq8fVgsS+pdZ BQf5t+IPghymZM/67eGSjjomggc7yhjH+UQBslYgmYRZM3S0OhELaKNMpJ1w5lZSh2Or h7V+GHsJHl6gELIkwNYbcE/nugECrr+0QQc1WCMffOWyCOQzzwVqfi901is7iewykkTh Y7vch18T9/Hf7Sv84N+V9kZSdue/4yxR5rZ0WIaHR5aibHWX8+1thYsgc3EyG9gfH4ZG 3Yaw== X-Gm-Message-State: AOAM532oj+mUOJTkl59v6uinp0aYb9UeCVUSqgu0WhVkLjcU9CaieU6Q zKtxDtKt5Xlfkg4CFt53ev0GcMXjGI5fPg== X-Google-Smtp-Source: ABdhPJykjvEtW5pdvBTUspPqr67gxXVkkltMchn8/roCkdSLBULK21lTnVQg4wJ1D74TzKu1x3cQZw== X-Received: by 2002:a6b:db18:: with SMTP id t24mr16003319ioc.163.1627322843651; Mon, 26 Jul 2021 11:07:23 -0700 (PDT) Received: from auth1-smtp.messagingengine.com (auth1-smtp.messagingengine.com. [66.111.4.227]) by smtp.gmail.com with ESMTPSA id s21sm336994iot.33.2021.07.26.11.07.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:23 -0700 (PDT) Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailauth.nyi.internal (Postfix) with ESMTP id 266A327C0068; Mon, 26 Jul 2021 14:07:22 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Mon, 26 Jul 2021 14:07:22 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:21 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 1/8] PCI: Introduce domain_nr in pci_host_bridge Date: Tue, 27 Jul 2021 02:06:50 +0800 Message-Id: <20210726180657.142727-2-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently we retrieve the PCI domain number of the host bridge from the bus sysdata (or pci_config_window if PCI_DOMAINS_GENERIC=y). Actually we have the information at PCI host bridge probing time, and it makes sense that we store it into pci_host_bridge. One benefit of doing so is the requirement for supporting PCI on Hyper-V for ARM64, because the host bridge of Hyper-V doesn't have pci_config_window, whereas ARM64 is a PCI_DOMAINS_GENERIC=y arch, so we cannot retrieve the PCI domain number from pci_config_window on ARM64 Hyper-V guest. As the preparation for ARM64 Hyper-V PCI support, we introduce the domain_nr in pci_host_bridge and a sentinel value to allow drivers to set domain numbers properly at probing time. Currently CONFIG_PCI_DOMAINS_GENERIC=y archs are only users of this newly-introduced field. Signed-off-by: Boqun Feng Acked-by: Bjorn Helgaas --- drivers/pci/probe.c | 6 +++++- include/linux/pci.h | 11 +++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 79177ac37880..60c50d4f156f 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -594,6 +594,7 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) bridge->native_pme = 1; bridge->native_ltr = 1; bridge->native_dpc = 1; + bridge->domain_nr = PCI_DOMAIN_NR_NOT_SET; device_initialize(&bridge->dev); } @@ -898,7 +899,10 @@ static int pci_register_host_bridge(struct pci_host_bridge *bridge) bus->ops = bridge->ops; bus->number = bus->busn_res.start = bridge->busnr; #ifdef CONFIG_PCI_DOMAINS_GENERIC - bus->domain_nr = pci_bus_find_domain_nr(bus, parent); + if (bridge->domain_nr == PCI_DOMAIN_NR_NOT_SET) + bus->domain_nr = pci_bus_find_domain_nr(bus, parent); + else + bus->domain_nr = bridge->domain_nr; #endif b = pci_find_bus(pci_domain_nr(bus), bridge->busnr); diff --git a/include/linux/pci.h b/include/linux/pci.h index 540b377ca8f6..01aa201e1df0 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -526,6 +526,16 @@ static inline int pci_channel_offline(struct pci_dev *pdev) return (pdev->error_state != pci_channel_io_normal); } +/* + * Currently in ACPI spec, for each PCI host bridge, PCI Segment + * Group number is limited to a 16-bit value, therefore (int)-1 is + * not a valid PCI domain number, and can be used as a sentinel + * value indicating ->domain_nr is not set by the driver (and + * CONFIG_PCI_DOMAINS_GENERIC=y archs will set it with + * pci_bus_find_domain_nr()). + */ +#define PCI_DOMAIN_NR_NOT_SET (-1) + struct pci_host_bridge { struct device dev; struct pci_bus *bus; /* Root bus */ @@ -533,6 +543,7 @@ struct pci_host_bridge { struct pci_ops *child_ops; void *sysdata; int busnr; + int domain_nr; struct list_head windows; /* resource_entry */ struct list_head dma_ranges; /* dma ranges resource list */ u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */ From patchwork Mon Jul 26 18:06:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 12400459 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE76EC432BE for ; Mon, 26 Jul 2021 18:07:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9D9F260F8F for ; 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[66.111.4.227]) by smtp.gmail.com with ESMTPSA id j20sm316369ile.17.2021.07.26.11.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:24 -0700 (PDT) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailauth.nyi.internal (Postfix) with ESMTP id 4F23427C0066; Mon, 26 Jul 2021 14:07:23 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Mon, 26 Jul 2021 14:07:23 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:22 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 2/8] PCI: Support populating MSI domains of root buses via bridges Date: Tue, 27 Jul 2021 02:06:51 +0800 Message-Id: <20210726180657.142727-3-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently, at probing time, the MSI domains of root buses are populated if either the information of MSI domain is available from firmware (DT or ACPI), or arch-specific sysdata is used to pass the fwnode of the MSI domain. These two conditions don't cover all, e.g. Hyper-V virtual PCI on ARM64, which doesn't have the MSI information in the firmware and couldn't use arch-specific sysdata because running on an architecture with PCI_DOMAINS_GENERIC=y. To support populating MSI domains of the root buses at the probing when neither of the above condition is true, the ->msi_domain of the corresponding bridge device is used: in pci_host_bridge_msi_domain(), which should return the MSI domain of the root bus, the ->msi_domain of the corresponding bridge is fetched first as a potential value of the MSI domain of the root bus. In order to use the approach to populate MSI domains, the driver needs to dev_set_msi_domain() on the bridge before calling pci_register_host_bridge(), and makes sure GENERIC_MSI_IRQ_DOMAIN=y. Another advantage of this new approach is providing an arch-independent way to populate MSI domains, which allows sharing the driver code as much as possible between architectures. Originally-by: Arnd Bergmann Signed-off-by: Boqun Feng Acked-by: Bjorn Helgaas --- drivers/pci/probe.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 60c50d4f156f..ea7f2a57e2f5 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -829,11 +829,15 @@ static struct irq_domain *pci_host_bridge_msi_domain(struct pci_bus *bus) { struct irq_domain *d; + /* If the host bridge driver sets a MSI domain of the bridge, use it */ + d = dev_get_msi_domain(bus->bridge); + /* * Any firmware interface that can resolve the msi_domain * should be called from here. */ - d = pci_host_bridge_of_msi_domain(bus); + if (!d) + d = pci_host_bridge_of_msi_domain(bus); if (!d) d = pci_host_bridge_acpi_msi_domain(bus); From patchwork Mon Jul 26 18:06:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 12400461 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68ADBC4338F for ; Mon, 26 Jul 2021 18:07:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5541D60F8F for ; Mon, 26 Jul 2021 18:07:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232541AbhGZR07 (ORCPT ); Mon, 26 Jul 2021 13:26:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232359AbhGZR06 (ORCPT ); Mon, 26 Jul 2021 13:26:58 -0400 Received: from mail-io1-xd2d.google.com (mail-io1-xd2d.google.com [IPv6:2607:f8b0:4864:20::d2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE4E5C061757; Mon, 26 Jul 2021 11:07:26 -0700 (PDT) Received: by mail-io1-xd2d.google.com with SMTP id f11so13003668ioj.3; Mon, 26 Jul 2021 11:07:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LHrsItUFYAp+yhbZpF5x7FyTurt+NzbD/q2wgRgWa4g=; b=AcYJCK4IAtJVVb1NLiTC/jhNqsHskratKVULEK2AcYvaJf08IOpPv6Q3bVRBWPGu8h 5cMcNV8R/3CwKyZGVTHBgxaNDz3c5SulIWjB2hmBMQFZwhS9pSXAVFHPrTQLeWTukOjr k6qAZaVrwxYPPmfs2CuAuSm3WAGCaOXlI+LQ3tLklMbdOP7YIzuQ/KsnV/Hhz//SD6qx Y7H7D9A+TJqjKpzAWAh7s/J+HFJu/v/UCUAlOi0RwLSJerNNTCd73EAXtP/tmSr1PbG6 f0Ht+C3pIdgxhLkbMMJ60tKdyfpqtkTTzAqBNjvMShIYyCsovnJAVdSZ7Nw0Go/ye1Iv ToyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LHrsItUFYAp+yhbZpF5x7FyTurt+NzbD/q2wgRgWa4g=; b=E7G7uuLqzrU/GTzzGoA7tOJDlM84r83vXw12D/kl+2J8SZPfCJ3A5rlJFeV/myqgtz Mga/cufNKJr1I6/u00onQeicTRM8Bhjvz5tu3Cdpsx0Dqu1f77ws6j7kGzEqdmf1cFz3 nI1AgS5RKA8sPlgaQGLRKTZPq5Zfds6gsm6+tYFYylToNAxWLaQ7r10i7Qxqpb03nTyy mj+9vne2QKjXok1gl/soT0O/WfZWdINQG1atpafFwyJYnC0a6s9Pe18n8p2aZRbO6zBL hzFxGyWZUsmoKT2/Gw6OpS7QtmKQ8z7affpH/hP+3eOhVE6wCdFtjnY4/IrMPJkQf28r Ppfw== X-Gm-Message-State: AOAM5310/cOjVGUgg+v4TEuNQdF1hKUOjKTK94+sl8W3bPpEBcm8wRtO Y1GfyZ0oO2BIAhk5Yx2uADk= X-Google-Smtp-Source: ABdhPJyyjproPpnhdk5Y+TcJ2Ft2rCFKihz1P0YZ7etQvYq41fU7f2wjmMJyy3cRbHKH9jcLhAD+kQ== X-Received: by 2002:a05:6638:148e:: with SMTP id j14mr17993794jak.136.1627322846198; Mon, 26 Jul 2021 11:07:26 -0700 (PDT) Received: from auth1-smtp.messagingengine.com (auth1-smtp.messagingengine.com. [66.111.4.227]) by smtp.gmail.com with ESMTPSA id y14sm286275ilq.6.2021.07.26.11.07.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:25 -0700 (PDT) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailauth.nyi.internal (Postfix) with ESMTP id B689327C0066; Mon, 26 Jul 2021 14:07:24 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Mon, 26 Jul 2021 14:07:24 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:24 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 3/8] arm64: PCI: Restructure pcibios_root_bridge_prepare() Date: Tue, 27 Jul 2021 02:06:52 +0800 Message-Id: <20210726180657.142727-4-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Restructure the pcibios_root_bridge_prepare() as the preparation for supporting cases when no real ACPI device is related to the PCI host bridge. No functional change. Signed-off-by: Boqun Feng Acked-by: Catalin Marinas --- arch/arm64/kernel/pci.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index 1006ed2d7c60..5148ae242780 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -82,14 +82,19 @@ int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) { - if (!acpi_disabled) { - struct pci_config_window *cfg = bridge->bus->sysdata; - struct acpi_device *adev = to_acpi_device(cfg->parent); - struct device *bus_dev = &bridge->bus->dev; + struct pci_config_window *cfg; + struct acpi_device *adev; + struct device *bus_dev; - ACPI_COMPANION_SET(&bridge->dev, adev); - set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev))); - } + if (acpi_disabled) + return 0; + + cfg = bridge->bus->sysdata; + adev = to_acpi_device(cfg->parent); + bus_dev = &bridge->bus->dev; + + ACPI_COMPANION_SET(&bridge->dev, adev); + set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev))); return 0; } From patchwork Mon Jul 26 18:06:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 12400463 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30CF1C4338F for ; Mon, 26 Jul 2021 18:07:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1841460F90 for ; Mon, 26 Jul 2021 18:07:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232791AbhGZR1A (ORCPT ); Mon, 26 Jul 2021 13:27:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231248AbhGZR07 (ORCPT ); Mon, 26 Jul 2021 13:26:59 -0400 Received: from mail-io1-xd2c.google.com (mail-io1-xd2c.google.com [IPv6:2607:f8b0:4864:20::d2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1F42C061757; Mon, 26 Jul 2021 11:07:27 -0700 (PDT) Received: by mail-io1-xd2c.google.com with SMTP id m13so12964205iol.7; Mon, 26 Jul 2021 11:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=drzvjYjf9v4fqS1iU+Dz/o3PJvwLUgUtNuIzGT8WydQ=; b=dYH2Rpw/sGNj8TqMiLdymjdVY0FzhPA2uRtfUYyplAfZJUPu2kQNs9ZE5ukJ7zwrqI spKKtLHkqgweKrKQJkL33rVdZmel/h2nL+DpEXiEFU+tQ6VzbXyussz3pEKylFicPeXV 63B2VUJf1ckMqk4adXnYjxg5pWrY8Y2nalAejKBp+M2C1bchiqbIoo3V1NwZWKC23Qa0 K/q+U4zfKlC4q3xXgy4R4SOgZSxlHJLWpmJUkuBWCcYlT3/y0zgYT59W06F4n06bvQQH MDpf1W68m5KMPyJTtCSMU7STejgPaLwpkCl8qbSCQuIYAEw1qdXGLp9BVlmyxW6H5L46 dSvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=drzvjYjf9v4fqS1iU+Dz/o3PJvwLUgUtNuIzGT8WydQ=; b=PGlVJzWPd5lK5qv87Z87Yd+Tax8AZBBHc2THWncxe7NNkHcR29HRjkRjruEe86hlTt byo3u16rlHfv6HipoPY40lmJSrx0ekvhWQxU0AqLDTlVGSOzHporT3U7MSgG4ZE3FQue PE4GJxsuVlEeRnbTN+/5pJ9hNIJKO2p4g7hWMp7FttXF3kEutkFD7dRbv3ercBkg3CNi VeeD81VQU/pW/Ri79qBKmn6k3e4e4waNYqGo+NpTIWHdnJmAQUa8ou1hEjR8C2y1MdPq CD0haTjRmHTxsN961l1EPy0gkH89edkgN+6g2h+P7ErnujSmkPwQyB1vvpmRcQAxqBlX YVKQ== X-Gm-Message-State: AOAM533qpfFFUGKZlHsHnt/tJg2Ce08yRUA/iyUALyObQR8Ryq+wbdmT byO3BnQPQP9TygjjIdOhBBc= X-Google-Smtp-Source: ABdhPJwYZr8saZ1l0/26xD/I+LMdt9FzRCWubyN+UOi7ghTOrLlNcA6F9VTgZcmh0ysNN5b21EezDQ== X-Received: by 2002:a6b:1685:: with SMTP id 127mr15950564iow.135.1627322847362; Mon, 26 Jul 2021 11:07:27 -0700 (PDT) Received: from auth1-smtp.messagingengine.com (auth1-smtp.messagingengine.com. [66.111.4.227]) by smtp.gmail.com with ESMTPSA id a1sm264889ilp.1.2021.07.26.11.07.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:26 -0700 (PDT) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailauth.nyi.internal (Postfix) with ESMTP id ED4CE27C0068; Mon, 26 Jul 2021 14:07:25 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Mon, 26 Jul 2021 14:07:25 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:25 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 4/8] arm64: PCI: Support root bridge preparation for Hyper-V Date: Tue, 27 Jul 2021 02:06:53 +0800 Message-Id: <20210726180657.142727-5-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently at root bridge preparation, the corresponding ACPI device will be set as the companion, however for a Hyper-V virtual PCI root bridge, there is no corresponding ACPI device, because a Hyper-V virtual PCI root bridge is discovered via VMBus rather than ACPI table. In order to support this, we need to make pcibios_root_bridge_prepare() work with cfg->parent being NULL. Use a NULL pointer as the ACPI device if there is no corresponding ACPI device, and this is fine because: 1) ACPI_COMPANION_SET() can work with the second parameter being NULL, 2) semantically, if a NULL pointer is set via ACPI_COMPANION_SET(), ACPI_COMPANION() (the read API for this field) will return NULL, and since ACPI_COMPANION() may return NULL, so users must have handled the cases where it returns NULL, and 3) since there is no corresponding ACPI device, it would be wrong to use any other value here. Signed-off-by: Boqun Feng Acked-by: Catalin Marinas --- arch/arm64/kernel/pci.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index 5148ae242780..2276689b5411 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -90,7 +90,17 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) return 0; cfg = bridge->bus->sysdata; - adev = to_acpi_device(cfg->parent); + + /* + * On Hyper-V there is no corresponding ACPI device for a root bridge, + * therefore ->parent is set as NULL by the driver. And set 'adev' as + * NULL in this case because there is no proper ACPI device. + */ + if (!cfg->parent) + adev = NULL; + else + adev = to_acpi_device(cfg->parent); + bus_dev = &bridge->bus->dev; ACPI_COMPANION_SET(&bridge->dev, adev); From patchwork Mon Jul 26 18:06:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 12400465 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF5C4C4338F for ; Mon, 26 Jul 2021 18:07:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B53D060F6F for ; Mon, 26 Jul 2021 18:07:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232941AbhGZR1E (ORCPT ); Mon, 26 Jul 2021 13:27:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232788AbhGZR1A (ORCPT ); Mon, 26 Jul 2021 13:27:00 -0400 Received: from mail-io1-xd33.google.com (mail-io1-xd33.google.com [IPv6:2607:f8b0:4864:20::d33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08C07C061757; Mon, 26 Jul 2021 11:07:29 -0700 (PDT) Received: by mail-io1-xd33.google.com with SMTP id r18so13034243iot.4; Mon, 26 Jul 2021 11:07:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=72T2tgkNXoiemTTwhzHsPU9qvyDpQPAl/IgD/AO0ZcQ=; b=RzQqnggOpmkCiUVlYIQL4zhzcVCaR7CUIUJcbZje3n0c/vOsBYDDf0AEDCFqJqjVw2 Dp3W7AI3KH20+h1hvIHH4cf3iGaWzpElf8XSPXzdgwAYbCaEPNNYOJcF2HpwriEi7+78 dgS/pHTweJDoYd5WvoBpqBJD6xl0HCrE89f5Gts34f+ljLR3B4IvNt2oIyCKohpNvXWd zfVlv251JzVB+cRo2Ou48m3NcJM7VCSTvi6s7mnFJuBRPQM+t/kC1dg10X0I4T7zMeo+ vlIFqtBgWTJFGjRG8n4LW+OG2gIfuGxyf9WDT3yP4RaB+jzFGdQWrw36G3pcOSCBLtiE e0SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=72T2tgkNXoiemTTwhzHsPU9qvyDpQPAl/IgD/AO0ZcQ=; b=LPTwJo/6LdUplznaedgqtTXGfYrXnZI2g6To8BhVzYFJpYPDRLKuv9iC8q8xoS3CJv F3Wdc/zs0w8+oVxe5CwooIquBy8LDrJXL771X959JV3KIrgeE/OSiY8ItjGF4jhghtjZ NRS/9j3sr/f14AKmUgajxtjQ3/2OCaforYdvgTBjS/Y4R4j735TW1hSCxat4htPujhMu wOWiBFemW3IaZlaEzrDjyHx+Gj6t2i7DZcFbafn4hKPDNivEtwzmO+GGuyudkdF5Ed1B fkMl6YOooAQoosnj383/Avy/bafN8nGcKfGuCl6nFajm0Piz7yeafwScdmWxzJIfsRHJ EPpQ== X-Gm-Message-State: AOAM5304rWrHBOXrZ/NFcalg9QenNwDwM3Jh/9cYsIDu4h96KHUrPZbl tqr/LYnAi74Bmcm+mweZ6D4= X-Google-Smtp-Source: ABdhPJxXwf7MgIN6X14/XkQVo1ARysCrKgFFByO+plxAreQkzmAdOWciCJ3nqw9S/KdBeRn1GukBfA== X-Received: by 2002:a5e:9513:: with SMTP id r19mr15735512ioj.156.1627322848502; Mon, 26 Jul 2021 11:07:28 -0700 (PDT) Received: from auth1-smtp.messagingengine.com (auth1-smtp.messagingengine.com. [66.111.4.227]) by smtp.gmail.com with ESMTPSA id u12sm357949iog.54.2021.07.26.11.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:28 -0700 (PDT) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailauth.nyi.internal (Postfix) with ESMTP id 3395527C0066; Mon, 26 Jul 2021 14:07:27 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Mon, 26 Jul 2021 14:07:27 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudekucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:26 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 5/8] PCI: hv: Generify PCI probing Date: Tue, 27 Jul 2021 02:06:54 +0800 Message-Id: <20210726180657.142727-6-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Arnd Bergmann In order to support ARM64 Hyper-V PCI, we need to set up the bridge at probing time because ARM64 is a PCI_DOMAIN_GENERIC=y arch and we don't have pci_config_window (ARM64 sysdata) for a PCI root bus on Hyper-V, so it's impossible to retrieve the information (e.g. PCI domains, MSI domains) from bus sysdata on ARM64 after creation. Originally in create_root_hv_pci_bus(), pci_create_root_bus() is used to create the root bus and the corresponding bridge based on x86 sysdata. Now we create a bridge first and then call pci_scan_root_bus_bridge(), which allows us to do the necessary set-ups for the bridge. Signed-off-by: Arnd Bergmann Signed-off-by: Boqun Feng --- drivers/pci/controller/pci-hyperv.c | 57 +++++++++++++++-------------- 1 file changed, 30 insertions(+), 27 deletions(-) diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index a53bd8728d0d..8d42da5dd1d4 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -449,6 +449,7 @@ enum hv_pcibus_state { struct hv_pcibus_device { struct pci_sysdata sysdata; + struct pci_host_bridge *bridge; /* Protocol version negotiated with the host */ enum pci_protocol_version_t protocol_version; enum hv_pcibus_state state; @@ -464,8 +465,6 @@ struct hv_pcibus_device { spinlock_t device_list_lock; /* Protect lists below */ void __iomem *cfg_addr; - struct list_head resources_for_children; - struct list_head children; struct list_head dr_list; @@ -1797,7 +1796,7 @@ static void hv_pci_assign_slots(struct hv_pcibus_device *hbus) slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot)); snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser); - hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr, + hpdev->pci_slot = pci_create_slot(hbus->bridge->bus, slot_nr, name, NULL); if (IS_ERR(hpdev->pci_slot)) { pr_warn("pci_create slot %s failed\n", name); @@ -1827,7 +1826,7 @@ static void hv_pci_remove_slots(struct hv_pcibus_device *hbus) static void hv_pci_assign_numa_node(struct hv_pcibus_device *hbus) { struct pci_dev *dev; - struct pci_bus *bus = hbus->pci_bus; + struct pci_bus *bus = hbus->bridge->bus; struct hv_pci_dev *hv_dev; list_for_each_entry(dev, &bus->devices, bus_list) { @@ -1850,21 +1849,22 @@ static void hv_pci_assign_numa_node(struct hv_pcibus_device *hbus) */ static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus) { - /* Register the device */ - hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device, - 0, /* bus number is always zero */ - &hv_pcifront_ops, - &hbus->sysdata, - &hbus->resources_for_children); - if (!hbus->pci_bus) - return -ENODEV; + int error; + struct pci_host_bridge *bridge = hbus->bridge; + + bridge->dev.parent = &hbus->hdev->device; + bridge->sysdata = &hbus->sysdata; + bridge->ops = &hv_pcifront_ops; + + error = pci_scan_root_bus_bridge(bridge); + if (error) + return error; pci_lock_rescan_remove(); - pci_scan_child_bus(hbus->pci_bus); hv_pci_assign_numa_node(hbus); - pci_bus_assign_resources(hbus->pci_bus); + pci_bus_assign_resources(bridge->bus); hv_pci_assign_slots(hbus); - pci_bus_add_devices(hbus->pci_bus); + pci_bus_add_devices(bridge->bus); pci_unlock_rescan_remove(); hbus->state = hv_pcibus_installed; return 0; @@ -2127,7 +2127,7 @@ static void pci_devices_present_work(struct work_struct *work) * because there may have been changes. */ pci_lock_rescan_remove(); - pci_scan_child_bus(hbus->pci_bus); + pci_scan_child_bus(hbus->bridge->bus); hv_pci_assign_numa_node(hbus); hv_pci_assign_slots(hbus); pci_unlock_rescan_remove(); @@ -2295,8 +2295,8 @@ static void hv_eject_device_work(struct work_struct *work) /* * Ejection can come before or after the PCI bus has been set up, so * attempt to find it and tear down the bus state, if it exists. This - * must be done without constructs like pci_domain_nr(hbus->pci_bus) - * because hbus->pci_bus may not exist yet. + * must be done without constructs like pci_domain_nr(hbus->bridge->bus) + * because hbus->bridge->bus may not exist yet. */ wslot = wslot_to_devfn(hpdev->desc.win_slot.slot); pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot); @@ -2662,8 +2662,7 @@ static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus) /* Modify this resource to become a bridge window. */ hbus->low_mmio_res->flags |= IORESOURCE_WINDOW; hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY; - pci_add_resource(&hbus->resources_for_children, - hbus->low_mmio_res); + pci_add_resource(&hbus->bridge->windows, hbus->low_mmio_res); } if (hbus->high_mmio_space) { @@ -2682,8 +2681,7 @@ static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus) /* Modify this resource to become a bridge window. */ hbus->high_mmio_res->flags |= IORESOURCE_WINDOW; hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY; - pci_add_resource(&hbus->resources_for_children, - hbus->high_mmio_res); + pci_add_resource(&hbus->bridge->windows, hbus->high_mmio_res); } return 0; @@ -3002,6 +3000,7 @@ static void hv_put_dom_num(u16 dom) static int hv_pci_probe(struct hv_device *hdev, const struct hv_vmbus_device_id *dev_id) { + struct pci_host_bridge *bridge; struct hv_pcibus_device *hbus; u16 dom_req, dom; char *name; @@ -3014,6 +3013,10 @@ static int hv_pci_probe(struct hv_device *hdev, */ BUILD_BUG_ON(sizeof(*hbus) > HV_HYP_PAGE_SIZE); + bridge = devm_pci_alloc_host_bridge(&hdev->device, 0); + if (!bridge) + return -ENOMEM; + /* * With the recent 59bb47985c1d ("mm, sl[aou]b: guarantee natural * alignment for kmalloc(power-of-two)"), kzalloc() is able to allocate @@ -3035,6 +3038,8 @@ static int hv_pci_probe(struct hv_device *hdev, hbus = kzalloc(HV_HYP_PAGE_SIZE, GFP_KERNEL); if (!hbus) return -ENOMEM; + + hbus->bridge = bridge; hbus->state = hv_pcibus_init; hbus->wslot_res_allocated = -1; @@ -3071,7 +3076,6 @@ static int hv_pci_probe(struct hv_device *hdev, hbus->hdev = hdev; INIT_LIST_HEAD(&hbus->children); INIT_LIST_HEAD(&hbus->dr_list); - INIT_LIST_HEAD(&hbus->resources_for_children); spin_lock_init(&hbus->config_lock); spin_lock_init(&hbus->device_list_lock); spin_lock_init(&hbus->retarget_msi_interrupt_lock); @@ -3295,9 +3299,9 @@ static int hv_pci_remove(struct hv_device *hdev) /* Remove the bus from PCI's point of view. */ pci_lock_rescan_remove(); - pci_stop_root_bus(hbus->pci_bus); + pci_stop_root_bus(hbus->bridge->bus); hv_pci_remove_slots(hbus); - pci_remove_root_bus(hbus->pci_bus); + pci_remove_root_bus(hbus->bridge->bus); pci_unlock_rescan_remove(); } @@ -3307,7 +3311,6 @@ static int hv_pci_remove(struct hv_device *hdev) iounmap(hbus->cfg_addr); hv_free_config_window(hbus); - pci_free_resource_list(&hbus->resources_for_children); hv_pci_free_bridge_windows(hbus); irq_domain_remove(hbus->irq_domain); irq_domain_free_fwnode(hbus->sysdata.fwnode); @@ -3390,7 +3393,7 @@ static int hv_pci_restore_msi_msg(struct pci_dev *pdev, void *arg) */ static void hv_pci_restore_msi_state(struct hv_pcibus_device *hbus) { - pci_walk_bus(hbus->pci_bus, hv_pci_restore_msi_msg, NULL); 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[66.111.4.227]) by smtp.gmail.com with ESMTPSA id v10sm304163iox.35.2021.07.26.11.07.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:29 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailauth.nyi.internal (Postfix) with ESMTP id 70B3627C0068; Mon, 26 Jul 2021 14:07:28 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Mon, 26 Jul 2021 14:07:28 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudekucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:27 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 6/8] PCI: hv: Set ->domain_nr of pci_host_bridge at probing time Date: Tue, 27 Jul 2021 02:06:55 +0800 Message-Id: <20210726180657.142727-7-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org No functional change, just store and maintain the PCI domain number in the ->domain_nr of pci_host_bridge. Note that we still need to keep the copy of domain number in x86-specific pci_sysdata, because x86 is not a PCI_DOMAINS_GENERIC=y architecture, so the ->domain_nr of pci_host_bridge doesn't work for it yet. Signed-off-by: Boqun Feng --- drivers/pci/controller/pci-hyperv.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index 8d42da5dd1d4..5741b1dd3c14 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -2299,7 +2299,7 @@ static void hv_eject_device_work(struct work_struct *work) * because hbus->bridge->bus may not exist yet. */ wslot = wslot_to_devfn(hpdev->desc.win_slot.slot); - pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot); + pdev = pci_get_domain_bus_and_slot(hbus->bridge->domain_nr, 0, wslot); if (pdev) { pci_lock_rescan_remove(); pci_stop_and_remove_bus_device(pdev); @@ -3071,6 +3071,7 @@ static int hv_pci_probe(struct hv_device *hdev, "PCI dom# 0x%hx has collision, using 0x%hx", dom_req, dom); + hbus->bridge->domain_nr = dom; hbus->sysdata.domain = dom; hbus->hdev = hdev; @@ -3080,7 +3081,7 @@ static int hv_pci_probe(struct hv_device *hdev, spin_lock_init(&hbus->device_list_lock); spin_lock_init(&hbus->retarget_msi_interrupt_lock); hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0, - hbus->sysdata.domain); + hbus->bridge->domain_nr); if (!hbus->wq) { ret = -ENOMEM; goto free_dom; @@ -3207,7 +3208,7 @@ static int hv_pci_probe(struct hv_device *hdev, destroy_wq: destroy_workqueue(hbus->wq); free_dom: - hv_put_dom_num(hbus->sysdata.domain); + hv_put_dom_num(hbus->bridge->domain_nr); free_bus: kfree(hbus); return ret; @@ -3315,7 +3316,7 @@ static int hv_pci_remove(struct hv_device *hdev) irq_domain_remove(hbus->irq_domain); irq_domain_free_fwnode(hbus->sysdata.fwnode); - hv_put_dom_num(hbus->sysdata.domain); + hv_put_dom_num(hbus->bridge->domain_nr); kfree(hbus); return ret; From patchwork Mon Jul 26 18:06:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 12400469 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D66C0C43214 for ; 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[66.111.4.227]) by smtp.gmail.com with ESMTPSA id x9sm392322iol.2.2021.07.26.11.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:30 -0700 (PDT) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailauth.nyi.internal (Postfix) with ESMTP id B6BA427C0066; Mon, 26 Jul 2021 14:07:29 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Mon, 26 Jul 2021 14:07:29 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudekucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:29 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 7/8] PCI: hv: Set up MSI domain at bridge probing time Date: Tue, 27 Jul 2021 02:06:56 +0800 Message-Id: <20210726180657.142727-8-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Since PCI_HYPERV depends on PCI_MSI_IRQ_DOMAIN which selects GENERIC_MSI_IRQ_DOMAIN, we can use dev_set_msi_domain() to set up the MSI domain at probing time, and this works for both x86 and ARM64. Therefore use it as the preparation for ARM64 Hyper-V PCI support. As a result, no longer need to maintain ->fwnode in x86 specific pci_sysdata, and make hv_pcibus_device own it instead. Signed-off-by: Boqun Feng --- drivers/pci/controller/pci-hyperv.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index 5741b1dd3c14..e6276aaa4659 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -450,6 +450,7 @@ enum hv_pcibus_state { struct hv_pcibus_device { struct pci_sysdata sysdata; struct pci_host_bridge *bridge; + struct fwnode_handle *fwnode; /* Protocol version negotiated with the host */ enum pci_protocol_version_t protocol_version; enum hv_pcibus_state state; @@ -1565,7 +1566,7 @@ static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus) hbus->msi_info.handler = handle_edge_irq; hbus->msi_info.handler_name = "edge"; hbus->msi_info.data = hbus; - hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode, + hbus->irq_domain = pci_msi_create_irq_domain(hbus->fwnode, &hbus->msi_info, x86_vector_domain); if (!hbus->irq_domain) { @@ -1574,6 +1575,8 @@ static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus) return -ENODEV; } + dev_set_msi_domain(&hbus->bridge->dev, hbus->irq_domain); + return 0; } @@ -3118,9 +3121,9 @@ static int hv_pci_probe(struct hv_device *hdev, goto unmap; } - hbus->sysdata.fwnode = irq_domain_alloc_named_fwnode(name); + hbus->fwnode = irq_domain_alloc_named_fwnode(name); kfree(name); - if (!hbus->sysdata.fwnode) { + if (!hbus->fwnode) { ret = -ENOMEM; goto unmap; } @@ -3198,7 +3201,7 @@ static int hv_pci_probe(struct hv_device *hdev, free_irq_domain: irq_domain_remove(hbus->irq_domain); free_fwnode: - irq_domain_free_fwnode(hbus->sysdata.fwnode); + irq_domain_free_fwnode(hbus->fwnode); unmap: iounmap(hbus->cfg_addr); free_config: @@ -3314,7 +3317,7 @@ static int hv_pci_remove(struct hv_device *hdev) hv_free_config_window(hbus); hv_pci_free_bridge_windows(hbus); irq_domain_remove(hbus->irq_domain); - irq_domain_free_fwnode(hbus->sysdata.fwnode); + irq_domain_free_fwnode(hbus->fwnode); hv_put_dom_num(hbus->bridge->domain_nr); From patchwork Mon Jul 26 18:06:57 2021 Content-Type: text/plain; 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[66.111.4.227]) by smtp.gmail.com with ESMTPSA id t2sm269781ilq.27.2021.07.26.11.07.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 11:07:32 -0700 (PDT) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailauth.nyi.internal (Postfix) with ESMTP id E2BD227C0068; Mon, 26 Jul 2021 14:07:30 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Mon, 26 Jul 2021 14:07:30 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrgeehgdduudejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeeuohhquhhn ucfhvghnghcuoegsohhquhhnrdhfvghnghesghhmrghilhdrtghomheqnecuggftrfgrth htvghrnhephedvveetfefgiedutedtfeevvddvleekjeeuffffleeguefhhfejteekieeu ueelnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrghmpehmrghilhhfrhhomhepsg hoqhhunhdomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqieelvdeghedtieeg qddujeejkeehheehvddqsghoqhhunhdrfhgvnhhgpeepghhmrghilhdrtghomhesfhhigi hmvgdrnhgrmhgv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 26 Jul 2021 14:07:30 -0400 (EDT) From: Boqun Feng To: Bjorn Helgaas , Arnd Bergmann , Marc Zyngier , Lorenzo Pieralisi Cc: Catalin Marinas , Will Deacon , "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Dexuan Cui , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Boqun Feng , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-pci@vger.kernel.org, Sunil Muthuswamy , Mike Rapoport Subject: [PATCH v6 8/8] PCI: hv: Turn on the host bridge probing on ARM64 Date: Tue, 27 Jul 2021 02:06:57 +0800 Message-Id: <20210726180657.142727-9-boqun.feng@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210726180657.142727-1-boqun.feng@gmail.com> References: <20210726180657.142727-1-boqun.feng@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Now we have everything we need, just provide a proper sysdata type for the bus to use on ARM64 and everything else works. Signed-off-by: Boqun Feng --- drivers/pci/controller/pci-hyperv.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index e6276aaa4659..62dbe98d1fe1 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -40,6 +40,7 @@ #include #include #include +#include #include #include #include @@ -448,7 +449,11 @@ enum hv_pcibus_state { }; struct hv_pcibus_device { +#ifdef CONFIG_X86 struct pci_sysdata sysdata; +#elif defined(CONFIG_ARM64) + struct pci_config_window sysdata; +#endif struct pci_host_bridge *bridge; struct fwnode_handle *fwnode; /* Protocol version negotiated with the host */ @@ -3075,7 +3080,9 @@ static int hv_pci_probe(struct hv_device *hdev, dom_req, dom); hbus->bridge->domain_nr = dom; +#ifdef CONFIG_X86 hbus->sysdata.domain = dom; +#endif hbus->hdev = hdev; INIT_LIST_HEAD(&hbus->children);