From patchwork Thu Jul 29 22:46:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7261CC19F3D for ; Thu, 29 Jul 2021 22:46:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 54D1160F46 for ; Thu, 29 Jul 2021 22:46:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229891AbhG2Wqj (ORCPT ); Thu, 29 Jul 2021 18:46:39 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:35850 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233855AbhG2Wqi (ORCPT ); Thu, 29 Jul 2021 18:46:38 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLfs128784; Thu, 29 Jul 2021 17:46:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598781; bh=+JaWdEPcqLXpeqKO8Qmfcf+nkg6wwGPU3NDL4eX/yDM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=X52P1mVFC4H7Vd3XXoF0EafW1y/F+LiXDMZ0izP/CwassOKQ2RU7+LokhXroLI1M1 TSjhEyXqoVK1jT1pbdpZBmuUCbt5fEyritK9OvNFx6QQNExBb9ZXp2JaGCqIOHWWH5 af8rvPISppHhvRuMrFW9UgtURNvIbS5RrFUlZM5E= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkLc2014560 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:21 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:21 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLhd073991; Thu, 29 Jul 2021 17:46:21 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLRc016252; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 01/11] ARM: dts: am33xx-l4: Add PRUSS node Date: Thu, 29 Jul 2021 17:46:11 -0500 Message-ID: <20210729224621.2295-2-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add the DT nodes for the PRU-ICSS on AM33xx family of SoCs. The AM33xx SoCs contain a single PRU-ICSS instance and is represented by a pruss node and other child nodes. PRU-ICSS is supported only on AM3356+ SoCs though in the AM33xx family, so the nodes are added under the corresponding disabled interconnect target module node in the common am33xx-l4 dtsi file. The target module node should be enabled in only those derivative board files that use a SoC containing PRU-ICSS. The PRUSS subsystem node contains the entire address space. The various sub-modules of the PRU-ICSS are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controller (MII_RT), and the CFG sub-module are represented as syscon nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk node is added under the CFG child node 'clocks'. The default source for this mux clock is the PRU_ICSS_IEP_GCLK clock. The DT nodes use all standard properties. The regs property in the PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS PRU0 Core: am335x-pru1_0-fw PRU-ICSS PRU1 Core: am335x-pru1_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEP), MDIO, UART, eCAP that do not have bindings and so will be added in the future. 2. The PRUSS INTC on AM335x SoCs also connect the host interrupts 0 to TSC_ADC; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am33xx-l4.dtsi | 71 ++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index 859e760df4c8..148176361b4e 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -853,6 +853,77 @@ pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */ #size-cells = <1>; ranges = <0x0 0x300000 0x80000>; status = "disabled"; + + pruss: pruss@0 { + compatible = "ti,am3356-pruss"; + reg = <0x0 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss_mem: memories@0 { + reg = <0x0 0x2000>, + <0x2000 0x2000>, + <0x10000 0x3000>; + reg-names = "dram0", "dram1", + "shrdram2"; + }; + + pruss_cfg: cfg@26000 { + compatible = "ti,pruss-cfg", "syscon"; + reg = <0x26000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x26000 0x2000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + pruss_iepclk_mux: iepclk-mux@30 { + reg = <0x30>; + #clock-cells = <0>; + clocks = <&l3_gclk>, /* icss_iep_gclk */ + <&pruss_ocp_gclk>; /* icss_ocp_gclk */ + }; + }; + }; + + pruss_mii_rt: mii-rt@32000 { + compatible = "ti,pruss-mii", "syscon"; + reg = <0x32000 0x58>; + }; + + pruss_intc: interrupt-controller@20000 { + compatible = "ti,pruss-intc"; + reg = <0x20000 0x2000>; + interrupts = <20 21 22 23 24 25 26 27>; + interrupt-names = "host_intr0", "host_intr1", + "host_intr2", "host_intr3", + "host_intr4", "host_intr5", + "host_intr6", "host_intr7"; + interrupt-controller; + #interrupt-cells = <3>; + }; + + pru0: pru@34000 { + compatible = "ti,am3356-pru"; + reg = <0x34000 0x2000>, + <0x22000 0x400>, + <0x22400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am335x-pru0-fw"; + }; + + pru1: pru@38000 { + compatible = "ti,am3356-pru"; + reg = <0x38000 0x2000>, + <0x24000 0x400>, + <0x24400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am335x-pru1-fw"; + }; + }; }; }; }; From patchwork Thu Jul 29 22:46:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 955ABC19F3B for ; Thu, 29 Jul 2021 22:46:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7159860F46 for ; Thu, 29 Jul 2021 22:46:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233701AbhG2Wqj (ORCPT ); Thu, 29 Jul 2021 18:46:39 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:60430 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233098AbhG2Wqi (ORCPT ); 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Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLqW073994; Thu, 29 Jul 2021 17:46:21 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLkY016255; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 02/11] ARM: dts: am33xx-l4: Add PRUSS MDIO controller node Date: Thu, 29 Jul 2021 17:46:12 -0500 Message-ID: <20210729224621.2295-3-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRUSS on AM335x SoCs has a MDIO sub-module that can be used to control external PHYs associated with the Industrial Ethernet peripherals within the PRUSS. The MDIO module used within the PRU-ICSS is an instance of the MDIO Controller used in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as the regular MDIO node. The node is added to the common am33xx-l4.dtsi file and is disabled. This needs to be enabled in the respective board files using the relevant AM335x SoCs supporting PRUSS and where the ethernet is pinned out and connected properly. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am33xx-l4.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index 148176361b4e..c9629cb5ccd1 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -923,6 +923,17 @@ pru1: pru@38000 { reg-names = "iram", "control", "debug"; firmware-name = "am335x-pru1-fw"; }; + + pruss_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x90>; + clocks = <&dpll_core_m4_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; }; }; From patchwork Thu Jul 29 22:46:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C52EDC19F31 for ; Thu, 29 Jul 2021 22:46:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A7A2E604D7 for ; Thu, 29 Jul 2021 22:46:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233260AbhG2Wqg (ORCPT ); Thu, 29 Jul 2021 18:46:36 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:35826 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229953AbhG2Wqf (ORCPT ); Thu, 29 Jul 2021 18:46:35 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMDX128788; Thu, 29 Jul 2021 17:46:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598782; bh=kTrRxnuZxtGwqcbqXWDw/iARQqORWPPcO/vAb7NhsXU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Ejgirpc1t1i6vzCEDgjpF9/zybVXg6+snZB2eZLA4jO2ERhLvgAJx628SP3uRCGWj ozXupU4mXm/Q6gsKSWL8PzHPcl+3KH2oWR8q/s2asUaBxpHOF1z0ycR4ZQhbrcFG9D WWxAoDpjDDlVl1BdpjqsgxoiFhZOZnRTb56+SLi4= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkLW2125300 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:21 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLZd024703; Thu, 29 Jul 2021 17:46:21 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLtB016258; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 03/11] ARM: dts: am335x-bone-common: Enable PRU-ICSS node Date: Thu, 29 Jul 2021 17:46:13 -0500 Message-ID: <20210729224621.2295-4-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. Enable this node on all the AM335x beaglebone boards as they mostly use a AM3358 or a AM3359 SoC which do contain the PRU-ICSS IP. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target-module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-bone-common.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 2d51d4bba6d4..34a0045b5f65 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -397,3 +397,7 @@ &rtc { clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; clock-names = "ext-clk", "int-clk"; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Thu Jul 29 22:46:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13FB5C41537 for ; Thu, 29 Jul 2021 22:46:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F241F60F5C for ; Thu, 29 Jul 2021 22:46:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233125AbhG2Wqf (ORCPT ); Thu, 29 Jul 2021 18:46:35 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:60384 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229891AbhG2Wqf (ORCPT ); Thu, 29 Jul 2021 18:46:35 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkM5n036079; Thu, 29 Jul 2021 17:46:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598782; bh=PzmdBPyen2CpfaN3I1DTeKMCJkF75R+Wg0svodVnvfM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DGo9jPYKliiwNoPIbNHPGz8PlyYJQpwCnIKC8NEj0Bq2bZI8LSnhkS0UOJN//0CKr /23eUEg3b941mUVs00x8isP1C7EyjFcsuaS4rHXjTwzpsL8+XuKQbrUdoEvbRaNgW1 AGZA3eYZ0FkqpbBciPsu9mPP9+EIrDr2tVqVaHFQ= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkLvC028989 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:22 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLRn076775; Thu, 29 Jul 2021 17:46:21 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLMr016261; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 04/11] ARM: dts: am335x-evm: Enable PRU-ICSS module Date: Thu, 29 Jul 2021 17:46:14 -0500 Message-ID: <20210729224621.2295-5-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x EVM, so enable this node on the AM335x EVM. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-evm.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 9cf39c93defb..659e99eabe66 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -778,3 +778,7 @@ &rtc { clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; clock-names = "ext-clk", "int-clk"; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Thu Jul 29 22:46:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3911DC19F33 for ; Thu, 29 Jul 2021 22:46:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1E0EC604D7 for ; Thu, 29 Jul 2021 22:46:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229953AbhG2Wqg (ORCPT ); Thu, 29 Jul 2021 18:46:36 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:35836 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232996AbhG2Wqf (ORCPT ); Thu, 29 Jul 2021 18:46:35 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMFk128792; Thu, 29 Jul 2021 17:46:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598782; bh=tpdKoEqBespn9+wWEa22saGxi4zovRXL/9w5E31VhAM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=BLFxlVFzPdzOFuqF2RdGPJheHekIhW2NCz2M0Hmtk6PctZ2LafARwxea5VZik+mrU d0vFHKFaHiCveMj4TqeS2AljsEB1H7SPBmtKjzQpd14O8LKP3IHrxwijBbve7AD5uv pO6rbRmTh0KcroMTupyrsgjjpMMA9Kb0PuRr9/Ic= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkM1l028992 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:22 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLM3024711; Thu, 29 Jul 2021 17:46:21 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLqF016265; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 05/11] ARM: dts: am335x-evmsk: Enable PRU-ICSS module Date: Thu, 29 Jul 2021 17:46:15 -0500 Message-ID: <20210729224621.2295-6-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x SK EVM board, so enable this node to support PRUSS on this board. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-evmsk.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index 001657be0381..a2db65538e51 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -715,3 +715,7 @@ &rtc { clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; clock-names = "ext-clk", "int-clk"; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Thu Jul 29 22:46:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410029 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE4FCC19F3C for ; Thu, 29 Jul 2021 22:46:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DCA4860F4A for ; Thu, 29 Jul 2021 22:46:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233098AbhG2Wqj (ORCPT ); Thu, 29 Jul 2021 18:46:39 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:60428 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229891AbhG2Wqi (ORCPT ); Thu, 29 Jul 2021 18:46:38 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMJR036083; Thu, 29 Jul 2021 17:46:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598782; bh=EK8Hn4h7jQqt5761Dufg7kovE9kcCcoGgkrX3kiNG3M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pUreEzlbrQ+Mbi0IHZxco+wdVlSgap7Qf3KnT3d9oL7qekhG4qYmhgmnRvC7IujBl 8ULXJVVsT/3T2SJzrUxEoheJxVAgPzW+/Zr6khQA1gW6tGFdaPhsWAiF3Hthr0bKnr cZJcZQa7v/YlaLjgH93R6/h7zUq3leWCk7QTsk78= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkMPR125303 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:22 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:22 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLgq073997; Thu, 29 Jul 2021 17:46:21 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLWc016268; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 06/11] ARM: dts: am335x-icev2: Enable PRU-ICSS module Date: Thu, 29 Jul 2021 17:46:16 -0500 Message-ID: <20210729224621.2295-7-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRU-ICSS target module node was left in disabled state in the base am33xx-l4.dtsi file. PRU-ICSS is supported on the AM335x ICEv2 board, so enable this node to support PRUSS on this board. The PRUSS node and most of its child nodes are already enabled in the base dts file, and so become effective automatically with the enabling of this PRU-ICSS target module node. The corresponding PRU nodes can be disabled later on if there are no use-cases defined to use a particular PRU core or the whole PRU-ICSS subsystem itself if both its PRU cores are unused. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am335x-icev2.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/am335x-icev2.dts b/arch/arm/boot/dts/am335x-icev2.dts index 5e598ac96dcc..e5ce89c8f54d 100644 --- a/arch/arm/boot/dts/am335x-icev2.dts +++ b/arch/arm/boot/dts/am335x-icev2.dts @@ -508,3 +508,7 @@ ethphy1: ethernet-phy@3 { reg = <3>; }; }; + +&pruss_tm { + status = "okay"; +}; From patchwork Thu Jul 29 22:46:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F5B5C4338F for ; Thu, 29 Jul 2021 22:46:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 50E6D604D7 for ; Thu, 29 Jul 2021 22:46:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233798AbhG2Wqh (ORCPT ); Thu, 29 Jul 2021 18:46:37 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:60424 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229891AbhG2Wqg (ORCPT ); Thu, 29 Jul 2021 18:46:36 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMKo036088; Thu, 29 Jul 2021 17:46:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598782; bh=jBoHk2AZxZa5f0VnqyGUWec6ZW20bZlvqoGlJvKmZTI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=dc+ALbpS9hJkMzWob6G581AszHWDtpRcatJvNBgA6aUtUt5bGJQB3/hCh15ZrjI87 rAaFWFQjRyMSHJt8NAFoCEk/Fgc15jGKcWiz2jS/Ufj3ZVHujr7IKtJROcRfEbyR/C hVUBLm/EzG6yHSqJrQ3jKK7yAdCNbCbUcNiVnF94= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkMYF014564 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:22 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:21 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkLMp024724; Thu, 29 Jul 2021 17:46:21 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLub016271; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 07/11] ARM: dts: am4372: Add the PRU-ICSS1 DT node Date: Thu, 29 Jul 2021 17:46:17 -0500 Message-ID: <20210729224621.2295-8-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add the DT node for the PRU-ICSS1 instance on the AM437x family of SoCs. Each PRU-ICSS instance is represented by a pruss node and other child nodes. The nodes are added under the interconnect target module node in the common am4372 dtsi file. The PRU-ICSS instances are supported only on AM4376+ SoCs though in the AM437x family, so the interconnect target module node should be disabled in any derivative board dts file that uses AM4372 SoCs. The PRU-ICSS1 on AM437x is very similar to the PRUSS in AM33xx, except for variations in the RAM sizes, bus addresses and the number of interrupts coming into the MPU INTC (host interrupt 5 is routed to the other PRUSS instead of MPU). The PRUSS subsystem node contains the entire address space. The various sub-modules of the PRU-ICSS are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controller (MII_RT), and the CFG sub-module are represented as syscon nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk node is added under the CFG child node 'clocks'. The default source for this mux clock is the PRU_ICSS_IEP_GCLK clock. The DT nodes use all standard properties. The regs property in the PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS1 PRU0 Core: am437x-pru1_0-fw PRU-ICSS1 PRU1 Core: am437x-pru1_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEP), MDIO, UART, eCAP that do not have bindings and so will be added in the future. 2. The PRUSS INTC on AM437x SoCs also connect the host interrupt 0 to ADC0 and ADC1; 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. Host interrupt 5 is already marked reserved as it is connected to the other PRUSS instance. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am4372.dtsi | 78 +++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 57a85a6c34a2..ddfe58b1ae79 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -434,6 +434,84 @@ pruss_tm: target-module@54400000 { #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x54400000 0x80000>; + + pruss1: pruss@0 { + compatible = "ti,am4376-pruss1"; + reg = <0x0 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss1_mem: memories@0 { + reg = <0x0 0x2000>, + <0x2000 0x2000>, + <0x10000 0x8000>; + reg-names = "dram0", "dram1", + "shrdram2"; + }; + + pruss1_cfg: cfg@26000 { + compatible = "ti,pruss-cfg", "syscon"; + reg = <0x26000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x26000 0x2000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + pruss1_iepclk_mux: iepclk-mux@30 { + reg = <0x30>; + #clock-cells = <0>; + clocks = <&sysclk_div>, /* icss_iep_gclk */ + <&pruss_ocp_gclk>; /* icss_ocp_gclk */ + }; + }; + }; + + pruss1_mii_rt: mii-rt@32000 { + compatible = "ti,pruss-mii", "syscon"; + reg = <0x32000 0x58>; + }; + + pruss1_intc: interrupt-controller@20000 { + compatible = "ti,pruss-intc"; + reg = <0x20000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = , + , + , + , + , + , + ; + interrupt-names = "host_intr0", "host_intr1", + "host_intr2", "host_intr3", + "host_intr4", + "host_intr6", "host_intr7"; + ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */ + }; + + pru1_0: pru@34000 { + compatible = "ti,am4376-pru"; + reg = <0x34000 0x3000>, + <0x22000 0x400>, + <0x22400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am437x-pru1_0-fw"; + }; + + pru1_1: pru@38000 { + compatible = "ti,am4376-pru"; + reg = <0x38000 0x3000>, + <0x24000 0x400>, + <0x24400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am437x-pru1_1-fw"; + }; + }; }; target-module@50000000 { From patchwork Thu Jul 29 22:46:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79711C432BE for ; Thu, 29 Jul 2021 22:46:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6103860F4A for ; Thu, 29 Jul 2021 22:46:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232559AbhG2Wqf (ORCPT ); Thu, 29 Jul 2021 18:46:35 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:35794 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229953AbhG2Wqe (ORCPT ); Thu, 29 Jul 2021 18:46:34 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMAg128796; Thu, 29 Jul 2021 17:46:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598782; bh=zyPK25hj+mcVdZ6JnpEZ8xmAdDPtCH3ZFTgBzK2PMmw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Ge1/QQTTC1WqgLuPZEVpKKMjsjcFqmabtIKjEw1HRbNtoNRDTBQxg7OG3sl/XezXH 0LoTyevZ/qQLWS31QRSyJTBc75NMCYqbhmZ+75GvWsByzKF6eitJvBgd/kXJ89JumQ Q9Ymu0uVRz+tDP59Y9+kLjeAV2ss5Ou7Ig9wrQro= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkMYR014567 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:22 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:22 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:22 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMcW043448; Thu, 29 Jul 2021 17:46:22 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkLUn016274; Thu, 29 Jul 2021 17:46:21 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 08/11] ARM: dts: am4372: Add the PRU-ICSS0 DT node Date: Thu, 29 Jul 2021 17:46:18 -0500 Message-ID: <20210729224621.2295-9-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The AM4376+ SoCs have a second smaller PRU-ICSS subsystem (PRUSS0) in addition to the primary PRUSS1 instance. The PRUSS0 has less DRAM per PRU, and no Shared DRAM among other minor differences. The IEP and MII_RT modules even though present within the IP are not pinned out. This PRUSS0 instance has a weird SoC integration. It shares the same L3 OCP interconnect interface with PRUSS1, and also shares its reset line and clocks. Any external accesses from PRUSS0 requires the PRUSS1's PRUSS_SYSCFG register to be programmed properly. That said, it is its own IP instance (a cut-down version), and so it has been added as an independent node (sibling node to PRUSS1 node) and a child node of the corresponding PRUSS target module interconnect node. This allows the PRUSS0 instance to be enabled/disabled independently of the PRUSS1 instance. The nodes are added under the corresponding interconnect target module node in the common am4372 dtsi file. The PRU-ICSS instances are not supported on AM4372 SoC though in the AM437x family, so the interconnect target module node should be disabled in any derivative board dts file that uses AM4372 SoCs. The individual PRUSS node can be disabled in the corresponding board dts file if desired. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS0 PRU0 Core: am437x-pru0_0-fw PRU-ICSS0 PRU1 Core: am437x-pru0_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEP), eCAP, UART, that do not have bindings and so will be added in the future. Only UART is pinned out, so others should be added in disabled state if added. 2. The PRUSS0 INTC on AM437x SoCs routes the host interrupt 5 to the other PRUSS1, so it is already marked reserved through the 'ti,irqs-reserved' property. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am4372.dtsi | 77 +++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index ddfe58b1ae79..2200a09c2065 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -512,6 +512,83 @@ pru1_1: pru@38000 { firmware-name = "am437x-pru1_1-fw"; }; }; + + pruss0: pruss@40000 { + compatible = "ti,am4376-pruss0"; + reg = <0x40000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss0_mem: memories@40000 { + reg = <0x40000 0x1000>, + <0x42000 0x1000>; + reg-names = "dram0", "dram1"; + }; + + pruss0_cfg: cfg@66000 { + compatible = "ti,pruss-cfg", "syscon"; + reg = <0x66000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x66000 0x2000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + pruss0_iepclk_mux: iepclk-mux@30 { + reg = <0x30>; + #clock-cells = <0>; + clocks = <&sysclk_div>, /* icss_iep_gclk */ + <&pruss_ocp_gclk>; /* icss_ocp_gclk */ + }; + }; + }; + + pruss0_mii_rt: mii-rt@72000 { + compatible = "ti,pruss-mii", "syscon"; + reg = <0x72000 0x58>; + status = "disabled"; + }; + + pruss0_intc: interrupt-controller@60000 { + compatible = "ti,pruss-intc"; + reg = <0x60000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = , + , + , + , + , + , + ; + interrupt-names = "host_intr0", "host_intr1", + "host_intr2", "host_intr3", + "host_intr4", + "host_intr6", "host_intr7"; + ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */ + }; + + pru0_0: pru@74000 { + compatible = "ti,am4376-pru"; + reg = <0x74000 0x1000>, + <0x62000 0x400>, + <0x62400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am437x-pru0_0-fw"; + }; + + pru0_1: pru@78000 { + compatible = "ti,am4376-pru"; + reg = <0x78000 0x1000>, + <0x64000 0x400>, + <0x64400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am437x-pru0_1-fw"; + }; + }; }; target-module@50000000 { From patchwork Thu Jul 29 22:46:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF43EC19F38 for ; Thu, 29 Jul 2021 22:46:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 91BBA604D7 for ; Thu, 29 Jul 2021 22:46:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233557AbhG2Wqg (ORCPT ); Thu, 29 Jul 2021 18:46:36 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:60404 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233098AbhG2Wqf (ORCPT ); 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Thu, 29 Jul 2021 17:46:22 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMue076793; Thu, 29 Jul 2021 17:46:22 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkMeu016277; Thu, 29 Jul 2021 17:46:22 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 09/11] ARM: dts: am4372: Add PRUSS MDIO controller node Date: Thu, 29 Jul 2021 17:46:19 -0500 Message-ID: <20210729224621.2295-10-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: "Andrew F. Davis" The PRU-ICSS1 instance on AM437x SoCs has a MDIO sub-module that can be used to control external PHYs associated with the Industrial Ethernet peripherals within the PRUSS. The MDIO module used within this PRU-ICSS is an instance of the MDIO Controller used in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as the regular MDIO node. Note that there is no MDIO node added to the smaller PRU-ICSS0 instance as the MDIO pins are not pinned out. The node is added and enabled in the common am4372.dtsi file by default, and disabled in all the existing AM437x board dts files. This node needs pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for PRUSS Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Andrew F. Davis [s-anna@ti.com: fix reg address, add commit description] Signed-off-by: Suman Anna --- arch/arm/boot/dts/am4372.dtsi | 10 ++++++++++ arch/arm/boot/dts/am437x-cm-t43.dts | 4 ++++ arch/arm/boot/dts/am437x-gp-evm.dts | 4 ++++ arch/arm/boot/dts/am437x-idk-evm.dts | 4 ++++ arch/arm/boot/dts/am437x-sk-evm.dts | 4 ++++ arch/arm/boot/dts/am43x-epos-evm.dts | 4 ++++ 6 files changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 2200a09c2065..61a1d88f9df6 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -511,6 +511,16 @@ pru1_1: pru@38000 { reg-names = "iram", "control", "debug"; firmware-name = "am437x-pru1_1-fw"; }; + + pruss1_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x90>; + clocks = <&dpll_core_m4_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; }; pruss0: pruss@40000 { diff --git a/arch/arm/boot/dts/am437x-cm-t43.dts b/arch/arm/boot/dts/am437x-cm-t43.dts index a83f46ed0c9a..5ce8e684e7d3 100644 --- a/arch/arm/boot/dts/am437x-cm-t43.dts +++ b/arch/arm/boot/dts/am437x-cm-t43.dts @@ -416,3 +416,7 @@ &cpu { <600000 1100000>, <300000 950000>; }; + +&pruss1_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts index e2677682b540..c2e4896076e7 100644 --- a/arch/arm/boot/dts/am437x-gp-evm.dts +++ b/arch/arm/boot/dts/am437x-gp-evm.dts @@ -1118,3 +1118,7 @@ &rtc { &cpu { cpu0-supply = <&dcdc2>; }; + +&pruss1_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts index 2dc525512266..53f64e3ce735 100644 --- a/arch/arm/boot/dts/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -537,3 +537,7 @@ opp100-600000000 { opp-suspend; }; }; + +&pruss1_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 496ed34f7755..20a34d2d85df 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -892,3 +892,7 @@ vpfe0_ep: endpoint { }; }; }; + +&pruss1_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index aae0af10a5b1..d16aa2221c91 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -1018,3 +1018,7 @@ &mux_synctimer32k_ck { &cpu { cpu0-supply = <&dcdc2>; }; + +&pruss1_mdio { + status = "disabled"; +}; From patchwork Thu Jul 29 22:46:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F319C4320A for ; Thu, 29 Jul 2021 22:46:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 044C260F6F for ; Thu, 29 Jul 2021 22:46:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232487AbhG2Wqe (ORCPT ); Thu, 29 Jul 2021 18:46:34 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:35796 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230117AbhG2Wqe (ORCPT ); Thu, 29 Jul 2021 18:46:34 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMZ6128800; Thu, 29 Jul 2021 17:46:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1627598782; bh=sphePILKvI69JTyB6aEcwoWTBX4ED7swhTFW9xrTKAU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aqlSMlkiv0akGJyFKtDSqa2jJwYNdlHHfuKNvEUvnhfqFkAw6BqmETURvKh5ML4fM f5hjcJ1rwpcW2HR6VPdt2fJpx4YpULZ1pf5yFW6WvJI2L0mHCYPXuO4iJYVzaCxHse whvY2ONK5xTj8BZnamKZxm3YfDUTgfz7NLTndDiM= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 16TMkMW4014573 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 29 Jul 2021 17:46:22 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 29 Jul 2021 17:46:22 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 29 Jul 2021 17:46:22 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMqU076799; Thu, 29 Jul 2021 17:46:22 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkMF2016280; Thu, 29 Jul 2021 17:46:22 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 10/11] ARM: dts: am57xx: Add PRU-ICSS nodes Date: Thu, 29 Jul 2021 17:46:20 -0500 Message-ID: <20210729224621.2295-11-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Add the DT nodes for the PRU-ICSS1 and PRU-ICSS2 processor subsystems that are present on AM57xx family of SoCs. Each PRU-ICSS instance is represented by a pruss node and other child nodes. The two PRU-ICSSs are identical to each other. They are not supported on DRA7xx SoCs in general, so the nodes are added under the respective interconnect target module nodes in a common am57-pruss.dtsi file. The file is already included only in the AM57xx related board files. The PRU-ICSSs on AM57xx are very similar to the PRUSS in AM33xx and AM437x except for variations in the RAM sizes and the number of interrupts coming into the MPU INTC. The interrupt events into the PRU-ICSS also requires programming of the corresponding crossbars properly. The PRUSS subsystem node contains the entire address space. The various sub-modules of the PRU-ICSS are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controller (MII_RT), and the CFG sub-module are represented as syscon nodes. The PRUSS CFG module has a clock mux for IEP clock, this clk node is added under the CFG child node 'clocks'. The default source for this mux clock is the ICSS_IEP_CLK clock. The DT nodes use all standard properties. The regs property in the PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU core are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): PRU-ICSS1 PRU0 Core: am57xx-pru1_0-fw PRU-ICSS1 PRU1 Core: am57xx-pru1_1-fw PRU-ICSS2 PRU0 Core: am57xx-pru2_0-fw PRU-ICSS2 PRU1 Core: am57xx-pru2_1-fw Note: 1. There are few more sub-modules like the Industrial Ethernet Peripheral (IEPs), MDIO, UART, eCAP that do not have bindings and so will be added in the future. 2. The PRUSS INTC on AM57xx SoCs also connect the host interrupts 6 and 7 as possible DMA events, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. Signed-off-by: Suman Anna Signed-off-by: Roger Quadros --- arch/arm/boot/dts/am57-pruss.dtsi | 158 +++++++++++++++++++++++++++++- 1 file changed, 157 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am57-pruss.dtsi b/arch/arm/boot/dts/am57-pruss.dtsi index 032c1acfcda3..494d56830b34 100644 --- a/arch/arm/boot/dts/am57-pruss.dtsi +++ b/arch/arm/boot/dts/am57-pruss.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ * * Common PRUSS data for TI AM57xx platforms */ @@ -25,6 +25,84 @@ pruss1_tm: target-module@4b226000 { #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 0x4b200000 0x80000>; + + pruss1: pruss@0 { + compatible = "ti,am5728-pruss"; + reg = <0x0 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss1_mem: memories@0 { + reg = <0x0 0x2000>, + <0x2000 0x2000>, + <0x10000 0x8000>; + reg-names = "dram0", "dram1", + "shrdram2"; + }; + + pruss1_cfg: cfg@26000 { + compatible = "ti,pruss-cfg", "syscon"; + reg = <0x26000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x26000 0x2000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + pruss1_iepclk_mux: iepclk-mux@30 { + reg = <0x30>; + #clock-cells = <0>; + clocks = <&dpll_gmac_m3x2_ck>, /* icss_iep_clk */ + <&dpll_gmac_h13x2_ck>; /* icss_clk */ + }; + }; + }; + + pruss1_mii_rt: mii-rt@32000 { + compatible = "ti,pruss-mii", "syscon"; + reg = <0x32000 0x58>; + }; + + pruss1_intc: interrupt-controller@20000 { + compatible = "ti,pruss-intc"; + reg = <0x20000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "host_intr0", "host_intr1", + "host_intr2", "host_intr3", + "host_intr4", "host_intr5", + "host_intr6", "host_intr7"; + }; + + pru1_0: pru@34000 { + compatible = "ti,am5728-pru"; + reg = <0x34000 0x3000>, + <0x22000 0x400>, + <0x22400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am57xx-pru1_0-fw"; + }; + + pru1_1: pru@38000 { + compatible = "ti,am5728-pru"; + reg = <0x38000 0x3000>, + <0x24000 0x400>, + <0x24400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am57xx-pru1_1-fw"; + }; + }; }; pruss2_tm: target-module@4b2a6000 { @@ -46,5 +124,83 @@ pruss2_tm: target-module@4b2a6000 { #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 0x4b280000 0x80000>; + + pruss2: pruss@0 { + compatible = "ti,am5728-pruss"; + reg = <0x0 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss2_mem: memories@0 { + reg = <0x0 0x2000>, + <0x2000 0x2000>, + <0x10000 0x8000>; + reg-names = "dram0", "dram1", + "shrdram2"; + }; + + pruss2_cfg: cfg@26000 { + compatible = "ti,pruss-cfg", "syscon"; + reg = <0x26000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x26000 0x2000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + pruss2_iepclk_mux: iepclk-mux@30 { + reg = <0x30>; + #clock-cells = <0>; + clocks = <&dpll_gmac_m3x2_ck>, /* icss_iep_clk */ + <&dpll_gmac_h13x2_ck>; /* icss_clk */ + }; + }; + }; + + pruss2_mii_rt: mii-rt@32000 { + compatible = "ti,pruss-mii", "syscon"; + reg = <0x32000 0x58>; + }; + + pruss2_intc: interrupt-controller@20000 { + compatible = "ti,pruss-intc"; + reg = <0x20000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "host_intr0", "host_intr1", + "host_intr2", "host_intr3", + "host_intr4", "host_intr5", + "host_intr6", "host_intr7"; + }; + + pru2_0: pru@34000 { + compatible = "ti,am5728-pru"; + reg = <0x34000 0x3000>, + <0x22000 0x400>, + <0x22400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am57xx-pru2_0-fw"; + }; + + pru2_1: pru@38000 { + compatible = "ti,am5728-pru"; + reg = <0x38000 0x3000>, + <0x24000 0x400>, + <0x24400 0x100>; + reg-names = "iram", "control", "debug"; + firmware-name = "am57xx-pru2_1-fw"; + }; + }; }; }; From patchwork Thu Jul 29 22:46:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12410027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4602C4320A for ; Thu, 29 Jul 2021 22:46:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B64C760F46 for ; Thu, 29 Jul 2021 22:46:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233660AbhG2Wqi (ORCPT ); Thu, 29 Jul 2021 18:46:38 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:60426 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233286AbhG2Wqg (ORCPT ); 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Thu, 29 Jul 2021 17:46:22 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 16TMkMm7076805; Thu, 29 Jul 2021 17:46:22 -0500 Received: from localhost ([10.250.38.176]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 16TMkMOB016283; Thu, 29 Jul 2021 17:46:22 -0500 From: Suman Anna To: Tony Lindgren CC: Grygorii Strashko , Kishon Vijay Abraham I , Lokesh Vutla , Vignesh Raghavendra , , , , Suman Anna Subject: [PATCH 11/11] ARM: dts: am57xx: Add PRUSS MDIO controller nodes Date: Thu, 29 Jul 2021 17:46:21 -0500 Message-ID: <20210729224621.2295-12-s-anna@ti.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210729224621.2295-1-s-anna@ti.com> References: <20210729224621.2295-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The PRUSSs on AM57xx SoCs contain an MDIO controller that can be used to control external PHYs associated with the Industrial Ethernet peripherals within each PRUSS. The MDIO module used within the PRU-ICSS is an instance of the MDIO Controller used in TI Davinci SoCs. The same bus frequency of 1 MHz is chosen as the regular MDIO node. The nodes are added in the common am57-pruss.dtsi file and enabled by default, but are disabled in all the existing AM57xx board dts files. These nodes need pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for PRUSS Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Suman Anna Signed-off-by: Andrew F. Davis --- arch/arm/boot/dts/am57-pruss.dtsi | 20 +++++++++++++++++++ arch/arm/boot/dts/am571x-idk.dts | 8 ++++++++ arch/arm/boot/dts/am572x-idk.dts | 8 ++++++++ arch/arm/boot/dts/am574x-idk.dts | 8 ++++++++ .../boot/dts/am57xx-beagle-x15-common.dtsi | 8 ++++++++ arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 8 ++++++++ 6 files changed, 60 insertions(+) diff --git a/arch/arm/boot/dts/am57-pruss.dtsi b/arch/arm/boot/dts/am57-pruss.dtsi index 494d56830b34..46c5383f0eee 100644 --- a/arch/arm/boot/dts/am57-pruss.dtsi +++ b/arch/arm/boot/dts/am57-pruss.dtsi @@ -102,6 +102,16 @@ pru1_1: pru@38000 { reg-names = "iram", "control", "debug"; firmware-name = "am57xx-pru1_1-fw"; }; + + pruss1_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&dpll_gmac_h13x2_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + reg = <0x32400 0x90>; + }; }; }; @@ -201,6 +211,16 @@ pru2_1: pru@38000 { reg-names = "iram", "control", "debug"; firmware-name = "am57xx-pru2_1-fw"; }; + + pruss2_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&dpll_gmac_h13x2_ck>; + clock-names = "fck"; + bus_freq = <1000000>; + reg = <0x32400 0x90>; + }; }; }; }; diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts index e81078c2d00d..48425020281a 100644 --- a/arch/arm/boot/dts/am571x-idk.dts +++ b/arch/arm/boot/dts/am571x-idk.dts @@ -208,3 +208,11 @@ &mmc2 { pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; }; + +&pruss1_mdio { + status = "disabled"; +}; + +&pruss2_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am572x-idk.dts b/arch/arm/boot/dts/am572x-idk.dts index 6504265f3f7e..94a738cb0a4d 100644 --- a/arch/arm/boot/dts/am572x-idk.dts +++ b/arch/arm/boot/dts/am572x-idk.dts @@ -27,3 +27,11 @@ &mmc2 { pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_rev20>; }; + +&pruss1_mdio { + status = "disabled"; +}; + +&pruss2_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am574x-idk.dts b/arch/arm/boot/dts/am574x-idk.dts index 1b8f3a28af05..c4bf9cb2c9dc 100644 --- a/arch/arm/boot/dts/am574x-idk.dts +++ b/arch/arm/boot/dts/am574x-idk.dts @@ -43,3 +43,11 @@ &m_can0 { &emif1 { status = "okay"; }; + +&pruss1_mdio { + status = "disabled"; +}; + +&pruss2_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi index 6b82ecf803c5..994e69ab38d7 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi @@ -637,3 +637,11 @@ &dsp2 { status = "okay"; memory-region = <&dsp2_memory_region>; }; + +&pruss1_mdio { + status = "disabled"; +}; + +&pruss2_mdio { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts index aed81568a297..2e94f32d9dfc 100644 --- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts @@ -618,3 +618,11 @@ &gpio2_target { status = "okay"; ti,no-reset-on-init; }; + +&pruss1_mdio { + status = "disabled"; +}; + +&pruss2_mdio { + status = "disabled"; +};