From patchwork Fri Jul 30 02:52:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410223 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 165CDC432BE for ; Fri, 30 Jul 2021 02:53:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F36B861019 for ; Fri, 30 Jul 2021 02:53:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233216AbhG3Cxs (ORCPT ); Thu, 29 Jul 2021 22:53:48 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:49452 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229750AbhG3Cxs (ORCPT ); Thu, 29 Jul 2021 22:53:48 -0400 X-UUID: de08d299849f40e698262c5e3cb0e205-20210730 X-UUID: de08d299849f40e698262c5e3cb0e205-20210730 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1897307176; Fri, 30 Jul 2021 10:53:41 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:53:38 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:53:32 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich Subject: [PATCH v7 01/12] dt-binding: mediatek: Get rid of mediatek,larb for multimedia HW Date: Fri, 30 Jul 2021 10:52:27 +0800 Message-ID: <20210730025238.22456-2-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org After adding device_link between the consumer with the smi-larbs, if the consumer call its owner pm_runtime_get(_sync), the pm_runtime_get(_sync) of smi-larb and smi-common will be called automatically. Thus, the consumer don't need the property. And IOMMU also know which larb this consumer connects with from iommu id in the "iommus=" property. Signed-off-by: Yong Wu Reviewed-by: Rob Herring Reviewed-by: Evan Green --- .../bindings/display/mediatek/mediatek,disp.txt | 9 --------- .../devicetree/bindings/media/mediatek-jpeg-decoder.yaml | 9 --------- .../devicetree/bindings/media/mediatek-jpeg-encoder.yaml | 9 --------- Documentation/devicetree/bindings/media/mediatek-mdp.txt | 8 -------- .../devicetree/bindings/media/mediatek-vcodec.txt | 4 ---- 5 files changed, 39 deletions(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index fbb59c9ddda6..867bd82e2f03 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -61,8 +61,6 @@ Required properties (DMA function blocks): "mediatek,-disp-rdma" "mediatek,-disp-wdma" the supported chips are mt2701, mt8167 and mt8173. -- larb: Should contain a phandle pointing to the local arbiter device as defined - in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - iommus: Should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. @@ -91,7 +89,6 @@ ovl0: ovl@1400c000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OVL0>; iommus = <&iommu M4U_PORT_DISP_OVL0>; - mediatek,larb = <&larb0>; }; ovl1: ovl@1400d000 { @@ -101,7 +98,6 @@ ovl1: ovl@1400d000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OVL1>; iommus = <&iommu M4U_PORT_DISP_OVL1>; - mediatek,larb = <&larb4>; }; rdma0: rdma@1400e000 { @@ -111,7 +107,6 @@ rdma0: rdma@1400e000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb = <&larb0>; mediatek,rdma-fifosize = <8192>; }; @@ -122,7 +117,6 @@ rdma1: rdma@1400f000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_RDMA1>; iommus = <&iommu M4U_PORT_DISP_RDMA1>; - mediatek,larb = <&larb4>; }; rdma2: rdma@14010000 { @@ -132,7 +126,6 @@ rdma2: rdma@14010000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_RDMA2>; iommus = <&iommu M4U_PORT_DISP_RDMA2>; - mediatek,larb = <&larb4>; }; wdma0: wdma@14011000 { @@ -142,7 +135,6 @@ wdma0: wdma@14011000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_WDMA0>; iommus = <&iommu M4U_PORT_DISP_WDMA0>; - mediatek,larb = <&larb0>; }; wdma1: wdma@14012000 { @@ -152,7 +144,6 @@ wdma1: wdma@14012000 { power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_WDMA1>; iommus = <&iommu M4U_PORT_DISP_WDMA1>; - mediatek,larb = <&larb4>; }; color0: color@14013000 { diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml index 9b87f036f178..052e752157b4 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml @@ -42,13 +42,6 @@ properties: power-domains: maxItems: 1 - mediatek,larb: - $ref: '/schemas/types.yaml#/definitions/phandle' - description: | - Must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - for details. - iommus: maxItems: 2 description: | @@ -63,7 +56,6 @@ required: - clocks - clock-names - power-domains - - mediatek,larb - iommus additionalProperties: false @@ -83,7 +75,6 @@ examples: clock-names = "jpgdec-smi", "jpgdec"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml index fcd9b829e036..8bfdfdfaba59 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml @@ -35,13 +35,6 @@ properties: power-domains: maxItems: 1 - mediatek,larb: - $ref: '/schemas/types.yaml#/definitions/phandle' - description: | - Must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - for details. - iommus: maxItems: 2 description: | @@ -56,7 +49,6 @@ required: - clocks - clock-names - power-domains - - mediatek,larb - iommus additionalProperties: false @@ -75,7 +67,6 @@ examples: clocks = <&imgsys CLK_IMG_VENC>; clock-names = "jpgenc"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek-mdp.txt b/Documentation/devicetree/bindings/media/mediatek-mdp.txt index caa24943da33..53ef26e2c857 100644 --- a/Documentation/devicetree/bindings/media/mediatek-mdp.txt +++ b/Documentation/devicetree/bindings/media/mediatek-mdp.txt @@ -27,9 +27,6 @@ Required properties (DMA function blocks, child node): - iommus: should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. -- mediatek,larb: must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - for details. Example: mdp_rdma0: rdma@14001000 { @@ -40,7 +37,6 @@ Example: <&mmsys CLK_MM_MUTEX_32K>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_RDMA0>; - mediatek,larb = <&larb0>; mediatek,vpu = <&vpu>; }; @@ -51,7 +47,6 @@ Example: <&mmsys CLK_MM_MUTEX_32K>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_RDMA1>; - mediatek,larb = <&larb4>; }; mdp_rsz0: rsz@14003000 { @@ -81,7 +76,6 @@ Example: clocks = <&mmsys CLK_MM_MDP_WDMA>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_WDMA>; - mediatek,larb = <&larb0>; }; mdp_wrot0: wrot@14007000 { @@ -90,7 +84,6 @@ Example: clocks = <&mmsys CLK_MM_MDP_WROT0>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_WROT0>; - mediatek,larb = <&larb0>; }; mdp_wrot1: wrot@14008000 { @@ -99,5 +92,4 @@ Example: clocks = <&mmsys CLK_MM_MDP_WROT1>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_WROT1>; - mediatek,larb = <&larb4>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt index ad1321e5a22d..71237355cc7e 100644 --- a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt @@ -13,7 +13,6 @@ Required properties: - reg : Physical base address of the video codec registers and length of memory mapped region. - interrupts : interrupt number to the cpu. -- mediatek,larb : must contain the local arbiters in the current Socs. - clocks : list of clock specifiers, corresponding to entries in the clock-names property. - clock-names: avc encoder must contain "venc_sel", vp8 encoder must @@ -46,7 +45,6 @@ vcodec_dec: vcodec@16000000 { <0 0x16027800 0 0x800>, /*VP8_VL*/ <0 0x16028400 0 0x400>; /*VP9_VD*/ interrupts = ; - mediatek,larb = <&larb1>; iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>, <&iommu M4U_PORT_HW_VDEC_PP_EXT>, <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>, @@ -99,7 +97,6 @@ vcodec_enc_avc: vcodec@18002000 { <&iommu M4U_PORT_VENC_REF_CHROMA>, <&iommu M4U_PORT_VENC_NBM_RDMA>, <&iommu M4U_PORT_VENC_NBM_WDMA>; - mediatek,larb = <&larb3>; mediatek,vpu = <&vpu>; clocks = <&topckgen CLK_TOP_VENC_SEL>; clock-names = "venc_sel"; @@ -120,7 +117,6 @@ vcodec_enc_vp8: vcodec@19002000 { <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; - mediatek,larb = <&larb5>; mediatek,vpu = <&vpu>; clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; clock-names = "venc_lt_sel"; From patchwork Fri Jul 30 02:52:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42E61C4320A for ; Fri, 30 Jul 2021 02:53:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B58461019 for ; Fri, 30 Jul 2021 02:53:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234299AbhG3Cxz (ORCPT ); Thu, 29 Jul 2021 22:53:55 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:46830 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233918AbhG3Cxy (ORCPT ); Thu, 29 Jul 2021 22:53:54 -0400 X-UUID: 4ad6bef9094743928928c97372254832-20210730 X-UUID: 4ad6bef9094743928928c97372254832-20210730 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 504441517; Fri, 30 Jul 2021 10:53:48 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:53:46 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:53:42 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich Subject: [PATCH v7 02/12] iommu/mediatek-v1: Free the existed fwspec if the master dev already has Date: Fri, 30 Jul 2021 10:52:28 +0800 Message-ID: <20210730025238.22456-3-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org When the iommu master device enters of_iommu_xlate, the ops may be NULL(iommu dev is defered), then it will initialize the fwspec here: [] (dev_iommu_fwspec_set) from [] (iommu_fwspec_init+0xbc/0xd4) [] (iommu_fwspec_init) from [] (of_iommu_xlate+0x7c/0x12c) [] (of_iommu_xlate) from [] (of_iommu_configure+0x144/0x1e8) BUT the mtk_iommu_v1.c only supports arm32, the probing flow still is a bit weird. We always expect create the fwspec internally. otherwise it will enter here and return fail. static int mtk_iommu_create_mapping(struct device *dev, struct of_phandle_args *args) { ... if (!fwspec) { .... } else if (dev_iommu_fwspec_get(dev)->ops != &mtk_iommu_ops) { >>>>>>>>>>Enter here. return fail.<<<<<<<<<<<< return -EINVAL; } ... } Thus, Free the existed fwspec if the master device already has fwspec. This issue is reported at: https://lore.kernel.org/linux-mediatek/trinity-7d9ebdc9-4849-4d93-bfb5-429dcb4ee449-1626253158870@3c-app-gmx-bs01/ Reported-by: Frank Wunderlich Signed-off-by: Yong Wu --- No need fix tag, since it is ok before this cleanup patchset. the issue may be revealed by the patch adding probe_defer what adjust the device probing sequency. --- drivers/iommu/mtk_iommu_v1.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index 778e66f5f1aa..6861eeab182d 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -426,6 +426,15 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) struct mtk_iommu_data *data; int err, idx = 0; + /* + * In the deferred case, free the existed fwspec if the dev already has, + * Always initialize the fwspec internally. + */ + if (fwspec) { + iommu_fwspec_free(dev); + fwspec = dev_iommu_fwspec_get(dev); + } + while (!of_parse_phandle_with_args(dev->of_node, "iommus", "#iommu-cells", idx, &iommu_spec)) { From patchwork Fri Jul 30 02:52:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EED4C4320A for ; Fri, 30 Jul 2021 02:54:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 33F1760FED for ; Fri, 30 Jul 2021 02:54:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234759AbhG3CyK (ORCPT ); Thu, 29 Jul 2021 22:54:10 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:49926 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234520AbhG3CyH (ORCPT ); Thu, 29 Jul 2021 22:54:07 -0400 X-UUID: b00803b2a0fb4783a18130c43510f914-20210730 X-UUID: b00803b2a0fb4783a18130c43510f914-20210730 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1608042048; Fri, 30 Jul 2021 10:54:00 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:53:58 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:53:54 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich Subject: [PATCH v7 03/12] iommu/mediatek: Add probe_defer for smi-larb Date: Fri, 30 Jul 2021 10:52:29 +0800 Message-ID: <20210730025238.22456-4-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Prepare for adding device_link. The iommu consumer should use device_link to connect with the smi-larb(supplier). then the smi-larb should run before the iommu consumer. Here we delay the iommu driver until the smi driver is ready, then all the iommu consumer always is after the smi driver. When there is no this patch, if some consumer drivers run before smi-larb, the supplier link_status is DL_DEV_NO_DRIVER(0) in the device_link_add, then device_links_driver_bound will use WARN_ON to complain that the link_status of supplier is not right. Signed-off-by: Yong Wu Tested-by: Dafna Hirschfeld # on mt8173 --- drivers/iommu/mtk_iommu.c | 2 +- drivers/iommu/mtk_iommu_v1.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 6f7c69688ce2..a02dde094788 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -855,7 +855,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) id = i; plarbdev = of_find_device_by_node(larbnode); - if (!plarbdev) { + if (!plarbdev || !plarbdev->dev.driver) { of_node_put(larbnode); return -EPROBE_DEFER; } diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index 6861eeab182d..c259433f1130 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -603,7 +603,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) } plarbdev = of_find_device_by_node(larbnode); - if (!plarbdev) { + if (!plarbdev || !plarbdev->dev.driver) { of_node_put(larbnode); return -EPROBE_DEFER; } From patchwork Fri Jul 30 02:52:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BF1CC4320A for ; Fri, 30 Jul 2021 02:54:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6393360FED for ; Fri, 30 Jul 2021 02:54:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234448AbhG3CyW (ORCPT ); Thu, 29 Jul 2021 22:54:22 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:50362 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233557AbhG3CyU (ORCPT ); Thu, 29 Jul 2021 22:54:20 -0400 X-UUID: 4549cce40b4442b4bb70021e5992aab5-20210730 X-UUID: 4549cce40b4442b4bb70021e5992aab5-20210730 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 739117842; Fri, 30 Jul 2021 10:54:12 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:54:11 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:54:07 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich Subject: [PATCH v7 04/12] iommu/mediatek: Add device_link between the consumer and the larb devices Date: Fri, 30 Jul 2021 10:52:30 +0800 Message-ID: <20210730025238.22456-5-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MediaTek IOMMU-SMI diagram is like below. all the consumer connect with smi-larb, then connect with smi-common. M4U | smi-common | ------------- | | ... | | larb1 larb2 | | vdec venc When the consumer works, it should enable the smi-larb's power which also need enable the smi-common's power firstly. Thus, First of all, use the device link connect the consumer and the smi-larbs. then add device link between the smi-larb and smi-common. This patch adds device_link between the consumer and the larbs. When device_link_add, I add the flag DL_FLAG_STATELESS to avoid calling pm_runtime_xx to keep the original status of clocks. It can avoid two issues: 1) Display HW show fastlogo abnormally reported in [1]. At the beggining, all the clocks are enabled before entering kernel, but the clocks for display HW(always in larb0) will be gated after clk_enable and clk_disable called from device_link_add(->pm_runtime_resume) and rpm_idle. The clock operation happened before display driver probe. At that time, the display HW will be abnormal. 2) A deadlock issue reported in [2]. Use DL_FLAG_STATELESS to skip pm_runtime_xx to avoid the deadlock. Corresponding, DL_FLAG_AUTOREMOVE_CONSUMER can't be added, then device_link_removed should be added explicitly. [1] https://lore.kernel.org/linux-mediatek/1564213888.22908.4.camel@mhfsdcap03/ [2] https://lore.kernel.org/patchwork/patch/1086569/ Suggested-by: Tomasz Figa Signed-off-by: Yong Wu Tested-by: Dafna Hirschfeld # on mt8173 --- drivers/iommu/mtk_iommu.c | 22 ++++++++++++++++++++++ drivers/iommu/mtk_iommu_v1.c | 20 +++++++++++++++++++- 2 files changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index a02dde094788..ee742900cf4b 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -571,22 +571,44 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct mtk_iommu_data *data; + struct device_link *link; + struct device *larbdev; + unsigned int larbid; if (!fwspec || fwspec->ops != &mtk_iommu_ops) return ERR_PTR(-ENODEV); /* Not a iommu client device */ data = dev_iommu_priv_get(dev); + /* + * Link the consumer device with the smi-larb device(supplier) + * The device in each a larb is a independent HW. thus only link + * one larb here. + */ + larbid = MTK_M4U_TO_LARB(fwspec->ids[0]); + larbdev = data->larb_imu[larbid].dev; + link = device_link_add(dev, larbdev, + DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS); + if (!link) + dev_err(dev, "Unable to link %s\n", dev_name(larbdev)); return &data->iommu; } static void mtk_iommu_release_device(struct device *dev) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + struct mtk_iommu_data *data; + struct device *larbdev; + unsigned int larbid; if (!fwspec || fwspec->ops != &mtk_iommu_ops) return; + data = dev_iommu_priv_get(dev); + larbid = MTK_M4U_TO_LARB(fwspec->ids[0]); + larbdev = data->larb_imu[larbid].dev; + device_link_remove(dev, larbdev); + iommu_fwspec_free(dev); } diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index c259433f1130..806d4200665b 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -424,7 +424,9 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct of_phandle_args iommu_spec; struct mtk_iommu_data *data; - int err, idx = 0; + int err, idx = 0, larbid; + struct device_link *link; + struct device *larbdev; /* * In the deferred case, free the existed fwspec if the dev already has, @@ -454,6 +456,14 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) data = dev_iommu_priv_get(dev); + /* Link the consumer device with the smi-larb device(supplier) */ + larbid = mt2701_m4u_to_larb(fwspec->ids[0]); + larbdev = data->larb_imu[larbid].dev; + link = device_link_add(dev, larbdev, + DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS); + if (!link) + dev_err(dev, "Unable to link %s\n", dev_name(larbdev)); + return &data->iommu; } @@ -474,10 +484,18 @@ static void mtk_iommu_probe_finalize(struct device *dev) static void mtk_iommu_release_device(struct device *dev) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + struct mtk_iommu_data *data; + struct device *larbdev; + unsigned int larbid; if (!fwspec || fwspec->ops != &mtk_iommu_ops) return; + data = dev_iommu_priv_get(dev); + larbid = mt2701_m4u_to_larb(fwspec->ids[0]); + larbdev = data->larb_imu[larbid].dev; + device_link_remove(dev, larbdev); + iommu_fwspec_free(dev); } From patchwork Fri Jul 30 02:52:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76FACC4320A for ; Fri, 30 Jul 2021 02:54:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 643D760FD7 for ; Fri, 30 Jul 2021 02:54:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234989AbhG3Cye (ORCPT ); Thu, 29 Jul 2021 22:54:34 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:48032 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233557AbhG3Cyb (ORCPT ); Thu, 29 Jul 2021 22:54:31 -0400 X-UUID: 095780bde31d422ba17c7894b49c0f5a-20210730 X-UUID: 095780bde31d422ba17c7894b49c0f5a-20210730 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1150986807; Fri, 30 Jul 2021 10:54:23 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:54:22 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:54:17 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , Rick Chang Subject: [PATCH v7 05/12] media: mtk-jpeg: Get rid of mtk_smi_larb_get/put Date: Fri, 30 Jul 2021 10:52:31 +0800 Message-ID: <20210730025238.22456-6-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MediaTek IOMMU has already added device_link between the consumer and smi-larb device. If the jpg device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. After removing the larb_get operations, then mtk_jpeg_clk_init is also unnecessary. Remove it too. CC: Rick Chang CC: Xia Jiang Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Rick Chang Reviewed-by: Dafna Hirschfeld Tested-by: Dafna Hirschfeld # on mt8173 --- .../media/platform/mtk-jpeg/mtk_jpeg_core.c | 45 +------------------ .../media/platform/mtk-jpeg/mtk_jpeg_core.h | 2 - 2 files changed, 2 insertions(+), 45 deletions(-) diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c index a89c7b206eef..4fea2c512434 100644 --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c @@ -22,7 +22,6 @@ #include #include #include -#include #include "mtk_jpeg_enc_hw.h" #include "mtk_jpeg_dec_hw.h" @@ -1055,10 +1054,6 @@ static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpeg) { int ret; - ret = mtk_smi_larb_get(jpeg->larb); - if (ret) - dev_err(jpeg->dev, "mtk_smi_larb_get larbvdec fail %d\n", ret); - ret = clk_bulk_prepare_enable(jpeg->variant->num_clks, jpeg->variant->clks); if (ret) @@ -1069,7 +1064,6 @@ static void mtk_jpeg_clk_off(struct mtk_jpeg_dev *jpeg) { clk_bulk_disable_unprepare(jpeg->variant->num_clks, jpeg->variant->clks); - mtk_smi_larb_put(jpeg->larb); } static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg_dev *jpeg) @@ -1284,35 +1278,6 @@ static struct clk_bulk_data mtk_jpeg_clocks[] = { { .id = "jpgenc" }, }; -static int mtk_jpeg_clk_init(struct mtk_jpeg_dev *jpeg) -{ - struct device_node *node; - struct platform_device *pdev; - int ret; - - node = of_parse_phandle(jpeg->dev->of_node, "mediatek,larb", 0); - if (!node) - return -EINVAL; - pdev = of_find_device_by_node(node); - if (WARN_ON(!pdev)) { - of_node_put(node); - return -EINVAL; - } - of_node_put(node); - - jpeg->larb = &pdev->dev; - - ret = devm_clk_bulk_get(jpeg->dev, jpeg->variant->num_clks, - jpeg->variant->clks); - if (ret) { - dev_err(&pdev->dev, "failed to get jpeg clock:%d\n", ret); - put_device(&pdev->dev); - return ret; - } - - return 0; -} - static void mtk_jpeg_job_timeout_work(struct work_struct *work) { struct mtk_jpeg_dev *jpeg = container_of(work, struct mtk_jpeg_dev, @@ -1333,11 +1298,6 @@ static void mtk_jpeg_job_timeout_work(struct work_struct *work) v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); } -static inline void mtk_jpeg_clk_release(struct mtk_jpeg_dev *jpeg) -{ - put_device(jpeg->larb); -} - static int mtk_jpeg_probe(struct platform_device *pdev) { struct mtk_jpeg_dev *jpeg; @@ -1376,7 +1336,8 @@ static int mtk_jpeg_probe(struct platform_device *pdev) goto err_req_irq; } - ret = mtk_jpeg_clk_init(jpeg); + ret = devm_clk_bulk_get(jpeg->dev, jpeg->variant->num_clks, + jpeg->variant->clks); if (ret) { dev_err(&pdev->dev, "Failed to init clk, err %d\n", ret); goto err_clk_init; @@ -1442,7 +1403,6 @@ static int mtk_jpeg_probe(struct platform_device *pdev) v4l2_device_unregister(&jpeg->v4l2_dev); err_dev_register: - mtk_jpeg_clk_release(jpeg); err_clk_init: @@ -1460,7 +1420,6 @@ static int mtk_jpeg_remove(struct platform_device *pdev) video_device_release(jpeg->vdev); v4l2_m2m_release(jpeg->m2m_dev); v4l2_device_unregister(&jpeg->v4l2_dev); - mtk_jpeg_clk_release(jpeg); return 0; } diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h index 595f7f10c9fd..3e4811a41ba2 100644 --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h @@ -85,7 +85,6 @@ struct mtk_jpeg_variant { * @alloc_ctx: videobuf2 memory allocator's context * @vdev: video device node for jpeg mem2mem mode * @reg_base: JPEG registers mapping - * @larb: SMI device * @job_timeout_work: IRQ timeout structure * @variant: driver variant to be used */ @@ -99,7 +98,6 @@ struct mtk_jpeg_dev { void *alloc_ctx; struct video_device *vdev; void __iomem *reg_base; - struct device *larb; struct delayed_work job_timeout_work; const struct mtk_jpeg_variant *variant; }; From patchwork Fri Jul 30 02:52:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410233 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 852D7C4320A for ; Fri, 30 Jul 2021 02:54:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6C7C46101C for ; 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Fri, 30 Jul 2021 10:54:29 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , Minghsiu Tsai , Houlong Wei Subject: [PATCH v7 06/12] media: mtk-mdp: Get rid of mtk_smi_larb_get/put Date: Fri, 30 Jul 2021 10:52:32 +0800 Message-ID: <20210730025238.22456-7-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MediaTek IOMMU has already added the device_link between the consumer and smi-larb device. If the mdp device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. CC: Minghsiu Tsai CC: Houlong Wei Signed-off-by: Yong Wu Reviewed-by: Evan Green Reviewed-by: Houlong Wei Reviewed-by: Dafna Hirschfeld Tested-by: Dafna Hirschfeld # on mt8173 --- drivers/media/platform/mtk-mdp/mtk_mdp_comp.c | 46 +------------------ drivers/media/platform/mtk-mdp/mtk_mdp_comp.h | 2 - drivers/media/platform/mtk-mdp/mtk_mdp_core.c | 1 - 3 files changed, 1 insertion(+), 48 deletions(-) diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c index de2d425efdd1..5e0ea83a9f7f 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include "mtk_mdp_comp.h" @@ -57,13 +56,6 @@ int mtk_mdp_comp_power_on(struct mtk_mdp_comp *comp) { int status, err; - if (comp->larb_dev) { - err = mtk_smi_larb_get(comp->larb_dev); - if (err) - dev_err(comp->dev, - "failed to get larb, err %d.\n", err); - } - err = pm_runtime_get_sync(comp->dev); if (err < 0) { dev_err(comp->dev, "failed to runtime get, err %d.\n", err); @@ -146,9 +138,6 @@ void mtk_mdp_comp_clock_off(struct mtk_mdp_comp *comp) continue; clk_disable_unprepare(comp->clk[i]); } - - if (comp->larb_dev) - mtk_smi_larb_put(comp->larb_dev); } /* @@ -236,9 +225,6 @@ static const struct component_ops mtk_mdp_component_ops = { int mtk_mdp_comp_init(struct mtk_mdp_comp *comp, struct device *dev) { - struct device_node *larb_node; - struct platform_device *larb_pdev; - int ret; int i; struct device_node *node = dev->of_node; enum mtk_mdp_comp_type comp_type = @@ -252,8 +238,7 @@ int mtk_mdp_comp_init(struct mtk_mdp_comp *comp, struct device *dev) if (IS_ERR(comp->clk[i])) { if (PTR_ERR(comp->clk[i]) != -EPROBE_DEFER) dev_err(dev, "Failed to get clock\n"); - ret = PTR_ERR(comp->clk[i]); - goto err; + return PTR_ERR(comp->clk[i]); } /* Only RDMA needs two clocks */ @@ -261,36 +246,7 @@ int mtk_mdp_comp_init(struct mtk_mdp_comp *comp, struct device *dev) break; } - /* Only DMA capable components need the LARB property */ - comp->larb_dev = NULL; - if (comp_type != MTK_MDP_RDMA && - comp_type != MTK_MDP_WDMA && - comp_type != MTK_MDP_WROT) - return 0; - - larb_node = of_parse_phandle(node, "mediatek,larb", 0); - if (!larb_node) { - dev_err(dev, - "Missing mediadek,larb phandle in %pOF node\n", node); - ret = -EINVAL; - goto err; - } - - larb_pdev = of_find_device_by_node(larb_node); - if (!larb_pdev) { - dev_warn(dev, "Waiting for larb device %pOF\n", larb_node); - of_node_put(larb_node); - ret = -EPROBE_DEFER; - goto err; - } - of_node_put(larb_node); - - comp->larb_dev = &larb_pdev->dev; - return 0; - -err: - return ret; } static int mtk_mdp_comp_probe(struct platform_device *pdev) diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.h b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.h index 5201c47f7baa..2bd229cc7eae 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.h +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.h @@ -11,13 +11,11 @@ * struct mtk_mdp_comp - the MDP's function component data * @node: list node to track sibing MDP components * @clk: clocks required for component - * @larb_dev: SMI device required for component * @dev: component's device */ struct mtk_mdp_comp { struct list_head node; struct clk *clk[2]; - struct device *larb_dev; struct device *dev; }; diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_core.c b/drivers/media/platform/mtk-mdp/mtk_mdp_core.c index e1fb39231248..be7d35b3e3ff 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_core.c +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_core.c @@ -18,7 +18,6 @@ #include #include #include -#include #include "mtk_mdp_comp.h" #include "mtk_mdp_core.h" From patchwork Fri Jul 30 02:52:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6233C4320A for ; Fri, 30 Jul 2021 02:54:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AEB3460FD7 for ; Fri, 30 Jul 2021 02:54:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235391AbhG3Cyu (ORCPT ); Thu, 29 Jul 2021 22:54:50 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:48660 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229542AbhG3Cyu (ORCPT ); Thu, 29 Jul 2021 22:54:50 -0400 X-UUID: cd829a85e94044d189ad062d9cfbe034-20210730 X-UUID: cd829a85e94044d189ad062d9cfbe034-20210730 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1205858080; Fri, 30 Jul 2021 10:54:43 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:54:41 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:54:36 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , Yongqiang Niu , CK Hu Subject: [PATCH v7 07/12] drm/mediatek: Add pm runtime support for ovl and rdma Date: Fri, 30 Jul 2021 10:52:33 +0800 Message-ID: <20210730025238.22456-8-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Yongqiang Niu Prepare for smi cleaning up "mediatek,larb". Display use the dispsys device to call pm_rumtime_get_sync before. This patch add pm_runtime_xx with ovl and rdma device whose nodes has "iommus" property, then display could help pm_runtime_get for smi via ovl or rdma device. CC: CK Hu Signed-off-by: Yongqiang Niu Signed-off-by: Yong Wu (Yong: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync) Acked-by: Chun-Kuang Hu Tested-by: Dafna Hirschfeld # on mt8173 --- change log: add return fail when pm_runtime_resume_and_get fail. --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 9 ++++++++- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 9 ++++++++- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 13 ++++++++++++- 3 files changed, 28 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index fa9d79963cd3..ea5760f856ec 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include "mtk_disp_drv.h" @@ -414,15 +415,21 @@ static int mtk_disp_ovl_probe(struct platform_device *pdev) return ret; } + pm_runtime_enable(dev); + ret = component_add(dev, &mtk_disp_ovl_component_ops); - if (ret) + if (ret) { + pm_runtime_disable(dev); dev_err(dev, "Failed to add component: %d\n", ret); + } return ret; } static int mtk_disp_ovl_remove(struct platform_device *pdev) { + pm_runtime_disable(&pdev->dev); + return 0; } diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index 705f28ceb4dd..0f31d1c8e37c 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "mtk_disp_drv.h" @@ -327,9 +328,13 @@ static int mtk_disp_rdma_probe(struct platform_device *pdev) platform_set_drvdata(pdev, priv); + pm_runtime_enable(dev); + ret = component_add(dev, &mtk_disp_rdma_component_ops); - if (ret) + if (ret) { + pm_runtime_disable(dev); dev_err(dev, "Failed to add component: %d\n", ret); + } return ret; } @@ -338,6 +343,8 @@ static int mtk_disp_rdma_remove(struct platform_device *pdev) { component_del(&pdev->dev, &mtk_disp_rdma_component_ops); + pm_runtime_disable(&pdev->dev); + return 0; } diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index 474efb844249..950cee8424f0 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -557,9 +557,17 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc, return; } + ret = pm_runtime_resume_and_get(comp->dev); + if (ret < 0) { + mtk_smi_larb_put(comp->larb_dev); + DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret); + return; + } + ret = mtk_crtc_ddp_hw_init(mtk_crtc); if (ret) { mtk_smi_larb_put(comp->larb_dev); + pm_runtime_put(comp->dev); return; } @@ -572,7 +580,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc, { struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc); struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; - int i; + int i, ret; DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); if (!mtk_crtc->enabled) @@ -596,6 +604,9 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc, drm_crtc_vblank_off(crtc); mtk_crtc_ddp_hw_fini(mtk_crtc); mtk_smi_larb_put(comp->larb_dev); + ret = pm_runtime_put(comp->dev); + if (ret < 0) + DRM_DEV_ERROR(comp->dev, "Failed to disable power domain: %d\n", ret); mtk_crtc->enabled = false; } From patchwork Fri Jul 30 02:52:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7B06C432BE for ; Fri, 30 Jul 2021 02:55:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D2FB560FE7 for ; Fri, 30 Jul 2021 02:55:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235443AbhG3CzD (ORCPT ); Thu, 29 Jul 2021 22:55:03 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:51534 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233557AbhG3CzC (ORCPT ); Thu, 29 Jul 2021 22:55:02 -0400 X-UUID: 0a1e61d5099d4b99b0c9fe86c5ca0dab-20210730 X-UUID: 0a1e61d5099d4b99b0c9fe86c5ca0dab-20210730 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1062033220; Fri, 30 Jul 2021 10:54:55 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:54:54 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:54:48 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , CK Hu Subject: [PATCH v7 08/12] drm/mediatek: Get rid of mtk_smi_larb_get/put Date: Fri, 30 Jul 2021 10:52:34 +0800 Message-ID: <20210730025238.22456-9-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MediaTek IOMMU has already added the device_link between the consumer and smi-larb device. If the drm device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. CC: CK Hu CC: Philipp Zabel Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Chun-Kuang Hu Reviewed-by: Dafna Hirschfeld Tested-by: Dafna Hirschfeld # on mt8173 --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 10 ------ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 36 ++------------------- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 - drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +-- 4 files changed, 3 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index 950cee8424f0..f3dfdadc8f92 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -10,7 +10,6 @@ #include #include -#include #include #include @@ -551,22 +550,14 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc, DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); - ret = mtk_smi_larb_get(comp->larb_dev); - if (ret) { - DRM_ERROR("Failed to get larb: %d\n", ret); - return; - } - ret = pm_runtime_resume_and_get(comp->dev); if (ret < 0) { - mtk_smi_larb_put(comp->larb_dev); DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret); return; } ret = mtk_crtc_ddp_hw_init(mtk_crtc); if (ret) { - mtk_smi_larb_put(comp->larb_dev); pm_runtime_put(comp->dev); return; } @@ -603,7 +594,6 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc, drm_crtc_vblank_off(crtc); mtk_crtc_ddp_hw_fini(mtk_crtc); - mtk_smi_larb_put(comp->larb_dev); ret = pm_runtime_put(comp->dev); if (ret < 0) DRM_DEV_ERROR(comp->dev, "Failed to disable power domain: %d\n", ret); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 75bc00e17fc4..7d240218d4c7 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -449,37 +449,15 @@ unsigned int mtk_drm_find_possible_crtc_by_comp(struct drm_device *drm, return ret; } -static int mtk_ddp_get_larb_dev(struct device_node *node, struct mtk_ddp_comp *comp, - struct device *dev) -{ - struct device_node *larb_node; - struct platform_device *larb_pdev; - - larb_node = of_parse_phandle(node, "mediatek,larb", 0); - if (!larb_node) { - dev_err(dev, "Missing mediadek,larb phandle in %pOF node\n", node); - return -EINVAL; - } - - larb_pdev = of_find_device_by_node(larb_node); - if (!larb_pdev) { - dev_warn(dev, "Waiting for larb device %pOF\n", larb_node); - of_node_put(larb_node); - return -EPROBE_DEFER; - } - of_node_put(larb_node); - comp->larb_dev = &larb_pdev->dev; - - return 0; -} - int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id) { struct platform_device *comp_pdev; enum mtk_ddp_comp_type type; struct mtk_ddp_comp_dev *priv; +#if IS_REACHABLE(CONFIG_MTK_CMDQ) int ret; +#endif if (comp_id < 0 || comp_id >= DDP_COMPONENT_ID_MAX) return -EINVAL; @@ -495,16 +473,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, } comp->dev = &comp_pdev->dev; - /* Only DMA capable components need the LARB property */ - if (type == MTK_DISP_OVL || - type == MTK_DISP_OVL_2L || - type == MTK_DISP_RDMA || - type == MTK_DISP_WDMA) { - ret = mtk_ddp_get_larb_dev(node, comp, comp->dev); - if (ret) - return ret; - } - if (type == MTK_DISP_BLS || type == MTK_DISP_CCORR || type == MTK_DISP_COLOR || diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index bb914d976cf5..1b582262b682 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -70,7 +70,6 @@ struct mtk_ddp_comp_funcs { struct mtk_ddp_comp { struct device *dev; int irq; - struct device *larb_dev; enum mtk_ddp_comp_id id; const struct mtk_ddp_comp_funcs *funcs; }; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index b46bdb8985da..0d5ef3d8d081 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -577,11 +577,8 @@ static int mtk_drm_probe(struct platform_device *pdev) pm_runtime_disable(dev); err_node: of_node_put(private->mutex_node); - for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) { + for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) of_node_put(private->comp_node[i]); - if (private->ddp_comp[i].larb_dev) - put_device(private->ddp_comp[i].larb_dev); - } return ret; } From patchwork Fri Jul 30 02:52:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E252C432BE for ; Fri, 30 Jul 2021 02:55:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1089D61008 for ; Fri, 30 Jul 2021 02:55:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235717AbhG3CzO (ORCPT ); Thu, 29 Jul 2021 22:55:14 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:49510 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S235531AbhG3CzO (ORCPT ); Thu, 29 Jul 2021 22:55:14 -0400 X-UUID: 3ead950aab7b41a393c7731b12546df1-20210730 X-UUID: 3ead950aab7b41a393c7731b12546df1-20210730 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 934997911; Fri, 30 Jul 2021 10:55:05 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:55:03 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:54:56 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , Irui Wang Subject: [PATCH v7 09/12] media: mtk-vcodec: Get rid of mtk_smi_larb_get/put Date: Fri, 30 Jul 2021 10:52:35 +0800 Message-ID: <20210730025238.22456-10-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org MediaTek IOMMU has already added the device_link between the consumer and smi-larb device. If the vcodec device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. CC: Tiffany Lin CC: Irui Wang Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Tiffany Lin Reviewed-by: Dafna Hirschfeld Tested-by: Dafna Hirschfeld # on mt8173 --- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 37 +++------------- .../platform/mtk-vcodec/mtk_vcodec_drv.h | 3 -- .../platform/mtk-vcodec/mtk_vcodec_enc.c | 1 - .../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 44 +++---------------- 4 files changed, 10 insertions(+), 75 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c index 6038db96f71c..d0bf9aa3b29d 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c @@ -8,14 +8,12 @@ #include #include #include -#include #include "mtk_vcodec_dec_pm.h" #include "mtk_vcodec_util.h" int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) { - struct device_node *node; struct platform_device *pdev; struct mtk_vcodec_pm *pm; struct mtk_vcodec_clk *dec_clk; @@ -26,18 +24,7 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) pm = &mtkdev->pm; pm->mtkdev = mtkdev; dec_clk = &pm->vdec_clk; - node = of_parse_phandle(pdev->dev.of_node, "mediatek,larb", 0); - if (!node) { - mtk_v4l2_err("of_parse_phandle mediatek,larb fail!"); - return -1; - } - pdev = of_find_device_by_node(node); - of_node_put(node); - if (WARN_ON(!pdev)) { - return -1; - } - pm->larbvdec = &pdev->dev; pdev = mtkdev->plat_dev; pm->dev = &pdev->dev; @@ -47,14 +34,11 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) dec_clk->clk_info = devm_kcalloc(&pdev->dev, dec_clk->clk_num, sizeof(*clk_info), GFP_KERNEL); - if (!dec_clk->clk_info) { - ret = -ENOMEM; - goto put_device; - } + if (!dec_clk->clk_info) + return -ENOMEM; } else { mtk_v4l2_err("Failed to get vdec clock count"); - ret = -EINVAL; - goto put_device; + return -EINVAL; } for (i = 0; i < dec_clk->clk_num; i++) { @@ -63,29 +47,24 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) "clock-names", i, &clk_info->clk_name); if (ret) { mtk_v4l2_err("Failed to get clock name id = %d", i); - goto put_device; + return ret; } clk_info->vcodec_clk = devm_clk_get(&pdev->dev, clk_info->clk_name); if (IS_ERR(clk_info->vcodec_clk)) { mtk_v4l2_err("devm_clk_get (%d)%s fail", i, clk_info->clk_name); - ret = PTR_ERR(clk_info->vcodec_clk); - goto put_device; + return PTR_ERR(clk_info->vcodec_clk); } } pm_runtime_enable(&pdev->dev); return 0; -put_device: - put_device(pm->larbvdec); - return ret; } void mtk_vcodec_release_dec_pm(struct mtk_vcodec_dev *dev) { pm_runtime_disable(dev->pm.dev); - put_device(dev->pm.larbvdec); } int mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm *pm) @@ -122,11 +101,6 @@ void mtk_vcodec_dec_clock_on(struct mtk_vcodec_pm *pm) } } - ret = mtk_smi_larb_get(pm->larbvdec); - if (ret) { - mtk_v4l2_err("mtk_smi_larb_get larbvdec fail %d", ret); - goto error; - } return; error: @@ -139,7 +113,6 @@ void mtk_vcodec_dec_clock_off(struct mtk_vcodec_pm *pm) struct mtk_vcodec_clk *dec_clk = &pm->vdec_clk; int i = 0; - mtk_smi_larb_put(pm->larbvdec); for (i = dec_clk->clk_num - 1; i >= 0; i--) clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk); } diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h index c6c7672fecfb..64b73dd880ce 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h @@ -189,10 +189,7 @@ struct mtk_vcodec_clk { */ struct mtk_vcodec_pm { struct mtk_vcodec_clk vdec_clk; - struct device *larbvdec; - struct mtk_vcodec_clk venc_clk; - struct device *larbvenc; struct device *dev; struct mtk_vcodec_dev *mtkdev; }; diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c index 416f356af363..9a1515cf862d 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include "mtk_vcodec_drv.h" diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c index 1b2e4930ed27..dffb190267ed 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c @@ -8,58 +8,36 @@ #include #include #include -#include #include "mtk_vcodec_enc_pm.h" #include "mtk_vcodec_util.h" int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) { - struct device_node *node; struct platform_device *pdev; struct mtk_vcodec_pm *pm; struct mtk_vcodec_clk *enc_clk; struct mtk_vcodec_clk_info *clk_info; int ret = 0, i = 0; - struct device *dev; pdev = mtkdev->plat_dev; pm = &mtkdev->pm; memset(pm, 0, sizeof(struct mtk_vcodec_pm)); pm->mtkdev = mtkdev; pm->dev = &pdev->dev; - dev = &pdev->dev; enc_clk = &pm->venc_clk; - node = of_parse_phandle(dev->of_node, "mediatek,larb", 0); - if (!node) { - mtk_v4l2_err("no mediatek,larb found"); - return -ENODEV; - } - pdev = of_find_device_by_node(node); - of_node_put(node); - if (!pdev) { - mtk_v4l2_err("no mediatek,larb device found"); - return -ENODEV; - } - pm->larbvenc = &pdev->dev; - pdev = mtkdev->plat_dev; - pm->dev = &pdev->dev; - enc_clk->clk_num = of_property_count_strings(pdev->dev.of_node, "clock-names"); if (enc_clk->clk_num > 0) { enc_clk->clk_info = devm_kcalloc(&pdev->dev, enc_clk->clk_num, sizeof(*clk_info), GFP_KERNEL); - if (!enc_clk->clk_info) { - ret = -ENOMEM; - goto put_larbvenc; - } + if (!enc_clk->clk_info) + return -ENOMEM; } else { mtk_v4l2_err("Failed to get venc clock count"); - ret = -EINVAL; - goto put_larbvenc; + return -EINVAL; } for (i = 0; i < enc_clk->clk_num; i++) { @@ -68,29 +46,23 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) "clock-names", i, &clk_info->clk_name); if (ret) { mtk_v4l2_err("venc failed to get clk name %d", i); - goto put_larbvenc; + return ret; } clk_info->vcodec_clk = devm_clk_get(&pdev->dev, clk_info->clk_name); if (IS_ERR(clk_info->vcodec_clk)) { mtk_v4l2_err("venc devm_clk_get (%d)%s fail", i, clk_info->clk_name); - ret = PTR_ERR(clk_info->vcodec_clk); - goto put_larbvenc; + return PTR_ERR(clk_info->vcodec_clk); } } return 0; - -put_larbvenc: - put_device(pm->larbvenc); - return ret; } void mtk_vcodec_release_enc_pm(struct mtk_vcodec_dev *mtkdev) { pm_runtime_disable(mtkdev->pm.dev); - put_device(mtkdev->pm.larbvenc); } @@ -108,11 +80,6 @@ void mtk_vcodec_enc_clock_on(struct mtk_vcodec_pm *pm) } } - ret = mtk_smi_larb_get(pm->larbvenc); - if (ret) { - mtk_v4l2_err("mtk_smi_larb_get larb3 fail %d", ret); - goto clkerr; - } return; clkerr: @@ -125,7 +92,6 @@ void mtk_vcodec_enc_clock_off(struct mtk_vcodec_pm *pm) struct mtk_vcodec_clk *enc_clk = &pm->venc_clk; int i = 0; - mtk_smi_larb_put(pm->larbvenc); for (i = enc_clk->clk_num - 1; i >= 0; i--) clk_disable_unprepare(enc_clk->clk_info[i].vcodec_clk); } From patchwork Fri Jul 30 02:52:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CE8BC4320A for ; Fri, 30 Jul 2021 02:55:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1777E61008 for ; Fri, 30 Jul 2021 02:55:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235799AbhG3CzY (ORCPT ); Thu, 29 Jul 2021 22:55:24 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:50016 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S235531AbhG3CzY (ORCPT ); Thu, 29 Jul 2021 22:55:24 -0400 X-UUID: 6d94210d00414fb2a086e6ccc9a6951a-20210730 X-UUID: 6d94210d00414fb2a086e6ccc9a6951a-20210730 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 254899857; Fri, 30 Jul 2021 10:55:16 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:55:14 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:55:09 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich Subject: [PATCH v7 10/12] memory: mtk-smi: Get rid of mtk_smi_larb_get/put Date: Fri, 30 Jul 2021 10:52:36 +0800 Message-ID: <20210730025238.22456-11-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org After adding device_link between the iommu consumer and smi-larb, the pm_runtime_get(_sync) of smi-larb and smi-common will be called automatically. we can get rid of mtk_smi_larb_get/put. CC: Matthias Brugger Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Krzysztof Kozlowski Acked-by: Matthias Brugger Reviewed-by: Dafna Hirschfeld Tested-by: Dafna Hirschfeld # on mt8173 --- drivers/memory/mtk-smi.c | 14 -------------- include/soc/mediatek/smi.h | 20 -------------------- 2 files changed, 34 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index c5fb51f73b34..7c61c924e220 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -134,20 +134,6 @@ static void mtk_smi_clk_disable(const struct mtk_smi *smi) clk_disable_unprepare(smi->clk_apb); } -int mtk_smi_larb_get(struct device *larbdev) -{ - int ret = pm_runtime_resume_and_get(larbdev); - - return (ret < 0) ? ret : 0; -} -EXPORT_SYMBOL_GPL(mtk_smi_larb_get); - -void mtk_smi_larb_put(struct device *larbdev) -{ - pm_runtime_put_sync(larbdev); -} -EXPORT_SYMBOL_GPL(mtk_smi_larb_put); - static int mtk_smi_larb_bind(struct device *dev, struct device *master, void *data) { diff --git a/include/soc/mediatek/smi.h b/include/soc/mediatek/smi.h index 15e3397cec58..11f7d6b59642 100644 --- a/include/soc/mediatek/smi.h +++ b/include/soc/mediatek/smi.h @@ -19,26 +19,6 @@ struct mtk_smi_larb_iommu { unsigned char bank[32]; }; -/* - * mtk_smi_larb_get: Enable the power domain and clocks for this local arbiter. - * It also initialize some basic setting(like iommu). - * mtk_smi_larb_put: Disable the power domain and clocks for this local arbiter. - * Both should be called in non-atomic context. - * - * Returns 0 if successful, negative on failure. - */ -int mtk_smi_larb_get(struct device *larbdev); -void mtk_smi_larb_put(struct device *larbdev); - -#else - -static inline int mtk_smi_larb_get(struct device *larbdev) -{ - return 0; -} - -static inline void mtk_smi_larb_put(struct device *larbdev) { } - #endif #endif From patchwork Fri Jul 30 02:52:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CCD3C4320E for ; Fri, 30 Jul 2021 02:55:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 77D4C60FED for ; Fri, 30 Jul 2021 02:55:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233557AbhG3Czf (ORCPT ); Thu, 29 Jul 2021 22:55:35 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:50428 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S236279AbhG3Cze (ORCPT ); Thu, 29 Jul 2021 22:55:34 -0400 X-UUID: 911f4e65bfa74707aecf73c96660a054-20210730 X-UUID: 911f4e65bfa74707aecf73c96660a054-20210730 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 646978137; Fri, 30 Jul 2021 10:55:25 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:55:23 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:55:19 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich Subject: [PATCH v7 11/12] arm: dts: mediatek: Get rid of mediatek,larb for MM nodes Date: Fri, 30 Jul 2021 10:52:37 +0800 Message-ID: <20210730025238.22456-12-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org After adding device_link between the IOMMU consumer and smi, the mediatek,larb is unnecessary now. CC: Matthias Brugger Signed-off-by: Yong Wu Reviewed-by: Evan Green --- arch/arm/boot/dts/mt2701.dtsi | 2 -- arch/arm/boot/dts/mt7623n.dtsi | 5 ----- 2 files changed, 7 deletions(-) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 4776f85d6d5b..ef583cfd3baf 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -564,7 +564,6 @@ clock-names = "jpgdec-smi", "jpgdec"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; }; @@ -577,7 +576,6 @@ clocks = <&imgsys CLK_IMG_VENC>; clock-names = "jpgenc"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; }; diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi index bcb0846e29fd..3adab5cd1fef 100644 --- a/arch/arm/boot/dts/mt7623n.dtsi +++ b/arch/arm/boot/dts/mt7623n.dtsi @@ -121,7 +121,6 @@ clock-names = "jpgdec-smi", "jpgdec"; power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; }; @@ -144,7 +143,6 @@ interrupts = ; clocks = <&mmsys CLK_MM_DISP_OVL>; iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>; - mediatek,larb = <&larb0>; }; rdma0: rdma@14008000 { @@ -154,7 +152,6 @@ interrupts = ; clocks = <&mmsys CLK_MM_DISP_RDMA>; iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>; - mediatek,larb = <&larb0>; }; wdma@14009000 { @@ -164,7 +161,6 @@ interrupts = ; clocks = <&mmsys CLK_MM_DISP_WDMA>; iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>; - mediatek,larb = <&larb0>; }; bls: pwm@1400a000 { @@ -215,7 +211,6 @@ interrupts = ; clocks = <&mmsys CLK_MM_DISP_RDMA1>; iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>; - mediatek,larb = <&larb0>; }; dpi0: dpi@14014000 { From patchwork Fri Jul 30 02:52:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 12410271 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27E64C4320A for ; Fri, 30 Jul 2021 02:55:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1413360FED for ; Fri, 30 Jul 2021 02:55:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236309AbhG3Czq (ORCPT ); Thu, 29 Jul 2021 22:55:46 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:50956 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S230172AbhG3Czq (ORCPT ); Thu, 29 Jul 2021 22:55:46 -0400 X-UUID: 0faf196a16e243c7aa01bd31fc46940f-20210730 X-UUID: 0faf196a16e243c7aa01bd31fc46940f-20210730 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2059840387; Fri, 30 Jul 2021 10:55:38 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Jul 2021 10:55:37 +0800 Received: from localhost.localdomain (10.17.3.153) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 30 Jul 2021 10:55:31 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , Mauro Carvalho Chehab CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Nicolas Boichat , Matthias Kaehlcke , , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Xia Jiang , Tiffany Lin , Dafna Hirschfeld , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich Subject: [PATCH v7 12/12] arm64: dts: mediatek: Get rid of mediatek,larb for MM nodes Date: Fri, 30 Jul 2021 10:52:38 +0800 Message-ID: <20210730025238.22456-13-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210730025238.22456-1-yong.wu@mediatek.com> References: <20210730025238.22456-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org After adding device_link between the IOMMU consumer and smi, the mediatek,larb is unnecessary now. CC: Matthias Brugger Signed-off-by: Yong Wu Reviewed-by: Evan Green Tested-by: Dafna Hirschfeld --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 ---------------- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 6 ------ 2 files changed, 22 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 2f0fc1e317d7..cf5d26db82b8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -1009,7 +1009,6 @@ <&mmsys CLK_MM_MUTEX_32K>; power-domains = <&spm MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_RDMA0>; - mediatek,larb = <&larb0>; }; mdp_rdma1: rdma@14002000 { @@ -1019,7 +1018,6 @@ <&mmsys CLK_MM_MUTEX_32K>; power-domains = <&spm MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_RDMA1>; - mediatek,larb = <&larb4>; }; mdp_rsz0: rsz@14003000 { @@ -1049,7 +1047,6 @@ clocks = <&mmsys CLK_MM_MDP_WDMA>; power-domains = <&spm MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_WDMA>; - mediatek,larb = <&larb0>; }; mdp_wrot0: wrot@14007000 { @@ -1058,7 +1055,6 @@ clocks = <&mmsys CLK_MM_MDP_WROT0>; power-domains = <&spm MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_WROT0>; - mediatek,larb = <&larb0>; }; mdp_wrot1: wrot@14008000 { @@ -1067,7 +1063,6 @@ clocks = <&mmsys CLK_MM_MDP_WROT1>; power-domains = <&spm MT8173_POWER_DOMAIN_MM>; iommus = <&iommu M4U_PORT_MDP_WROT1>; - mediatek,larb = <&larb4>; }; ovl0: ovl@1400c000 { @@ -1077,7 +1072,6 @@ power-domains = <&spm MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OVL0>; iommus = <&iommu M4U_PORT_DISP_OVL0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; }; @@ -1088,7 +1082,6 @@ power-domains = <&spm MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_OVL1>; iommus = <&iommu M4U_PORT_DISP_OVL1>; - mediatek,larb = <&larb4>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>; }; @@ -1099,7 +1092,6 @@ power-domains = <&spm MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>; }; @@ -1110,7 +1102,6 @@ power-domains = <&spm MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_RDMA1>; iommus = <&iommu M4U_PORT_DISP_RDMA1>; - mediatek,larb = <&larb4>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; }; @@ -1121,7 +1112,6 @@ power-domains = <&spm MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_RDMA2>; iommus = <&iommu M4U_PORT_DISP_RDMA2>; - mediatek,larb = <&larb4>; mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; }; @@ -1132,7 +1122,6 @@ power-domains = <&spm MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_WDMA0>; iommus = <&iommu M4U_PORT_DISP_WDMA0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; }; @@ -1143,7 +1132,6 @@ power-domains = <&spm MT8173_POWER_DOMAIN_MM>; clocks = <&mmsys CLK_MM_DISP_WDMA1>; iommus = <&iommu M4U_PORT_DISP_WDMA1>; - mediatek,larb = <&larb4>; mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; }; @@ -1394,7 +1382,6 @@ <0 0x16027800 0 0x800>, /* VDEC_HWB */ <0 0x16028400 0 0x400>; /* VDEC_HWG */ interrupts = ; - mediatek,larb = <&larb1>; iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>, <&iommu M4U_PORT_HW_VDEC_PP_EXT>, <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>, @@ -1462,7 +1449,6 @@ compatible = "mediatek,mt8173-vcodec-enc"; reg = <0 0x18002000 0 0x1000>; /* VENC_SYS */ interrupts = ; - mediatek,larb = <&larb3>; iommus = <&iommu M4U_PORT_VENC_RCPU>, <&iommu M4U_PORT_VENC_REC>, <&iommu M4U_PORT_VENC_BSDMA>, @@ -1490,7 +1476,6 @@ clock-names = "jpgdec-smi", "jpgdec"; power-domains = <&spm MT8173_POWER_DOMAIN_VENC>; - mediatek,larb = <&larb3>; iommus = <&iommu M4U_PORT_JPGDEC_WDMA>, <&iommu M4U_PORT_JPGDEC_BSDMA>; }; @@ -1524,7 +1509,6 @@ <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; - mediatek,larb = <&larb5>; mediatek,vpu = <&vpu>; clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; clock-names = "venc_lt_sel"; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index ca8ad953de91..d21e1ffc9b35 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1239,7 +1239,6 @@ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_OVL0>; iommus = <&iommu M4U_PORT_DISP_OVL0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x8000 0x1000>; }; @@ -1250,7 +1249,6 @@ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_OVL0_2L>; iommus = <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>; }; @@ -1261,7 +1259,6 @@ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_OVL1_2L>; iommus = <&iommu M4U_PORT_DISP_2L_OVL1_LARB0>; - mediatek,larb = <&larb0>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>; }; @@ -1272,7 +1269,6 @@ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_RDMA0>; iommus = <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb = <&larb0>; mediatek,rdma-fifo-size = <5120>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>; }; @@ -1284,7 +1280,6 @@ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_RDMA1>; iommus = <&iommu M4U_PORT_DISP_RDMA1>; - mediatek,larb = <&larb0>; mediatek,rdma-fifo-size = <2048>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>; }; @@ -1439,7 +1434,6 @@ compatible = "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc"; reg = <0 0x17030000 0 0x1000>; interrupts = ; - mediatek,larb = <&larb4>; iommus = <&iommu M4U_PORT_JPGENC_RDMA>, <&iommu M4U_PORT_JPGENC_BSDMA>; power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;