From patchwork Sun Aug 1 14:25:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412969 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71430C4338F for ; Sun, 1 Aug 2021 14:25:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5C234610A7 for ; Sun, 1 Aug 2021 14:25:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232038AbhHAOZk (ORCPT ); Sun, 1 Aug 2021 10:25:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232003AbhHAOZk (ORCPT ); Sun, 1 Aug 2021 10:25:40 -0400 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AF70C06175F; Sun, 1 Aug 2021 07:25:32 -0700 (PDT) Received: by mail-pj1-x1030.google.com with SMTP id m10-20020a17090a34cab0290176b52c60ddso21174889pjf.4; Sun, 01 Aug 2021 07:25:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3TdIfUE1vHBHBg5ARypMvKXE/Ywe1XabexhsHIfEbiE=; b=YGKvwTDXSvFuOYqP6PyXviyvPiqYe6FMURYDVDML84me2Y9CHpelrf0j8s+wGNWBib gih8gJmgAfwlUKlaO8H6Z70yexA8Xd1oZSrZ6rPHIrwUyLZ0DHGxlC6NtoHykgBD8L6G 230EfFjtWDn8E2n/NP3TPgQ/fGClZDOcStjYAGEpyjcIlOLcFoozHtTy9hSJOHoovPV1 1RWjNiKUkcfmkKibH0fSOMIKKMYahd/htXHy0kPsjJudsHXkSe8VN7L7GkCOocsjw1GN 0skPmGQxVAqAFkF7OUkLsDuzCIQCEUj1EFQn9yLXYbWWuvbWrv+Of5oaE0vByV9gM02x M8jQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3TdIfUE1vHBHBg5ARypMvKXE/Ywe1XabexhsHIfEbiE=; b=dKnTKo1oAnNcQoPnirzk3vJtp1JMQYvvwb5RZRvpF7AMpHSPZ4m+ypAEp/Y+ibNmvl LbJcfEwlkd7z91ZtWBMmccdBRelz5c2fdOrkAwPnh9txq3dujOeSZ+te+jUCyQP3rddF Rludebx7FOAcijDpNdLTQZvBrl5NEshz/uz/UUoMlHBHsqLC3f8zR3YgJIJUKy6ZpeVa GvE0294L3SewXSIlZK2GEnGe4880MJgDHCNiPo9gAYasSq80VmAeHuZXOxbXqnKhAkA1 K+4nNsVaw8XObjAOBirCnBy5fc98TTcQpZVkceWUYwdZhDqfqGvN9OX1tszducPYCwaL Xhzw== X-Gm-Message-State: AOAM5316rKlVqXu0TuOQIFTPQSIsduKXzXQzkrpRRqpkJnZEyOClOkqG wrJTSBh2AJYRZJ+Z7KrvL+8= X-Google-Smtp-Source: ABdhPJwkjYtKASUlE9vLsHisJxhPbTvAakoaVfNEOrwGRjsgo+EZJe1zSpTW58yIs8/TBy2iAylFJA== X-Received: by 2002:a62:d14b:0:b029:353:f8a7:2a10 with SMTP id t11-20020a62d14b0000b0290353f8a72a10mr12727277pfl.72.1627827932185; Sun, 01 Aug 2021 07:25:32 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:31 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" , Amey Narkhede Subject: [PATCH v13 1/9] PCI: Cache PCIe FLR capability Date: Sun, 1 Aug 2021 19:55:10 +0530 Message-Id: <20210801142518.1224-2-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add a new member called devcap in struct pci_dev for caching the device capabilities to avoid reading PCI_EXP_DEVCAP multiple times. Refactor pcie_has_flr() to use cached device capabilities. Signed-off-by: Amey Narkhede --- drivers/pci/pci.c | 6 ++---- drivers/pci/probe.c | 5 +++-- include/linux/pci.h | 1 + 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 452351025a09..1fafd05caa41 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "pci.h" DEFINE_MUTEX(pci_slot_mutex); @@ -4620,13 +4621,10 @@ EXPORT_SYMBOL(pci_wait_for_pending_transaction); */ bool pcie_has_flr(struct pci_dev *dev) { - u32 cap; - if (dev->dev_flags & PCI_DEV_FLAGS_NO_FLR_RESET) return false; - pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap); - return cap & PCI_EXP_DEVCAP_FLR; + return FIELD_GET(PCI_EXP_DEVCAP_FLR, dev->devcap) == 1; } EXPORT_SYMBOL_GPL(pcie_has_flr); diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 3a62d09b8869..df3f9db6e151 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "pci.h" #define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ @@ -1497,8 +1498,8 @@ void set_pcie_port_type(struct pci_dev *pdev) pdev->pcie_cap = pos; pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, ®16); pdev->pcie_flags_reg = reg16; - pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, ®16); - pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD; + pci_read_config_dword(pdev, pos + PCI_EXP_DEVCAP, &pdev->devcap); + pdev->pcie_mpss = FIELD_GET(PCI_EXP_DEVCAP_PAYLOAD, pdev->devcap); parent = pci_upstream_bridge(pdev); if (!parent) diff --git a/include/linux/pci.h b/include/linux/pci.h index c20211e59a57..697b1f085c7b 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -333,6 +333,7 @@ struct pci_dev { struct rcec_ea *rcec_ea; /* RCEC cached endpoint association */ struct pci_dev *rcec; /* Associated RCEC device */ #endif + u32 devcap; /* PCIe device capabilities */ u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ u8 msix_cap; /* MSI-X capability offset */ From patchwork Sun Aug 1 14:25:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412971 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 565B4C4338F for ; Sun, 1 Aug 2021 14:25:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40577610A7 for ; Sun, 1 Aug 2021 14:25:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232068AbhHAOZp (ORCPT ); Sun, 1 Aug 2021 10:25:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232003AbhHAOZo (ORCPT ); Sun, 1 Aug 2021 10:25:44 -0400 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A43DC0613D5; Sun, 1 Aug 2021 07:25:36 -0700 (PDT) Received: by mail-pj1-x102f.google.com with SMTP id b1-20020a17090a8001b029017700de3903so16555099pjn.1; Sun, 01 Aug 2021 07:25:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=s7niUZoWNvklF5dy5N/Zsm4coPTRFXujH2QtJEUWvx8=; b=gTtYucjmym7W4gcN/95RscH2VHz3UCOadG49RSRObQbNZ5PtH8XNUvvkS3nekAycKm ojhxzpuKvO2yTUz6OEcftW0Ig/j+3QOxeClnOsEjZiYAA9VhQKOovD4fs7X+WK9VEEtB wMSOv2GyCQhFTpJ2GFoosQaTGwJPryYFVWA81RCj75u8E+ui5Sux9jHbAYgUO6RhdA7d Ecq3X0+5g36AmDffIeY7qAspACOJvfHH5U3XCz3Gu1+abp66oSZbiiPsIkKquZ0pkqf5 rZnjKLxzn22+bGX2dE+ceOKtb1Kb5NTv+dFptcTTDQikk4Tzwm4wPOoFFX8uxNadFHtt Kfqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s7niUZoWNvklF5dy5N/Zsm4coPTRFXujH2QtJEUWvx8=; b=FrIlU7ZKKRRksF3CPdPO95IPAlQpz0J3j7LMQE5ImIOzxX2vvzWVeg8CVheGOiot1w K33orQBEH6zVVCqf0AxqvgDBBblWILQg0WzIh6onRaGG3ltQ+CrWylRMlzNrMo3jKWV5 WK70biiwipdKdyB6b4jyqZZg+0UcgqF+3nv8s10eTdQhJoTePLl6ETyzaMt+6kwHPQC7 JpgX45IvJYbTsyEaROJ1lznrDK7AwAuCWzRheWwlvQ2JGyDRHb9Xe8D1vswB48u9UGuN oysiiXB/gj5MKCBnb924l3FgI0BIRuqDLcWuZb7K0hLCfSt37mm+Zxa772MWxrhZ7a8p nmVg== X-Gm-Message-State: AOAM5333nu/xXZAorb2sOQruPdorOZFbbSjSOzOB/3Iz+C98aFZFp3DE tbLHeNCBVPlvkPhDpQOuT9Q= X-Google-Smtp-Source: ABdhPJyyKfLyED1qsvEu7avmMZDwF//8lbfv9L3phVG0v0eGhRfqJGQiPB4kyx6eMXqyyFI6PPd52A== X-Received: by 2002:a17:90a:eb0a:: with SMTP id j10mr12748387pjz.16.1627827936043; Sun, 01 Aug 2021 07:25:36 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:35 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" , Amey Narkhede Subject: [PATCH v13 2/9] PCI: Add pcie_reset_flr to follow calling convention of other reset methods Date: Sun, 1 Aug 2021 19:55:11 +0530 Message-Id: <20210801142518.1224-3-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently there is separate function pcie_has_flr() to probe if PCIe FLR is supported by the device which does not match the calling convention followed by reset methods which use second function argument to decide whether to probe or not. Add new function pcie_reset_flr() that follows the calling convention of reset methods. Signed-off-by: Amey Narkhede Reported-by: kernel test robot Reported-by: kernel test robot --- drivers/crypto/cavium/nitrox/nitrox_main.c | 4 +-- drivers/pci/pci.c | 40 +++++++++++++++------- drivers/pci/pcie/aer.c | 12 +++---- drivers/pci/quirks.c | 9 ++--- include/linux/pci.h | 2 +- 5 files changed, 38 insertions(+), 29 deletions(-) diff --git a/drivers/crypto/cavium/nitrox/nitrox_main.c b/drivers/crypto/cavium/nitrox/nitrox_main.c index facc8e6bc580..15d6c8452807 100644 --- a/drivers/crypto/cavium/nitrox/nitrox_main.c +++ b/drivers/crypto/cavium/nitrox/nitrox_main.c @@ -306,9 +306,7 @@ static int nitrox_device_flr(struct pci_dev *pdev) return -ENOMEM; } - /* check flr support */ - if (pcie_has_flr(pdev)) - pcie_flr(pdev); + pcie_reset_flr(pdev, 0); pci_restore_state(pdev); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 1fafd05caa41..f219a3dc6750 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4626,15 +4626,13 @@ bool pcie_has_flr(struct pci_dev *dev) return FIELD_GET(PCI_EXP_DEVCAP_FLR, dev->devcap) == 1; } -EXPORT_SYMBOL_GPL(pcie_has_flr); /** * pcie_flr - initiate a PCIe function level reset * @dev: device to reset * - * Initiate a function level reset on @dev. The caller should ensure the - * device supports FLR before calling this function, e.g. by using the - * pcie_has_flr() helper. + * Initiate a function level reset unconditionally on @dev without + * checking any flags and DEVCAP */ int pcie_flr(struct pci_dev *dev) { @@ -4655,7 +4653,26 @@ int pcie_flr(struct pci_dev *dev) return pci_dev_wait(dev, "FLR", PCIE_RESET_READY_POLL_MS); } -EXPORT_SYMBOL_GPL(pcie_flr); +EXPORT_SYMBOL(pcie_flr); + +/** + * pcie_reset_flr - initiate a PCIe function level reset + * @dev: device to reset + * @probe: If set, only check if the device can be reset this way. + * + * Initiate a function level reset on @dev. + */ +int pcie_reset_flr(struct pci_dev *dev, int probe) +{ + if (!pcie_has_flr(dev)) + return -ENOTTY; + + if (probe) + return 0; + + return pcie_flr(dev); +} +EXPORT_SYMBOL_GPL(pcie_reset_flr); static int pci_af_flr(struct pci_dev *dev, int probe) { @@ -5137,11 +5154,9 @@ int __pci_reset_function_locked(struct pci_dev *dev) rc = pci_dev_specific_reset(dev, 0); if (rc != -ENOTTY) return rc; - if (pcie_has_flr(dev)) { - rc = pcie_flr(dev); - if (rc != -ENOTTY) - return rc; - } + rc = pcie_reset_flr(dev, 0); + if (rc != -ENOTTY) + return rc; rc = pci_af_flr(dev, 0); if (rc != -ENOTTY) return rc; @@ -5172,8 +5187,9 @@ int pci_probe_reset_function(struct pci_dev *dev) rc = pci_dev_specific_reset(dev, 1); if (rc != -ENOTTY) return rc; - if (pcie_has_flr(dev)) - return 0; + rc = pcie_reset_flr(dev, 1); + if (rc != -ENOTTY) + return rc; rc = pci_af_flr(dev, 1); if (rc != -ENOTTY) return rc; diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index ec943cee5ecc..98077595a73e 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1405,13 +1405,11 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) } if (type == PCI_EXP_TYPE_RC_EC || type == PCI_EXP_TYPE_RC_END) { - if (pcie_has_flr(dev)) { - rc = pcie_flr(dev); - pci_info(dev, "has been reset (%d)\n", rc); - } else { - pci_info(dev, "not reset (no FLR support)\n"); - rc = -ENOTTY; - } + rc = pcie_reset_flr(dev, 0); + if (!rc) + pci_info(dev, "has been reset\n"); + else + pci_info(dev, "not reset (no FLR support: %d)\n", rc); } else { rc = pci_bus_error_reset(dev); pci_info(dev, "%s Port link has been reset (%d)\n", diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index d85914afe65a..b48e7ef8b641 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3819,7 +3819,7 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) u32 cfg; if (dev->class != PCI_CLASS_STORAGE_EXPRESS || - !pcie_has_flr(dev) || !pci_resource_start(dev, 0)) + pcie_reset_flr(dev, 1) || !pci_resource_start(dev, 0)) return -ENOTTY; if (probe) @@ -3888,13 +3888,10 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) */ static int delay_250ms_after_flr(struct pci_dev *dev, int probe) { - if (!pcie_has_flr(dev)) - return -ENOTTY; - if (probe) - return 0; + return pcie_reset_flr(dev, 1); - pcie_flr(dev); + pcie_reset_flr(dev, 0); msleep(250); diff --git a/include/linux/pci.h b/include/linux/pci.h index 697b1f085c7b..aa85e7d3147e 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1226,7 +1226,7 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev, enum pci_bus_speed *speed, enum pcie_link_width *width); void pcie_print_link_status(struct pci_dev *dev); -bool pcie_has_flr(struct pci_dev *dev); +int pcie_reset_flr(struct pci_dev *dev, int probe); int pcie_flr(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); From patchwork Sun Aug 1 14:25:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412973 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32048C4338F for ; Sun, 1 Aug 2021 14:25:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 116C0610A7 for ; Sun, 1 Aug 2021 14:25:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232126AbhHAOZu (ORCPT ); Sun, 1 Aug 2021 10:25:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232095AbhHAOZs (ORCPT ); Sun, 1 Aug 2021 10:25:48 -0400 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 127FCC06175F; Sun, 1 Aug 2021 07:25:40 -0700 (PDT) Received: by mail-pj1-x1030.google.com with SMTP id k4-20020a17090a5144b02901731c776526so27816871pjm.4; Sun, 01 Aug 2021 07:25:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pYuie5bBQ1R9okxCbicxPsdRMdKcRbsiETMhCT9MqHg=; b=mnAUwtxdEfrovVCKxSS+CZxigFN+Bk+P7BL4o11nFOSVLm0ZOnY8UlTYS/PRvQxEB0 +0dPlOGYmrEpwrhK5Y/VsLIT1Ts4mrBVOnJoWMpK8DDubw20kasapkUSI/vqPm0HOgCA TKd22yjlSsSAmNvO4gjIotOFFY7QzWjJqB5pwjf3oM8BRM3UC6mUYmF59jUspEC0k7lr aIystTRseN1hAtHMW37TTIwbqc90MaK3D2oHejJDErwOr1wby/nTM9O4uVO81+NMY3wv Fp2Xok3vlmW+gVnO7M/XbmWPv1xce2vqysOV/Ueh74343ynXu9SGSG+/cWLYWHFMbCbu AyCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pYuie5bBQ1R9okxCbicxPsdRMdKcRbsiETMhCT9MqHg=; b=BQzO1YzpPGsFmX6+hlAE8ZuGhrYEBYIvglj7OVPD7w3ExAp6fKSE9RSZszLoSOc5s4 +y6qF/AHtU3suFTQVnNzg8oEXGQkVg68yHFpuWqMn96GNxz5j5XSvD5eTGGwZhhV+dnt MnJS5jpqrfcgIc+/EndCzSFm2DkU8haRTuKGWZzIfvBdMezMAt6OvuQ/pwXZTWhA2U0D flVljp8J87a4JpYEc821IrB6xv11ewoxTzq6tp8Asn4w/w3HQDupTO2JBovVFkguxH6D 2EEru9OLIXOsPWLVuW3TrVt6SrmqwWYZVQM3LOHA8Trugf7UOLTl9DzXYQx9LNHRwB+t fXmg== X-Gm-Message-State: AOAM530CFJ7DAw/vo9TwdSrnuvoOZ+2uueq/XnYhm/yerkI248QbRQC4 t/0lhnx5LvxfgxcsKeJ8YeE= X-Google-Smtp-Source: ABdhPJwe+Xjz+1GXybUGZJkwDewPks1iYaVgiakuOHCUyhW6hvDnJ45TPKabN9r6xA6rby9ewlmXfg== X-Received: by 2002:a17:90a:1957:: with SMTP id 23mr8048217pjh.147.1627827939598; Sun, 01 Aug 2021 07:25:39 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:39 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" , Amey Narkhede Subject: [PATCH v13 3/9] PCI: Add new array for keeping track of ordering of reset methods Date: Sun, 1 Aug 2021 19:55:12 +0530 Message-Id: <20210801142518.1224-4-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Introduce a new array reset_methods in struct pci_dev to keep track of reset mechanisms supported by the device and their ordering. Also refactor probing and reset functions to take advantage of calling convention of reset functions. Co-developed-by: Alex Williamson Signed-off-by: Alex Williamson Signed-off-by: Amey Narkhede --- drivers/pci/pci.c | 95 ++++++++++++++++++++++++++------------------- drivers/pci/pci.h | 8 +++- drivers/pci/probe.c | 5 +-- include/linux/pci.h | 7 ++++ 4 files changed, 71 insertions(+), 44 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index f219a3dc6750..010962d7dba6 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -73,6 +73,11 @@ static void pci_dev_d3_sleep(struct pci_dev *dev) msleep(delay); } +bool pci_reset_supported(struct pci_dev *dev) +{ + return dev->reset_methods[0] != 0; +} + #ifdef CONFIG_PCI_DOMAINS int pci_domains_supported = 1; #endif @@ -5117,6 +5122,16 @@ static void pci_dev_restore(struct pci_dev *dev) err_handler->reset_done(dev); } +/* dev->reset_methods[] is a 0-terminated list of indices into this array */ +static const struct pci_reset_fn_method pci_reset_fn_methods[] = { + { }, + { pci_dev_specific_reset, .name = "device_specific" }, + { pcie_reset_flr, .name = "flr" }, + { pci_af_flr, .name = "af_flr" }, + { pci_pm_reset, .name = "pm" }, + { pci_reset_bus_function, .name = "bus" }, +}; + /** * __pci_reset_function_locked - reset a PCI device function while holding * the @dev mutex lock. @@ -5139,65 +5154,65 @@ static void pci_dev_restore(struct pci_dev *dev) */ int __pci_reset_function_locked(struct pci_dev *dev) { - int rc; + int i, m, rc = -ENOTTY; might_sleep(); /* - * A reset method returns -ENOTTY if it doesn't support this device - * and we should try the next method. + * A reset method returns -ENOTTY if it doesn't support this device and + * we should try the next method. * - * If it returns 0 (success), we're finished. If it returns any - * other error, we're also finished: this indicates that further - * reset mechanisms might be broken on the device. + * If it returns 0 (success), we're finished. If it returns any other + * error, we're also finished: this indicates that further reset + * mechanisms might be broken on the device. */ - rc = pci_dev_specific_reset(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pcie_reset_flr(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pci_af_flr(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pci_pm_reset(dev, 0); - if (rc != -ENOTTY) - return rc; - return pci_reset_bus_function(dev, 0); + for (i = 0; i < PCI_NUM_RESET_METHODS; i++) { + m = dev->reset_methods[i]; + if (!m) + return -ENOTTY; + + rc = pci_reset_fn_methods[m].reset_fn(dev, 0); + if (!rc) + return 0; + if (rc != -ENOTTY) + return rc; + } + + return -ENOTTY; } EXPORT_SYMBOL_GPL(__pci_reset_function_locked); /** - * pci_probe_reset_function - check whether the device can be safely reset - * @dev: PCI device to reset + * pci_init_reset_methods - check whether device can be safely reset + * and store supported reset mechanisms. + * @dev: PCI device to check for reset mechanisms * * Some devices allow an individual function to be reset without affecting - * other functions in the same device. The PCI device must be responsive - * to PCI config space in order to use this function. + * other functions in the same device. The PCI device must be in D0-D3hot + * state. * - * Returns 0 if the device function can be reset or negative if the - * device doesn't support resetting a single function. + * Stores reset mechanisms supported by device in reset_methods byte array + * which is a member of struct pci_dev. */ -int pci_probe_reset_function(struct pci_dev *dev) +void pci_init_reset_methods(struct pci_dev *dev) { - int rc; + int m, i, rc; + + BUILD_BUG_ON(ARRAY_SIZE(pci_reset_fn_methods) != PCI_NUM_RESET_METHODS); might_sleep(); - rc = pci_dev_specific_reset(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pcie_reset_flr(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_af_flr(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_pm_reset(dev, 1); - if (rc != -ENOTTY) - return rc; + i = 0; + + for (m = 1; m < PCI_NUM_RESET_METHODS; m++) { + rc = pci_reset_fn_methods[m].reset_fn(dev, 1); + if (!rc) + dev->reset_methods[i++] = m; + else if (rc != -ENOTTY) + break; + } - return pci_reset_bus_function(dev, 1); + dev->reset_methods[i] = 0; } /** diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 37c913bbc6e1..7438953745e0 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -33,7 +33,8 @@ enum pci_mmap_api { int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, enum pci_mmap_api mmap_api); -int pci_probe_reset_function(struct pci_dev *dev); +bool pci_reset_supported(struct pci_dev *dev); +void pci_init_reset_methods(struct pci_dev *dev); int pci_bridge_secondary_bus_reset(struct pci_dev *dev); int pci_bus_error_reset(struct pci_dev *dev); @@ -606,6 +607,11 @@ struct pci_dev_reset_methods { int (*reset)(struct pci_dev *dev, int probe); }; +struct pci_reset_fn_method { + int (*reset_fn)(struct pci_dev *pdev, int probe); + char *name; +}; + #ifdef CONFIG_PCI_QUIRKS int pci_dev_specific_reset(struct pci_dev *dev, int probe); #else diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index df3f9db6e151..5d8ad230f7d0 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2405,9 +2405,8 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_rcec_init(dev); /* Root Complex Event Collector */ pcie_report_downtraining(dev); - - if (pci_probe_reset_function(dev) == 0) - dev->reset_fn = 1; + pci_init_reset_methods(dev); + dev->reset_fn = pci_reset_supported(dev); } /* diff --git a/include/linux/pci.h b/include/linux/pci.h index aa85e7d3147e..d1a9a232d08e 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -49,6 +49,9 @@ PCI_STATUS_SIG_TARGET_ABORT | \ PCI_STATUS_PARITY) +/* Number of reset methods used in pci_reset_fn_methods array in pci.c */ +#define PCI_NUM_RESET_METHODS 6 + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded @@ -506,6 +509,10 @@ struct pci_dev { char *driver_override; /* Driver name to force a match */ unsigned long priv_flags; /* Private flags for the PCI driver */ + /* + * See pci_reset_fn_methods array in pci.c for ordering. + */ + u8 reset_methods[PCI_NUM_RESET_METHODS]; /* Reset methods ordered by priority */ }; static inline struct pci_dev *pci_physfn(struct pci_dev *dev) From patchwork Sun Aug 1 14:25:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412975 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71035C4338F for ; Sun, 1 Aug 2021 14:25:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 57579610D1 for ; Sun, 1 Aug 2021 14:25:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231849AbhHAOZw (ORCPT ); Sun, 1 Aug 2021 10:25:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232033AbhHAOZw (ORCPT ); Sun, 1 Aug 2021 10:25:52 -0400 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8659DC0613D3; Sun, 1 Aug 2021 07:25:43 -0700 (PDT) Received: by mail-pl1-x62b.google.com with SMTP id e21so16678737pla.5; Sun, 01 Aug 2021 07:25:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rzemOKr8SkBV19b/ZnGS+URhX00WU8DKUyy8R3iVY7U=; b=imK3wtpY5LimeDX2dscS00vwhBBEG3tHTkMUsaq8gtxEHqb8TliFJmIBBGUpIm6gHV JJet0NppCw/Vwh17WjMt32TcCto63Y4+90IggPVNTfc/YKE+BfRVmQ6d00NDchvFDF4b 4yVYDDO0/NTGoiOgi/1J+oH6gN2yNP7k3q7d/D5rdyLWz+JXpRjaXJ6+Wfeep7TCEmO3 tclDCGmbAKcBk8gDwvuiMfNHG29sMfznLoXr94qEFxUzeyZyg/5jIGzDcb6W+Spg1qB6 HxFIzt6ExCsfVePDwj+jPf62O3b6KcTB2T7GRlB+aiTAU5gsnZiWW+FNFazfYPxjA6eD Csvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rzemOKr8SkBV19b/ZnGS+URhX00WU8DKUyy8R3iVY7U=; b=IgZTWeH0Ztcuf9q3aN2+jljgChQ/yIy8lWqZZtjoFc5tEuhmTMDXILIeZWbgDoulWW eZTwe3k7XX4RJhuO1Ld1jXXPg1rQYO9pvOEreTlpS5IZ6skscGtqO2qU170Pr0sHUTOO KEpWQANCWOJkkw6ry+U6uurHmO2kb9wihwl0RDbUpH9b8w3IITK/dqFN+2ZcatlVAS1S d0hySvcdQM9gPhvp/NVgqw3kTCKBF5XJ0sSE8zhjBr3EXAMuSHiARGNTsqyhnYqkVnnq eEJgV1GE8RJdKn1wsjoDULGV2gOpBaTo6f2I8NEdmXiQh/5cfcc2kg0DvcO5k+qUtDPr Ln8A== X-Gm-Message-State: AOAM53317AF+oECF7GkBnmWbPKpRo3y3tlRNspI0IUMIJsn4M4/OVLwz TLnO5GpSn2MZ6KSrfKJtGS8= X-Google-Smtp-Source: ABdhPJyjLatWzM6rmeF7drLPSWi2r7+O1IJVX/FFVRgVWvcDbnBsLu7SH/1h5fujUYi2Io+yUhvmNw== X-Received: by 2002:a65:6088:: with SMTP id t8mr4351714pgu.371.1627827943162; Sun, 01 Aug 2021 07:25:43 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:42 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" , Amey Narkhede Subject: [PATCH v13 4/9] PCI: Remove reset_fn field from pci_dev Date: Sun, 1 Aug 2021 19:55:13 +0530 Message-Id: <20210801142518.1224-5-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org reset_fn field is used to indicate whether the device supports any reset mechanism or not. Remove the use of reset_fn in favor of new reset_methods array which can be used to keep track of all supported reset mechanisms of a device and their ordering. The octeon driver is incorrectly using reset_fn field to detect if the device supports FLR or not. Use pcie_reset_flr() to probe whether it supports FLR or not. Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz Co-developed-by: Alex Williamson Signed-off-by: Alex Williamson Signed-off-by: Amey Narkhede --- drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 2 +- drivers/pci/pci-sysfs.c | 2 +- drivers/pci/pci.c | 6 +++--- drivers/pci/probe.c | 1 - drivers/pci/quirks.c | 2 +- drivers/pci/remove.c | 1 - include/linux/pci.h | 1 - 7 files changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c index 516f166ceff8..336d149ee2e2 100644 --- a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c +++ b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c @@ -526,7 +526,7 @@ static void octeon_destroy_resources(struct octeon_device *oct) oct->irq_name_storage = NULL; } /* Soft reset the octeon device before exiting */ - if (oct->pci_dev->reset_fn) + if (!pcie_reset_flr(oct->pci_dev, 1)) octeon_pci_flr(oct); else cn23xx_vf_ask_pf_to_do_flr(oct); diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index beb8d1f4fafe..316f70c3e3b4 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -1367,7 +1367,7 @@ static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj, { struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); - if (!pdev->reset_fn) + if (!pci_reset_supported(pdev)) return 0; return a->mode; diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 010962d7dba6..932dd21e759b 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5235,7 +5235,7 @@ int pci_reset_function(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!pci_reset_supported(dev)) return -ENOTTY; pci_dev_lock(dev); @@ -5271,7 +5271,7 @@ int pci_reset_function_locked(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!pci_reset_supported(dev)) return -ENOTTY; pci_dev_save_and_disable(dev); @@ -5294,7 +5294,7 @@ int pci_try_reset_function(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!pci_reset_supported(dev)) return -ENOTTY; if (!pci_dev_trylock(dev)) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 5d8ad230f7d0..379e85037d9b 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2406,7 +2406,6 @@ static void pci_init_capabilities(struct pci_dev *dev) pcie_report_downtraining(dev); pci_init_reset_methods(dev); - dev->reset_fn = pci_reset_supported(dev); } /* diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index b48e7ef8b641..0db5dac3ddce 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5589,7 +5589,7 @@ static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev) if (pdev->subsystem_vendor != PCI_VENDOR_ID_LENOVO || pdev->subsystem_device != 0x222e || - !pdev->reset_fn) + !pci_reset_supported(pdev)) return; if (pci_enable_device_mem(pdev)) diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c index dd12c2fcc7dc..4c54c75050dc 100644 --- a/drivers/pci/remove.c +++ b/drivers/pci/remove.c @@ -19,7 +19,6 @@ static void pci_stop_dev(struct pci_dev *dev) pci_pme_active(dev, false); if (pci_dev_is_added(dev)) { - dev->reset_fn = 0; device_release_driver(&dev->dev); pci_proc_detach_device(dev); diff --git a/include/linux/pci.h b/include/linux/pci.h index d1a9a232d08e..94d74fd594c1 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -431,7 +431,6 @@ struct pci_dev { unsigned int state_saved:1; unsigned int is_physfn:1; unsigned int is_virtfn:1; - unsigned int reset_fn:1; unsigned int is_hotplug_bridge:1; unsigned int shpc_managed:1; /* SHPC owned by shpchp */ unsigned int is_thunderbolt:1; /* Thunderbolt controller */ From patchwork Sun Aug 1 14:25:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412977 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3EEAC4338F for ; Sun, 1 Aug 2021 14:25:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CE3CD60F36 for ; Sun, 1 Aug 2021 14:25:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232064AbhHAOZ7 (ORCPT ); Sun, 1 Aug 2021 10:25:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232118AbhHAOZ5 (ORCPT ); Sun, 1 Aug 2021 10:25:57 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24060C06179A; Sun, 1 Aug 2021 07:25:47 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id mz5-20020a17090b3785b0290176ecf64922so27827526pjb.3; Sun, 01 Aug 2021 07:25:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mrgRbYBJ3TutCw5MQ7UwdvxpZcgSoowZXm3m+uMfmKY=; b=pSUmieMJcGaOZ0GPOmtCXqMZDj090GpQH7D6OItwRRDpbKDrm8CJaSz2P5l0HABHY4 lGkenr81OB0TyMi1memQBVLsW9kHRZO2BDbEWNvKw7hKsDLA9tJuCPn6mVzFebgvhddp 6L/UfLYGUWXGoNZ4G3ncc1mIzLf541ceq3U9u3MGwr1VcPTdN0JQUaSHmYsymLJx1VJo 4CmcoCX/Jlvmn0WbLulayVpJhHg/ponpgpglEmevpzQ52iQBPjd2PDZc2KrrOj+FAMvr 7TJtbs+W+iMatpcN31W1nST0937y3py3JYyhL4nP2/o9U18HUETFkUgKZhW5VQEaPUyD UWxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mrgRbYBJ3TutCw5MQ7UwdvxpZcgSoowZXm3m+uMfmKY=; b=MTvrRyRF4IgslBnjw4dUE/+DzAAHEHpfZYGlb2dVvuVdRoMXsfiHQGCbAvX7d2sC5p 9y6E30bnT96kyX5sYSWeV6zUG2UWepKKb9JACuZe0PLlugsKj6VFrwytDzUXyBhlAlm2 wUVSwwWHRdrmYTQ1lGwubWcfHOMDKk97prIUnJiwghLt9J3pXWgco6fEgvM2G1VIFXI8 W2uO7o6QWlPqlvD9nZGOkAdWaivFOvLy/FzcRxqGUypK35gBXL5J/RVVz5QQdlE2lZ+Y l7R21aw69HKFViVw+QX2iz5K7bU093of2Mrd1/f/Jj01bpHAH7P2wmLNCjiEqdtqahth cZQA== X-Gm-Message-State: AOAM530lD7xlmp1Kpd2y3c76K1dsvK8og394xS9zH4Sm3q/Ll2MI/kfu ckVJKRKIhi8PLy3tsOtF094= X-Google-Smtp-Source: ABdhPJzy++7Z72Q+O9JVfxOFw9bmK4FboPUplH0NDQrKCUHAIDRyE3n+NP1crZygtrDkTA1CwP+aVA== X-Received: by 2002:a17:90a:ba09:: with SMTP id s9mr12984285pjr.126.1627827946755; Sun, 01 Aug 2021 07:25:46 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:46 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" , Amey Narkhede Subject: [PATCH v13 5/9] PCI: Allow userspace to query and set device reset mechanism Date: Sun, 1 Aug 2021 19:55:14 +0530 Message-Id: <20210801142518.1224-6-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add reset_method sysfs attribute to enable user to query and set user preferred device reset methods and their ordering. Co-developed-by: Alex Williamson Signed-off-by: Alex Williamson Signed-off-by: Amey Narkhede --- Documentation/ABI/testing/sysfs-bus-pci | 19 +++++ drivers/pci/pci-sysfs.c | 1 + drivers/pci/pci.c | 105 ++++++++++++++++++++++++ drivers/pci/pci.h | 2 + 4 files changed, 127 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index ef00fada2efb..ef66b62bf025 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -121,6 +121,25 @@ Description: child buses, and re-discover devices removed earlier from this part of the device tree. +What: /sys/bus/pci/devices/.../reset_method +Date: March 2021 +Contact: Amey Narkhede +Description: + Some devices allow an individual function to be reset + without affecting other functions in the same slot. + + For devices that have this support, a file named + reset_method will be present in sysfs. Initially reading + this file will give names of the device supported reset + methods and their ordering. After write, this file will + give names and ordering of currently enabled reset methods. + Writing the name or space separated list of names of any of + the device supported reset methods to this file will set + the reset methods and their ordering to be used when + resetting the device. Writing empty string to this file + will disable ability to reset the device and writing + "default" will return to the original value. + What: /sys/bus/pci/devices/.../reset Date: July 2009 Contact: Michael S. Tsirkin diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 316f70c3e3b4..54ee7193b463 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -1491,6 +1491,7 @@ const struct attribute_group *pci_dev_groups[] = { &pci_dev_config_attr_group, &pci_dev_rom_attr_group, &pci_dev_reset_attr_group, + &pci_dev_reset_method_attr_group, &pci_dev_vpd_attr_group, #ifdef CONFIG_DMI &pci_dev_smbios_attr_group, diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 932dd21e759b..c496cd164aca 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5132,6 +5132,111 @@ static const struct pci_reset_fn_method pci_reset_fn_methods[] = { { pci_reset_bus_function, .name = "bus" }, }; +static ssize_t reset_method_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct pci_dev *pdev = to_pci_dev(dev); + ssize_t len = 0; + int i, m; + + for (i = 0; i < PCI_NUM_RESET_METHODS; i++) { + m = pdev->reset_methods[i]; + if (!m) + break; + + len += sysfs_emit_at(buf, len, "%s%s", len ? " " : "", + pci_reset_fn_methods[m].name); + } + + if (len) + len += sysfs_emit_at(buf, len, "\n"); + + return len; +} + +static ssize_t reset_method_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct pci_dev *pdev = to_pci_dev(dev); + int i = 0; + char *name, *options = NULL; + + if (count >= (PAGE_SIZE - 1)) + return -EINVAL; + + if (sysfs_streq(buf, "")) { + pdev->reset_methods[0] = 0; + pci_warn(pdev, "All device reset methods disabled by user"); + return count; + } + + if (sysfs_streq(buf, "default")) { + pci_init_reset_methods(pdev); + return count; + } + + options = kstrndup(buf, count, GFP_KERNEL); + if (!options) + return -ENOMEM; + + while ((name = strsep(&options, " ")) != NULL) { + int m; + + if (sysfs_streq(name, "")) + continue; + + name = strim(name); + + for (m = 1; m < PCI_NUM_RESET_METHODS && i < PCI_NUM_RESET_METHODS; m++) { + if (sysfs_streq(name, pci_reset_fn_methods[m].name) && + !pci_reset_fn_methods[m].reset_fn(pdev, 1)) { + pdev->reset_methods[i++] = m; + break; + } + } + + if (m == PCI_NUM_RESET_METHODS) { + kfree(options); + return -EINVAL; + + } + } + + if (i < PCI_NUM_RESET_METHODS) + pdev->reset_methods[i] = 0; + + if (!pci_reset_fn_methods[1].reset_fn(pdev, 1) && pdev->reset_methods[0] != 1) + pci_warn(pdev, "Device specific reset disabled/de-prioritized by user"); + + kfree(options); + + return count; +} +static DEVICE_ATTR_RW(reset_method); + +static struct attribute *pci_dev_reset_method_attrs[] = { + &dev_attr_reset_method.attr, + NULL, +}; + +static umode_t pci_dev_reset_method_attr_is_visible(struct kobject *kobj, + struct attribute *a, int n) +{ + struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); + + if (!pci_reset_supported(pdev)) + return 0; + + return a->mode; +} + +const struct attribute_group pci_dev_reset_method_attr_group = { + .attrs = pci_dev_reset_method_attrs, + .is_visible = pci_dev_reset_method_attr_is_visible, +}; + /** * __pci_reset_function_locked - reset a PCI device function while holding * the @dev mutex lock. diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 7438953745e0..31458d48eda7 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -714,4 +714,6 @@ static inline int pci_acpi_program_hp_params(struct pci_dev *dev) extern const struct attribute_group aspm_ctrl_attr_group; #endif +extern const struct attribute_group pci_dev_reset_method_attr_group; + #endif /* DRIVERS_PCI_H */ From patchwork Sun Aug 1 14:25:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412979 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 774E9C432BE for ; Sun, 1 Aug 2021 14:25:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5DF6B610CF for ; Sun, 1 Aug 2021 14:25:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232170AbhHAO0A (ORCPT ); Sun, 1 Aug 2021 10:26:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232182AbhHAOZ7 (ORCPT ); Sun, 1 Aug 2021 10:25:59 -0400 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE4AFC0613D5; Sun, 1 Aug 2021 07:25:50 -0700 (PDT) Received: by mail-pl1-x62a.google.com with SMTP id u2so8400699plg.10; Sun, 01 Aug 2021 07:25:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iybQZ12qC8zX6NnxQv/Qw71ae7yPExH0GdYjIRAaEIA=; b=eVCWxov1kLBKxhp+ey72e4XW3PPvLfWABIIKNCk5VxNW0OZOfGrXzMDSfAI5BOgxAy 6b3nHdNKEv08kqA0s5MRLY/4PUExHOoD0IQNoyyxREj6MjnW1t2W9rlrRb2D1hMdptgL 61p8U82+DJse9VHhMEgVLZTFRYSxU70toVASXYle0QjchzCjQTTUV/I/ZckNTh/Zm10e uYrhU8PK03kRIDWwF093brISAenalODaMpkPViDdzyw79PRvt+Ccp6wlM8fSHfvcjTha IPMGUJ+qbNGwaa6mQ3eIipRFAHV0LLsPpsxuX9W8gmDRuZ07qTG7hwV/OO9GR37bLcyT alBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iybQZ12qC8zX6NnxQv/Qw71ae7yPExH0GdYjIRAaEIA=; b=HtvssVIZU9LKuLd4NdujQLh9SZBNPhD4F7vNigKvNtkDpcdJ9s6Una+slDXCGQ93ny ZSD4N0SqgFXf1v3bkbrdgH3w697ZoP+baXEfIH9aEUsPUVTzecbRlMDqxS9D+BM1Dl3U pyAV1pi0KBlpTKWU941392iolT704/G0Nr9G7wpEiqKk9daxV1QopwA7QAX1hQx/Cgdm tbf5zi3rOGfMQFhGLBgTDL9VAd41+/IpQHaCwHnzmzgqnCSKCE2E6mUwqA0jRrm/OOdS a3ZvN7qs/DAKoc0v6wWtSfIUL5Qe0X2kO9+VlR+t1/hM4VGgf3VoLkJ9ZszyuVmyeywO MX8g== X-Gm-Message-State: AOAM531/9MKa9jBeGA8eX4tAg0j+Bgn8IJ+T1410nHZUkwYtGkj5ALoo FEkaPreCj8W7HMA4ROYI7JY= X-Google-Smtp-Source: ABdhPJz8BDQA8ZXZqmZyKa4HZSNJlkZNaoWn9DRk5+dWJ1PQswsQfZtUpohTNm1m49AgoG7NC8T/RA== X-Received: by 2002:a62:ee11:0:b029:32f:955e:aec with SMTP id e17-20020a62ee110000b029032f955e0aecmr12471537pfi.31.1627827950324; Sun, 01 Aug 2021 07:25:50 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:50 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" Subject: [PATCH v13 6/9] PCI: Define a function to set ACPI_COMPANION in pci_dev Date: Sun, 1 Aug 2021 19:55:15 +0530 Message-Id: <20210801142518.1224-7-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Shanker Donthineni Move the existing code logic from acpi_pci_bridge_d3() to a separate function pci_set_acpi_fwnode() to set the ACPI fwnode. No functional change with this patch. Signed-off-by: Shanker Donthineni --- drivers/pci/pci-acpi.c | 12 ++++++++---- drivers/pci/pci.h | 2 ++ 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 36bc23e21759..eaddbf701759 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -934,6 +934,13 @@ static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev) static struct acpi_device *acpi_pci_find_companion(struct device *dev); +void pci_set_acpi_fwnode(struct pci_dev *dev) +{ + if (!ACPI_COMPANION(&dev->dev) && !pci_dev_is_added(dev)) + ACPI_COMPANION_SET(&dev->dev, + acpi_pci_find_companion(&dev->dev)); +} + static bool acpi_pci_bridge_d3(struct pci_dev *dev) { const struct fwnode_handle *fwnode; @@ -945,11 +952,8 @@ static bool acpi_pci_bridge_d3(struct pci_dev *dev) return false; /* Assume D3 support if the bridge is power-manageable by ACPI. */ + pci_set_acpi_fwnode(dev); adev = ACPI_COMPANION(&dev->dev); - if (!adev && !pci_dev_is_added(dev)) { - adev = acpi_pci_find_companion(&dev->dev); - ACPI_COMPANION_SET(&dev->dev, adev); - } if (adev && acpi_device_power_manageable(adev)) return true; diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 31458d48eda7..8ef379b6cfad 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -703,7 +703,9 @@ static inline int pci_aer_raw_clear_status(struct pci_dev *dev) { return -EINVAL #ifdef CONFIG_ACPI int pci_acpi_program_hp_params(struct pci_dev *dev); extern const struct attribute_group pci_dev_acpi_attr_group; +void pci_set_acpi_fwnode(struct pci_dev *dev); #else +static inline void pci_set_acpi_fwnode(struct pci_dev *dev) {} static inline int pci_acpi_program_hp_params(struct pci_dev *dev) { return -ENODEV; From patchwork Sun Aug 1 14:25:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412981 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38960C4338F for ; Sun, 1 Aug 2021 14:26:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2096660C3F for ; Sun, 1 Aug 2021 14:26:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232249AbhHAO0I (ORCPT ); Sun, 1 Aug 2021 10:26:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232196AbhHAO0C (ORCPT ); Sun, 1 Aug 2021 10:26:02 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09E9CC06175F; Sun, 1 Aug 2021 07:25:54 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id e21so16679054pla.5; Sun, 01 Aug 2021 07:25:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r29+sUujdKPey6oLGLCs3NweFY8aTssXwj399PyY5uY=; b=KwlRG+sUCcX8tISzPUvUnSuLcdFgjtxRRc9KAz7NVxEPMznzePYn06nGw/FW3tzSCo +qRZiHYRrDGpTEO55JAGfHqNJxGTr4TlhBY/YqwNWi7dGKpmN0U3xcMTUYGsmk4UPWLy pOEhVpQrSsLxnAHZl23MZnYiRBB38bdecFFnmqFnvX1PEx72n0Q8rOI/wdOM0whAo1Ec l2shOqpbXCBe11X4ZeIgUiaVrIW3fq7Klm0RVCKUXD6kPiRt2cRib08eBWGE13KaQnVC X2pukE1pS2sTMmyhNc80Ik0G/ddLifoqm48JCv/KeQEx3llfuK40kOeKGI17kFm7vt0O zysw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r29+sUujdKPey6oLGLCs3NweFY8aTssXwj399PyY5uY=; b=uW3//qZ+Wco149TcRKBTTxtgT4PhhHhyjVXEFGBEs80CMvjTlmdrnB26rQG7SdF8VP p0tgC8ZX/zvA+OBihobJqzhDgowdLw9ihvbIz5bzRqcuCTMNBHQJY1UIB4H+NN8LZMGc 1wAdfBGYjW/u6eZR6B79FW3pzn6ZHpNH48i3woQSgsyJsnxvW9b43XcIkODC9tKHG+WB fEcffTg30VqQadWOhvt+XMfi1j82a2a57fH5SqyrxTBqHR0/y72wg5Zb7JbBVThETTRd dQ8O1kSPXJgd/fa3mYkej1RtUWSNY4ulZrQPjli6dobr/n3IJQsv4RApq1s1Z6/Zl/fj acEg== X-Gm-Message-State: AOAM530frBPJMoWhp8/TNT5fxojGPSi78wHpzrdlK2GeCrdqrfzCs43o CRcdq4ayeIf7GznaFrmNfDA= X-Google-Smtp-Source: ABdhPJxWiZKdMHwLonlmbEOke5g+8smroGoscvtd5jg/GCkc+v8nV8MQ+Jb7SsIxMQxGZgttJ4RZtA== X-Received: by 2002:aa7:9828:0:b029:3bd:dc3d:de5f with SMTP id q8-20020aa798280000b02903bddc3dde5fmr348440pfl.47.1627827953642; Sun, 01 Aug 2021 07:25:53 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:53 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" Subject: [PATCH v13 7/9] PCI: Setup ACPI fwnode early and at the same time with OF Date: Sun, 1 Aug 2021 19:55:16 +0530 Message-Id: <20210801142518.1224-8-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Shanker Donthineni The pci_dev objects are created through two mechanisms 1) during PCI bus scan and 2) from I/O Virtualization. The fwnode in pci_dev object is being set at different places depends on the type of firmware used, device creation mechanism, and acpi_pci_bridge_d3(). The software features which have a dependency on ACPI fwnode properties and need to be handled before device_add() will not work. One use case, the software has to check the existence of _RST method to support ACPI based reset method. This patch does the two changes in order to provide fwnode consistently. - Set ACPI and OF fwnodes from pci_setup_device(). - Remove pci_set_acpi_fwnode() in acpi_pci_bridge_d3(). After this patch, ACPI/OF firmware properties are visible at the same time during the early stage of pci_dev setup. And also call sites should be able to use firmware agnostic functions device_property_xxx() for the early PCI quirks in the future. Signed-off-by: Shanker Donthineni Reviewed-by: Alex Williamson --- drivers/pci/pci-acpi.c | 1 - drivers/pci/probe.c | 7 ++++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index eaddbf701759..dae021322b3f 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -952,7 +952,6 @@ static bool acpi_pci_bridge_d3(struct pci_dev *dev) return false; /* Assume D3 support if the bridge is power-manageable by ACPI. */ - pci_set_acpi_fwnode(dev); adev = ACPI_COMPANION(&dev->dev); if (adev && acpi_device_power_manageable(adev)) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 379e85037d9b..15a6975d3757 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1789,6 +1789,9 @@ int pci_setup_device(struct pci_dev *dev) dev->error_state = pci_channel_io_normal; set_pcie_port_type(dev); + pci_set_of_node(dev); + pci_set_acpi_fwnode(dev); + pci_dev_assign_slot(dev); /* @@ -1924,6 +1927,7 @@ int pci_setup_device(struct pci_dev *dev) default: /* unknown header */ pci_err(dev, "unknown header type %02x, ignoring device\n", dev->hdr_type); + pci_release_of_node(dev); return -EIO; bad: @@ -2351,10 +2355,7 @@ static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn) dev->vendor = l & 0xffff; dev->device = (l >> 16) & 0xffff; - pci_set_of_node(dev); - if (pci_setup_device(dev)) { - pci_release_of_node(dev); pci_bus_put(dev->bus); kfree(dev); return NULL; From patchwork Sun Aug 1 14:25:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412983 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EAD4C4338F for ; Sun, 1 Aug 2021 14:26:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6649960D07 for ; Sun, 1 Aug 2021 14:26:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232265AbhHAO0K (ORCPT ); Sun, 1 Aug 2021 10:26:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232225AbhHAO0G (ORCPT ); Sun, 1 Aug 2021 10:26:06 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BA75C0613D3; Sun, 1 Aug 2021 07:25:57 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id e2-20020a17090a4a02b029016f3020d867so21222157pjh.3; Sun, 01 Aug 2021 07:25:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TId0+h1i0453gBoMtZ8h2dF7+pQvpWYMri1/rxv1pP0=; b=JI7zjw3pxagniDhA3I2lmCh1d3pddu3H4AAeZPd94IiM8rEmEM6p1HHhj5RvH6xIAS NlYBK4i9cesMsl14ZgZeTeScXsWeSsvgNzr+lEHOuAIVGe53L4HirxSHKb7dG9H9P2W2 i5ocP5u5g58FxSkz+d8bTYC72CPLgd1b7VMpDAwQLZ7SgF8Aok9bsMqn+Lg2cqQdZef4 OwFeEUeMh1PengCXFeot554tR4uEFN/mP7Q/HRWun8yExt/4JPkx9aqqhPzhkwlQ8Poq iUaD6ysWP3f0nlECi+LDbYYwJ8iZZcZtFeUZeqRFhdi/HfFJiM+/zJ+gs7W1qlCoglGE rBNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TId0+h1i0453gBoMtZ8h2dF7+pQvpWYMri1/rxv1pP0=; b=AttinE+Ula7vJiTeSHE21Bf5ljl2FFEOqs1/ByB6/Q5InFNxU+5v/ZKIGhoumnIsjf XrgOxoxgOhfym6TYH8vNmXG/P6V5N82pRKeR69/REtUXXEtLZYe0k0SnMnQrMaOgjIhb ePLGHCZqdoZrGulKN5RqNZaGsQqGH52woQ6VcnSeqz8fpdToOfpeKIw2fgUL0DwvLoah 2fy0GHdn9texz5FkEP7G7S7TjtfYFtaGrzRzVPJ6XDa9KY6oJ1c9akDwXaiXvuPqufph 69Vkh4q9Ue8/laaPo4b4PJvgOv3/5mUa5f5KAqx0ePxMERLWCbwqbvemlGy5trs/CVo8 H6Lg== X-Gm-Message-State: AOAM533ZmBO3WRELB5Vp1ksqSg12b6c/kWlGHJwYZRAVUsP9C/Vk7ove nD4lJpgZdUK9EIYUF4c6lig= X-Google-Smtp-Source: ABdhPJzWUp4dP0cIaaxZqOcyxwH7SjWmw7ClMfuc+OciGeMjaev3sSR0rQbX2uT27FQAxFE9tmT4jQ== X-Received: by 2002:a63:f557:: with SMTP id e23mr7918501pgk.344.1627827956929; Sun, 01 Aug 2021 07:25:56 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:25:56 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" Subject: [PATCH v13 8/9] PCI: Add support for ACPI _RST reset method Date: Sun, 1 Aug 2021 19:55:17 +0530 Message-Id: <20210801142518.1224-9-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Shanker Donthineni The _RST is a standard method specified in the ACPI specification. It provides a function level reset when it is described in the acpi_device context associated with PCI-device. Implement a new reset function pci_dev_acpi_reset() for probing RST method and execute if it is defined in the firmware. The default priority of the ACPI reset is set to below device-specific and above hardware resets. Signed-off-by: Shanker Donthineni Suggested-by: Alex Williamson Reviewed-by: Sinan Kaya Reviewed-by: Alex Williamson --- drivers/pci/pci-acpi.c | 23 +++++++++++++++++++++++ drivers/pci/pci.c | 1 + drivers/pci/pci.h | 6 ++++++ include/linux/pci.h | 2 +- 4 files changed, 31 insertions(+), 1 deletion(-) -- 2.32.0 diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index dae021322b3f..31f76746741f 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -941,6 +941,29 @@ void pci_set_acpi_fwnode(struct pci_dev *dev) acpi_pci_find_companion(&dev->dev)); } +/** + * pci_dev_acpi_reset - do a function level reset using _RST method + * @dev: device to reset + * @probe: check if _RST method is included in the acpi_device context. + */ +int pci_dev_acpi_reset(struct pci_dev *dev, int probe) +{ + acpi_handle handle = ACPI_HANDLE(&dev->dev); + + if (!handle || !acpi_has_method(handle, "_RST")) + return -ENOTTY; + + if (probe) + return 0; + + if (ACPI_FAILURE(acpi_evaluate_object(handle, "_RST", NULL, NULL))) { + pci_warn(dev, "ACPI _RST failed\n"); + return -ENOTTY; + } + + return 0; +} + static bool acpi_pci_bridge_d3(struct pci_dev *dev) { const struct fwnode_handle *fwnode; diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index c496cd164aca..36121b1fbcab 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5126,6 +5126,7 @@ static void pci_dev_restore(struct pci_dev *dev) static const struct pci_reset_fn_method pci_reset_fn_methods[] = { { }, { pci_dev_specific_reset, .name = "device_specific" }, + { pci_dev_acpi_reset, .name = "acpi" }, { pcie_reset_flr, .name = "flr" }, { pci_af_flr, .name = "af_flr" }, { pci_pm_reset, .name = "pm" }, diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 8ef379b6cfad..b13dae3323da 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -704,7 +704,13 @@ static inline int pci_aer_raw_clear_status(struct pci_dev *dev) { return -EINVAL int pci_acpi_program_hp_params(struct pci_dev *dev); extern const struct attribute_group pci_dev_acpi_attr_group; void pci_set_acpi_fwnode(struct pci_dev *dev); +int pci_dev_acpi_reset(struct pci_dev *dev, int probe); #else +static inline int pci_dev_acpi_reset(struct pci_dev *dev, int probe) +{ + return -ENOTTY; +} + static inline void pci_set_acpi_fwnode(struct pci_dev *dev) {} static inline int pci_acpi_program_hp_params(struct pci_dev *dev) { diff --git a/include/linux/pci.h b/include/linux/pci.h index 94d74fd594c1..d3b06bfd8b99 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -50,7 +50,7 @@ PCI_STATUS_PARITY) /* Number of reset methods used in pci_reset_fn_methods array in pci.c */ -#define PCI_NUM_RESET_METHODS 6 +#define PCI_NUM_RESET_METHODS 7 /* * The PCI interface treats multi-function devices as independent From patchwork Sun Aug 1 14:25:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12412985 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1705C4338F for ; Sun, 1 Aug 2021 14:26:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A9E6360C3F for ; Sun, 1 Aug 2021 14:26:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232233AbhHAO0M (ORCPT ); Sun, 1 Aug 2021 10:26:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40508 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231967AbhHAO0K (ORCPT ); Sun, 1 Aug 2021 10:26:10 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12B44C06175F; Sun, 1 Aug 2021 07:26:01 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id u9-20020a17090a1f09b029017554809f35so27803732pja.5; Sun, 01 Aug 2021 07:26:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=m/LSTFRpIwO+puCiFgHxitGu8wJvu77VP1vDC9fcyhc=; b=o56R/caaD11pFYEcOWimHiEcszlOA/HVFtg58APn3piECjYZ2OvmxDIEgeu45DV5AE nojmx9pOpQ7SFGewOw3kWlsNe/FbiwcMHVENfcszQ03VBDr7NMXp9mLgEwi27NaZiXk0 ssnUfohpFbmx6WWlOS1QPdftY0JMPhGaN9c1SkOOlL56zHcNv+dTeV9l2eWCW0ONMJSW 0DP17aetYE3HHq/rSv3waM3iDKdfeMrcf54nn2ieJqDRpMXqUk7oZX4CO0if1baB7oow IKUm9BLHIlkATTUasX9/dOEXr1HkmZuFWTEqCt6z+qNYfvkvYRvHKS5YPnUolIXyR/KO zorw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=m/LSTFRpIwO+puCiFgHxitGu8wJvu77VP1vDC9fcyhc=; b=dv6/ih1cfHtLtlhLAXDuGcrLFc74k6dfmXXk2CiYXZzhtswMlp2brbirp/cVAQe0Vh kZBsgaz19Y/g5UJl7sW5DMoqW+RMvHrSnKK5Y/nmQI1gEQmlnVguyBkIyNiJtw6+afEU gJTovAZj7LFx6SjO741wN65XRKU5vgmnSYjLvO3dKZbHNTF/MQoxH5RqqSwINaNcM42X GCPokP/fL/0J9L5I4gMMyodgnzY7GHc/BDRKHX4xFYXXZyI9YsQkLQYQf88F0d+hX1QN nHN9nDMcmsM4HLujr1n9XB1qr3+UTKQ6HMjQKSw0BAU9vzKlm1FdsCn7ZsjnN7I62AaZ YzLg== X-Gm-Message-State: AOAM5338tP7zxazoslzycLmPj4Mf4Kr0vWOS6GMWlhLXxGvxJ6DCdW1W EQ3RiLPX4gekAUmINaROGco= X-Google-Smtp-Source: ABdhPJy934zzCmZAYFrXF1nQXAZ+q5BZc6fnYIH/+gESTSEwcD17z0FrbQJ7iUgc1m9yGyhrLW8zhA== X-Received: by 2002:aa7:9626:0:b029:32a:f13b:7ab3 with SMTP id r6-20020aa796260000b029032af13b7ab3mr12282831pfg.43.1627827960504; Sun, 01 Aug 2021 07:26:00 -0700 (PDT) Received: from localhost.localdomain ([139.5.31.186]) by smtp.googlemail.com with ESMTPSA id g11sm7740897pju.13.2021.08.01.07.25.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 07:26:00 -0700 (PDT) From: Amey Narkhede To: Bjorn Helgaas Cc: alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" , Amey Narkhede Subject: [PATCH v13 9/9] PCI: Change the type of probe argument in reset functions Date: Sun, 1 Aug 2021 19:55:18 +0530 Message-Id: <20210801142518.1224-10-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210801142518.1224-1-ameynarkhede03@gmail.com> References: <20210801142518.1224-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Change the type of probe argument in functions which implement reset methods from int to bool to make the context and intent clear. Suggested-by: Alex Williamson Suggested-by: Krzysztof Wilczyński Signed-off-by: Amey Narkhede --- drivers/crypto/cavium/nitrox/nitrox_main.c | 2 +- .../ethernet/cavium/liquidio/lio_vf_main.c | 2 +- drivers/pci/hotplug/pciehp.h | 2 +- drivers/pci/hotplug/pciehp_hpc.c | 4 +- drivers/pci/hotplug/pnv_php.c | 4 +- drivers/pci/pci-acpi.c | 7 +- drivers/pci/pci.c | 69 ++++++++++--------- drivers/pci/pci.h | 12 ++-- drivers/pci/pcie/aer.c | 2 +- drivers/pci/quirks.c | 34 ++++----- include/linux/pci.h | 5 +- include/linux/pci_hotplug.h | 2 +- 12 files changed, 75 insertions(+), 70 deletions(-) diff --git a/drivers/crypto/cavium/nitrox/nitrox_main.c b/drivers/crypto/cavium/nitrox/nitrox_main.c index 15d6c8452807..f97fa8e997b5 100644 --- a/drivers/crypto/cavium/nitrox/nitrox_main.c +++ b/drivers/crypto/cavium/nitrox/nitrox_main.c @@ -306,7 +306,7 @@ static int nitrox_device_flr(struct pci_dev *pdev) return -ENOMEM; } - pcie_reset_flr(pdev, 0); + pcie_reset_flr(pdev, PCI_RESET_DO_RESET); pci_restore_state(pdev); diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c index 336d149ee2e2..6e666be6907a 100644 --- a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c +++ b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c @@ -526,7 +526,7 @@ static void octeon_destroy_resources(struct octeon_device *oct) oct->irq_name_storage = NULL; } /* Soft reset the octeon device before exiting */ - if (!pcie_reset_flr(oct->pci_dev, 1)) + if (!pcie_reset_flr(oct->pci_dev, PCI_RESET_PROBE)) octeon_pci_flr(oct); else cn23xx_vf_ask_pf_to_do_flr(oct); diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h index 4fd200d8b0a9..f12e1ef9f183 100644 --- a/drivers/pci/hotplug/pciehp.h +++ b/drivers/pci/hotplug/pciehp.h @@ -181,7 +181,7 @@ void pciehp_release_ctrl(struct controller *ctrl); int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot); int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot); -int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe); +int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, bool mode); int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status); int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status); int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status); diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index fb3840e222ad..ba1b3e742792 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -834,14 +834,14 @@ void pcie_disable_interrupt(struct controller *ctrl) * momentarily, if we see that they could interfere. Also, clear any spurious * events after. */ -int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe) +int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, bool mode) { struct controller *ctrl = to_ctrl(hotplug_slot); struct pci_dev *pdev = ctrl_dev(ctrl); u16 stat_mask = 0, ctrl_mask = 0; int rc; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; down_write(&ctrl->reset_lock); diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c index 04565162a449..0e8686a98f2b 100644 --- a/drivers/pci/hotplug/pnv_php.c +++ b/drivers/pci/hotplug/pnv_php.c @@ -526,7 +526,7 @@ static int pnv_php_enable(struct pnv_php_slot *php_slot, bool rescan) return 0; } -static int pnv_php_reset_slot(struct hotplug_slot *slot, int probe) +static int pnv_php_reset_slot(struct hotplug_slot *slot, bool mode) { struct pnv_php_slot *php_slot = to_pnv_php_slot(slot); struct pci_dev *bridge = php_slot->pdev; @@ -537,7 +537,7 @@ static int pnv_php_reset_slot(struct hotplug_slot *slot, int probe) * which don't have a bridge. Only claim to support * reset_slot() if we have a bridge device (for now...) */ - if (probe) + if (mode == PCI_RESET_PROBE) return !bridge; /* mask our interrupt while resetting the bridge */ diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 31f76746741f..c88fbcb0c80a 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -944,16 +944,17 @@ void pci_set_acpi_fwnode(struct pci_dev *dev) /** * pci_dev_acpi_reset - do a function level reset using _RST method * @dev: device to reset - * @probe: check if _RST method is included in the acpi_device context. + * @probe: If PCI_RESET_PROBE, check whether _RST method is included + * in the acpi_device context. */ -int pci_dev_acpi_reset(struct pci_dev *dev, int probe) +int pci_dev_acpi_reset(struct pci_dev *dev, bool mode) { acpi_handle handle = ACPI_HANDLE(&dev->dev); if (!handle || !acpi_has_method(handle, "_RST")) return -ENOTTY; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; if (ACPI_FAILURE(acpi_evaluate_object(handle, "_RST", NULL, NULL))) { diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 36121b1fbcab..9a1d792d8c8a 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4663,23 +4663,23 @@ EXPORT_SYMBOL(pcie_flr); /** * pcie_reset_flr - initiate a PCIe function level reset * @dev: device to reset - * @probe: If set, only check if the device can be reset this way. + * @mode: If PCI_RESET_PROBE, only check if the device can be reset this way. * * Initiate a function level reset on @dev. */ -int pcie_reset_flr(struct pci_dev *dev, int probe) +int pcie_reset_flr(struct pci_dev *dev, bool mode) { if (!pcie_has_flr(dev)) return -ENOTTY; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; return pcie_flr(dev); } EXPORT_SYMBOL_GPL(pcie_reset_flr); -static int pci_af_flr(struct pci_dev *dev, int probe) +static int pci_af_flr(struct pci_dev *dev, bool mode) { int pos; u8 cap; @@ -4695,7 +4695,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe) if (!(cap & PCI_AF_CAP_TP) || !(cap & PCI_AF_CAP_FLR)) return -ENOTTY; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; /* @@ -4726,7 +4726,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe) /** * pci_pm_reset - Put device into PCI_D3 and back into PCI_D0. * @dev: Device to reset. - * @probe: If set, only check if the device can be reset this way. + * @mode: If PCI_RESET_PROBE, only check if the device can be reset this way. * * If @dev supports native PCI PM and its PCI_PM_CTRL_NO_SOFT_RESET flag is * unset, it will be reinitialized internally when going from PCI_D3hot to @@ -4738,7 +4738,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe) * by default (i.e. unless the @dev's d3hot_delay field has a different value). * Moreover, only devices in D0 can be reset by this function. */ -static int pci_pm_reset(struct pci_dev *dev, int probe) +static int pci_pm_reset(struct pci_dev *dev, bool mode) { u16 csr; @@ -4749,7 +4749,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) if (csr & PCI_PM_CTRL_NO_SOFT_RESET) return -ENOTTY; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; if (dev->current_state != PCI_D0) @@ -4998,7 +4998,7 @@ int pci_bridge_secondary_bus_reset(struct pci_dev *dev) } EXPORT_SYMBOL_GPL(pci_bridge_secondary_bus_reset); -static int pci_parent_bus_reset(struct pci_dev *dev, int probe) +static int pci_parent_bus_reset(struct pci_dev *dev, bool mode) { struct pci_dev *pdev; @@ -5010,13 +5010,13 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe) if (pdev != dev) return -ENOTTY; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; return pci_bridge_secondary_bus_reset(dev->bus->self); } -static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, int probe) +static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, bool mode) { int rc = -ENOTTY; @@ -5024,30 +5024,30 @@ static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, int probe) return rc; if (hotplug->ops->reset_slot) - rc = hotplug->ops->reset_slot(hotplug, probe); + rc = hotplug->ops->reset_slot(hotplug, mode); module_put(hotplug->owner); return rc; } -static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe) +static int pci_dev_reset_slot_function(struct pci_dev *dev, bool mode) { if (dev->multifunction || dev->subordinate || !dev->slot || dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) return -ENOTTY; - return pci_reset_hotplug_slot(dev->slot->hotplug, probe); + return pci_reset_hotplug_slot(dev->slot->hotplug, mode); } -static int pci_reset_bus_function(struct pci_dev *dev, int probe) +static int pci_reset_bus_function(struct pci_dev *dev, bool mode) { int rc; - rc = pci_dev_reset_slot_function(dev, probe); + rc = pci_dev_reset_slot_function(dev, mode); if (rc != -ENOTTY) return rc; - return pci_parent_bus_reset(dev, probe); + return pci_parent_bus_reset(dev, mode); } static void pci_dev_lock(struct pci_dev *dev) @@ -5192,7 +5192,7 @@ static ssize_t reset_method_store(struct device *dev, for (m = 1; m < PCI_NUM_RESET_METHODS && i < PCI_NUM_RESET_METHODS; m++) { if (sysfs_streq(name, pci_reset_fn_methods[m].name) && - !pci_reset_fn_methods[m].reset_fn(pdev, 1)) { + !pci_reset_fn_methods[m].reset_fn(pdev, PCI_RESET_PROBE)) { pdev->reset_methods[i++] = m; break; } @@ -5208,7 +5208,8 @@ static ssize_t reset_method_store(struct device *dev, if (i < PCI_NUM_RESET_METHODS) pdev->reset_methods[i] = 0; - if (!pci_reset_fn_methods[1].reset_fn(pdev, 1) && pdev->reset_methods[0] != 1) + if (!pci_reset_fn_methods[1].reset_fn(pdev, PCI_RESET_PROBE) && + pdev->reset_methods[0] != 1) pci_warn(pdev, "Device specific reset disabled/de-prioritized by user"); kfree(options); @@ -5277,7 +5278,7 @@ int __pci_reset_function_locked(struct pci_dev *dev) if (!m) return -ENOTTY; - rc = pci_reset_fn_methods[m].reset_fn(dev, 0); + rc = pci_reset_fn_methods[m].reset_fn(dev, PCI_RESET_DO_RESET); if (!rc) return 0; if (rc != -ENOTTY) @@ -5311,7 +5312,7 @@ void pci_init_reset_methods(struct pci_dev *dev) i = 0; for (m = 1; m < PCI_NUM_RESET_METHODS; m++) { - rc = pci_reset_fn_methods[m].reset_fn(dev, 1); + rc = pci_reset_fn_methods[m].reset_fn(dev, PCI_RESET_PROBE); if (!rc) dev->reset_methods[i++] = m; else if (rc != -ENOTTY) @@ -5628,21 +5629,21 @@ static void pci_slot_restore_locked(struct pci_slot *slot) } } -static int pci_slot_reset(struct pci_slot *slot, int probe) +static int pci_slot_reset(struct pci_slot *slot, bool mode) { int rc; if (!slot || !pci_slot_resetable(slot)) return -ENOTTY; - if (!probe) + if (mode != PCI_RESET_PROBE) pci_slot_lock(slot); might_sleep(); - rc = pci_reset_hotplug_slot(slot->hotplug, probe); + rc = pci_reset_hotplug_slot(slot->hotplug, mode); - if (!probe) + if (mode != PCI_RESET_PROBE) pci_slot_unlock(slot); return rc; @@ -5656,7 +5657,7 @@ static int pci_slot_reset(struct pci_slot *slot, int probe) */ int pci_probe_reset_slot(struct pci_slot *slot) { - return pci_slot_reset(slot, 1); + return pci_slot_reset(slot, PCI_RESET_PROBE); } EXPORT_SYMBOL_GPL(pci_probe_reset_slot); @@ -5679,14 +5680,14 @@ static int __pci_reset_slot(struct pci_slot *slot) { int rc; - rc = pci_slot_reset(slot, 1); + rc = pci_slot_reset(slot, PCI_RESET_PROBE); if (rc) return rc; if (pci_slot_trylock(slot)) { pci_slot_save_and_disable_locked(slot); might_sleep(); - rc = pci_reset_hotplug_slot(slot->hotplug, 0); + rc = pci_reset_hotplug_slot(slot->hotplug, PCI_RESET_DO_RESET); pci_slot_restore_locked(slot); pci_slot_unlock(slot); } else @@ -5695,14 +5696,14 @@ static int __pci_reset_slot(struct pci_slot *slot) return rc; } -static int pci_bus_reset(struct pci_bus *bus, int probe) +static int pci_bus_reset(struct pci_bus *bus, bool mode) { int ret; if (!bus->self || !pci_bus_resetable(bus)) return -ENOTTY; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; pci_bus_lock(bus); @@ -5741,14 +5742,14 @@ int pci_bus_error_reset(struct pci_dev *bridge) goto bus_reset; list_for_each_entry(slot, &bus->slots, list) - if (pci_slot_reset(slot, 0)) + if (pci_slot_reset(slot, PCI_RESET_DO_RESET)) goto bus_reset; mutex_unlock(&pci_slot_mutex); return 0; bus_reset: mutex_unlock(&pci_slot_mutex); - return pci_bus_reset(bridge->subordinate, 0); + return pci_bus_reset(bridge->subordinate, PCI_RESET_DO_RESET); } /** @@ -5759,7 +5760,7 @@ int pci_bus_error_reset(struct pci_dev *bridge) */ int pci_probe_reset_bus(struct pci_bus *bus) { - return pci_bus_reset(bus, 1); + return pci_bus_reset(bus, PCI_RESET_PROBE); } EXPORT_SYMBOL_GPL(pci_probe_reset_bus); @@ -5773,7 +5774,7 @@ static int __pci_reset_bus(struct pci_bus *bus) { int rc; - rc = pci_bus_reset(bus, 1); + rc = pci_bus_reset(bus, PCI_RESET_PROBE); if (rc) return rc; diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index b13dae3323da..8e1ba7bec362 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -604,18 +604,18 @@ static inline int pci_enable_ptm(struct pci_dev *dev, u8 *granularity) struct pci_dev_reset_methods { u16 vendor; u16 device; - int (*reset)(struct pci_dev *dev, int probe); + int (*reset)(struct pci_dev *dev, bool mode); }; struct pci_reset_fn_method { - int (*reset_fn)(struct pci_dev *pdev, int probe); + int (*reset_fn)(struct pci_dev *pdev, bool mode); char *name; }; #ifdef CONFIG_PCI_QUIRKS -int pci_dev_specific_reset(struct pci_dev *dev, int probe); +int pci_dev_specific_reset(struct pci_dev *dev, bool mode); #else -static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) +static inline int pci_dev_specific_reset(struct pci_dev *dev, bool mode) { return -ENOTTY; } @@ -704,9 +704,9 @@ static inline int pci_aer_raw_clear_status(struct pci_dev *dev) { return -EINVAL int pci_acpi_program_hp_params(struct pci_dev *dev); extern const struct attribute_group pci_dev_acpi_attr_group; void pci_set_acpi_fwnode(struct pci_dev *dev); -int pci_dev_acpi_reset(struct pci_dev *dev, int probe); +int pci_dev_acpi_reset(struct pci_dev *dev, bool mode); #else -static inline int pci_dev_acpi_reset(struct pci_dev *dev, int probe) +static inline int pci_dev_acpi_reset(struct pci_dev *dev, bool mode) { return -ENOTTY; } diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 98077595a73e..cfa7a177500b 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1405,7 +1405,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) } if (type == PCI_EXP_TYPE_RC_EC || type == PCI_EXP_TYPE_RC_END) { - rc = pcie_reset_flr(dev, 0); + rc = pcie_reset_flr(dev, PCI_RESET_DO_RESET); if (!rc) pci_info(dev, "has been reset\n"); else diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 0db5dac3ddce..ad062682a16d 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3669,7 +3669,7 @@ DECLARE_PCI_FIXUP_SUSPEND_LATE(PCI_VENDOR_ID_INTEL, * reset a single function if other methods (e.g. FLR, PM D0->D3) are * not available. */ -static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe) +static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, bool mode) { /* * http://www.intel.com/content/dam/doc/datasheet/82599-10-gbe-controller-datasheet.pdf @@ -3679,7 +3679,7 @@ static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe) * Thus we must call pcie_flr() directly without first checking if it is * supported. */ - if (!probe) + if (mode == PCI_RESET_DO_RESET) pcie_flr(dev); return 0; } @@ -3691,13 +3691,13 @@ static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe) #define NSDE_PWR_STATE 0xd0100 #define IGD_OPERATION_TIMEOUT 10000 /* set timeout 10 seconds */ -static int reset_ivb_igd(struct pci_dev *dev, int probe) +static int reset_ivb_igd(struct pci_dev *dev, bool mode) { void __iomem *mmio_base; unsigned long timeout; u32 val; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; mmio_base = pci_iomap(dev, 0, 0); @@ -3734,7 +3734,7 @@ static int reset_ivb_igd(struct pci_dev *dev, int probe) } /* Device-specific reset method for Chelsio T4-based adapters */ -static int reset_chelsio_generic_dev(struct pci_dev *dev, int probe) +static int reset_chelsio_generic_dev(struct pci_dev *dev, bool mode) { u16 old_command; u16 msix_flags; @@ -3750,7 +3750,7 @@ static int reset_chelsio_generic_dev(struct pci_dev *dev, int probe) * If this is the "probe" phase, return 0 indicating that we can * reset this device. */ - if (probe) + if (mode == PCI_RESET_PROBE) return 0; /* @@ -3812,17 +3812,17 @@ static int reset_chelsio_generic_dev(struct pci_dev *dev, int probe) * Chapter 3: NVMe control registers * Chapter 7.3: Reset behavior */ -static int nvme_disable_and_flr(struct pci_dev *dev, int probe) +static int nvme_disable_and_flr(struct pci_dev *dev, bool mode) { void __iomem *bar; u16 cmd; u32 cfg; if (dev->class != PCI_CLASS_STORAGE_EXPRESS || - pcie_reset_flr(dev, 1) || !pci_resource_start(dev, 0)) + pcie_reset_flr(dev, PCI_RESET_PROBE) || !pci_resource_start(dev, 0)) return -ENOTTY; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; bar = pci_iomap(dev, 0, NVME_REG_CC + sizeof(cfg)); @@ -3886,12 +3886,12 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) * device too soon after FLR. A 250ms delay after FLR has heuristically * proven to produce reliably working results for device assignment cases. */ -static int delay_250ms_after_flr(struct pci_dev *dev, int probe) +static int delay_250ms_after_flr(struct pci_dev *dev, bool mode) { - if (probe) - return pcie_reset_flr(dev, 1); + if (mode == PCI_RESET_PROBE) + return pcie_reset_flr(dev, PCI_RESET_PROBE); - pcie_reset_flr(dev, 0); + pcie_reset_flr(dev, PCI_RESET_DO_RESET); msleep(250); @@ -3906,13 +3906,13 @@ static int delay_250ms_after_flr(struct pci_dev *dev, int probe) #define HINIC_OPERATION_TIMEOUT 15000 /* 15 seconds */ /* Device-specific reset method for Huawei Intelligent NIC virtual functions */ -static int reset_hinic_vf_dev(struct pci_dev *pdev, int probe) +static int reset_hinic_vf_dev(struct pci_dev *pdev, bool mode) { unsigned long timeout; void __iomem *bar; u32 val; - if (probe) + if (mode == PCI_RESET_PROBE) return 0; bar = pci_iomap(pdev, 0, 0); @@ -3983,7 +3983,7 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = { * because when a host assigns a device to a guest VM, the host may need * to reset the device but probably doesn't have a driver for it. */ -int pci_dev_specific_reset(struct pci_dev *dev, int probe) +int pci_dev_specific_reset(struct pci_dev *dev, bool mode) { const struct pci_dev_reset_methods *i; @@ -3992,7 +3992,7 @@ int pci_dev_specific_reset(struct pci_dev *dev, int probe) i->vendor == (u16)PCI_ANY_ID) && (i->device == dev->device || i->device == (u16)PCI_ANY_ID)) - return i->reset(dev, probe); + return i->reset(dev, mode); } return -ENOTTY; diff --git a/include/linux/pci.h b/include/linux/pci.h index d3b06bfd8b99..3e3074c7b8ec 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -52,6 +52,9 @@ /* Number of reset methods used in pci_reset_fn_methods array in pci.c */ #define PCI_NUM_RESET_METHODS 7 +#define PCI_RESET_PROBE true +#define PCI_RESET_DO_RESET false + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded @@ -1232,7 +1235,7 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev, enum pci_bus_speed *speed, enum pcie_link_width *width); void pcie_print_link_status(struct pci_dev *dev); -int pcie_reset_flr(struct pci_dev *dev, int probe); +int pcie_reset_flr(struct pci_dev *dev, bool mode); int pcie_flr(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h index b482e42d7153..eb10dca8c316 100644 --- a/include/linux/pci_hotplug.h +++ b/include/linux/pci_hotplug.h @@ -44,7 +44,7 @@ struct hotplug_slot_ops { int (*get_attention_status) (struct hotplug_slot *slot, u8 *value); int (*get_latch_status) (struct hotplug_slot *slot, u8 *value); int (*get_adapter_status) (struct hotplug_slot *slot, u8 *value); - int (*reset_slot) (struct hotplug_slot *slot, int probe); + int (*reset_slot) (struct hotplug_slot *slot, bool mode); }; /**