From patchwork Thu Dec 6 03:35:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhinav Kumar X-Patchwork-Id: 10715225 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 840A013BF for ; Thu, 6 Dec 2018 03:35:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 728002E065 for ; Thu, 6 Dec 2018 03:35:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 66D562E070; Thu, 6 Dec 2018 03:35:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 009442E065 for ; Thu, 6 Dec 2018 03:35:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727940AbeLFDfX (ORCPT ); Wed, 5 Dec 2018 22:35:23 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:37384 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727514AbeLFDfX (ORCPT ); Wed, 5 Dec 2018 22:35:23 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 983BD601C4; Thu, 6 Dec 2018 03:35:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1544067321; bh=IUYtjgbABu/+6UFasmywIZhYL6EOJUrTBFJgQo6p5CA=; h=From:To:Cc:Subject:Date:From; b=iUIP3bKMM7cCcPXkCW8XSkERdYIHZ7jaSLzjtI2fpsGLTzl8FyJqm96BsUO7ePdn1 ojB2bu5g6XMWEd8iU1fkWl1sexhRlsRc0RqEwcmlQgYsFCCiasT5r02aVW2gSLv0eI k6VeAWiur10vS1VAALdatczqomSPzhaXMErtsoIY= Received: from abhinavk-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: abhinavk@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E5360606FA; Thu, 6 Dec 2018 03:35:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1544067316; bh=IUYtjgbABu/+6UFasmywIZhYL6EOJUrTBFJgQo6p5CA=; h=From:To:Cc:Subject:Date:From; b=TK7Wdbyf/VZfMDFVPq4LJlwEpFy57zTmTvj2RZIICjbYk1GdpXGKYT/oEEy55LDEI WEpRK5SOpFxeNGRIyrG5t+Kpg6IzVjJahxk9J1pwQSvzzGbwnfb9EkNu8EpjacTlRq h3nyr8w4jDdlHoI5WnZFH9WjhK6HaScqmQ8SWj6Q= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E5360606FA Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=abhinavk@codeaurora.org From: Abhinav Kumar To: dri-devel@lists.freedesktop.org Cc: Abhinav Kumar , linux-arm-msm@vger.kernel.org, robdclark@gmail.com, seanpaul@chromium.org, hoegsberg@google.com, robh@kernel.org, mka@chromium.org, bjorn.andersson@linaro.org, jcrouse@codeaurora.org, devicetree@vger.kernel.org, jsanka@codeaurora.org, dianders@chromium.org, Sandeep Panda Subject: [PATCH v5] arm64: dts: sdm845: Add display nodes to MTP dts Date: Wed, 5 Dec 2018 19:35:10 -0800 Message-Id: <1544067310-7306-1-git-send-email-abhinavk@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the display nodes containing information about the panel, DSI configuration and board specific pin configuration to the SDM845 MTP device tree file. This patch depends on the following: https://patchwork.freedesktop.org/series/51909/ Changes in v4: - patch introduced in the series - move around added nodes to preserve alphabetical order (Doug Anderson) Changes in v5: - include board specific pin configuration (Doug Anderson) - remove display timing from the panel node Signed-off-by: Sandeep Panda Signed-off-by: Jeykumar Sankaran Signed-off-by: Abhinav Kumar --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 118 ++++++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index d667eee..ee63783 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include #include #include "sdm845.dtsi" @@ -343,11 +344,98 @@ }; }; +&dsi0 { + status = "okay"; + qcom,dual-dsi-mode; + qcom,master-dsi; + qcom,sync-dual-dsi; + + vdda-supply = <&vdda_mipi_dsi0_1p2>; + + panel@0 { + compatible = "truly,nt35597-2K-display"; + reg = <0>; + + vdda-supply = <&vreg_l14a_1p88>; + vdispp-supply = <&lab_regulator>; + vdispn-supply = <&ibb_regulator>; + + pinctrl-names = "default"; + pinctrl-0 = <&disp_mode_sel &lcd_reset_n>; + + mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + panel0_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + panel1_in: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + }; + }; + + ports { + port@1 { + endpoint { + remote-endpoint = <&panel0_in>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dsi0_phy { + status = "okay"; + vdds-supply = <&vdda_mipi_dsi0_pll>; +}; + +&dsi1 { + status = "okay"; + + qcom,dual-dsi-mode; + qcom,sync-dual-dsi; + + vdda-supply = <&vdda_mipi_dsi1_1p2>; + + ports { + port@1 { + endpoint { + remote-endpoint = <&panel1_in>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dsi1_phy { + status = "okay"; + vdds-supply = <&vdda_mipi_dsi1_pll>; +}; + &i2c10 { status = "okay"; clock-frequency = <400000>; }; +&mdss { + status = "okay"; +}; + +&mdss_mdp { + status = "okay"; +}; + &qupv3_id_1 { status = "okay"; }; @@ -444,3 +532,33 @@ bias-pull-up; }; }; + + /* PINCTRL - board-specific pinctrl */ + +&tlmm { + disp_mode_sel: disp-mode-sel { + pinmux { + function = "gpio"; + pins = "gpio52"; + }; + + pinconf { + pins = "gpio52"; + drive-strength = <8>; + bias-disable; + }; + }; + + lcd_reset_n: lcd-reset-n { + pinmux { + function = "gpio"; + pins = "gpio6"; + }; + + pinconf { + pins = "gpio6"; + drive-strength = <8>; + bias-disable; + }; + }; +};