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Fri, 6 Aug 2021 16:08:39 +0000 Subject: [kvm-unit-tests PATCH 1/2] x86: access: Fix timeout failure by limiting number of flag combinations From: Babu Moger Cc: pbonzini@redhat.com, thuth@redhat.com, drjones@redhat.com, kvm@vger.kernel.org, babu.moger@amd.com Date: Fri, 06 Aug 2021 11:08:37 -0500 Message-ID: <162826611747.32391.16149996928851353357.stgit@bmoger-ubuntu> In-Reply-To: <162826604263.32391.7580736822527851972.stgit@bmoger-ubuntu> References: <162826604263.32391.7580736822527851972.stgit@bmoger-ubuntu> User-Agent: StGit/0.17.1-dirty X-ClientProxiedBy: SN7PR04CA0170.namprd04.prod.outlook.com (2603:10b6:806:125::25) To MW3PR12MB4553.namprd12.prod.outlook.com (2603:10b6:303:2c::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [127.0.1.1] (165.204.77.1) by SN7PR04CA0170.namprd04.prod.outlook.com (2603:10b6:806:125::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.15 via Frontend Transport; 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(no To-header on input) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Babu Moger The test ./x86/access fails with a timeout. This is due to the number test combination. The test cases increase exponentially as the features get enabled. The new machine adds the feature AC_CPU_CR4_PKE. The default timeout is 180 seconds. Seen this problem both on AMD and Intel machines. #./tests/access qemu-system-x86_64: terminating on signal 15 from pid 20050 (timeout) FAIL access (timeout; duration=180) This test can take about 7 minutes without timeout. time ./tests/access 58982405 tests, 0 failures PASS access real 7m10.063s user 7m9.063s sys 0m0.309s Fix the problem by adding few more limit checks. Signed-off-by: Babu Moger --- x86/access.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/x86/access.c b/x86/access.c index 47807cc..e371dd5 100644 --- a/x86/access.c +++ b/x86/access.c @@ -317,9 +317,9 @@ static _Bool ac_test_legal(ac_test_t *at) /* * Shorten the test by avoiding testing too many reserved bit combinations */ - if ((F(AC_PDE_BIT51) + F(AC_PDE_BIT36) + F(AC_PDE_BIT13)) > 1) + if ((F(AC_PDE_BIT51) + F(AC_PDE_BIT36) + F(AC_PDE_BIT13) + F(AC_CPU_CR4_PKE)) > 1) return false; - if ((F(AC_PTE_BIT51) + F(AC_PTE_BIT36)) > 1) + if ((F(AC_PTE_BIT51) + F(AC_PTE_BIT36) + F(AC_CPU_CR4_PKE)) > 1) return false; return true; From patchwork Fri Aug 6 16:08:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Babu Moger X-Patchwork-Id: 12423717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80E87C4338F for ; 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dkim=none (message not signed) header.d=none;redhat.com; dmarc=none action=none header.from=amd.com; Received: from MW3PR12MB4553.namprd12.prod.outlook.com (2603:10b6:303:2c::19) by MWHPR1201MB0206.namprd12.prod.outlook.com (2603:10b6:301:55::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.26; Fri, 6 Aug 2021 16:08:47 +0000 Received: from MW3PR12MB4553.namprd12.prod.outlook.com ([fe80::add0:6be1:b4de:8bf7]) by MW3PR12MB4553.namprd12.prod.outlook.com ([fe80::add0:6be1:b4de:8bf7%7]) with mapi id 15.20.4373.026; Fri, 6 Aug 2021 16:08:47 +0000 Subject: [kvm-unit-tests PATCH 2/2] nSVM: Fix NPT reserved bits test hang From: Babu Moger Cc: pbonzini@redhat.com, thuth@redhat.com, drjones@redhat.com, kvm@vger.kernel.org, babu.moger@amd.com Date: Fri, 06 Aug 2021 11:08:44 -0500 Message-ID: <162826612490.32391.15921978067790218645.stgit@bmoger-ubuntu> In-Reply-To: <162826604263.32391.7580736822527851972.stgit@bmoger-ubuntu> References: <162826604263.32391.7580736822527851972.stgit@bmoger-ubuntu> User-Agent: StGit/0.17.1-dirty X-ClientProxiedBy: SN4PR0401CA0005.namprd04.prod.outlook.com (2603:10b6:803:21::15) To MW3PR12MB4553.namprd12.prod.outlook.com (2603:10b6:303:2c::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [127.0.1.1] (165.204.77.1) by SN4PR0401CA0005.namprd04.prod.outlook.com (2603:10b6:803:21::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.15 via Frontend Transport; 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(no To-header on input) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Babu Moger SVM reserved bits tests hangs in a infinite loop. The test uses the instruction 'rdtsc' to generate the random reserved bits. It hangs while generating the valid reserved bits. The AMD64 Architecture Programmers Manual Volume 2: System Programming manual says, When using the TSC to measure elapsed time, programmers must be aware that for some implementations, the rate at which the TSC is incremented varies based on the processor power management state (Pstate). For other implementations, the TSC increment rate is fixed and is not subject to power-management related changes in processor frequency. In AMD gen3 machine, the rdtsc value is a P state multiplier. Here are the rdtsc value in 10 sucessive reads. 0 rdtsc = 0x1ec92919b9710 1 rdtsc = 0x1ec92919c01f0 2 rdtsc = 0x1ec92919c0f70 3 rdtsc = 0x1ec92919c18d0 4 rdtsc = 0x1ec92919c2060 5 rdtsc = 0x1ec92919c28d0 6 rdtsc = 0x1ec92919c30b0 7 rdtsc = 0x1ec92919c5660 8 rdtsc = 0x1ec92919c6150 9 rdtsc = 0x1ec92919c7c80 This test uses the lower nibble and right shifts to generate the valid reserved bit. It loops forever because the lower nibble is always zero. Fixing the issue with replacing rdrand instruction if available or skipping the test if we cannot generate the valid reserved bits. Signed-off-by: Babu Moger --- lib/x86/processor.h | 10 ++++++++++ x86/svm_tests.c | 25 +++++++++++++++++++------ 2 files changed, 29 insertions(+), 6 deletions(-) diff --git a/lib/x86/processor.h b/lib/x86/processor.h index a08ea1f..974077a 100644 --- a/lib/x86/processor.h +++ b/lib/x86/processor.h @@ -531,6 +531,16 @@ static inline void sti(void) asm volatile ("sti"); } +static inline unsigned long long rdrand(void) +{ + long long r; + + asm volatile("1:;\n\ + rdrand %0;\n\ + jnc 1b;\n":"=r"(r)); + return r; +} + static inline unsigned long long rdtsc(void) { long long r; diff --git a/x86/svm_tests.c b/x86/svm_tests.c index 79ed48e..a2963c0 100644 --- a/x86/svm_tests.c +++ b/x86/svm_tests.c @@ -2704,11 +2704,23 @@ static void _svm_npt_rsvd_bits_test(u64 *pxe, u64 pxe_rsvd_bits, u64 efer, static u64 get_random_bits(u64 hi, u64 low) { - u64 rsvd_bits; + unsigned retry = 5; + u64 rsvd_bits = 0; + + if (this_cpu_has(X86_FEATURE_RDRAND)) { + do { + rsvd_bits = (rdrand() << low) & GENMASK_ULL(hi, low); + retry--; + } while (!rsvd_bits && retry); + } - do { - rsvd_bits = (rdtsc() << low) & GENMASK_ULL(hi, low); - } while (!rsvd_bits); + if (!rsvd_bits) { + retry = 5; + do { + rsvd_bits = (rdtsc() << low) & GENMASK_ULL(hi, low); + retry--; + } while (!rsvd_bits && retry); + } return rsvd_bits; } @@ -2733,10 +2745,11 @@ static void svm_npt_rsvd_bits_test(void) /* * 4k PTEs don't have reserved bits if MAXPHYADDR >= 52, just skip the - * sub-test. The NX test is still valid, but the extra bit of coverage + * sub-test. Also skip if cannot generate the valid random reserved bits. + * The NX test is still valid, but the extra bit of coverage * isn't worth the extra complexity. */ - if (cpuid_maxphyaddr() >= 52) + if ((cpuid_maxphyaddr() >= 52) || !get_random_bits(51, cpuid_maxphyaddr())) goto skip_pte_test; _svm_npt_rsvd_bits_test(npt_get_pte((u64)basic_guest_main),