From patchwork Thu Dec 6 15:57:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10716295 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 33ED614E2 for ; Thu, 6 Dec 2018 16:01:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 212A72EEC2 for ; Thu, 6 Dec 2018 16:01:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1EE9D2EED6; Thu, 6 Dec 2018 16:01:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D4A4E2EED2 for ; Thu, 6 Dec 2018 16:01:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=45F4aZ/K+1WSy5Hr2DqJaxBL43uyFTTW8yt/v66xfjU=; b=UDp4yEyah9oz76 m2TW/quwHU5nDo2Ee8V7lSsKUYQznREfaOXP2JIn+YgCRTyLNhxS4hCia6Nyn6QyWgp3wV+Y32ykx KuNzjnjQvMIO1lJq4c+Aac26AsD9W9ys7URk60b0v4GlzUSjCVpfYHshg+14nUjpcWfeFcFU9WQmG tigd9qDHb01o5uUTAGQB90lhnfjkgARWBD3bxWH47EC83seUgYTYqExldasR5OfkhzjPRKjucw6yK tgr/nXyQxZ4XzLPlL22NJ2SVPdSQtI473Ijd+u1GSj5DKel5AXiSHB5CCtfuFI9Sag/RfcgReqXNf qWRBqMXC0zVKrmQoManw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUw5A-0005Q2-Je; Thu, 06 Dec 2018 16:00:56 +0000 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUw4A-00039v-Ix for linux-arm-kernel@lists.infradead.org; Thu, 06 Dec 2018 15:59:58 +0000 Received: by mail-wm1-x344.google.com with SMTP id s14so1514924wmh.1 for ; Thu, 06 Dec 2018 07:59:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ufilkC4KXT597IQ5zu2bEqK9cc/hF4PdgqYxBckPn68=; b=QPZ0I44ByTCjuk9ePqJIX5NJL9ZGtQMKSitalKgY/UpP53/+9EfqvnX2MxcuN5M1eZ oq5oh0fNXmM1AGdxRQIiea69X3ReBymxkcjUr+xacjQzoSXYvUFMVFF+y4/GgLJnNdov fsOZZX2NsvdRupkKw+hdtAqBCOTmpJ81eN47U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ufilkC4KXT597IQ5zu2bEqK9cc/hF4PdgqYxBckPn68=; b=LRds494x6SjDepw2jGPJCZsv6aonNPWOVM7w5O/20RjxCG3WXbtteZCkNJO9NW7KMm S548WjPOXBeJ+42R1JqqWoVhQp/kenG7tYKH4uK6rKjwrgGLZ7PYuvOVq72t6Ri4E1ev Gh53iaL7NOZiN9A64LcYO4x+GyCs/Ht0XTgiHhO3MFjwYl7FVbB6/C1pCBjOa3C/XYtd ZitivEqIeBmFmxtZYw1GOlHiLcTsejc0fjcn6SzfUtgi2rgxEeKQ04ANFgN+lykLiMxd QLDFWL3u4AFtNKsmr35FOY5LejT6wLyFprv3WSDIOxN4jb4KOrl9gQOsfyrB8WwXh/xZ M7Qg== X-Gm-Message-State: AA+aEWaCkHDNhlHJ6TDDGV6HdYmSfxiBT3xFSoomJRI5T6vtlK9zFTrs NhUlIG9JIvf4dD/FhHz0RvdLFg== X-Google-Smtp-Source: AFSGD/UpOC1+Ql9cFbvSXU1dUcizLSdW+Lw0XAv5Zt1dbmURZDeJfY0eSLDp/TiHZPUIAmYRqOGQ5Q== X-Received: by 2002:a7b:cb86:: with SMTP id m6mr20340663wmi.61.1544111982823; Thu, 06 Dec 2018 07:59:42 -0800 (PST) Received: from localhost.localdomain (laubervilliers-657-1-83-120.w92-154.abo.wanadoo.fr. [92.154.90.120]) by smtp.gmail.com with ESMTPSA id y34sm1525233wrd.68.2018.12.06.07.59.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 07:59:41 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Subject: [PATCH 1/5] arm64/alternative_cb: move callback reference into replacements section Date: Thu, 6 Dec 2018 16:57:35 +0100 Message-Id: <20181206155739.20229-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org> References: <20181206155739.20229-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_075954_677159_25232E6A X-CRM114-Status: GOOD ( 16.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Suzuki Poulose , Will Deacon , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In preparation of permitting callback type alternatives patching routines to use any number of alternative instructions, move the relative reference to the callback routine out of the primary 'struct alt_instr' data structure, where we are currently overloading the 'alt_offset' member depending on the feature id. Instead, put a relative reference to the callback at the start of the alternative sequence. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/alternative.h | 39 +++++++++----------- arch/arm64/kernel/alternative.c | 11 ++++-- 2 files changed, 25 insertions(+), 25 deletions(-) diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h index 4b650ec1d7dd..77da798e888b 100644 --- a/arch/arm64/include/asm/alternative.h +++ b/arch/arm64/include/asm/alternative.h @@ -24,6 +24,11 @@ struct alt_instr { u8 alt_len; /* size of new instruction(s), <= orig_len */ }; +struct alt_instr_cb { + s32 cb_offset; /* offset to callback handler */ + __le32 insn[]; /* sequence of alternative instructions */ +}; + typedef void (*alternative_cb_t)(struct alt_instr *alt, __le32 *origptr, __le32 *updptr, int nr_inst); @@ -35,13 +40,9 @@ void apply_alternatives_module(void *start, size_t length); static inline void apply_alternatives_module(void *start, size_t length) { } #endif -#define ALTINSTR_ENTRY(feature,cb) \ +#define ALTINSTR_ENTRY(feature) \ " .word 661b - .\n" /* label */ \ - " .if " __stringify(cb) " == 0\n" \ " .word 663f - .\n" /* new instruction */ \ - " .else\n" \ - " .word " __stringify(cb) "- .\n" /* callback */ \ - " .endif\n" \ " .hword " __stringify(feature) "\n" /* feature bit */ \ " .byte 662b-661b\n" /* source len */ \ " .byte 664f-663f\n" /* replacement len */ @@ -59,36 +60,29 @@ static inline void apply_alternatives_module(void *start, size_t length) { } * but most assemblers die if insn1 or insn2 have a .inst. This should * be fixed in a binutils release posterior to 2.25.51.0.2 (anything * containing commit 4e4d08cf7399b606 or c1baaddf8861). - * - * Alternatives with callbacks do not generate replacement instructions. */ -#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled, cb) \ - ".if "__stringify(cfg_enabled)" == 1\n" \ +#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature) \ "661:\n\t" \ oldinstr "\n" \ "662:\n" \ ".pushsection .altinstructions,\"a\"\n" \ - ALTINSTR_ENTRY(feature,cb) \ + ALTINSTR_ENTRY(feature) \ ".popsection\n" \ - " .if " __stringify(cb) " == 0\n" \ ".pushsection .altinstr_replacement, \"a\"\n" \ "663:\n\t" \ newinstr "\n" \ "664:\n\t" \ - ".popsection\n\t" \ + ".popsection\n\t" + +#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \ + ".if "__stringify(IS_ENABLED(cfg))" == 1\n" \ + __ALTERNATIVE_CFG(oldinstr, newinstr, feature) \ ".org . - (664b-663b) + (662b-661b)\n\t" \ ".org . - (662b-661b) + (664b-663b)\n" \ - ".else\n\t" \ - "663:\n\t" \ - "664:\n\t" \ - ".endif\n" \ ".endif\n" -#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \ - __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0) - #define ALTERNATIVE_CB(oldinstr, cb) \ - __ALTERNATIVE_CFG(oldinstr, "NOT_AN_INSTRUCTION", ARM64_CB_PATCH, 1, cb) + __ALTERNATIVE_CFG(oldinstr, ".word " __stringify(cb) " - .\n", ARM64_CB_PATCH) #else #include @@ -158,8 +152,11 @@ static inline void apply_alternatives_module(void *start, size_t length) { } .macro alternative_cb cb .set .Lasm_alt_mode, 0 .pushsection .altinstructions, "a" - altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0 + altinstruction_entry 661f, 663f, ARM64_CB_PATCH, 662f-661f, 664f-663f .popsection + .pushsection .altinstr_replacement, "ax" +663: .word \cb - . +664: .popsection 661: .endm diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c index b5d603992d40..a49930843784 100644 --- a/arch/arm64/kernel/alternative.c +++ b/arch/arm64/kernel/alternative.c @@ -151,6 +151,7 @@ static void __apply_alternatives(void *alt_region, bool is_module) struct alt_region *region = alt_region; __le32 *origptr, *updptr; alternative_cb_t alt_cb; + struct alt_instr_cb *alt_cb_insn; for (alt = region->begin; alt < region->end; alt++) { int nr_inst; @@ -161,7 +162,7 @@ static void __apply_alternatives(void *alt_region, bool is_module) continue; if (alt->cpufeature == ARM64_CB_PATCH) - BUG_ON(alt->alt_len != 0); + BUG_ON(alt->alt_len < sizeof(*alt_cb_insn)); else BUG_ON(alt->alt_len != alt->orig_len); @@ -171,10 +172,12 @@ static void __apply_alternatives(void *alt_region, bool is_module) updptr = is_module ? origptr : lm_alias(origptr); nr_inst = alt->orig_len / AARCH64_INSN_SIZE; - if (alt->cpufeature < ARM64_CB_PATCH) + if (alt->cpufeature < ARM64_CB_PATCH) { alt_cb = patch_alternative; - else - alt_cb = ALT_REPL_PTR(alt); + } else { + alt_cb_insn = ALT_REPL_PTR(alt); + alt_cb = offset_to_ptr(&alt_cb_insn->cb_offset); + } alt_cb(alt, origptr, updptr, nr_inst); From patchwork Thu Dec 6 15:57:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10716297 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B3522109C for ; Thu, 6 Dec 2018 16:01:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A2D072EED2 for ; Thu, 6 Dec 2018 16:01:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9DD9E2EEE3; Thu, 6 Dec 2018 16:01:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1B0282EED6 for ; Thu, 6 Dec 2018 16:01:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5xXs4Jmvzsib7fdrsitJqQCczOpICYKaZR8ZYMWswT4=; b=tHSvCjR4VpDVte oiAxoB7RNNhTda6vezLZxLsLkWsyGHLiTlnKP0XKsnqj9ArDABTaVnQav2Xfare0dz98gsny0GoXw HTXRrKvSXXMTVR4IWnwyrqRY84pmR19kyRFrVjPWtGqBPWFN5RMoiGdt5c2Zl/wOA77gQv9qUl5mS qpwoba2P3q3bpiKrTztW8w0LoTZi0wlD7iL2L+wt6s4Uh+EJKP7iYag6Q6QSw+3PBNQEFPpbrsUS1 x6/nCOsoiCywYUNhU9VdKEAigCy+d9eJXV+TTOpvMxtnzGxh/mFBbSQF5xFlsUbbMgLwEi8FZu4PT 0L1jtu+E0RfcQBug5o/Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUw5R-0005iE-8u; Thu, 06 Dec 2018 16:01:13 +0000 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUw4B-0003Ag-U9 for linux-arm-kernel@lists.infradead.org; Thu, 06 Dec 2018 16:00:02 +0000 Received: by mail-wr1-x444.google.com with SMTP id p4so991987wrt.7 for ; Thu, 06 Dec 2018 07:59:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dgSG9gChmYBffNKXbMNH/SpVS1I5j9iEUF32P6VsSNQ=; b=OeTiLmJb/vMVFqlou6bQKq9apgP2LUcCUWVMJEAQrfWdHhvbmur7qW30Qg1tVQ7d2L M8nEaUPwwxyHVyla64j+Pb81s2Trsf3uZB0cnLc2jPytOGg2K6MvthrZl/eUs3awgRtz BHW8jdTyEdBkCxpo+LKBm4JJ2hhbcz726b/kw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dgSG9gChmYBffNKXbMNH/SpVS1I5j9iEUF32P6VsSNQ=; b=rZXG411hVI3FOBdkLJvb4CicHJZErzIunket87cixhou/scGlAP687pT8LjgtcrCBb R6P4wUjEYm8/vfu0RRf+7KfTC9hDNW9aawxYYmCG4ny1HpjBAmL+0U7ykEGeWCyyhH+z XlG05+DAg9jIblXtvYaNQ6nHXcIM1f2sn9nzsx6BT1epr7wY7N76ckgbjg7vxtIEUveS Bx1mN19Ggms4wxJ4PYu2Y5iqyH8pToQClHE5tR8I0xAk5yWHUBKelH3/862TROjyEvT7 UDhxdCqHhIOQfHITtbjGEnDMnUZHZEEgJB576rBcIC6ji5/gjHo/VIEfRHthsu0sFMer lRPg== X-Gm-Message-State: AA+aEWZeUDO1NrL0YvMB2vvUID71NdhbSLnGam5oxuYiABBrPSI9xFIR TjndZFIUyjyZKtoQKJtaGEYdXQ== X-Google-Smtp-Source: AFSGD/VvKaAmAdJzJ+BUHas/Zq2Nbfy6LLOGmMa9lkWO0VLQKH4qjf5s5cxXOfmJws8qo28Il2s7jA== X-Received: by 2002:adf:8342:: with SMTP id 60mr24344596wrd.212.1544111984136; Thu, 06 Dec 2018 07:59:44 -0800 (PST) Received: from localhost.localdomain (laubervilliers-657-1-83-120.w92-154.abo.wanadoo.fr. [92.154.90.120]) by smtp.gmail.com with ESMTPSA id y34sm1525233wrd.68.2018.12.06.07.59.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 07:59:43 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Subject: [PATCH 2/5] arm64/alternative_cb: add nr_alts parameter to callback handlers Date: Thu, 6 Dec 2018 16:57:36 +0100 Message-Id: <20181206155739.20229-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org> References: <20181206155739.20229-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_075956_053261_117D9439 X-CRM114-Status: GOOD ( 16.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Suzuki Poulose , Will Deacon , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Callback handlers for alternative patching will shortly be able to access a set of alternative instructions provided at assembly time. So update the callback handler prototypes so we can pass this number. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/alternative.h | 4 ++-- arch/arm64/include/asm/kvm_mmu.h | 4 ++-- arch/arm64/kernel/alternative.c | 11 +++++++---- arch/arm64/kernel/cpu_errata.c | 10 ++++------ arch/arm64/kvm/va_layout.c | 8 ++++---- 5 files changed, 19 insertions(+), 18 deletions(-) diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h index 77da798e888b..987c1514183a 100644 --- a/arch/arm64/include/asm/alternative.h +++ b/arch/arm64/include/asm/alternative.h @@ -29,8 +29,8 @@ struct alt_instr_cb { __le32 insn[]; /* sequence of alternative instructions */ }; -typedef void (*alternative_cb_t)(struct alt_instr *alt, - __le32 *origptr, __le32 *updptr, int nr_inst); +typedef void (*alternative_cb_t)(struct alt_instr *alt, __le32 *origptr, + __le32 *updptr, int nr_inst, int nr_alts); void __init apply_alternatives_all(void); diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 658657367f2f..5e32e314b9f0 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -100,8 +100,8 @@ alternative_cb_end #include #include -void kvm_update_va_mask(struct alt_instr *alt, - __le32 *origptr, __le32 *updptr, int nr_inst); +void kvm_update_va_mask(struct alt_instr *alt, __le32 *origptr, + __le32 *updptr, int nr_insti, int nr_alts); static inline unsigned long __kern_hyp_va(unsigned long v) { diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c index a49930843784..f55afa0bbaa4 100644 --- a/arch/arm64/kernel/alternative.c +++ b/arch/arm64/kernel/alternative.c @@ -107,8 +107,8 @@ static u32 get_alt_insn(struct alt_instr *alt, __le32 *insnptr, __le32 *altinsnp return insn; } -static void patch_alternative(struct alt_instr *alt, - __le32 *origptr, __le32 *updptr, int nr_inst) +static void patch_alternative(struct alt_instr *alt, __le32 *origptr, + __le32 *updptr, int nr_inst, int nr_alts) { __le32 *replptr; int i; @@ -154,7 +154,7 @@ static void __apply_alternatives(void *alt_region, bool is_module) struct alt_instr_cb *alt_cb_insn; for (alt = region->begin; alt < region->end; alt++) { - int nr_inst; + int nr_inst, nr_alts; /* Use ARM64_CB_PATCH as an unconditional patch */ if (alt->cpufeature < ARM64_CB_PATCH && @@ -174,12 +174,15 @@ static void __apply_alternatives(void *alt_region, bool is_module) if (alt->cpufeature < ARM64_CB_PATCH) { alt_cb = patch_alternative; + nr_alts = alt->alt_len / AARCH64_INSN_SIZE; } else { alt_cb_insn = ALT_REPL_PTR(alt); alt_cb = offset_to_ptr(&alt_cb_insn->cb_offset); + nr_alts = (alt->alt_len - sizeof(*alt_cb_insn)) / AARCH64_INSN_SIZE; + } - alt_cb(alt, origptr, updptr, nr_inst); + alt_cb(alt, origptr, updptr, nr_inst, nr_alts); if (!is_module) { clean_dcache_range_nopatch((u64)origptr, diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 6ad715d67df8..c5489b4612c5 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -305,9 +305,8 @@ static int __init ssbd_cfg(char *buf) } early_param("ssbd", ssbd_cfg); -void __init arm64_update_smccc_conduit(struct alt_instr *alt, - __le32 *origptr, __le32 *updptr, - int nr_inst) +void __init arm64_update_smccc_conduit(struct alt_instr *alt, __le32 *origptr, + __le32 *updptr, int nr_inst, int nr_alts) { u32 insn; @@ -327,9 +326,8 @@ void __init arm64_update_smccc_conduit(struct alt_instr *alt, *updptr = cpu_to_le32(insn); } -void __init arm64_enable_wa2_handling(struct alt_instr *alt, - __le32 *origptr, __le32 *updptr, - int nr_inst) +void __init arm64_enable_wa2_handling(struct alt_instr *alt, __le32 *origptr, + __le32 *updptr, int nr_inst, int nr_alts) { BUG_ON(nr_inst != 1); /* diff --git a/arch/arm64/kvm/va_layout.c b/arch/arm64/kvm/va_layout.c index c712a7376bc1..db7ba73e306a 100644 --- a/arch/arm64/kvm/va_layout.c +++ b/arch/arm64/kvm/va_layout.c @@ -114,8 +114,8 @@ static u32 compute_instruction(int n, u32 rd, u32 rn) return insn; } -void __init kvm_update_va_mask(struct alt_instr *alt, - __le32 *origptr, __le32 *updptr, int nr_inst) +void __init kvm_update_va_mask(struct alt_instr *alt, __le32 *origptr, + __le32 *updptr, int nr_inst, int nr_alts) { int i; @@ -154,8 +154,8 @@ void __init kvm_update_va_mask(struct alt_instr *alt, void *__kvm_bp_vect_base; int __kvm_harden_el2_vector_slot; -void kvm_patch_vector_branch(struct alt_instr *alt, - __le32 *origptr, __le32 *updptr, int nr_inst) +void kvm_patch_vector_branch(struct alt_instr *alt, __le32 *origptr, + __le32 *updptr, int nr_inst, int nr_alts) { u64 addr; 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[92.154.90.120]) by smtp.gmail.com with ESMTPSA id y34sm1525233wrd.68.2018.12.06.07.59.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 07:59:44 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Subject: [PATCH 3/5] arm64/alternative_cb: add support for alternative sequences Date: Thu, 6 Dec 2018 16:57:37 +0100 Message-Id: <20181206155739.20229-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org> References: <20181206155739.20229-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_075957_211919_86B7D96F X-CRM114-Status: GOOD ( 13.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Suzuki Poulose , Will Deacon , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Permit callback type alternatives to carry a sequence of alternative instructions, and leave it up to the callback handler to decide how to use them. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/alternative.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h index 987c1514183a..6b7726ee6b0a 100644 --- a/arch/arm64/include/asm/alternative.h +++ b/arch/arm64/include/asm/alternative.h @@ -156,7 +156,7 @@ static inline void apply_alternatives_module(void *start, size_t length) { } .popsection .pushsection .altinstr_replacement, "ax" 663: .word \cb - . -664: .popsection + .popsection 661: .endm @@ -185,10 +185,21 @@ static inline void apply_alternatives_module(void *start, size_t length) { } .org . - (662b-661b) + (664b-663b) .endm +.macro alternative_cb_alt + .set .Lasm_alt_mode, 1 + .pushsection .altinstr_replacement, "ax" + .org 663b + AARCH64_INSN_SIZE +.endm + /* * Callback-based alternative epilogue */ .macro alternative_cb_end + .if .Lasm_alt_mode==0 + .pushsection .altinstr_replacement, "ax" + .org 663b + AARCH64_INSN_SIZE + .endif +664: .popsection 662: .endm From patchwork Thu Dec 6 15:57:38 2018 Content-Type: text/plain; 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[92.154.90.120]) by smtp.gmail.com with ESMTPSA id y34sm1525233wrd.68.2018.12.06.07.59.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 07:59:45 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Subject: [PATCH 4/5] arm64/assembler: use callback to 3-way alt-patch DC CVAP instructions Date: Thu, 6 Dec 2018 16:57:38 +0100 Message-Id: <20181206155739.20229-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org> References: <20181206155739.20229-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_075954_673626_F8DFA998 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Suzuki Poulose , Will Deacon , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Use the enhanced alternative_cb implementation to reimplement the code patching logic for DC CVAP instructions so that we don't fall back to DV CVAC instructions on systems that require those to be upgraded to DC CIVAC to work around silicon errata. At the same time, we don't want to use DV CIVAC needlessly, since doing so may adversely affect performance. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/assembler.h | 9 +++++---- arch/arm64/kernel/cpu_errata.c | 14 ++++++++++++++ 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 6142402c2eb4..09c5a5452f60 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -390,11 +390,12 @@ alternative_else dc civac, \kaddr alternative_endif .elseif (\op == cvap) -alternative_if ARM64_HAS_DCPOP - sys 3, c7, c12, 1, \kaddr // dc cvap -alternative_else +alternative_cb arm64_handle_dc_cvap + dc civac, \kaddr +alternative_cb_alt + sys 3, c7, c12, 1, \kaddr // dc cvap dc cvac, \kaddr -alternative_endif +alternative_cb_end .else dc \op, \kaddr .endif diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index c5489b4612c5..a63e362da307 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -755,3 +755,17 @@ const struct arm64_cpu_capabilities arm64_errata[] = { { } }; + +asmlinkage void __init arm64_handle_dc_cvap(struct alt_instr *alt, + __le32 *origptr, __le32 *updptr, + int nr_inst, int nr_alts) +{ + struct alt_instr_cb *alt_insn = offset_to_ptr(&alt->alt_offset); + + BUG_ON(nr_inst != 1 || nr_alts != 2); + + if (cpus_have_cap(ARM64_HAS_DCPOP)) + updptr[0] = alt_insn->insn[0]; + else if (!cpus_have_cap(ARM64_WORKAROUND_CLEAN_CACHE)) + updptr[0] = alt_insn->insn[1]; +} From patchwork Thu Dec 6 15:57:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 10716291 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 88480109C for ; Thu, 6 Dec 2018 16:00:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 754FB2EE57 for ; Thu, 6 Dec 2018 16:00:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6A1342EE42; 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[92.154.90.120]) by smtp.gmail.com with ESMTPSA id y34sm1525233wrd.68.2018.12.06.07.59.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 07:59:47 -0800 (PST) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Subject: [PATCH 5/5] arm64/mm: use string comparisons in dcache_by_line_op Date: Thu, 6 Dec 2018 16:57:39 +0100 Message-Id: <20181206155739.20229-6-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org> References: <20181206155739.20229-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_075954_669454_8552ECDD X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Suzuki Poulose , Will Deacon , Robin Murphy , Dave Martin , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The GAS directives that are currently being used in dcache_by_line_op rely on assembler behavior that is not documented, and probably not guaranteed to produce the correct behavior going forward. Currently, we end up with some undefined symbols in cache.o: $ nm arch/arm64/mm/cache.o ... U civac ... U cvac U cvap U cvau This is due to the fact that the comparisons used to select the operation type in the dcache_by_line_op macro are comparing symbols not strings, and even though it seems that GAS is doing the right thing here (undefined symbols by the same name are equal to each other), it seems unwise to rely on this. So let's switch to conditional directives that are documented as operating on strings. Since these cannot be combined like ordinary arithmetic expressions, invert the comparison logic. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/assembler.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 09c5a5452f60..df3043e76e6a 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -383,21 +383,23 @@ alternative_endif sub \tmp2, \tmp1, #1 bic \kaddr, \kaddr, \tmp2 9998: - .if (\op == cvau || \op == cvac) + .ifnc \op, civac + .ifnc \op, cvap alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE dc \op, \kaddr alternative_else dc civac, \kaddr alternative_endif - .elseif (\op == cvap) + .else alternative_cb arm64_handle_dc_cvap dc civac, \kaddr alternative_cb_alt sys 3, c7, c12, 1, \kaddr // dc cvap dc cvac, \kaddr alternative_cb_end + .endif .else - dc \op, \kaddr + dc civac, \kaddr .endif add \kaddr, \kaddr, \tmp1 cmp \kaddr, \size