From patchwork Sun Aug 15 21:33:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liam Beguin X-Patchwork-Id: 12437415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 567FFC4320E for ; Sun, 15 Aug 2021 21:34:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3B24161373 for ; Sun, 15 Aug 2021 21:34:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231379AbhHOVfM (ORCPT ); Sun, 15 Aug 2021 17:35:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233147AbhHOVfJ (ORCPT ); Sun, 15 Aug 2021 17:35:09 -0400 Received: from mail-qv1-xf34.google.com (mail-qv1-xf34.google.com [IPv6:2607:f8b0:4864:20::f34]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29D33C0612AC; Sun, 15 Aug 2021 14:33:54 -0700 (PDT) Received: by mail-qv1-xf34.google.com with SMTP id bu14so5388256qvb.1; Sun, 15 Aug 2021 14:33:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UNzKP8T0fupOu0wKf6skw0WZlOhQs6pY6MrFU3VYV/M=; b=SXFy7NyGZNMs1cQmtp2QzI1SJ8JGHXWjjFZANU2X+uKPJzusXudyl3vmeq6WoqjL7r 89H/7PVORfWLmr5/8gQDjeMavTUSs/JNLI39meOK4hNZRr8yksYZ0keBNsbVwCRaONCl 9/MHMEXSVZFYh38DZXHYMBKyo4y7mbh30iQVX4/UAGC96xyGyO0F3j2TwjCNKnTgq5m4 sKOiUKPexekzyQ6WNCpxB3PCaSeO9bgBUHLBrCyMI343PEShdul/o/iQgT3lJyzZccpz 0GWUI5hvxlQb5ZYriWxQcsdvQk8L2th3cF5K2fzIu9ip7IZk/XspxHYqvVqCSvy5rTIK +2wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UNzKP8T0fupOu0wKf6skw0WZlOhQs6pY6MrFU3VYV/M=; b=DtMbVX5hf9hyFClcNK6jiYNY+yPDb5ZwLGkKBl5X4h/8F8/klQ5FypMAfYEaa+/X58 h5EnJRNi3shcgNoh1l4CAH0VkCtEnCZM3sgJhj7ruYoIq7pmEveV7IF5PVaSW4Sw9bQL bLfy2ckE6nshXT3gZqzhHrwxs1qv+TdKZYKoOqAHjjDogsBDoGzgF4OGclL9I3br4F/m W5CkaYAUEofM+rkupDfXqxHEjtiA4AQkUm8URJI8Gy9S/7jWdUuPqK5RW/7N3X9Zx5gA QDClcWByL8hVMAGdFcJ67mZEbFgAG6QPi3OE3BBfXeiwL9CCE6QNhiqo0SOtmwAMKJRq G3PA== X-Gm-Message-State: AOAM532KXy0ygdZJzl2zQ8GHMJCN63DLw/fit9sSxIzLxRRyKW4QTsgw rmGLaRVosijdtj9ND1qaXYg= X-Google-Smtp-Source: ABdhPJwjHPqdT4jhlFCo3k+di3MdDJjoy53DK20nHgtjXx6Km6aXFMx3j5/eNG92Q8SHDeb/8ptnXQ== X-Received: by 2002:a05:6214:3b1:: with SMTP id m17mr13322974qvy.60.1629063233409; Sun, 15 Aug 2021 14:33:53 -0700 (PDT) Received: from shaak.xiphos.ca (198-48-202-89.cpe.pppoe.ca. [198.48.202.89]) by smtp.gmail.com with ESMTPSA id u19sm3870988qtx.48.2021.08.15.14.33.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Aug 2021 14:33:53 -0700 (PDT) From: Liam Beguin To: liambeguin@gmail.com, lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, charles-antoine.couret@essensium.com, Nuno.Sa@analog.com Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org Subject: [PATCH v6 1/5] iio: adc: ad7949: define and use bitfield names Date: Sun, 15 Aug 2021 17:33:05 -0400 Message-Id: <20210815213309.2847711-2-liambeguin@gmail.com> X-Mailer: git-send-email 2.32.0.452.g940fe202adcb In-Reply-To: <20210815213309.2847711-1-liambeguin@gmail.com> References: <20210815213309.2847711-1-liambeguin@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Liam Beguin Replace raw configuration register values by using FIELD_PREP and defines to improve readability. Signed-off-by: Liam Beguin --- drivers/iio/adc/ad7949.c | 55 ++++++++++++++++++++++++++++++++-------- 1 file changed, 45 insertions(+), 10 deletions(-) diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c index 1b4b3203e428..adc4487a7d56 100644 --- a/drivers/iio/adc/ad7949.c +++ b/drivers/iio/adc/ad7949.c @@ -11,13 +11,39 @@ #include #include #include +#include -#define AD7949_MASK_CHANNEL_SEL GENMASK(9, 7) -#define AD7949_MASK_TOTAL GENMASK(13, 0) -#define AD7949_OFFSET_CHANNEL_SEL 7 -#define AD7949_CFG_READ_BACK 0x1 +#define AD7949_CFG_MASK_TOTAL GENMASK(13, 0) #define AD7949_CFG_REG_SIZE_BITS 14 +/* CFG: Configuration Update */ +#define AD7949_CFG_MASK_OVERWRITE BIT(13) + +/* INCC: Input Channel Configuration */ +#define AD7949_CFG_MASK_INCC GENMASK(12, 10) +#define AD7949_CFG_VAL_INCC_UNIPOLAR_GND 7 +#define AD7949_CFG_VAL_INCC_UNIPOLAR_COMM 6 +#define AD7949_CFG_VAL_INCC_UNIPOLAR_DIFF 4 +#define AD7949_CFG_VAL_INCC_TEMP 3 +#define AD7949_CFG_VAL_INCC_BIPOLAR 2 +#define AD7949_CFG_VAL_INCC_BIPOLAR_DIFF 0 + +/* INX: Input channel Selection in a binary fashion */ +#define AD7949_CFG_MASK_INX GENMASK(9, 7) + +/* BW: select bandwidth for low-pass filter. Full or Quarter */ +#define AD7949_CFG_MASK_BW_FULL BIT(6) + +/* REF: reference/buffer selection */ +#define AD7949_CFG_MASK_REF GENMASK(5, 3) +#define AD7949_CFG_VAL_REF_EXT_BUF 7 + +/* SEQ: channel sequencer. Allows for scanning channels */ +#define AD7949_CFG_MASK_SEQ GENMASK(2, 1) + +/* RB: Read back the CFG register */ +#define AD7949_CFG_MASK_RBN BIT(0) + enum { ID_AD7949 = 0, ID_AD7682, @@ -109,8 +135,8 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, */ for (i = 0; i < 2; i++) { ret = ad7949_spi_write_cfg(ad7949_adc, - channel << AD7949_OFFSET_CHANNEL_SEL, - AD7949_MASK_CHANNEL_SEL); + FIELD_PREP(AD7949_CFG_MASK_INX, channel), + AD7949_CFG_MASK_INX); if (ret) return ret; if (channel == ad7949_adc->current_channel) @@ -199,8 +225,8 @@ static int ad7949_spi_reg_access(struct iio_dev *indio_dev, if (readval) *readval = ad7949_adc->cfg; else - ret = ad7949_spi_write_cfg(ad7949_adc, - writeval & AD7949_MASK_TOTAL, AD7949_MASK_TOTAL); + ret = ad7949_spi_write_cfg(ad7949_adc, writeval, + AD7949_CFG_MASK_TOTAL); return ret; } @@ -214,10 +240,19 @@ static int ad7949_spi_init(struct ad7949_adc_chip *ad7949_adc) { int ret; int val; + u16 cfg; - /* Sequencer disabled, CFG readback disabled, IN0 as default channel */ ad7949_adc->current_channel = 0; - ret = ad7949_spi_write_cfg(ad7949_adc, 0x3C79, AD7949_MASK_TOTAL); + + cfg = FIELD_PREP(AD7949_CFG_MASK_OVERWRITE, 1) | + FIELD_PREP(AD7949_CFG_MASK_INCC, AD7949_CFG_VAL_INCC_UNIPOLAR_GND) | + FIELD_PREP(AD7949_CFG_MASK_INX, ad7949_adc->current_channel) | + FIELD_PREP(AD7949_CFG_MASK_BW_FULL, 1) | + FIELD_PREP(AD7949_CFG_MASK_REF, AD7949_CFG_VAL_REF_EXT_BUF) | + FIELD_PREP(AD7949_CFG_MASK_SEQ, 0x0) | + FIELD_PREP(AD7949_CFG_MASK_RBN, 1); + + ret = ad7949_spi_write_cfg(ad7949_adc, cfg, AD7949_CFG_MASK_TOTAL); /* * Do two dummy conversions to apply the first configuration setting. From patchwork Sun Aug 15 21:33:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liam Beguin X-Patchwork-Id: 12437423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12B48C4338F for ; Sun, 15 Aug 2021 21:34:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EFCB661373 for ; Sun, 15 Aug 2021 21:34:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232596AbhHOVfN (ORCPT ); Sun, 15 Aug 2021 17:35:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233163AbhHOVfK (ORCPT ); Sun, 15 Aug 2021 17:35:10 -0400 Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2847FC0617AD; Sun, 15 Aug 2021 14:33:55 -0700 (PDT) Received: by mail-qk1-x72f.google.com with SMTP id 14so17142209qkc.4; Sun, 15 Aug 2021 14:33:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=akWBcTk8iG2/Pm6gSYx+n7TqdBeVOUN/cYKvBNShGiU=; b=kZEoSf+wl9l7QQgRqoq1ib2239DT0T1iikJr+24crnCW3p7sUVk3L77njPfIxBA/+t gcFnfk7pHMN6Jg279zfM66gonnM9Efcnpc7zo/45pobh9K5rXjdjOxKR2d7AQcylspHu Po/rQCccpWsY78KUQ7vzd+Jwh82OAkMOOxbIDmU2yr/Tfq7tvLuIzSim4AaSpE8hSO0C 9yqXZ66gURXFYMu8az28yyqb6S0DvhFBGjnDhLiJBcLqU0Mf0RufQiinPbT8kJcfl2l/ UoiHn6rQSEYvE3Huow+nIRNDmiy+iUwY1YcvWNelDSoKPFnSS6s0COVZ9jMX4Nt57LG/ juxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=akWBcTk8iG2/Pm6gSYx+n7TqdBeVOUN/cYKvBNShGiU=; b=HpRT8iBzrEdwbbTRKggO0Og1e2HI6AQ3x2s33ohnMUEFvGmzVmmxkvrhyG8W6tKfnz Hrjspcvt1VMJq/OYAzNp+APfNUcyJdMERgh0br8q+yufP9pdB3J5rP1u9D1iDKgijgM0 Q+sMVEyeJp0t84ZDlIlMMr3NF9E5APSckX2SsIWQ+ChFAtXzOsxYiWkaYnKNkRfBRGD3 C8I3EsV5TG49aHwA7m+tDJ8Bmxp5pM0spFVlRezBOSH0QZy7DSGpZVnz1pH2ASM869Ls 22BrvgM5VZHxdgkmZ2gtxyhkVSKImiWdwFuWOwrBZ39gOjsFrwfmKlHF+8APJOu5jLQm q0iA== X-Gm-Message-State: AOAM532151x/gNRl4ZF9CmtWdBA2tWOrM6d1DVutC2YOlGOAzcUwYTXU xlJ3b5j0XL59xjBVPqfuc3k= X-Google-Smtp-Source: ABdhPJyZrvCFvIgMphyVXNN7+t3wBhusuGwJ2f3GvKfhi1tPrJa2PuuabhRs4oi4hhTxYYCbmE9KOA== X-Received: by 2002:a05:620a:1584:: with SMTP id d4mr12583799qkk.416.1629063234315; Sun, 15 Aug 2021 14:33:54 -0700 (PDT) Received: from shaak.xiphos.ca (198-48-202-89.cpe.pppoe.ca. [198.48.202.89]) by smtp.gmail.com with ESMTPSA id u19sm3870988qtx.48.2021.08.15.14.33.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Aug 2021 14:33:53 -0700 (PDT) From: Liam Beguin To: liambeguin@gmail.com, lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, charles-antoine.couret@essensium.com, Nuno.Sa@analog.com Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org Subject: [PATCH v6 2/5] iio: adc: ad7949: fix spi messages on non 14-bit controllers Date: Sun, 15 Aug 2021 17:33:06 -0400 Message-Id: <20210815213309.2847711-3-liambeguin@gmail.com> X-Mailer: git-send-email 2.32.0.452.g940fe202adcb In-Reply-To: <20210815213309.2847711-1-liambeguin@gmail.com> References: <20210815213309.2847711-1-liambeguin@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Liam Beguin This driver supports devices with 14-bit and 16-bit sample sizes. This implies different SPI transfer lengths which are not always handled properly by some SPI controllers. To work around this limitation, define a big endian buffer used to split the buffer into two 8-bit messages in the event that the controller doesn't support 14-bit or 16-bit transfers. A separate buffer is introduced here to avoid performing operations on types of different endianness. Since all transfers use the same bits_per_word value, move that logic to the probe function, and let transfers default to the value defined in the struct spi_device. Signed-off-by: Liam Beguin --- drivers/iio/adc/ad7949.c | 86 +++++++++++++++++++++++++++------------- 1 file changed, 58 insertions(+), 28 deletions(-) diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c index adc4487a7d56..a263d0fcec75 100644 --- a/drivers/iio/adc/ad7949.c +++ b/drivers/iio/adc/ad7949.c @@ -14,7 +14,6 @@ #include #define AD7949_CFG_MASK_TOTAL GENMASK(13, 0) -#define AD7949_CFG_REG_SIZE_BITS 14 /* CFG: Configuration Update */ #define AD7949_CFG_MASK_OVERWRITE BIT(13) @@ -71,6 +70,7 @@ static const struct ad7949_adc_spec ad7949_adc_spec[] = { * @cfg: copy of the configuration register * @current_channel: current channel in use * @buffer: buffer to send / receive data to / from device + * @buf8b: be16 buffer to exchange data with the device in 8-bit transfers */ struct ad7949_adc_chip { struct mutex lock; @@ -81,27 +81,34 @@ struct ad7949_adc_chip { u16 cfg; unsigned int current_channel; u16 buffer ____cacheline_aligned; + __be16 buf8b; }; static int ad7949_spi_write_cfg(struct ad7949_adc_chip *ad7949_adc, u16 val, u16 mask) { int ret; - int bits_per_word = ad7949_adc->resolution; - int shift = bits_per_word - AD7949_CFG_REG_SIZE_BITS; - struct spi_message msg; - struct spi_transfer tx[] = { - { - .tx_buf = &ad7949_adc->buffer, - .len = 2, - .bits_per_word = bits_per_word, - }, - }; ad7949_adc->cfg = (val & mask) | (ad7949_adc->cfg & ~mask); - ad7949_adc->buffer = ad7949_adc->cfg << shift; - spi_message_init_with_transfers(&msg, tx, 1); - ret = spi_sync(ad7949_adc->spi, &msg); + + switch (ad7949_adc->spi->bits_per_word) { + case 16: + ad7949_adc->buffer = ad7949_adc->cfg << 2; + ret = spi_write(ad7949_adc->spi, &ad7949_adc->buffer, 2); + break; + case 14: + ad7949_adc->buffer = ad7949_adc->cfg; + ret = spi_write(ad7949_adc->spi, &ad7949_adc->buffer, 2); + break; + case 8: + /* Here, type is big endian as it must be sent in two transfers */ + ad7949_adc->buf8b = cpu_to_be16(ad7949_adc->cfg << 2); + ret = spi_write(ad7949_adc->spi, &ad7949_adc->buf8b, 2); + break; + default: + dev_err(&ad7949_adc->indio_dev->dev, "unsupported BPW\n"); + return -EINVAL; + } /* * This delay is to avoid a new request before the required time to @@ -116,16 +123,6 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, { int ret; int i; - int bits_per_word = ad7949_adc->resolution; - int mask = GENMASK(ad7949_adc->resolution - 1, 0); - struct spi_message msg; - struct spi_transfer tx[] = { - { - .rx_buf = &ad7949_adc->buffer, - .len = 2, - .bits_per_word = bits_per_word, - }, - }; /* * 1: write CFG for sample N and read old data (sample N-2) @@ -144,9 +141,11 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, } /* 3: write something and read actual data */ - ad7949_adc->buffer = 0; - spi_message_init_with_transfers(&msg, tx, 1); - ret = spi_sync(ad7949_adc->spi, &msg); + if (ad7949_adc->spi->bits_per_word == 8) + ret = spi_read(ad7949_adc->spi, &ad7949_adc->buf8b, 2); + else + ret = spi_read(ad7949_adc->spi, &ad7949_adc->buffer, 2); + if (ret) return ret; @@ -158,7 +157,25 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, ad7949_adc->current_channel = channel; - *val = ad7949_adc->buffer & mask; + switch (ad7949_adc->spi->bits_per_word) { + case 16: + *val = ad7949_adc->buffer; + /* Shift-out padding bits */ + *val >>= 16 - ad7949_adc->resolution; + break; + case 14: + *val = ad7949_adc->buffer & GENMASK(13, 0); + break; + case 8: + /* Here, type is big endian as data was sent in two transfers */ + *val = be16_to_cpu(ad7949_adc->buf8b); + /* Shift-out padding bits */ + *val >>= 16 - ad7949_adc->resolution; + break; + default: + dev_err(&ad7949_adc->indio_dev->dev, "unsupported BPW\n"); + return -EINVAL; + } return 0; } @@ -266,6 +283,7 @@ static int ad7949_spi_init(struct ad7949_adc_chip *ad7949_adc) static int ad7949_spi_probe(struct spi_device *spi) { + u32 spi_ctrl_mask = spi->controller->bits_per_word_mask; struct device *dev = &spi->dev; const struct ad7949_adc_spec *spec; struct ad7949_adc_chip *ad7949_adc; @@ -292,6 +310,18 @@ static int ad7949_spi_probe(struct spi_device *spi) indio_dev->num_channels = spec->num_channels; ad7949_adc->resolution = spec->resolution; + /* Set SPI bits per word */ + if (spi_ctrl_mask & SPI_BPW_MASK(ad7949_adc->resolution)) { + spi->bits_per_word = ad7949_adc->resolution; + } else if (spi_ctrl_mask == SPI_BPW_MASK(16)) { + spi->bits_per_word = 16; + } else if (spi_ctrl_mask == SPI_BPW_MASK(8)) { + spi->bits_per_word = 8; + } else { + dev_err(dev, "unable to find common BPW with spi controller\n"); + return -EINVAL; + } + ad7949_adc->vref = devm_regulator_get(dev, "vref"); if (IS_ERR(ad7949_adc->vref)) { dev_err(dev, "fail to request regulator\n"); From patchwork Sun Aug 15 21:33:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liam Beguin X-Patchwork-Id: 12437421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93916C41537 for ; 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[198.48.202.89]) by smtp.gmail.com with ESMTPSA id u19sm3870988qtx.48.2021.08.15.14.33.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Aug 2021 14:33:54 -0700 (PDT) From: Liam Beguin To: liambeguin@gmail.com, lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, charles-antoine.couret@essensium.com, Nuno.Sa@analog.com Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org Subject: [PATCH v6 3/5] iio: adc: ad7949: add vref selection support Date: Sun, 15 Aug 2021 17:33:07 -0400 Message-Id: <20210815213309.2847711-4-liambeguin@gmail.com> X-Mailer: git-send-email 2.32.0.452.g940fe202adcb In-Reply-To: <20210815213309.2847711-1-liambeguin@gmail.com> References: <20210815213309.2847711-1-liambeguin@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Liam Beguin Add support for selecting the voltage reference from the devicetree. This change is required to get valid readings with all three vref hardware configurations supported by the ADC. For instance if the ADC isn't provided with an external reference, the sample request must specify an internal voltage reference to get a valid reading. Signed-off-by: Liam Beguin --- drivers/iio/adc/ad7949.c | 96 +++++++++++++++++++++++++++++++++------- 1 file changed, 80 insertions(+), 16 deletions(-) diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c index a263d0fcec75..5168d687687d 100644 --- a/drivers/iio/adc/ad7949.c +++ b/drivers/iio/adc/ad7949.c @@ -35,7 +35,11 @@ /* REF: reference/buffer selection */ #define AD7949_CFG_MASK_REF GENMASK(5, 3) -#define AD7949_CFG_VAL_REF_EXT_BUF 7 +#define AD7949_CFG_VAL_REF_EXT_TEMP_BUF 3 +#define AD7949_CFG_VAL_REF_EXT_TEMP 2 +#define AD7949_CFG_VAL_REF_INT_4096 1 +#define AD7949_CFG_VAL_REF_INT_2500 0 +#define AD7949_CFG_VAL_REF_EXTERNAL BIT(1) /* SEQ: channel sequencer. Allows for scanning channels */ #define AD7949_CFG_MASK_SEQ GENMASK(2, 1) @@ -66,6 +70,7 @@ static const struct ad7949_adc_spec ad7949_adc_spec[] = { * @vref: regulator generating Vref * @indio_dev: reference to iio structure * @spi: reference to spi structure + * @refsel: reference selection * @resolution: resolution of the chip * @cfg: copy of the configuration register * @current_channel: current channel in use @@ -77,6 +82,7 @@ struct ad7949_adc_chip { struct regulator *vref; struct iio_dev *indio_dev; struct spi_device *spi; + u32 refsel; u8 resolution; u16 cfg; unsigned int current_channel; @@ -221,12 +227,26 @@ static int ad7949_spi_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: - ret = regulator_get_voltage(ad7949_adc->vref); - if (ret < 0) - return ret; + switch (ad7949_adc->refsel) { + case AD7949_CFG_VAL_REF_INT_2500: + *val = 2500; + break; + case AD7949_CFG_VAL_REF_INT_4096: + *val = 4096; + break; + case AD7949_CFG_VAL_REF_EXT_TEMP: + case AD7949_CFG_VAL_REF_EXT_TEMP_BUF: + ret = regulator_get_voltage(ad7949_adc->vref); + if (ret < 0) + return ret; + + /* convert value back to mV */ + *val = ret / 1000; + break; + } - *val = ret / 5000; - return IIO_VAL_INT; + *val2 = (1 << ad7949_adc->resolution) - 1; + return IIO_VAL_FRACTIONAL; } return -EINVAL; @@ -265,7 +285,7 @@ static int ad7949_spi_init(struct ad7949_adc_chip *ad7949_adc) FIELD_PREP(AD7949_CFG_MASK_INCC, AD7949_CFG_VAL_INCC_UNIPOLAR_GND) | FIELD_PREP(AD7949_CFG_MASK_INX, ad7949_adc->current_channel) | FIELD_PREP(AD7949_CFG_MASK_BW_FULL, 1) | - FIELD_PREP(AD7949_CFG_MASK_REF, AD7949_CFG_VAL_REF_EXT_BUF) | + FIELD_PREP(AD7949_CFG_MASK_REF, ad7949_adc->refsel) | FIELD_PREP(AD7949_CFG_MASK_SEQ, 0x0) | FIELD_PREP(AD7949_CFG_MASK_RBN, 1); @@ -281,6 +301,11 @@ static int ad7949_spi_init(struct ad7949_adc_chip *ad7949_adc) return ret; } +static void ad7949_disable_reg(void *reg) +{ + regulator_disable(reg); +} + static int ad7949_spi_probe(struct spi_device *spi) { u32 spi_ctrl_mask = spi->controller->bits_per_word_mask; @@ -288,6 +313,7 @@ static int ad7949_spi_probe(struct spi_device *spi) const struct ad7949_adc_spec *spec; struct ad7949_adc_chip *ad7949_adc; struct iio_dev *indio_dev; + u32 tmp; int ret; indio_dev = devm_iio_device_alloc(dev, sizeof(*ad7949_adc)); @@ -322,16 +348,56 @@ static int ad7949_spi_probe(struct spi_device *spi) return -EINVAL; } - ad7949_adc->vref = devm_regulator_get(dev, "vref"); + /* Setup internal voltage reference */ + tmp = 4096000; + ret = device_property_read_u32(dev, "adi,internal-ref-microvolt", &tmp); + if (ret < 0 && ret != -EINVAL) { + dev_err(dev, "invalid value for adi,internal-ref-microvolt\n"); + return ret; + } + + switch (tmp) { + case 2500000: + ad7949_adc->refsel = AD7949_CFG_VAL_REF_INT_2500; + break; + case 4096000: + ad7949_adc->refsel = AD7949_CFG_VAL_REF_INT_4096; + break; + default: + dev_err(dev, "unsupported internal voltage reference\n"); + return -EINVAL; + } + + /* Setup external voltage reference, buffered? */ + ad7949_adc->vref = devm_regulator_get_optional(dev, "vrefin"); if (IS_ERR(ad7949_adc->vref)) { - dev_err(dev, "fail to request regulator\n"); - return PTR_ERR(ad7949_adc->vref); + ret = PTR_ERR(ad7949_adc->vref); + if (ret != -ENODEV) + return ret; + /* unbuffered? */ + ad7949_adc->vref = devm_regulator_get_optional(dev, "vref"); + if (IS_ERR(ad7949_adc->vref)) { + ret = PTR_ERR(ad7949_adc->vref); + if (ret != -ENODEV) + return ret; + } else { + ad7949_adc->refsel = AD7949_CFG_VAL_REF_EXT_TEMP; + } + } else { + ad7949_adc->refsel = AD7949_CFG_VAL_REF_EXT_TEMP_BUF; } - ret = regulator_enable(ad7949_adc->vref); - if (ret < 0) { - dev_err(dev, "fail to enable regulator\n"); - return ret; + if (ad7949_adc->refsel & AD7949_CFG_VAL_REF_EXTERNAL) { + ret = regulator_enable(ad7949_adc->vref); + if (ret < 0) { + dev_err(dev, "fail to enable regulator\n"); + return ret; + } + + ret = devm_add_action_or_reset(dev, ad7949_disable_reg, + ad7949_adc->vref); + if (ret) + return ret; } mutex_init(&ad7949_adc->lock); @@ -352,7 +418,6 @@ static int ad7949_spi_probe(struct spi_device *spi) err: mutex_destroy(&ad7949_adc->lock); - regulator_disable(ad7949_adc->vref); return ret; } @@ -364,7 +429,6 @@ static int ad7949_spi_remove(struct spi_device *spi) iio_device_unregister(indio_dev); mutex_destroy(&ad7949_adc->lock); - regulator_disable(ad7949_adc->vref); return 0; } From patchwork Sun Aug 15 21:33:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liam Beguin X-Patchwork-Id: 12437417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88DA3C19F33 for ; Sun, 15 Aug 2021 21:34:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6CCA56137B for ; Sun, 15 Aug 2021 21:34:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231719AbhHOVfN (ORCPT ); Sun, 15 Aug 2021 17:35:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233192AbhHOVfK (ORCPT ); Sun, 15 Aug 2021 17:35:10 -0400 Received: from mail-qk1-x733.google.com (mail-qk1-x733.google.com [IPv6:2607:f8b0:4864:20::733]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04295C0612AF; Sun, 15 Aug 2021 14:33:57 -0700 (PDT) Received: by mail-qk1-x733.google.com with SMTP id e14so17139514qkg.3; Sun, 15 Aug 2021 14:33:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=S0aH1SD7OXnEr9T1hwKbROMxfg2WX5L/OYnwQ2B4t0M=; b=mhxCbxP2/8ivK3NagsAl2lanl7es0MROKSGCXez3o3t8qdK0lWyd9sbYY008OlQkdR CTvsqLgIR87Gd05yUtzAp8se3dycC9rdtOwzB7EoE9jpy18XXXbeItGdKW3535ipfi1Y CQeHeoHqgV0ldqQiDg47umx+qqV/WH3NI6lEq2mI1t9gBC3qkqfPEngYOyvbMZ2+WFWI GMC9v8vt3aX2b60uF+NtUd++8MoxNOD5eNLRuLiIi+DifaPzp2jVlhtfDg91WXRHnBG5 xUwx8ZNEq5Un6gWTQDoTNbvMqgZqu2Mg1VfN4OeksR5DwTWEX1Jt9v4lysTbn3s7rcz3 sO9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=S0aH1SD7OXnEr9T1hwKbROMxfg2WX5L/OYnwQ2B4t0M=; b=Yaq4kEjCkl/pKKs6My2aJXjYPRcwHZxdrzRNe8jvVyjjFqnRvTSyD/RH5z29X7f+N9 TYQ2WpC8gIEDv5q9vKjVqgIHJFv2FBRVyU0cVnsyErAkDBnrVyfAz+hvsUB2gBYC52ug F/HvjfLGyRJW0ZuwOMXCXFIjYACY35adGEjh1nOlXFxVSvmtZeuK9vjuW/9ssmFqdz5C 5NJwzR6JeNPB+eHmDo8M//u4HUW6vcP6cmuBgvShFPr2pux+7b3AH4BhL3MabOgPGsZe c/+vh22xpgap0glEWrWoErzZvh2iwu85qQfj4hHRQnI/aQOQY9HYdthWC+bB3dQiaA1f oTeA== X-Gm-Message-State: AOAM530Pgs87qwnahztnr49foJJPu8FtwvdxuXEG3q+kiKxYzkBQKPdc gjEIInqcITVJRT4VI4AmRuk= X-Google-Smtp-Source: ABdhPJxTikpBxtv1w/quz377VuK9ztaVj/tvDsW1A3sf5g/iJAEy3f36VAMjs3kIEe8hUWLJTMcA4A== X-Received: by 2002:a05:620a:702:: with SMTP id 2mr6231519qkc.7.1629063236223; Sun, 15 Aug 2021 14:33:56 -0700 (PDT) Received: from shaak.xiphos.ca (198-48-202-89.cpe.pppoe.ca. [198.48.202.89]) by smtp.gmail.com with ESMTPSA id u19sm3870988qtx.48.2021.08.15.14.33.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Aug 2021 14:33:55 -0700 (PDT) From: Liam Beguin To: liambeguin@gmail.com, lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, charles-antoine.couret@essensium.com, Nuno.Sa@analog.com Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org Subject: [PATCH v6 4/5] dt-bindings: iio: adc: ad7949: update voltage reference bindings Date: Sun, 15 Aug 2021 17:33:08 -0400 Message-Id: <20210815213309.2847711-5-liambeguin@gmail.com> X-Mailer: git-send-email 2.32.0.452.g940fe202adcb In-Reply-To: <20210815213309.2847711-1-liambeguin@gmail.com> References: <20210815213309.2847711-1-liambeguin@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Liam Beguin Update bindings to describe support for buffered and unbuffered external voltage references selection, and add adi,internal-ref-microvolt for internal voltage reference selection. Signed-off-by: Liam Beguin Reviewed-by: Rob Herring --- .../bindings/iio/adc/adi,ad7949.yaml | 51 +++++++++++++++++-- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml index 9b56bd4d5510..0b10ed5f74ae 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml @@ -26,19 +26,43 @@ properties: reg: maxItems: 1 + vrefin-supply: + description: + Buffered ADC reference voltage supply. + vref-supply: description: - ADC reference voltage supply + Unbuffered ADC reference voltage supply. + + adi,internal-ref-microvolt: + description: | + Internal reference voltage selection in microvolts. + + If no internal reference is specified, the channel will default to the + external reference defined by vrefin-supply (or vref-supply). + vrefin-supply will take precedence over vref-supply if both are defined. + + If no supplies are defined, the reference selection will default to + 4096mV internal reference. + + enum: [2500000, 4096000] + default: 4096000 + spi-max-frequency: true - "#io-channel-cells": + '#io-channel-cells': const: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + required: - compatible - reg - - vref-supply additionalProperties: false @@ -49,9 +73,30 @@ examples: #size-cells = <0>; adc@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,ad7949"; reg = <0>; vref-supply = <&vdd_supply>; }; + + adc@1 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "adi,ad7949"; + reg = <1>; + vrefin-supply = <&vdd_supply>; + }; + + adc@2 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "adi,ad7949"; + reg = <2>; + adi,internal-ref-microvolt = <4096000>; + }; }; ... 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[198.48.202.89]) by smtp.gmail.com with ESMTPSA id u19sm3870988qtx.48.2021.08.15.14.33.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Aug 2021 14:33:56 -0700 (PDT) From: Liam Beguin To: liambeguin@gmail.com, lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, charles-antoine.couret@essensium.com, Nuno.Sa@analog.com Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, robh+dt@kernel.org Subject: [PATCH v6 5/5] iio: adc: ad7949: use devm managed functions Date: Sun, 15 Aug 2021 17:33:09 -0400 Message-Id: <20210815213309.2847711-6-liambeguin@gmail.com> X-Mailer: git-send-email 2.32.0.452.g940fe202adcb In-Reply-To: <20210815213309.2847711-1-liambeguin@gmail.com> References: <20210815213309.2847711-1-liambeguin@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Liam Beguin Switch to devm_iio_device_register to finalize devm migration. This removes the use for iio_device_unregister() and since mutex_destroy() is not necessary here, remove it altogether. Signed-off-by: Liam Beguin --- drivers/iio/adc/ad7949.c | 25 +++---------------------- 1 file changed, 3 insertions(+), 22 deletions(-) diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c index 5168d687687d..5b8858719b53 100644 --- a/drivers/iio/adc/ad7949.c +++ b/drivers/iio/adc/ad7949.c @@ -405,34 +405,16 @@ static int ad7949_spi_probe(struct spi_device *spi) ret = ad7949_spi_init(ad7949_adc); if (ret) { dev_err(dev, "enable to init this device: %d\n", ret); - goto err; + return ret; } - ret = iio_device_register(indio_dev); - if (ret) { + ret = devm_iio_device_register(dev, indio_dev); + if (ret) dev_err(dev, "fail to register iio device: %d\n", ret); - goto err; - } - - return 0; - -err: - mutex_destroy(&ad7949_adc->lock); return ret; } -static int ad7949_spi_remove(struct spi_device *spi) -{ - struct iio_dev *indio_dev = spi_get_drvdata(spi); - struct ad7949_adc_chip *ad7949_adc = iio_priv(indio_dev); - - iio_device_unregister(indio_dev); - mutex_destroy(&ad7949_adc->lock); - - return 0; -} - static const struct of_device_id ad7949_spi_of_id[] = { { .compatible = "adi,ad7949" }, { .compatible = "adi,ad7682" }, @@ -455,7 +437,6 @@ static struct spi_driver ad7949_spi_driver = { .of_match_table = ad7949_spi_of_id, }, .probe = ad7949_spi_probe, - .remove = ad7949_spi_remove, .id_table = ad7949_spi_id, }; module_spi_driver(ad7949_spi_driver);