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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id j17sm15371045wrt.69.2021.08.23.09.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 09:42:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 1/5] softmmu/physmem: Simplify flatview_write and address_space_access_valid Date: Mon, 23 Aug 2021 18:41:53 +0200 Message-Id: <20210823164157.751807-2-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210823164157.751807-1-philmd@redhat.com> References: <20210823164157.751807-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=170.10.133.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) DKIMWL_WL_HIGH=-0.743, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , David Hildenbrand , Jason Wang , Li Qiang , Qiuhao Li , Peter Xu , Alexander Bulekov , qemu-arm@nongnu.org, Gerd Hoffmann , Stefan Hajnoczi , Paolo Bonzini , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Remove unuseful local 'result' variables. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Xu Reviewed-by: David Hildenbrand Reviewed-by: Alexander Bulekov Reviewed-by: Stefan Hajnoczi --- softmmu/physmem.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 2e18947598e..e534dc69918 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2810,14 +2810,11 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, hwaddr l; hwaddr addr1; MemoryRegion *mr; - MemTxResult result = MEMTX_OK; l = len; mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); - result = flatview_write_continue(fv, addr, attrs, buf, len, - addr1, l, mr); - - return result; + return flatview_write_continue(fv, addr, attrs, buf, len, + addr1, l, mr); } /* Called within RCU critical section. */ @@ -3114,12 +3111,10 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, MemTxAttrs attrs) { FlatView *fv; - bool result; RCU_READ_LOCK_GUARD(); fv = address_space_to_flatview(as); - result = flatview_access_valid(fv, addr, len, is_write, attrs); - return result; + return flatview_access_valid(fv, addr, len, is_write, attrs); } static hwaddr From patchwork Mon Aug 23 16:41:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12453237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AE54C4338F for ; Mon, 23 Aug 2021 16:54:59 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B9FF4613B1 for ; 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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id p9sm10502547wmq.40.2021.08.23.09.42.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 09:42:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 2/5] hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR Date: Mon, 23 Aug 2021 18:41:54 +0200 Message-Id: <20210823164157.751807-3-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210823164157.751807-1-philmd@redhat.com> References: <20210823164157.751807-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=170.10.133.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) DKIMWL_WL_HIGH=-0.743, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , David Hildenbrand , Jason Wang , Li Qiang , Qiuhao Li , Peter Xu , Alexander Bulekov , qemu-arm@nongnu.org, Gerd Hoffmann , Stefan Hajnoczi , Paolo Bonzini , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We are going to introduce more MemTxResult bits, so it is safer to check for !MEMTX_OK rather than MEMTX_ERROR. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Xu Reviewed-by: David Hildenbrand Reviewed-by: Peter Maydell Reviewed-by: Stefan Hajnoczi --- hw/intc/arm_gicv3_dist.c | 4 ++-- hw/intc/arm_gicv3_redist.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index b65f56f9035..e62a9cdfa8d 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -819,7 +819,7 @@ MemTxResult gicv3_dist_read(void *opaque, hwaddr offset, uint64_t *data, break; } - if (r == MEMTX_ERROR) { + if (r != MEMTX_OK) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest read at offset " TARGET_FMT_plx "size %u\n", __func__, offset, size); @@ -861,7 +861,7 @@ MemTxResult gicv3_dist_write(void *opaque, hwaddr offset, uint64_t data, break; } - if (r == MEMTX_ERROR) { + if (r != MEMTX_OK) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest write at offset " TARGET_FMT_plx "size %u\n", __func__, offset, size); diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 53da703ed84..547281a8961 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -450,7 +450,7 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offset, uint64_t *data, break; } - if (r == MEMTX_ERROR) { + if (r != MEMTX_OK) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest read at offset " TARGET_FMT_plx " size %u\n", __func__, offset, size); @@ -507,7 +507,7 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr offset, uint64_t data, break; } - if (r == MEMTX_ERROR) { + if (r != MEMTX_OK) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid guest write at offset " TARGET_FMT_plx " size %u\n", __func__, offset, size); From patchwork Mon Aug 23 16:41:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12453243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EED0C4338F for ; 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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id r1sm15831189wrt.24.2021.08.23.09.42.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 09:42:12 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 3/5] exec/memattrs: Introduce MemTxAttrs::bus_perm field Date: Mon, 23 Aug 2021 18:41:55 +0200 Message-Id: <20210823164157.751807-4-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210823164157.751807-1-philmd@redhat.com> References: <20210823164157.751807-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.743, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , David Hildenbrand , Jason Wang , Li Qiang , Qiuhao Li , Peter Xu , Alexander Bulekov , qemu-arm@nongnu.org, Gerd Hoffmann , Stefan Hajnoczi , Paolo Bonzini , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add the 'direct_access' bit to the memory attributes to restrict bus master access to ROM/RAM. Have read/write accessors return MEMTX_BUS_ERROR if an access is restricted and the region is not ROM/RAM ('direct'). Add corresponding trace events. Signed-off-by: Philippe Mathieu-Daudé --- include/exec/memattrs.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h index 95f2d20d55b..7a94ee75a88 100644 --- a/include/exec/memattrs.h +++ b/include/exec/memattrs.h @@ -14,6 +14,13 @@ #ifndef MEMATTRS_H #define MEMATTRS_H +/* Permission to restrict bus memory accesses. See MemTxAttrs::bus_perm */ +enum { + MEMTXPERM_UNSPECIFIED = 0, + MEMTXPERM_UNRESTRICTED = 1, + MEMTXPERM_RAM_DEVICE = 2, +}; + /* Every memory transaction has associated with it a set of * attributes. Some of these are generic (such as the ID of * the bus master); some are specific to a particular kind of @@ -35,6 +42,19 @@ typedef struct MemTxAttrs { unsigned int secure:1; /* Memory access is usermode (unprivileged) */ unsigned int user:1; + /* + * Bus memory access permission. + * + * Some devices (such DMA) might be restricted to only access + * some type of device, such RAM devices. By default memory + * accesses are unspecified (MEMTXPERM_UNSPECIFIED), but could be + * unrestricted (MEMTXPERM_UNRESTRICTED, similar to an allow list) + * or restricted to a type of devices (similar to a deny list). + * Currently only RAM devices can be restricted (MEMTXPERM_RAM_DEVICE). + * + * Memory accesses to restricted addresses return MEMTX_BUS_ERROR. + */ + unsigned int bus_perm:2; /* Requester ID (for MSI for example) */ unsigned int requester_id:16; /* Invert endianness for this page */ @@ -66,6 +86,7 @@ typedef struct MemTxAttrs { #define MEMTX_OK 0 #define MEMTX_ERROR (1U << 0) /* device returned an error */ #define MEMTX_DECODE_ERROR (1U << 1) /* nothing at that address */ +#define MEMTX_BUS_ERROR (1U << 2) /* bus returned an error */ typedef uint32_t MemTxResult; #endif From patchwork Mon Aug 23 16:41:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 12453245 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1512BC432BE for ; Mon, 23 Aug 2021 17:00:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9584D61284 for ; Mon, 23 Aug 2021 17:00:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9584D61284 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:48918 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mIDJO-0001FQ-FI for qemu-devel@archiver.kernel.org; Mon, 23 Aug 2021 13:00:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49322) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mID1j-0000T2-GQ for qemu-devel@nongnu.org; Mon, 23 Aug 2021 12:42:23 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:60994) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mID1g-0007Rf-W7 for qemu-devel@nongnu.org; Mon, 23 Aug 2021 12:42:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1629736940; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7R4zUdURf5txsJu6CyZuzHy/f/1sygZW3eoytgU2yN8=; b=BbL4GA65WdLhc8rqJa3aaPiG0M/e7MwCE47pKBrViFZebjH9KWaHYlVE7m85vOEK7vHKYI tREnWuHWQkBCa3JZwmC1rx61xbHJHCcu/FPMXwVJ9d2y3pLfNAsH+AeL4ylv3zefhVvwz1 r1R0y8fDagB6lGnl291Mi7Yjge6i59M= Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-162-AH0nGgPeOxaZTRdU8yGbjA-1; Mon, 23 Aug 2021 12:42:19 -0400 X-MC-Unique: AH0nGgPeOxaZTRdU8yGbjA-1 Received: by mail-wr1-f70.google.com with SMTP id b8-20020a5d5508000000b001574e8e9237so1242499wrv.16 for ; Mon, 23 Aug 2021 09:42:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7R4zUdURf5txsJu6CyZuzHy/f/1sygZW3eoytgU2yN8=; b=tjaqR3u76Ef1PTkXic/vDWlvXlTmLChjNOacXxJayQX+xbhDY3TQhaKQXbJQS4gPC7 wOYgur1/rrJrNTkYrptOVfRAJ3VdVskb+aWYnT4Y3AX86+mNi4K44pJDlrCPKWIAxyH9 tihIZtb995xnCBLEe28mMeUWx5h931cNdj7uHvhEFD38pj5lnhRVKhjRMJU7zsEag+T3 5FrH85O2NPVNL0rx36XVhl7aRVuydLP3SHB0TjycBMXX+7L2Abf0ZAARzSNV8xV3hbzI 9KqcK8oEsi+jFnARYWIF1rtW3P+HVpV52ACTb3dx8nRhOgtJxf2exibRtdoPxkrCHs7t 0t0g== X-Gm-Message-State: AOAM532ZZteEiG/6Hq46Pj6zllrPvuuTBSMT5uNEgmAJr4lajAGcCmf5 0qQxJ6S9H3I4cj/jieT0giNMWfssT6alMdfXSwQJijYOsPqv98cb5W6V8+ldNmxUKIoRGdeXJOW K+bQ+J1Kw3sa9JnNM19bbfTUow0deyQdj+dMxWoodrMc3BEWRBZ+AhMYhh+Ri6/Gx X-Received: by 2002:a1c:4a:: with SMTP id 71mr17335584wma.87.1629736937738; Mon, 23 Aug 2021 09:42:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzysm3WS85qZRVEgfejMlzTLBMjDfyEPfsxyuaYQdwihLiPfPMjXZUAZlmI/9N9UU5KhKEfLQ== X-Received: by 2002:a1c:4a:: with SMTP id 71mr17335551wma.87.1629736937427; Mon, 23 Aug 2021 09:42:17 -0700 (PDT) Received: from x1w.. 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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id o10sm2922553wrc.16.2021.08.23.09.42.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 09:42:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 4/5] softmmu/physmem: Introduce flatview_access_allowed() to check bus perms Date: Mon, 23 Aug 2021 18:41:56 +0200 Message-Id: <20210823164157.751807-5-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210823164157.751807-1-philmd@redhat.com> References: <20210823164157.751807-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=170.10.133.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.743, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , David Hildenbrand , Jason Wang , Li Qiang , Qiuhao Li , Peter Xu , Alexander Bulekov , qemu-arm@nongnu.org, Gerd Hoffmann , Stefan Hajnoczi , Paolo Bonzini , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Introduce flatview_access_allowed() to check bus permission before running any bus transaction. For now this is a simple stub. Signed-off-by: Philippe Mathieu-Daudé --- softmmu/physmem.c | 37 +++++++++++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index e534dc69918..0d31a2f4199 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2754,6 +2754,27 @@ static bool prepare_mmio_access(MemoryRegion *mr) return release_lock; } +/** + * flatview_access_allowed + * @mr: #MemoryRegion to be accessed + * @attrs: memory transaction attributes + * @addr: address within that memory region + * @len: the number of bytes to access + * @result: optional pointer to a MemTxResult or NULL + * + * Check if a memory transaction is allowed. If an error occurs this + * method will return false to indicate denial, as well as setting + * @result to contain corresponding #MemTxResult. + * + * Returns: true if transaction is allowed, false if denied. + */ +static inline bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs, + hwaddr addr, hwaddr len, + MemTxResult *result) +{ + return true; +} + /* Called within RCU critical section. */ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, MemTxAttrs attrs, @@ -2768,7 +2789,9 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, const uint8_t *buf = ptr; for (;;) { - if (!memory_access_is_direct(mr, true)) { + if (!flatview_access_allowed(mr, attrs, addr1, l, &result)) { + /* 'result' contains the error, keep going. */ + } else if (!memory_access_is_direct(mr, true)) { release_lock |= prepare_mmio_access(mr); l = memory_access_size(mr, l, addr1); /* XXX: could force current_cpu to NULL to avoid @@ -2810,9 +2833,13 @@ static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs, hwaddr l; hwaddr addr1; MemoryRegion *mr; + MemTxResult result = MEMTX_OK; l = len; mr = flatview_translate(fv, addr, &addr1, &l, true, attrs); + if (!flatview_access_allowed(mr, attrs, addr, len, &result)) { + return result; + } return flatview_write_continue(fv, addr, attrs, buf, len, addr1, l, mr); } @@ -2831,7 +2858,9 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, fuzz_dma_read_cb(addr, len, mr); for (;;) { - if (!memory_access_is_direct(mr, false)) { + if (!flatview_access_allowed(mr, attrs, addr1, l, &result)) { + /* 'result' contains the error, keep going. */ + } else if (!memory_access_is_direct(mr, false)) { /* I/O case */ release_lock |= prepare_mmio_access(mr); l = memory_access_size(mr, l, addr1); @@ -2871,9 +2900,13 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr, hwaddr l; hwaddr addr1; MemoryRegion *mr; + MemTxResult result = MEMTX_OK; l = len; mr = flatview_translate(fv, addr, &addr1, &l, false, attrs); + if (!flatview_access_allowed(mr, attrs, addr, len, &result)) { + return result; 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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id s16sm8505653wrw.44.2021.08.23.09.42.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 09:42:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH v2 5/5] softmmu/physmem: Have flaview API check MemTxAttrs::bus_perm field Date: Mon, 23 Aug 2021 18:41:57 +0200 Message-Id: <20210823164157.751807-6-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210823164157.751807-1-philmd@redhat.com> References: <20210823164157.751807-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.743, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , David Hildenbrand , Jason Wang , Li Qiang , Qiuhao Li , Peter Xu , Alexander Bulekov , qemu-arm@nongnu.org, Gerd Hoffmann , Stefan Hajnoczi , Paolo Bonzini , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Check bus permission in flatview_access_allowed() before running any bus transaction. There is not change for the default case (MEMTXPERM_UNSPECIFIED). The MEMTXPERM_UNRESTRICTED case works as an allow list. Devices using it won't be checked by flatview_access_allowed(). The only deny list equivalent is MEMTXPERM_RAM_DEVICE: devices using this flag will reject transactions and set the optional MemTxResult to MEMTX_BUS_ERROR. Signed-off-by: Philippe Mathieu-Daudé --- softmmu/physmem.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 0d31a2f4199..329542dba75 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -2772,7 +2772,22 @@ static inline bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs, hwaddr addr, hwaddr len, MemTxResult *result) { - return true; + if (unlikely(attrs.bus_perm == MEMTXPERM_RAM_DEVICE)) { + if (memory_region_is_ram(mr) || memory_region_is_ram_device(mr)) { + return true; + } + qemu_log_mask(LOG_GUEST_ERROR, + "Invalid access to non-RAM device at " + "addr 0x%" HWADDR_PRIX ", size %" HWADDR_PRIu ", " + "region '%s'\n", addr, len, memory_region_name(mr)); + if (result) { + *result |= MEMTX_BUS_ERROR; + } + return false; + } else { + /* MEMTXPERM_UNRESTRICTED and MEMTXPERM_UNSPECIFIED cases */ + return true; + } } /* Called within RCU critical section. */