From patchwork Tue Aug 24 04:34:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 12453949 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEF40C4338F for ; Tue, 24 Aug 2021 04:34:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C9A4F61371 for ; Tue, 24 Aug 2021 04:34:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229680AbhHXEfb (ORCPT ); Tue, 24 Aug 2021 00:35:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229615AbhHXEfa (ORCPT ); Tue, 24 Aug 2021 00:35:30 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62D8FC061757 for ; Mon, 23 Aug 2021 21:34:47 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id n12so11492661plf.4 for ; Mon, 23 Aug 2021 21:34:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WlARBdCH0G+Q0Gto74EDeCNkdp2jkLi1fyvWJUCNQck=; b=i8mgH6afafIWcLr3/bxaHLNd22F+f+UHMMkbxKDu04L958bJB5GpP8mRswRU/xNlom w3Gpve+ZyVC+0BAsueL4vTkJdnooN2IvconYPiA645UTs0xKuNT5nI9A0TYOr8U40Tob mykXu38kKpwZoooU2guS8trQYzxUrkwBLpULyytM5chbT29hKjCWShmlV82aGvGhLFKl Q8jNLQx8lcgy67aXUPTTCfpmZ2Lt+ivroWp5VO5EJijLkhzFxFxPbHxxzcO8l0vKqbt8 mCq8lH4ri0qMbCXEqCAwBUZHEIJ/0WSwD5HYQMUUzLdUCXs0eDTz4fKVnIWzf4MxH/aj 4ANg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WlARBdCH0G+Q0Gto74EDeCNkdp2jkLi1fyvWJUCNQck=; b=NziZda/x8e4d7tmX7jnIszkWeTogv9z6WiCFFb/bzn1g4pnTzdIC8zAAsyLus8mwC3 cqGs1Uq0XBHYdpWM0R7qfz8xU5o0F8YAGZMFmExmCyoUltXqXM30h+cSzCvzzIfaNPpD VO+mwrZbScyXi36h2dgp08zddzQB0xfaMWndrGHiykogpE9NEnWt/pgkTdtBjHqeBQ9s aWT9ySgNj4rwT/Q2QuZaPLqL7JZH2TKhcX77YpFPwlHAqiO5wHLm65lkmIJkKciBf2Q4 T98E5LtwhMk/BeEqs8h/f+v7QoO1VCpXGiL46ui36/GfvzV9CAs+b79exStEJeVqQGtv 7Q/Q== X-Gm-Message-State: AOAM533QqPsmcRQaYidDKHr8TOLTJA/OUBnr+F9mkQfRZRKTU4xHSClq u6WOTzGTpkrOgltqiCx+9ql1Uw== X-Google-Smtp-Source: ABdhPJy/k9e4jPmt414tRt8dqF8IDjfHZOzJ8yKQ+opLJIqljmM6+E3fNmAG2J3sBCocbtw8625Hfw== X-Received: by 2002:a17:903:31d6:b0:133:9932:6998 with SMTP id v22-20020a17090331d600b0013399326998mr9449165ple.45.1629779686991; Mon, 23 Aug 2021 21:34:46 -0700 (PDT) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id p10sm789401pjv.39.2021.08.23.21.34.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 21:34:46 -0700 (PDT) From: Shawn Guo To: Georgi Djakov Cc: AngeloGioacchino Del Regno , Bjorn Andersson , Dmitry Baryshkov , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Guo Subject: [PATCH v2 1/3] dt-bindings: interconnect: sdm660: Add missing a2noc qos clocks Date: Tue, 24 Aug 2021 12:34:33 +0800 Message-Id: <20210824043435.23190-2-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210824043435.23190-1-shawn.guo@linaro.org> References: <20210824043435.23190-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Signed-off-by: Shawn Guo Reviewed-by: Rob Herring Acked-by: AngeloGioacchino Del Regno --- .../bindings/interconnect/qcom,sdm660.yaml | 46 +++++++++++++++++-- 1 file changed, 42 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml index 29de7807df54..bcd41e491f1d 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml @@ -31,11 +31,11 @@ properties: clocks: minItems: 1 - maxItems: 3 + maxItems: 7 clock-names: minItems: 1 - maxItems: 3 + maxItems: 7 required: - compatible @@ -72,6 +72,32 @@ allOf: contains: enum: - qcom,sdm660-a2noc + then: + properties: + clocks: + items: + - description: Bus Clock. + - description: Bus A Clock. + - description: IPA Clock. + - description: UFS AXI Clock. + - description: Aggregate2 UFS AXI Clock. + - description: Aggregate2 USB3 AXI Clock. + - description: Config NoC USB2 AXI Clock. + clock-names: + items: + - const: bus + - const: bus_a + - const: ipa + - const: ufs_axi + - const: aggre2_ufs_axi + - const: aggre2_usb3_axi + - const: cfg_noc_usb2_axi + + - if: + properties: + compatible: + contains: + enum: - qcom,sdm660-bimc - qcom,sdm660-cnoc - qcom,sdm660-gnoc @@ -91,6 +117,7 @@ examples: - | #include #include + #include bimc: interconnect@1008000 { compatible = "qcom,sdm660-bimc"; @@ -123,9 +150,20 @@ examples: compatible = "qcom,sdm660-a2noc"; reg = <0x01704000 0xc100>; #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; + clock-names = "bus", + "bus_a", + "ipa", + "ufs_axi", + "aggre2_ufs_axi", + "aggre2_usb3_axi", + "cfg_noc_usb2_axi"; clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, + <&rpmcc RPM_SMD_IPA_CLK>, + <&gcc GCC_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&gcc GCC_CFG_NOC_USB2_AXI_CLK>; }; mnoc: interconnect@1745000 { From patchwork Tue Aug 24 04:34:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 12453951 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD649C4320E for ; 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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id p10sm789401pjv.39.2021.08.23.21.34.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 21:34:49 -0700 (PDT) From: Shawn Guo To: Georgi Djakov Cc: AngeloGioacchino Del Regno , Bjorn Andersson , Dmitry Baryshkov , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Guo Subject: [PATCH v2 2/3] interconnect: qcom: sdm660: Add missing a2noc qos clocks Date: Tue, 24 Aug 2021 12:34:34 +0800 Message-Id: <20210824043435.23190-3-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210824043435.23190-1-shawn.guo@linaro.org> References: <20210824043435.23190-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. Otherwise, qcom_icc_noc_set_qos_priority() call on mas_ufs or mas_usb_hs node will simply result in a hardware hang on SDM660 SoC. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Signed-off-by: Shawn Guo Tested-by: Bjorn Andersson Reviewed-by: AngeloGioacchino Del Regno --- drivers/interconnect/qcom/sdm660.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/interconnect/qcom/sdm660.c b/drivers/interconnect/qcom/sdm660.c index c89c991a80a0..661eb3635d21 100644 --- a/drivers/interconnect/qcom/sdm660.c +++ b/drivers/interconnect/qcom/sdm660.c @@ -174,6 +174,16 @@ static const struct clk_bulk_data bus_mm_clocks[] = { { .id = "iface" }, }; +static const struct clk_bulk_data bus_a2noc_clocks[] = { + { .id = "bus" }, + { .id = "bus_a" }, + { .id = "ipa" }, + { .id = "ufs_axi" }, + { .id = "aggre2_ufs_axi" }, + { .id = "aggre2_usb3_axi" }, + { .id = "cfg_noc_usb2_axi" }, +}; + /** * struct qcom_icc_provider - Qualcomm specific interconnect provider * @provider: generic interconnect provider @@ -811,6 +821,10 @@ static int qnoc_probe(struct platform_device *pdev) qp->bus_clks = devm_kmemdup(dev, bus_mm_clocks, sizeof(bus_mm_clocks), GFP_KERNEL); qp->num_clks = ARRAY_SIZE(bus_mm_clocks); + } else if (of_device_is_compatible(dev->of_node, "qcom,sdm660-a2noc")) { + qp->bus_clks = devm_kmemdup(dev, bus_a2noc_clocks, + sizeof(bus_a2noc_clocks), GFP_KERNEL); + qp->num_clks = ARRAY_SIZE(bus_a2noc_clocks); } else { if (of_device_is_compatible(dev->of_node, "qcom,sdm660-bimc")) qp->is_bimc_node = true; From patchwork Tue Aug 24 04:34:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 12453953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60F06C4338F for ; Tue, 24 Aug 2021 04:34:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 49D9161356 for ; Tue, 24 Aug 2021 04:34:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229568AbhHXEfg (ORCPT ); Tue, 24 Aug 2021 00:35:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229615AbhHXEfg (ORCPT ); Tue, 24 Aug 2021 00:35:36 -0400 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A49ACC061757 for ; Mon, 23 Aug 2021 21:34:52 -0700 (PDT) Received: by mail-pl1-x636.google.com with SMTP id m4so435407pll.0 for ; Mon, 23 Aug 2021 21:34:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Nff3Tp8Tu+bjLX3ssyXcSoAVuinaN02903EEynfcyEI=; b=akyrO8UW4SNYZEpYM1TGkjrb18VxaZv24fdamHymXvkgr6Kfc1IY6qzydAlK3ADJO2 oDBT9JuHVRdKmasKr+SNTcGjFx/nAZnTW0sr0g3FAr6kKjJWeL69G02RtwQO3xY4yqHB GEf5Py2ddON8e4RMW4nWJv8lDICXf2aGT4YVv1EnMMG4PPm3pd0ct28OyCJzMfDBKtTc IhulrZ1eq3H3fOWByt4dSA0ajFxQaoYKzXGU64DXg7DSuLTFJqcTao6Kznpqmz1xFTD9 LZZx+2Ka56HW4GabUlUBQlFtfQl1mE82CwwUgwc6p1TTOIpASFAbLppRdP4hLn998i3A 1N4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Nff3Tp8Tu+bjLX3ssyXcSoAVuinaN02903EEynfcyEI=; b=RszxOXrxjh7XdbsKNYf3hswpekIEq5ag1wV0S6XtNzMS5ZRKJxKSU/hjodewJNKf/q u4+4ksRRnEeGvl37DUK4Yst7nUJr9yt7ghVzCxkmkFjUukyCwlYJfupQs/skl9HMr8B1 GiseMq6i/5TJwM0VuNdKvSPNzFrDLibuceTa6sGXZxcCr7WiJqOwBwWnJp2l6DxItU+E R3KS1h1Rh31YEnOPyRbE3hfvWnYWnDq3jvOUDWB8+NKTk8IOSWsryL7HDUp7896abvIw 0tuGq3xYXkXdsunzxwxl06gkST3g/CU5Sz770BKnliRgBh6mj4KX97pOkMoEX8LkV11t hRxw== X-Gm-Message-State: AOAM532YLZWlo6mzlhU6MkiVeGZhdlaqjPr7w/JlVIUUty/zVwCFOmh5 IBS4vgIRaz1k/mClh2hN3Gb1rQ== X-Google-Smtp-Source: ABdhPJwCrgQs+CNG8zpMXBnm0FQPFbYJnCkHn+S6Acaqfm8JfyI/nVXVussec6xNotV2x6onHOMUSQ== X-Received: by 2002:a17:902:c94b:b0:130:ad84:990a with SMTP id i11-20020a170902c94b00b00130ad84990amr18696165pla.1.1629779692226; Mon, 23 Aug 2021 21:34:52 -0700 (PDT) Received: from localhost.localdomain (80.251.214.228.16clouds.com. [80.251.214.228]) by smtp.gmail.com with ESMTPSA id p10sm789401pjv.39.2021.08.23.21.34.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Aug 2021 21:34:51 -0700 (PDT) From: Shawn Guo To: Georgi Djakov Cc: AngeloGioacchino Del Regno , Bjorn Andersson , Dmitry Baryshkov , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Guo Subject: [PATCH v2 3/3] arm64: dts: qcom: sdm630: Add missing a2noc qos clocks Date: Tue, 24 Aug 2021 12:34:35 +0800 Message-Id: <20210824043435.23190-4-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210824043435.23190-1-shawn.guo@linaro.org> References: <20210824043435.23190-1-shawn.guo@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Signed-off-by: Shawn Guo Reviewed-by: AngeloGioacchino Del Regno Acked-by: Georgi Djakov --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 9153e6616ba4..9c7f87e42fcc 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -654,9 +654,20 @@ compatible = "qcom,sdm660-a2noc"; reg = <0x01704000 0xc100>; #interconnect-cells = <1>; - clock-names = "bus", "bus_a"; + clock-names = "bus", + "bus_a", + "ipa", + "ufs_axi", + "aggre2_ufs_axi", + "aggre2_usb3_axi", + "cfg_noc_usb2_axi"; clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, + <&rpmcc RPM_SMD_IPA_CLK>, + <&gcc GCC_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_UFS_AXI_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&gcc GCC_CFG_NOC_USB2_AXI_CLK>; }; mnoc: interconnect@1745000 {