From patchwork Sat Dec 8 02:27:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 10719123 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ADC9A14E2 for ; Sat, 8 Dec 2018 02:27:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9DA9C29ECB for ; Sat, 8 Dec 2018 02:27:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 91C682D71E; Sat, 8 Dec 2018 02:27:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D0C829ECB for ; Sat, 8 Dec 2018 02:27:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726113AbeLHC1c (ORCPT ); Fri, 7 Dec 2018 21:27:32 -0500 Received: from us01smtprelay-2.synopsys.com ([198.182.47.9]:45514 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726070AbeLHC1c (ORCPT ); Fri, 7 Dec 2018 21:27:32 -0500 Received: from mailhost.synopsys.com (mailhost2.synopsys.com [10.13.184.66]) by smtprelay.synopsys.com (Postfix) with ESMTP id C881F24E05B9; Fri, 7 Dec 2018 18:27:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1544236051; bh=pg1hUK46eUNAF16CJuvSDi1HGvcfjuSL0QdiO35kR10=; h=Date:In-Reply-To:References:From:Subject:To:CC:From; b=brf7njFKIwS92y7gbb0vr0wUmEQQ5q4CZHDU5iGV9P6Xy/wEyUMxcDRw3ibQjLNcK EIF7TrhkNvBxDOSXCfrfWXvtK74yL7TeKph+K/0v8E6mTkN132Xlll2QRHeKAanlFN VG3tQcC6WExg82526THMui6fENB96OcIy61/v7YfYDUV5ORYNCEoIQraQt8FkUx2Bq 7fDGJFF7NPUTZMECZnyDzbG+FcNqdB8bNnq0D60N86ptoNBrh5EJQ/Kfdko8VE3GQU 4dV5av6N9rpyCOYsGnyIbWGCR9WXnkq/LN/VkcgRp7ys5xJBHsebI6U2QR2rTx2I/x kcE3PoOrnK8UQ== Received: from US01WEHTC2.internal.synopsys.com (us01wehtc2.internal.synopsys.com [10.12.239.237]) by mailhost.synopsys.com (Postfix) with ESMTP id B82163A81; Fri, 7 Dec 2018 18:27:31 -0800 (PST) Received: from US01WEHTC1.internal.synopsys.com (10.12.239.236) by US01WEHTC2.internal.synopsys.com (10.12.239.237) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:27:31 -0800 Received: from te-lab16 (10.13.184.20) by us01wehtc1.internal.synopsys.com (10.12.239.236) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:27:30 -0800 Received: by te-lab16 (sSMTP sendmail emulation); Fri, 07 Dec 2018 18:27:30 -0800 Date: Fri, 7 Dec 2018 18:27:30 -0800 Message-ID: <83adc98adc1760a0fad87d81d171e1dac783e7e5.1544235317.git.thinhn@synopsys.com> In-Reply-To: References: From: Thinh Nguyen Subject: [PATCH v2 1/4] usb: dwc3: Add property snps,refclk-period-ns To: Felipe Balbi , , , Rob Herring , Mark Rutland CC: John Youn MIME-Version: 1.0 X-Originating-IP: [10.13.184.20] Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch introduces property "snps,refclk-period-ns" to inform the controller of the reference clock period. If the reference clock period is different from the default Core Consultant setting, then this property can be set to the reference clock period. This property does not control the reference clock rate. The controller uses this value to perform internal timing calculations that are based on the reference clock. Signed-off-by: Thinh Nguyen --- Changes in v2: - Split from "usb: dwc3: Add reference clock properties" - Revise commit message and property description Documentation/devicetree/bindings/usb/dwc3.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index 8e5265e9f658..b7e67edff9b2 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -99,6 +99,8 @@ Optional properties: this and tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31 programming guide section 1.2.3) to enable periodic ESS TX threshold. + - snps,refclk-period-ns: if set, this value informs the controller of the + reference clock period in nanoseconds. - tx-fifo-resize: determines if the FIFO *has* to be reallocated. - snps,incr-burst-type-adjustment: Value for INCR burst type of GSBUSCFG0 From patchwork Sat Dec 8 02:27:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 10719125 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DC4B318A7 for ; Sat, 8 Dec 2018 02:27:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CCD8D29ECB for ; Sat, 8 Dec 2018 02:27:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C160E2D71E; Sat, 8 Dec 2018 02:27:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5FBE029ECB for ; Sat, 8 Dec 2018 02:27:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726124AbeLHC1i (ORCPT ); Fri, 7 Dec 2018 21:27:38 -0500 Received: from smtprelay2.synopsys.com ([198.182.60.111]:41132 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726070AbeLHC1i (ORCPT ); Fri, 7 Dec 2018 21:27:38 -0500 Received: from mailhost.synopsys.com (mailhost2.synopsys.com [10.13.184.66]) by smtprelay.synopsys.com (Postfix) with ESMTP id 6E29710C1780; Fri, 7 Dec 2018 18:27:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1544236058; bh=s4vh0yEC//cqXq8qHIgSB8ZMjgRF4bZi362ZAD6OcxU=; h=Date:In-Reply-To:References:From:Subject:To:CC:From; b=mAnTxJpbh/wJoNlku7M6+06HhVWKoxsV067weMRZGw8flwjI2+dkzXmXKg4/WLlRJ hXmIz0NuLZdL+rWDgOO6PWwlqvoFJFjcT6G8xuF42ig6hz8wkdNsvuVv7RuBjiQwea fkF5a3JEciB1s330B2Z9/TYCe3dWrFjEbDKZ3IcBww7Ex1dxAJlXMcRYLkXypTkgJQ ToIpqqgizCmaAZSAFrgkKcx0MitECUWVTRRPzVh/lFbCwqmROdnm8GSSLm9ZoHfStf Jh8mIHajqgopq0GIA1mtm/eo0eN9pphwgieaGj1Uw3JIylbfzR2SssQeVUli2Z/K9K VN/zSrkxxoisg== Received: from US01WEHTC3.internal.synopsys.com (us01wehtc3.internal.synopsys.com [10.15.84.232]) by mailhost.synopsys.com (Postfix) with ESMTP id 5893D3A92; Fri, 7 Dec 2018 18:27:38 -0800 (PST) Received: from US01WEHTC1.internal.synopsys.com (10.12.239.236) by US01WEHTC3.internal.synopsys.com (10.15.84.232) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:27:38 -0800 Received: from te-lab16 (10.13.184.20) by us01wehtc1.internal.synopsys.com (10.12.239.236) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:27:36 -0800 Received: by te-lab16 (sSMTP sendmail emulation); Fri, 07 Dec 2018 18:27:36 -0800 Date: Fri, 7 Dec 2018 18:27:36 -0800 Message-ID: In-Reply-To: References: From: Thinh Nguyen Subject: [PATCH v2 2/4] usb: dwc3: Set the reference clock period To: Felipe Balbi , CC: John Youn MIME-Version: 1.0 X-Originating-IP: [10.13.184.20] Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch writes the reference clock period provided from the device property to GUCTL.REFCLKPER. This value informs the controller of the reference clock period if the default Core Consultant setting GUCTL.REFCLKPER is different. Typical reference clock periods are 25, 41, 50, 52, 58, and 62ns. Signed-off-by: Thinh Nguyen --- Changes in v2: - Remove reference clock period validations - Revise commit message drivers/usb/dwc3/core.c | 9 +++++++++ drivers/usb/dwc3/core.h | 4 ++++ 2 files changed, 13 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index a1b126f90261..32c38f71f874 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -962,6 +962,13 @@ static int dwc3_core_init(struct dwc3 *dwc) goto err4; } + if (dwc->refclk_period_ns) { + reg = dwc3_readl(dwc->regs, DWC3_GUCTL); + reg &= ~DWC3_GUCTL_REFCLKPER(~0); + reg |= DWC3_GUCTL_REFCLKPER(dwc->refclk_period_ns); + dwc3_writel(dwc->regs, DWC3_GUCTL, reg); + } + /* * ENDXFER polling is available on version 3.10a and later of * the DWC_usb3 controller. It is NOT available in the @@ -1254,6 +1261,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) "snps,usb3_lpm_capable"); dwc->usb2_lpm_disable = device_property_read_bool(dev, "snps,usb2-lpm-disable"); + device_property_read_u8(dev, "snps,refclk-period-ns", + &dwc->refclk_period_ns); device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", &rx_thr_num_pkt_prd); device_property_read_u8(dev, "snps,rx-max-burst-prd", diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index df876418cb78..e190728104e0 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -247,6 +247,7 @@ /* Global User Control Register */ #define DWC3_GUCTL_HSTINAUTORETRY BIT(14) +#define DWC3_GUCTL_REFCLKPER(n) (((n) & 0x3ff) << 22) /* Global User Control 1 Register */ #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) @@ -1017,6 +1018,8 @@ struct dwc3_scratchpad_array { * change quirk. * @dis_tx_ipgap_linecheck_quirk: set if we disable u2mac linestate * check during HS transmit. + * @refclk_period_ns: if set, inform the controller this value as the reference + * clock period in nanoseconds. * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk * @tx_de_emphasis: Tx de-emphasis value * 0 - -6dB de-emphasis @@ -1169,6 +1172,7 @@ struct dwc3 { u8 rx_max_burst_prd; u8 tx_thr_num_pkt_prd; u8 tx_max_burst_prd; + u8 refclk_period_ns; const char *hsphy_interface; From patchwork Sat Dec 8 02:27:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 10719127 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9A25418A7 for ; Sat, 8 Dec 2018 02:27:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A6E929ECB for ; Sat, 8 Dec 2018 02:27:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7E9B92D71E; Sat, 8 Dec 2018 02:27:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2BB3E29ECB for ; Sat, 8 Dec 2018 02:27:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726126AbeLHC1p (ORCPT ); Fri, 7 Dec 2018 21:27:45 -0500 Received: from smtprelay4.synopsys.com ([198.182.47.9]:45520 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726070AbeLHC1p (ORCPT ); Fri, 7 Dec 2018 21:27:45 -0500 Received: from mailhost.synopsys.com (mailhost3.synopsys.com [10.12.238.238]) by smtprelay.synopsys.com (Postfix) with ESMTP id CA60524E062E; Fri, 7 Dec 2018 18:27:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1544236064; bh=rdSTznapJllTPBNgynndcRvRaXmoijFTEWxr8I3HR1A=; h=Date:In-Reply-To:References:From:Subject:To:CC:From; b=RR3UkGByaeEo5GPhcPaG5zQwzgwLLEmMARnCL8CoUi5qNU9xbTdb/a+Jmo8gnCl9Z jgr2PmZnSlaS2w1V6T50ckPxNZlbN0uHc8clDyJShgym59xRTwu2qAe7vDOtxP4BF9 fb4dmAvaD8c5PJDTLudF3aBNWnytoSILYVzDmMRMFeFTC7fRnAOMfyyDQscn647YsY a7iuazQT8ePG7vwgUo0l1ZoJiX875osZahiCyeCpy9IUbAdUJwaCClIeZq1q8htVKh Z2Aff9m3GudFrZsBH2aqA43U1H7sT+SFMZ0MqGfq4ZMGLupPRNbW1pyjRFGlymQIYN bjrLrWTPm5ZSg== Received: from US01WEHTC2.internal.synopsys.com (us01wehtc2-vip.internal.synopsys.com [10.12.239.238]) by mailhost.synopsys.com (Postfix) with ESMTP id B385D3824; Fri, 7 Dec 2018 18:27:44 -0800 (PST) Received: from US01WEHTC1.internal.synopsys.com (10.12.239.236) by US01WEHTC2.internal.synopsys.com (10.12.239.237) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:27:44 -0800 Received: from te-lab16 (10.13.184.20) by us01wehtc1.internal.synopsys.com (10.12.239.236) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:27:43 -0800 Received: by te-lab16 (sSMTP sendmail emulation); Fri, 07 Dec 2018 18:27:43 -0800 Date: Fri, 7 Dec 2018 18:27:43 -0800 Message-ID: In-Reply-To: References: From: Thinh Nguyen Subject: [PATCH v2 3/4] usb: dwc3: Add property snps,enable-refclk-sof To: Felipe Balbi , , , Rob Herring , Mark Rutland CC: John Youn MIME-Version: 1.0 X-Originating-IP: [10.13.184.20] Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a property to enable the controller to track the frame number based on the reference clock. When operating in USB 2.0 mode, the peripheral controller uses the USB2 PHY clocks to track the frame number. This prevents the controller from suspending the USB2 PHY when the device goes into low power. Version 1.80a of the DWC_usb31 peripheral controller introduces a way to track frame number based on the reference clock instead. This feature allows the controller to suspend the USB2 PHY when the device goes into low power. This improves power saving for devices that have isochronous endpoints. Signed-off-by: Thinh Nguyen --- Changes in v2: - Revise property description - Rename property from snps,enable-refclk-lpm to snps,enable-refclk-sof Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index b7e67edff9b2..01b948fff0eb 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -101,6 +101,9 @@ Optional properties: enable periodic ESS TX threshold. - snps,refclk-period-ns: if set, this value informs the controller of the reference clock period in nanoseconds. + - snps,enable-refclk-sof: set to enable reference clock based frame number + tracking while in low power, allowing the controller to + suspend the PHY during low power states. - tx-fifo-resize: determines if the FIFO *has* to be reallocated. - snps,incr-burst-type-adjustment: Value for INCR burst type of GSBUSCFG0 From patchwork Sat Dec 8 02:28:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thinh Nguyen X-Patchwork-Id: 10719129 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9A8EC14E2 for ; Sat, 8 Dec 2018 02:28:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 861F92D5C9 for ; Sat, 8 Dec 2018 02:28:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 75A722D5D3; Sat, 8 Dec 2018 02:28:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E793A2D5C9 for ; Sat, 8 Dec 2018 02:28:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726073AbeLHC2v (ORCPT ); Fri, 7 Dec 2018 21:28:51 -0500 Received: from smtprelay.synopsys.com ([198.182.47.9]:45540 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726065AbeLHC2v (ORCPT ); Fri, 7 Dec 2018 21:28:51 -0500 Received: from mailhost.synopsys.com (mailhost1.synopsys.com [10.12.238.239]) by smtprelay.synopsys.com (Postfix) with ESMTP id E91CF24E062E; Fri, 7 Dec 2018 18:28:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1544236130; bh=O0XAu76lfTNQ9vtJJMCIXTB01SVj9lQag8vrzrRNP4M=; h=Date:In-Reply-To:References:From:Subject:To:CC:From; b=FeCxYau8Ngri9DboQOI8liwOd+AAe155Iece4insjX0adqJI2l3SSIjYwtfsXBKeV gYZ8Ernl3RV0InMoKZzukKrd/WwlGNpm84VDipZGpjjQ+VYylPFNzZtfipn70PBhY1 0t6ipb/EJnWNynzeOmpg6boJp7GNB7QYYSZiEQWH4/W1JrzgRh+oGaFMIcwdC5OyIb pw45hoCfFdcEmsxlTT7CrVXvU1AHxd7xHm7Ei9pJSTpVDsdoN81JvyZWYjmH2y254+ PP6nQsUOv3MUTxa+LsjM51vSDHVtL+qYFFcNOhIKjbBN6ka/CTnnY8IIaix3kSSIgf 6QOeH9FwSJVJg== Received: from US01WXQAHTC1.internal.synopsys.com (us01wxqahtc1.internal.synopsys.com [10.12.238.230]) by mailhost.synopsys.com (Postfix) with ESMTP id D6B4B5444; Fri, 7 Dec 2018 18:28:50 -0800 (PST) Received: from US01WEHTC1.internal.synopsys.com (10.12.239.236) by US01WXQAHTC1.internal.synopsys.com (10.12.238.230) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:28:50 -0800 Received: from te-lab16 (10.13.184.20) by us01wehtc1.internal.synopsys.com (10.12.239.236) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 7 Dec 2018 18:28:49 -0800 Received: by te-lab16 (sSMTP sendmail emulation); Fri, 07 Dec 2018 18:28:49 -0800 Date: Fri, 7 Dec 2018 18:28:49 -0800 Message-ID: In-Reply-To: References: From: Thinh Nguyen Subject: [PATCH v2 4/4] usb: dwc3: Enable frame number tracking based on reference clock To: Felipe Balbi , CC: John Youn MIME-Version: 1.0 X-Originating-IP: [10.13.184.20] Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Version 1.80a of the DWC_usb31 peripheral controller introduced a feature to track the frame number based the reference clock. This patch checks and enables this feature. When operating in USB 2.0 mode, the peripheral controller uses the USB2 PHY clocks to track the frame number. This prevents the controller from suspending the USB2 PHY when the device goes into low power. This feature allows the controller to suspend the USB2 PHY when the device enters low power. This improves power saving for devices that have isochronous endpoints. Signed-off-by: Thinh Nguyen --- Changes in v2: - Revise commit message - Properly check for version and controller type drivers/usb/dwc3/core.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 12 ++++++++++++ 2 files changed, 63 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 32c38f71f874..38597a32cb20 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -882,6 +882,39 @@ static void dwc3_set_incr_burst_type(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); } +/** + * dwc3_enable_refclk_sof - Enable frame number tracking based on ref_clk + * @dwc: Pointer to our controller context structure + * + * Returns 0 on success, otherwise negative errno. + */ +static int dwc3_enable_refclk_sof(struct dwc3 *dwc) +{ + u8 refclk_period_ns; + u32 reg; + + reg = dwc3_readl(dwc->regs, DWC3_GUCTL); + refclk_period_ns = DWC3_GUCTL_GET_REFCLKPER(reg); + + /* Only valid for the following reference clock periods */ + switch (refclk_period_ns) { + case DWC3_GUCTL_REFCLKPER_25NS: + case DWC3_GUCTL_REFCLKPER_41NS: + case DWC3_GUCTL_REFCLKPER_50NS: + case DWC3_GUCTL_REFCLKPER_52NS: + case DWC3_GUCTL_REFCLKPER_58NS: + case DWC3_GUCTL_REFCLKPER_62NS: + break; + default: + return -EINVAL; + } + + reg = dwc3_readl(dwc->regs, DWC3_GFLADJ); + reg |= DWC3_GFLADJ_REFCLK_FLADJ; + dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); + return 0; +} + /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure @@ -969,6 +1002,22 @@ static int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL, reg); } + /* + * For peripheral controller, frame number tracking based on reference + * clock is only introduced after DWC_usb31 version 1.80a. + */ + if (dwc->enable_refclk_sof && + (dwc->dr_mode != USB_DR_MODE_PERIPHERAL || + (dwc->dr_mode == USB_DR_MODE_PERIPHERAL && + dwc->revision >= DWC3_USB31_REVISION_180A))) { + ret = dwc3_enable_refclk_sof(dwc); + if (ret) { + dev_err(dwc->dev, + "can't enable ref_clk frame tracking\n"); + goto err4; + } + } + /* * ENDXFER polling is available on version 3.10a and later of * the DWC_usb3 controller. It is NOT available in the @@ -1261,6 +1310,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) "snps,usb3_lpm_capable"); dwc->usb2_lpm_disable = device_property_read_bool(dev, "snps,usb2-lpm-disable"); + dwc->enable_refclk_sof = device_property_read_bool(dev, + "snps,enable-refclk-sof"); device_property_read_u8(dev, "snps,refclk-period-ns", &dwc->refclk_period_ns); device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index e190728104e0..dae2f918a932 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -248,6 +248,14 @@ /* Global User Control Register */ #define DWC3_GUCTL_HSTINAUTORETRY BIT(14) #define DWC3_GUCTL_REFCLKPER(n) (((n) & 0x3ff) << 22) +#define DWC3_GUCTL_GET_REFCLKPER(n) (((n) & (0x3ff << 22)) >> 22) + +#define DWC3_GUCTL_REFCLKPER_25NS 25 +#define DWC3_GUCTL_REFCLKPER_41NS 41 +#define DWC3_GUCTL_REFCLKPER_50NS 50 +#define DWC3_GUCTL_REFCLKPER_52NS 52 +#define DWC3_GUCTL_REFCLKPER_58NS 58 +#define DWC3_GUCTL_REFCLKPER_62NS 62 /* Global User Control 1 Register */ #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) @@ -365,6 +373,7 @@ #define DWC3_GHWPARAMS7_RAM2_DEPTH(n) (((n) >> 16) & 0xffff) /* Global Frame Length Adjustment Register */ +#define DWC3_GFLADJ_REFCLK_FLADJ BIT(23) #define DWC3_GFLADJ_30MHZ_SDBND_SEL BIT(7) #define DWC3_GFLADJ_30MHZ_MASK 0x3f @@ -1020,6 +1029,7 @@ struct dwc3_scratchpad_array { * check during HS transmit. * @refclk_period_ns: if set, inform the controller this value as the reference * clock period in nanoseconds. + * @enable_refclk_sof: set to enable frame number tracking based on the ref_clk * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk * @tx_de_emphasis: Tx de-emphasis value * 0 - -6dB de-emphasis @@ -1135,6 +1145,7 @@ struct dwc3 { #define DWC3_USB31_REVISION_120A (0x3132302a | DWC3_REVISION_IS_DWC31) #define DWC3_USB31_REVISION_160A (0x3136302a | DWC3_REVISION_IS_DWC31) #define DWC3_USB31_REVISION_170A (0x3137302a | DWC3_REVISION_IS_DWC31) +#define DWC3_USB31_REVISION_180A (0x3138302a | DWC3_REVISION_IS_DWC31) u32 version_type; @@ -1192,6 +1203,7 @@ struct dwc3 { unsigned dis_start_transfer_quirk:1; unsigned usb3_lpm_capable:1; unsigned usb2_lpm_disable:1; + unsigned enable_refclk_sof:1; unsigned disable_scramble_quirk:1; unsigned u2exit_lfps_quirk:1;