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Fri, 27 Aug 2021 18:45:22 -0500 From: Fangzhi Zuo To: CC: , , , , Fangzhi Zuo Subject: [PATCH 1/2] drm: Update MST First Link Slot Information Based on Encoding Format Date: Fri, 27 Aug 2021 19:43:21 -0400 Message-ID: <20210827234322.2740301-2-Jerry.Zuo@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210827234322.2740301-1-Jerry.Zuo@amd.com> References: <20210827234322.2740301-1-Jerry.Zuo@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a127a7c7-b6a2-47b8-0a07-08d969b4bded X-MS-TrafficTypeDiagnostic: BN6PR1201MB0211: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2449; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Dqid7rNQiwgcruCWuVbTqgEinJYmKmA6+tGAuVUOmmSOmfF/Xc+Av3XFnQkxp8QtpIhJ6crHogy6daFKn5hsO7vmaXlu1SxWhMiNk0lhu4LTLvc1WyeI5BsbbuvJnBphidrnOuuI6iI27qURVa1YK5VYpfihOLr4eWV5RKdjjQ9MNkr/M8Rcuxna9SiTdRpMDiThJ/+YJIyQvYOccN99HdYhZRKixoN1TYTPNyIuDWT0NVhddzwa5tLBNPzfXo1m24tXPceQzs5dwrEUDF4bs/ETTnZ0Uk+xHrwDVDfNeFx8FXHKnaOf9n2EoxhBXu/V5/lhEfBbyNAZx0eoSC+v+xVTTvEYRhAVvWxKK/OwU3C3S0IxOA1iAZeGMNQx56GFuxDBB741jb0yWgXBmIbGsYZWqSsN+uUVRSR9KW2cl0D4j8V7AHLReihBDHQQDNqtvcwwRNZGRv3I0ig4p548BlGYXCYXojQvn7KEitxBbeQTyExF7E4rCUTfvUGGJktcj3OM/BlhX1v4cXgcGoO4EHwkg7EB5gfhRcUGmp06sqloIhYYBO5LLTxTmKURvueEm2FC2GOmwasxnJFsLxnzFnATjhIReFYcf1fwDX9nGb0ZXu7VAzKYRW9iGWWwDDKFAGunyWbMJ7j5v7Qh80qYTU9gVOylzf3jjMiX70TDBVBvXYL1hFbv+4Tlw0xM3uqZxmXi59NVZ6B4xhbsNef0Gd2w5Fl5mgCy0XSaXEpP+aE= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Real data transmission starts from the second slot, with a total of available 63 slots available. In 128b/132b encoding format, metadata is transmitted separately in LLCP packet before MTP. Real data transmission starts from the first slot, with a total of 64 slots available. Signed-off-by: Fangzhi Zuo Reported-by: kernel test robot --- drivers/gpu/drm/drm_dp_mst_topology.c | 27 ++++++++++++++++++++------- include/drm/drm_dp_mst_helper.h | 9 +++++++++ 2 files changed, 29 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index 86d13d6bc463..30544801d2b8 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -3370,7 +3370,7 @@ int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr) struct drm_dp_payload req_payload; struct drm_dp_mst_port *port; int i, j; - int cur_slots = 1; + int cur_slots = mgr->start_slot; bool skip; mutex_lock(&mgr->payload_lock); @@ -4323,7 +4323,7 @@ int drm_dp_find_vcpi_slots(struct drm_dp_mst_topology_mgr *mgr, num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div); /* max. time slots - one slot for MTP header */ - if (num_slots > 63) + if (num_slots > mgr->total_avail_slots) return -ENOSPC; return num_slots; } @@ -4335,7 +4335,7 @@ static int drm_dp_init_vcpi(struct drm_dp_mst_topology_mgr *mgr, int ret; /* max. time slots - one slot for MTP header */ - if (slots > 63) + if (slots > mgr->total_avail_slots) return -ENOSPC; vcpi->pbn = pbn; @@ -4509,6 +4509,17 @@ int drm_dp_atomic_release_vcpi_slots(struct drm_atomic_state *state, } EXPORT_SYMBOL(drm_dp_atomic_release_vcpi_slots); +void drm_dp_mst_update_encoding_cap(struct drm_dp_mst_topology_mgr *mgr, uint8_t link_encoding_cap) +{ + if (link_encoding_cap == DP_CAP_ANSI_128B132B) { + mgr->total_avail_slots = 64; + mgr->start_slot = 0; + } + DRM_DEBUG_KMS("%s encoding format determined\n", + (link_encoding_cap == DP_CAP_ANSI_128B132B) ? "128b/132b" : "8b/10b"); +} +EXPORT_SYMBOL(drm_dp_mst_update_encoding_cap); + /** * drm_dp_mst_allocate_vcpi() - Allocate a virtual channel * @mgr: manager for this port @@ -4540,8 +4551,8 @@ bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn, slots); if (ret) { - drm_dbg_kms(mgr->dev, "failed to init vcpi slots=%d max=63 ret=%d\n", - DIV_ROUND_UP(pbn, mgr->pbn_div), ret); + drm_dbg_kms(mgr->dev, "failed to init vcpi slots=%d max=%d ret=%d\n", + DIV_ROUND_UP(pbn, mgr->pbn_div), mgr->total_avail_slots, ret); drm_dp_mst_topology_put_port(port); goto out; } @@ -5228,7 +5239,7 @@ drm_dp_mst_atomic_check_vcpi_alloc_limit(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_topology_state *mst_state) { struct drm_dp_vcpi_allocation *vcpi; - int avail_slots = 63, payload_count = 0; + int avail_slots = mgr->total_avail_slots, payload_count = 0; list_for_each_entry(vcpi, &mst_state->vcpis, next) { /* Releasing VCPI is always OK-even if the port is gone */ @@ -5257,7 +5268,7 @@ drm_dp_mst_atomic_check_vcpi_alloc_limit(struct drm_dp_mst_topology_mgr *mgr, } } drm_dbg_atomic(mgr->dev, "[MST MGR:%p] mst state %p VCPI avail=%d used=%d\n", - mgr, mst_state, avail_slots, 63 - avail_slots); + mgr, mst_state, avail_slots, mgr->total_avail_slots - avail_slots); return 0; } @@ -5529,6 +5540,8 @@ int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, if (!mgr->proposed_vcpis) return -ENOMEM; set_bit(0, &mgr->payload_mask); + mgr->total_avail_slots = 63; + mgr->start_slot = 1; mst_state = kzalloc(sizeof(*mst_state), GFP_KERNEL); if (mst_state == NULL) diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index ddb9231d0309..eac5ce48f214 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -661,6 +661,15 @@ struct drm_dp_mst_topology_mgr { */ int pbn_div; + /** + * @total_avail_slots: available slots for data transmission + */ + u8 total_avail_slots; + /** + * @start_slot: first slot index for data transmission + */ + u8 start_slot; + /** * @funcs: Atomic helper callbacks */ From patchwork Fri Aug 27 23:43:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zuo, Jerry" X-Patchwork-Id: 12462997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9073C432BE for ; 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Decide MST Link Encoding Cap 2. Update MST First Link Slot Information Signed-off-by: Fangzhi Zuo Reported-by: kernel test robot --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++- .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 10 ++++++++++ .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h | 2 ++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 986c9d29d686..90edf0eae786 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -2302,6 +2302,7 @@ static int dm_resume(void *handle) dc_sink_release(aconnector->dc_sink); aconnector->dc_sink = NULL; amdgpu_dm_update_connector_after_detect(aconnector); + get_mst_link_encoding_cap(aconnector); mutex_unlock(&aconnector->hpd_lock); } drm_connector_list_iter_end(&iter); @@ -2673,6 +2674,7 @@ static void handle_hpd_irq(void *param) if (aconnector->base.force == DRM_FORCE_UNSPECIFIED) drm_kms_helper_hotplug_event(dev); } + get_mst_link_encoding_cap(aconnector); mutex_unlock(&aconnector->hpd_lock); } @@ -3844,7 +3846,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) amdgpu_dm_set_psr_caps(link); } - + get_mst_link_encoding_cap(aconnector); } /* Software is initialized. Now we can register interrupt handlers. */ diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 5568d4e518e6..2f029cbdd3f8 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -439,6 +439,16 @@ static const struct drm_dp_mst_topology_cbs dm_mst_cbs = { .add_connector = dm_dp_add_mst_connector, }; +void get_mst_link_encoding_cap(struct amdgpu_dm_connector *aconnector) +{ + u8 link_encoding_cap; + + if (aconnector->dc_link->type == dc_connection_mst_branch) { + link_encoding_cap = dc_link_dp_mst_decide_link_encoding_format(aconnector->dc_link); + drm_dp_mst_update_coding_cap(&aconnector->mst_mgr, link_encoding_cap); + } +} + void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, struct amdgpu_dm_connector *aconnector, int link_index) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h index b38bd68121ce..8339053b2b70 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h @@ -35,6 +35,8 @@ void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, struct amdgpu_dm_connector *aconnector, int link_index); +void get_mst_link_encoding_cap(struct amdgpu_dm_connector *aconnector); + void dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev);