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Sun, 9 Dec 2018 22:51:13 +0100 (CET) From: Lukasz Majewski To: Shawn Guo , Rob Herring , Mark Rutland Subject: [PATCH v2] ARM: dts: vf610-bk4: Provide support for reading ID code from MVB device Date: Sun, 9 Dec 2018 22:50:56 +0100 Message-Id: <20181209215056.22027-1-lukma@denx.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20181113121213.14296-1-lukma@denx.de> References: <20181113121213.14296-1-lukma@denx.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181209_135130_982275_F587360C X-CRM114-Status: GOOD ( 13.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Sascha Hauer , linux-kernel@vger.kernel.org, Stefan Agner , Lukasz Majewski , Pengutronix Kernel Team , Fabio Estevam , Fabio Estevam , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The procedure to read this ID value is as follows: rmmod spi_fsl_dspi insmod spi-gpio.ko echo 504 > /sys/class/gpio/export cat /sys/class/gpio/gpio504/value ... echo 511 > /sys/class/gpio/export cat /sys/class/gpio/gpio511/value rmmod spi-gpio.ko insmod spi_fsl_dspi Signed-off-by: Lukasz Majewski --- Changes for v2: - Add 'vf610-bk4:' to mail topic - Change spi_gpio -> spi-gpio node name - Change '72xx165' -> 'gpio' as described in Documentation/devicetree/bindings/gpio/gpio-pisosr.txt --- arch/arm/boot/dts/vf610-bk4.dts | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts index cab95714c058..c59a8922ccd5 100644 --- a/arch/arm/boot/dts/vf610-bk4.dts +++ b/arch/arm/boot/dts/vf610-bk4.dts @@ -59,6 +59,29 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + spi-gpio { + compatible = "spi-gpio"; + pinctrl-0 = <&pinctrl_gpio_spi>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + /* PTD12 ->RPIO[91] */ + sck-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; + /* PTD10 ->RPIO[89] */ + miso-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + + gpio@0 { + compatible = "pisosr-gpio"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + /* PTB18 -> RGPIO[40] */ + load-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + spi-max-frequency = <100000>; + }; + }; }; &adc0 { @@ -430,6 +453,14 @@ >; }; + pinctrl_gpio_spi: pinctrl-gpio-spi { + fsl,pins = < + VF610_PAD_PTB18__GPIO_40 0x1183 + VF610_PAD_PTD10__GPIO_89 0x1183 + VF610_PAD_PTD12__GPIO_91 0x1183 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < VF610_PAD_PTA22__I2C2_SCL 0x34df