From patchwork Fri Sep 17 13:26:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12502107 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E77BC433EF for ; Fri, 17 Sep 2021 13:26:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 749C861029 for ; Fri, 17 Sep 2021 13:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241194AbhIQN1q (ORCPT ); Fri, 17 Sep 2021 09:27:46 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:65396 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240304AbhIQN1m (ORCPT ); Fri, 17 Sep 2021 09:27:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1631885180; x=1663421180; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZteNawmbv4Sdi7TpSPUuM6H+rJRUfsfKEZUdQxRqnqk=; b=ZW686R7Q5jCdvkQ9wOzgehFwOGNogV/bBpB7M98RmWfcmIkJGwKOr8Ve /XNXeZFITvoc3c8TXJkqX3X8b1EXSPsDPUK+pPVdKUZsuzpPu1STzXnGk vOtI3JS5M8HbcQ8qjxQMuu89wENtFSb65bAbPVx39dBrqaQI/M2D1nWT+ nYhSBGzGfZDSzSpsKhqvAIUtcs7Qvbq/UfPDsSTYOxDqkFj+dTbNUim26 fsGNpOZ1XvfLecCJ0grNll4NE16OjRmhSCfTN9S+EFd7SUsHMiTmLuOhv XvY9N1rthro7KbXFUKQI1yalbTtjyEdXtQOdFrdxroA4SHAG6xR1uwFtc A==; IronPort-SDR: oBM2aeHs9Eaereman5ljk3Gp2QD7DasB+Okndk/TBxyZG/lmpTtdrll7cqFtBK4Zbq4CIJ8inT klkzR6YZbM1Dmw2qjylhLcrsZkgmzJpyZwl+59cKpqBoDUkSWErbJXrWq4q8sPvRYB2T9N0Cdr Gdqs+icqH5HtJA6fPd50VV8E+t51GDT5p1qkr7BvvxAaVZfef7umprA1r93bkr02RFCt6qxfhb jIjpg3w7w4GLMfFGEZcBp8Kd9NI/GOB2iI4Z1hNsNZEmPVNimWLwbT9tRETdwDWGj2wTDTiK2c AsVuWWZP2b2e8v0QWtgPsDK7 X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="144542055" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Sep 2021 06:26:20 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 17 Sep 2021 06:26:20 -0700 Received: from rob-dk-mpu01.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 17 Sep 2021 06:26:18 -0700 From: Claudiu Beznea To: , , CC: , , Claudiu Beznea Subject: [PATCH v2 1/4] net: macb: add description for SRTSM Date: Fri, 17 Sep 2021 16:26:12 +0300 Message-ID: <20210917132615.16183-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20210917132615.16183-1-claudiu.beznea@microchip.com> References: <20210917132615.16183-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add description for SRTSM bit. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre --- drivers/net/ethernet/cadence/macb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index d8d87213697c..d1e0e116b976 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -243,7 +243,7 @@ #define MACB_NCR_TPF_SIZE 1 #define MACB_TZQ_OFFSET 12 /* Transmit zero quantum pause frame */ #define MACB_TZQ_SIZE 1 -#define MACB_SRTSM_OFFSET 15 +#define MACB_SRTSM_OFFSET 15 /* Store Receive Timestamp to Memory */ #define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */ #define MACB_OSSMODE_SIZE 1 From patchwork Fri Sep 17 13:26:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12502109 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADDD9C433F5 for ; Fri, 17 Sep 2021 13:26:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 973AE6124B for ; Fri, 17 Sep 2021 13:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241670AbhIQN1t (ORCPT ); Fri, 17 Sep 2021 09:27:49 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:65396 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240673AbhIQN1o (ORCPT ); Fri, 17 Sep 2021 09:27:44 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1631885182; x=1663421182; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z5kUp4BlYTrUwk27Td3SSTmyT60LQbedlrzEo2pwH6A=; b=iv6koHkDR2tQF5MYUN0i4aVHvvaKwvf2QcO0RCZ8dmOmQMzXojQsmv4R ap84ky7z+MgcSY1SXD0zyIT5zC5njYsiqOJgYmsbeK6GrxxpP4+w2HkR0 yNDm/leO0xKGvkPtoGRFD1QBHJjOit33VJdcNN3kmXweuKeenPHKl3PhX X09WiT/OX//2JpTpyYKyQshmTJK+vm7fFSoSN68DM+ZSB45g+tEB2mwTw UtQAEaVq81xz30PD+5TRjYIDnESPY9kcvE5cqh1AO5FwxZZ2gexztfuVa enVqc/8e4lXznYCiz2AzK8vG6y7Vtcrvz+L1z613IMnQS6X/kVd5h6kwN Q==; IronPort-SDR: 3tD0c1bPxPQ0fqJQ28psQVJ0w1qat2O0pJw2AsllyrwNIcWYX+WROr72mVpyQmqYx+LqswEsjV 0RdqxFVbvAy5S/WW99cqN07GsRHxU1RTjq6bNnBG8Y672TiL+IVZ+E0eHOUyzPuAfKm/sNWbbd M7WCE3NMmnmIPOpZCGyMqkOvFfSbgAiKxJqG58K4NIH4TJkLEJctgdeFQJcBlkxisCSuAyxwlQ z+lJ37uCl4KMhRi4Q8FH5gANxS00BXgf+islwcJYZvSa7f6uQF95Q7cM5lc16MW8MNIZ4y8lT6 gJtBAkGbvQtOSh5laR7BrBw0 X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="144542062" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Sep 2021 06:26:21 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 17 Sep 2021 06:26:21 -0700 Received: from rob-dk-mpu01.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 17 Sep 2021 06:26:20 -0700 From: Claudiu Beznea To: , , CC: , , Claudiu Beznea Subject: [PATCH v2 2/4] net: macb: align for OSSMODE offset Date: Fri, 17 Sep 2021 16:26:13 +0300 Message-ID: <20210917132615.16183-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20210917132615.16183-1-claudiu.beznea@microchip.com> References: <20210917132615.16183-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Align for OSSMODE offset. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre --- drivers/net/ethernet/cadence/macb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index d1e0e116b976..c33e98bfa5e8 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -244,7 +244,7 @@ #define MACB_TZQ_OFFSET 12 /* Transmit zero quantum pause frame */ #define MACB_TZQ_SIZE 1 #define MACB_SRTSM_OFFSET 15 /* Store Receive Timestamp to Memory */ -#define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */ +#define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */ #define MACB_OSSMODE_SIZE 1 /* Bitfields in NCFGR */ From patchwork Fri Sep 17 13:26:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12502113 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92C57C433EF for ; Fri, 17 Sep 2021 13:26:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7309C61029 for ; Fri, 17 Sep 2021 13:26:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244909AbhIQN17 (ORCPT ); Fri, 17 Sep 2021 09:27:59 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:35300 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241298AbhIQN1q (ORCPT ); Fri, 17 Sep 2021 09:27:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1631885184; x=1663421184; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PEhpboyKYhkZA63XA+bUNRdGy3auCyFQHbq/E5LZgck=; b=fAgORmlWDjY0EJNmbfSQk9VUKi9xY11El3HIG80Meam0N2rTNSwnW2gO /AKv86SZpzFw/0aMSvMLjiSnmWe1ER5nLoJ3D4gfxqoT1HjrYELH9/Ydz ro2DjzVrRXlo5Cnj//+q2oR5JG4fcHlvW2+o4nh3S28ceptW2Y37S+9vU MGUAY1MXDJr9C07Dc4IiNNVFLYP7UApJWMw6jM/m/dm31xctsuzLxtcXg GBHGuGKVsxLrwUogy9x0u5IsN0kd4zcbd8EqDsCI5fWI+7p0PnMV8paJM jS6EZqNSrKcMXYKHxz5+IAMEWvn+CJzAKHZY2i+lmxmkdOMaywyymePHa A==; IronPort-SDR: +BEwzkOAvIJqQGE0yZaHrJTqVldx0kuIA0sCGDGnlnpsUstdKy1+W4xWAh4U/Bs1VrqTha9rhO vQxJilflgnyngS7MiEQCueM6YH+19/jsQMi3w3GlpOnM7rc42pSsECwJF2D7+XZqVlKxmUtUSg g0ZmtY5c3ymjf9+PW8lx6iRQcn/xE+6ZnHKISKOcEg4CLgX93fNBE9TsLu3WYttT87eK34ZWpw d0ABvMZbQTMKLWOqk+A82hmWIzXLg1F9vjq82341+NsHuAy58TxjexnK66+i6tPQ3bLqZCSPB9 UXDUVKNHlMtnWuWD7kkowu4f X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="129681571" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Sep 2021 06:26:23 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 17 Sep 2021 06:26:23 -0700 Received: from rob-dk-mpu01.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 17 Sep 2021 06:26:22 -0700 From: Claudiu Beznea To: , , CC: , , Claudiu Beznea Subject: [PATCH v2 3/4] net: macb: add support for mii on rgmii Date: Fri, 17 Sep 2021 16:26:14 +0300 Message-ID: <20210917132615.16183-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20210917132615.16183-1-claudiu.beznea@microchip.com> References: <20210917132615.16183-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Cadence IP has option to enable MII support on RGMII interface. This could be selected though bit 28 of network control register. This option is not enabled on all the IP versions thus add a software capability to be selected by the proper implementation of this IP. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre --- drivers/net/ethernet/cadence/macb.h | 3 +++ drivers/net/ethernet/cadence/macb_main.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index c33e98bfa5e8..5620b97b3482 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -246,6 +246,8 @@ #define MACB_SRTSM_OFFSET 15 /* Store Receive Timestamp to Memory */ #define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */ #define MACB_OSSMODE_SIZE 1 +#define MACB_MIIONRGMII_OFFSET 28 /* MII Usage on RGMII Interface */ +#define MACB_MIIONRGMII_SIZE 1 /* Bitfields in NCFGR */ #define MACB_SPD_OFFSET 0 /* Speed */ @@ -713,6 +715,7 @@ #define MACB_CAPS_GEM_HAS_PTP 0x00000040 #define MACB_CAPS_BD_RD_PREFETCH 0x00000080 #define MACB_CAPS_NEEDS_RSTONUBR 0x00000100 +#define MACB_CAPS_MIIONRGMII 0x00000200 #define MACB_CAPS_CLK_HW_CHG 0x04000000 #define MACB_CAPS_MACB_IS_EMAC 0x08000000 #define MACB_CAPS_FIFO_MODE 0x10000000 diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index d13fb1d31821..cdf3e35b5b33 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -684,6 +684,9 @@ static void macb_mac_config(struct phylink_config *config, unsigned int mode, } else if (state->interface == PHY_INTERFACE_MODE_10GBASER) { ctrl |= GEM_BIT(PCSSEL); ncr |= GEM_BIT(ENABLE_HS_MAC); + } else if (bp->caps & MACB_CAPS_MIIONRGMII && + bp->phy_interface == PHY_INTERFACE_MODE_MII) { + ncr |= MACB_BIT(MIIONRGMII); } } From patchwork Fri Sep 17 13:26:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12502111 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 197B4C433F5 for ; Fri, 17 Sep 2021 13:26:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 02D2960296 for ; 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IronPort-SDR: 3R+lmdd7iZ3OoRIT6G0O3tGMmM8OwlrF1F5NxpJQeOTH+XWAVDhMfegpBsQ6insIk5MSnJJEfJ 9tkFEKc5i1h4bK8CY0WefzWua2a3eqjXUOtTTXIcme/ipP/JxWWgjaCi6/BGYhqIXheyLmbtch kz6EVNOj3/+cPwuQWpNn5Zm49ikFLgm7jc/Hzrf2AFNPTaTarSthMGygPi6h92Dk3/vQjpgvYE YzR2Q/USDQ9d+Q3iovpQ+x/oWmwyCJsx5WXfZbgO0Je583azCTLu16WrGTkP0MGFmkKY+vhVWT g7AoaA6BkBNlCktK6HFaUoAr X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="136363995" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Sep 2021 06:26:27 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 17 Sep 2021 06:26:25 -0700 Received: from rob-dk-mpu01.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 17 Sep 2021 06:26:24 -0700 From: Claudiu Beznea To: , , CC: , , Claudiu Beznea Subject: [PATCH v2 4/4] net: macb: enable mii on rgmii for sama7g5 Date: Fri, 17 Sep 2021 16:26:15 +0300 Message-ID: <20210917132615.16183-5-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20210917132615.16183-1-claudiu.beznea@microchip.com> References: <20210917132615.16183-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Both MAC IPs available on SAMA7G5 support MII on RGMII feature. Enable these by adding proper capability to proper macb_config objects. Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre Reviewed-by: Andrew Lunn --- drivers/net/ethernet/cadence/macb_main.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index cdf3e35b5b33..e2730b3e1a57 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4597,7 +4597,8 @@ static const struct macb_config zynq_config = { }; static const struct macb_config sama7g5_gem_config = { - .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG, + .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | + MACB_CAPS_MIIONRGMII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init, @@ -4605,7 +4606,8 @@ static const struct macb_config sama7g5_gem_config = { }; static const struct macb_config sama7g5_emac_config = { - .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_USRIO_HAS_CLKEN, + .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | + MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_MIIONRGMII, .dma_burst_length = 16, .clk_init = macb_clk_init, .init = macb_init,