From patchwork Sat Sep 18 18:44:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48B19C433EF for ; Sat, 18 Sep 2021 18:48:34 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8E5F5611C8 for ; Sat, 18 Sep 2021 18:48:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8E5F5611C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:39966 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfO4-0007qT-9Q for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:48:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54040) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLC-0004yO-RK for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:34 -0400 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]:36538) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLA-0006gV-2V for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:34 -0400 Received: by mail-pj1-x1035.google.com with SMTP id u13-20020a17090abb0db0290177e1d9b3f7so12336326pjr.1 for ; Sat, 18 Sep 2021 11:45:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MwSLIpZg3SBDOkqorWI9RwSF0cto2aAplNrO4o3oH4g=; b=OfcFIhVaDEiEzOK/rX+3aeV5ZbEHksw7k5lRIrl80/Siq9JyTSHhmSvXnIZluCCKBu o5HB9T9YTynZqHWwmThHk3sgWmB72P9tWfiR+E/jotKGZ1xU8904lLqjZ+e6o8c58MA8 OIrnCss3CO/kbhUAkncFYf8Dmal0fuCiWOjlFkwK6quCut4B0irXv/q9KukwcX6dD6Nj 9Z4kYt9myZ9d9D9yH6qGaD3ZNLJVPZOzoCy1ywhyUu82/BbeZ7lU20TL6xKCL0kbN2AZ E6zz/jLMMR9y03KJ33pqLlo72LlxK9z4h2mgfIylYpCzq9G3s7Urim1yMyslfhOFI14/ Aznw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MwSLIpZg3SBDOkqorWI9RwSF0cto2aAplNrO4o3oH4g=; b=MoGkVLtURgss5tw5KNT0713C4AH8EH9YDfaD0m0cCk+Pa52yuYr4QFYHAELXTPL9fn GqVl434CPkGBJy+pLWq459Mwax4VLqdZsBk9UZNQo78r0YKLZeB8hPfwHd2KS7kcSXGr p1Uk7WcZuHlIEzpQ3D/Fb7GJyWKqbNoS98QEAE70eDaW82Yhhl6scVMzNczya2aaQARJ dMoWXBcnd+3jVAnKA0kXCNsJBC9+2ow2gbrwAfmbF8qrin+Kr5IH11LFvGxKY7YPj19+ kvi+rot45Eo0xu2joGz7idSUsQdhIDEODeuuzT+YDF7mMUowTJyf7t5QjYKopArU8gvh HcyA== X-Gm-Message-State: AOAM530Yr61kODscYa+5V2l7Hzkf1b4hT70Q3IOC8EoLRTpOOFkcmN/r aLWxAkUfoIfOQSBPyw+dFZCAFZbG380o7A== X-Google-Smtp-Source: ABdhPJwY/ErwGhQkQf7b1ww54TPpYz6OH/yaLMhyzuXmDOlor1NQwOGOCXVBlW3bX2di8yCX3h4BMw== X-Received: by 2002:a17:90a:1d4c:: with SMTP id u12mr19050420pju.95.1631990730360; Sat, 18 Sep 2021 11:45:30 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 01/41] accel/tcg: Split out adjust_signal_pc Date: Sat, 18 Sep 2021 11:44:47 -0700 Message-Id: <20210918184527.408540-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split out a function to adjust the raw signal pc into a value that could be passed to cpu_restore_state. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- v2: Adjust pc in place; return MMUAccessType. --- include/exec/exec-all.h | 10 ++++++++++ accel/tcg/user-exec.c | 41 +++++++++++++++++++++++++---------------- 2 files changed, 35 insertions(+), 16 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 9d5987ba04..e54f8e5d65 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -663,6 +663,16 @@ static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, return addr; } +/** + * adjust_signal_pc: + * @pc: raw pc from the host signal ucontext_t. + * @is_write: host memory operation was write, or read-modify-write. + * + * Alter @pc as required for unwinding. Return the type of the + * guest memory access -- host reads may be for guest execution. + */ +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); + /** * cpu_signal_handler * @signum: host signal number diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 8fed542622..cef025d001 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -57,18 +57,11 @@ static void QEMU_NORETURN cpu_exit_tb_from_sighandler(CPUState *cpu, cpu_loop_exit_noexc(cpu); } -/* 'pc' is the host PC at which the exception was raised. 'address' is - the effective address of the memory exception. 'is_write' is 1 if a - write caused the exception and otherwise 0'. 'old_set' is the - signal set which should be restored */ -static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, - int is_write, sigset_t *old_set) +/* + * Adjust the pc to pass to cpu_restore_state; return the memop type. + */ +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) { - CPUState *cpu = current_cpu; - CPUClass *cc; - unsigned long address = (unsigned long)info->si_addr; - MMUAccessType access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; - switch (helper_retaddr) { default: /* @@ -77,7 +70,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * pointer into the generated code that will unwind to the * correct guest pc. */ - pc = helper_retaddr; + *pc = helper_retaddr; break; case 0: @@ -97,7 +90,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * Therefore, adjust to compensate for what will be done later * by cpu_restore_state_from_tb. */ - pc += GETPC_ADJ; + *pc += GETPC_ADJ; break; case 1: @@ -113,12 +106,28 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * * Like tb_gen_code, release the memory lock before cpu_loop_exit. */ - pc = 0; - access_type = MMU_INST_FETCH; mmap_unlock(); - break; + *pc = 0; + return MMU_INST_FETCH; } + return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; +} + +/* + * 'pc' is the host PC at which the exception was raised. + * 'address' is the effective address of the memory exception. + * 'is_write' is 1 if a write caused the exception and otherwise 0. + * 'old_set' is the signal set which should be restored. + */ +static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, + int is_write, sigset_t *old_set) +{ + CPUState *cpu = current_cpu; + CPUClass *cc; + unsigned long address = (unsigned long)info->si_addr; + MMUAccessType access_type = adjust_signal_pc(&pc, is_write); + /* For synchronous signals we expect to be coming from the vCPU * thread (so current_cpu should be valid) and either from running * code or during translation which can fault as we cross pages. From patchwork Sat Sep 18 18:44:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 424C7C433EF for ; Sat, 18 Sep 2021 18:51:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F0DFF60F46 for ; Sat, 18 Sep 2021 18:51:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org F0DFF60F46 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:48468 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfR6-00058e-1K for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:51:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54086) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLE-0004yZ-H3 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:37 -0400 Received: from mail-pg1-x52f.google.com ([2607:f8b0:4864:20::52f]:36412) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLA-0006hM-To for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:35 -0400 Received: by mail-pg1-x52f.google.com with SMTP id t1so13124247pgv.3 for ; Sat, 18 Sep 2021 11:45:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=00YKLAZKgTNNfjhBetZk/EbYoBmFV300gqUFQ/RO0uM=; b=xigLHquHLCUG78JHrVvVwD9zo791ZGsW4L99y+/cSFetdnuCZ/iCCD96u0XYhr18zX 7OcJD+M+IEo8o1WVdOzE/JXBcjkSaN4Vwrn3ovixq6IVjc9WhLCdAGI1bD4dnciWRfL9 sLrGv87NlDN48Cb4xtPFOv5Y8xThhoeW0Eg0tiXNI13UBWO54xwe30yZ7lgQbbnwQSt0 5E2RAwmT+t3TlwAJ2bkopVSVcTfQK7lZaToqfU0P7qL9L+foUMUQWH6C6G2fHMdKTDks hYu5OhnEm0RFZyMtv4pKef6+8go1SeMQ+og6VLuDGtqyfVQDCsZGwkHcAVYvCxv48Tlf ffYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=00YKLAZKgTNNfjhBetZk/EbYoBmFV300gqUFQ/RO0uM=; b=Ex/RhvuVoCc3NVsLUfMXKSBz0r/knw47XZQnasjcmuNfUKl/Cg+QKb9+1z3JqOocJq O0L+88Cy43e68I+10KLF1gUZ5itElY6SMce003MGmmPI1jpIcpjcYMbQDgDUDujzoezs tsp9YVaYe7s6/ohFhH5gwgvJ6tM9UKZiS36Xfp32+u0dftcmHA5wHrOl4jXRPr7dGco5 ecmspIVTiRcsFdvom/Np73qoius9paGrs0Buw+xtbqfAwFmUGw0Rl04QNGxmzd9UVa6a 59ZBAtwjOwmQNxwfAWtof61rpyrlRXDkr5hKomtOvGhfgQPTJdTbIMZ1zLXyD3E1U/JB lJYQ== X-Gm-Message-State: AOAM532SV8nULHMFFjj5WyXWK79DTvdX928qc1XxssNoMcXEXZWHmKW2 kx+erHPXsvYwgAWEmh2S7j1UgOOV+HB4mA== X-Google-Smtp-Source: ABdhPJz6Vn0GbqgEVydRiE+kSOnsZj/mI4aFuJpZ2hpOS/Q84psStRkIF0WaDynHsuBC7VSc1WVetw== X-Received: by 2002:a65:6187:: with SMTP id c7mr15986844pgv.317.1631990731111; Sat, 18 Sep 2021 11:45:31 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 02/41] accel/tcg: Move clear_helper_retaddr to cpu loop Date: Sat, 18 Sep 2021 11:44:48 -0700 Message-Id: <20210918184527.408540-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Currently there are only two places that require we reset this value before exiting to the main loop, but that will change. Signed-off-by: Richard Henderson Reviewed-by: Warner Losh --- accel/tcg/cpu-exec.c | 3 ++- accel/tcg/user-exec.c | 2 -- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5fd1ed3422..410588d08a 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -451,6 +451,7 @@ void cpu_exec_step_atomic(CPUState *cpu) * memory. */ #ifndef CONFIG_SOFTMMU + clear_helper_retaddr(); tcg_debug_assert(!have_mmap_lock()); #endif if (qemu_mutex_iothread_locked()) { @@ -460,7 +461,6 @@ void cpu_exec_step_atomic(CPUState *cpu) qemu_plugin_disable_mem_helpers(cpu); } - /* * As we start the exclusive region before codegen we must still * be in the region if we longjump out of either the codegen or @@ -905,6 +905,7 @@ int cpu_exec(CPUState *cpu) #endif #ifndef CONFIG_SOFTMMU + clear_helper_retaddr(); tcg_debug_assert(!have_mmap_lock()); #endif if (qemu_mutex_iothread_locked()) { diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index cef025d001..e94f1fed00 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -175,7 +175,6 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * currently executing TB was modified and must be exited * immediately. Clear helper_retaddr for next execution. */ - clear_helper_retaddr(); cpu_exit_tb_from_sighandler(cpu, old_set); /* NORETURN */ @@ -193,7 +192,6 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * an exception. Undo signal and retaddr state prior to longjmp. */ sigprocmask(SIG_SETMASK, old_set, NULL); - clear_helper_retaddr(); cc = CPU_GET_CLASS(cpu); cc->tcg_ops->tlb_fill(cpu, address, 0, access_type, From patchwork Sat Sep 18 18:44:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61F78C433FE for ; Sat, 18 Sep 2021 18:48:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AE7A060E94 for ; Sat, 18 Sep 2021 18:48:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org AE7A060E94 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:40112 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfO5-0007vh-TD for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:48:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54100) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLF-0004yc-9f for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:37 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]:33284) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLC-0006iJ-DF for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:37 -0400 Received: by mail-pl1-x62f.google.com with SMTP id t4so8427277plo.0 for ; Sat, 18 Sep 2021 11:45:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d0XAyTZlMLuZKO7GS2lQ57aRasECVtACHoF9DI2hSaY=; b=XgZYrKNbCuJ25En3uFCieCBRkoENjIqeZk7KdwjA9HS0Um0PsAtaHD/KoqFdN9rkfd yH7PB8SfdzukttMDyyPOSTYqFg1q9v9nJOlYF5VB9Gt7tZeDGHgihnbKpB8YjQzPEL18 p+0dEy5Uwg/91VveahU8cXvlKfmB0B2sxKYb0FWTVo5VeaWg47XGbWm+yoxmrJmy/qSb d5TX4bDJTy9t/gKOKR74dldyu/EgN1xl255se+KJwuMoGmZE5BP+kdqtLDMwzlJ5Al+F b72eKoYRKA4to/wxE7gbXSKhRRPI+hedR7Gf9pw7TRBXVJFuNbiBNzB2gjm1mrviMf87 VNKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d0XAyTZlMLuZKO7GS2lQ57aRasECVtACHoF9DI2hSaY=; b=UvItkHpX+bDMkuO1UUP6fcLIpzryCU68CJ8WmjL12MSJsTiHbI4VVyBdHHAg48NFG7 pUwhfyvtyahhRilpbTPhhJyeczeVd4XUDb5i6ol3gir/2DM7y9mdjToY7zEdLzMGCMw/ tOkS6PBckhln/YldSlrjucXafVIxwIA/X3LQkUKzP2MCKaLAnZO5bDI8D3IRf6UdN6fm +5UHuG+bTOorkAFxKFTUJ6cH/ssyx4opi02jGP1QOigLqTVzrQWIOSEhOuYU9SRQ0tCB 4hkeejWPcmFLpE7O+9VZe6WmsAfxyAL1l+C/2eo2jWMbAIY34HoK6xf8/d/0sUKvDLPb jNyw== X-Gm-Message-State: AOAM530QFuI0OncgR6IvG6ZjpixBcEN1fGzt7sCacORJ9r1NNsLr8b3c OCnUDpKTEcGC7uhv1TE6tFBR1tyR3eWBFA== X-Google-Smtp-Source: ABdhPJy0Qp4GrU2CQDhNyzP5IR9pqL+T1ftFwTPUNRBELHOnO35kD77mmjEDlWVCab6mV/sFRwuVaQ== X-Received: by 2002:a17:90a:4b83:: with SMTP id i3mr19580389pjh.22.1631990731929; Sat, 18 Sep 2021 11:45:31 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 03/41] accel/tcg: Split out handle_sigsegv_accerr_write Date: Sat, 18 Sep 2021 11:44:49 -0700 Message-Id: <20210918184527.408540-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is the major portion of handle_cpu_signal which is specific to tcg, handling the page protections for the translations. Most of the rest will migrate to linux-user/ shortly. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- v2: Pass guest address to handle_sigsegv_accerr_write. --- include/exec/exec-all.h | 12 +++++ accel/tcg/user-exec.c | 103 ++++++++++++++++++++++++---------------- 2 files changed, 74 insertions(+), 41 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index e54f8e5d65..5f94d799aa 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -673,6 +673,18 @@ static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, */ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); +/** + * handle_sigsegv_accerr_write: + * @cpu: the cpu context + * @old_set: the sigset_t from the signal ucontext_t + * @host_pc: the host pc, adjusted for the signal + * @host_addr: the host address of the fault + * + * Return true if the write fault has been handled, and should be re-tried. + */ +bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, + uintptr_t host_pc, abi_ptr guest_addr); + /** * cpu_signal_handler * @signum: host signal number diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index e94f1fed00..6f4fc01b60 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -114,6 +114,54 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; } +/** + * handle_sigsegv_accerr_write: + * @cpu: the cpu context + * @old_set: the sigset_t from the signal ucontext_t + * @host_pc: the host pc, adjusted for the signal + * @guest_addr: the guest address of the fault + * + * Return true if the write fault has been handled, and should be re-tried. + * + * Note that it is important that we don't call page_unprotect() unless + * this is really a "write to nonwriteable page" fault, because + * page_unprotect() assumes that if it is called for an access to + * a page that's writeable this means we had two threads racing and + * another thread got there first and already made the page writeable; + * so we will retry the access. If we were to call page_unprotect() + * for some other kind of fault that should really be passed to the + * guest, we'd end up in an infinite loop of retrying the faulting access. + */ +bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, + uintptr_t host_pc, abi_ptr guest_addr) +{ + switch (page_unprotect(guest_addr, host_pc)) { + case 0: + /* + * Fault not caused by a page marked unwritable to protect + * cached translations, must be the guest binary's problem. + */ + return false; + case 1: + /* + * Fault caused by protection of cached translation; TBs + * invalidated, so resume execution. Retain helper_retaddr + * for a possible second fault. + */ + return true; + case 2: + /* + * Fault caused by protection of cached translation, and the + * currently executing TB was modified and must be exited + * immediately. Clear helper_retaddr for next execution. + */ + cpu_exit_tb_from_sighandler(cpu, old_set); + /* NORETURN */ + default: + g_assert_not_reached(); + } +} + /* * 'pc' is the host PC at which the exception was raised. * 'address' is the effective address of the memory exception. @@ -125,8 +173,9 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, { CPUState *cpu = current_cpu; CPUClass *cc; - unsigned long address = (unsigned long)info->si_addr; + unsigned long host_addr = (unsigned long)info->si_addr; MMUAccessType access_type = adjust_signal_pc(&pc, is_write); + abi_ptr guest_addr; /* For synchronous signals we expect to be coming from the vCPU * thread (so current_cpu should be valid) and either from running @@ -143,49 +192,21 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, #if defined(DEBUG_SIGNAL) printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", - pc, address, is_write, *(unsigned long *)old_set); + pc, host_addr, is_write, *(unsigned long *)old_set); #endif - /* XXX: locking issue */ - /* Note that it is important that we don't call page_unprotect() unless - * this is really a "write to nonwriteable page" fault, because - * page_unprotect() assumes that if it is called for an access to - * a page that's writeable this means we had two threads racing and - * another thread got there first and already made the page writeable; - * so we will retry the access. If we were to call page_unprotect() - * for some other kind of fault that should really be passed to the - * guest, we'd end up in an infinite loop of retrying the faulting - * access. - */ - if (is_write && info->si_signo == SIGSEGV && info->si_code == SEGV_ACCERR && - h2g_valid(address)) { - switch (page_unprotect(h2g(address), pc)) { - case 0: - /* Fault not caused by a page marked unwritable to protect - * cached translations, must be the guest binary's problem. - */ - break; - case 1: - /* Fault caused by protection of cached translation; TBs - * invalidated, so resume execution. Retain helper_retaddr - * for a possible second fault. - */ - return 1; - case 2: - /* Fault caused by protection of cached translation, and the - * currently executing TB was modified and must be exited - * immediately. Clear helper_retaddr for next execution. - */ - cpu_exit_tb_from_sighandler(cpu, old_set); - /* NORETURN */ - - default: - g_assert_not_reached(); - } - } /* Convert forcefully to guest address space, invalid addresses are still valid segv ones */ - address = h2g_nocheck(address); + guest_addr = h2g_nocheck(host_addr); + + /* XXX: locking issue */ + if (is_write && + info->si_signo == SIGSEGV && + info->si_code == SEGV_ACCERR && + h2g_valid(host_addr) && + handle_sigsegv_accerr_write(cpu, old_set, pc, guest_addr)) { + return 1; + } /* * There is no way the target can handle this other than raising @@ -194,7 +215,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, sigprocmask(SIG_SETMASK, old_set, NULL); cc = CPU_GET_CLASS(cpu); - cc->tcg_ops->tlb_fill(cpu, address, 0, access_type, + cc->tcg_ops->tlb_fill(cpu, guest_addr, 0, access_type, MMU_USER_IDX, false, pc); g_assert_not_reached(); } From patchwork Sat Sep 18 18:44:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503943 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04379C433F5 for ; Sat, 18 Sep 2021 18:51:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C02B560EC0 for ; Sat, 18 Sep 2021 18:51:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C02B560EC0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:48616 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfR6-0005Eh-VO for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:51:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54118) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLF-0004ye-K7 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:38 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]:35629) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLC-0006iN-DN for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:37 -0400 Received: by mail-pf1-x42b.google.com with SMTP id w14so1833654pfu.2 for ; Sat, 18 Sep 2021 11:45:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lQDDeP4KrE59xBXWzR54VwCb3z15HLMlRMki+IJBEEo=; b=KGm835s966tjMmfvd6b/RMcBfUGuOPVjiDmNrxjcG4KnP20QHjSauF2tdYiges49bA bGFnIfPlAqz3gcSx/62aK17PuEPc6nEcxXLTDkbcM/eEEAmkGHkr9haNMgDig+fl6Vl+ fPAqQqe6bWHshZ/Xfa69Anvo24HaewSTijOWWq4EEt07UzwKHkZ9FuzrrJCUWCpy1h4b LW1mouTDpCCqg9ha7NGmGV+RUTLHOyg2WJidaUTmKTmpCsoTwTdfM12Z0fnvsUI4Oxi9 oLszelP8s7nQJmGrimGBHSlZkpO9oeuF1G9JHezxEFlzRHlSU3qoR0l95W4nsr+jIatH bKBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lQDDeP4KrE59xBXWzR54VwCb3z15HLMlRMki+IJBEEo=; b=dbDbgBY2iPsNoQfyQ9a0VgzSQCjF+hfNDpYHlaMDh5CQ+4CLkSaRu6flk3/OIOf7OQ WBmnRPJnYbAT5H89zT5Y/ilqYMM/ZFGv3SUPT9pNhYUOYTODS+gUSK+d4GF8Jc9byuFr JtQqLZH8m+0zEg8g+Qfuj9Wl4VZ8Fi6TCExtbAQvASmWnKFDuOGE/8JS6y5Q5SvuTghF 8QSP0+l59suZG0mTvnH7VW52hFQhNoAksVNBsmxpARX7Ndkx/JMyzDye4a0Tvc6w4Olp xUpc5m1mfdzOdnx8IRrT+R5gdNVf6hHkM71wRg79CpFZuwU0+IdbSUwFJqrkuBW+tqXl XIoQ== X-Gm-Message-State: AOAM5309rH+mwDJaM/y5FYlxp1dKuS9BzPSYwbr22O30C/KoXVrAW5+l 8AEK37n0b/XDWTEqWmQ1glcUBYG3RuLRJA== X-Google-Smtp-Source: ABdhPJx4NfuwG/W78UvKXSyjyS7aMObEymRIjKexrEFX2I6Tv+ZCCiMZNl8mKsht+Y65Dqpt+ZwGtg== X-Received: by 2002:a63:fe41:: with SMTP id x1mr15969970pgj.272.1631990732649; Sat, 18 Sep 2021 11:45:32 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 04/41] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Date: Sat, 18 Sep 2021 11:44:50 -0700 Message-Id: <20210918184527.408540-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Remove the comment about siglongjmp. We do use sigsetjmp in the main cpu loop, but we do not save the signal mask as most exits from the cpu loop do not require them. Signed-off-by: Richard Henderson --- accel/tcg/user-exec.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 6f4fc01b60..de4565f13e 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -46,17 +46,6 @@ __thread uintptr_t helper_retaddr; //#define DEBUG_SIGNAL -/* exit the current TB from a signal handler. The host registers are - restored in a state compatible with the CPU emulator - */ -static void QEMU_NORETURN cpu_exit_tb_from_sighandler(CPUState *cpu, - sigset_t *old_set) -{ - /* XXX: use siglongjmp ? */ - sigprocmask(SIG_SETMASK, old_set, NULL); - cpu_loop_exit_noexc(cpu); -} - /* * Adjust the pc to pass to cpu_restore_state; return the memop type. */ @@ -155,7 +144,8 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, * currently executing TB was modified and must be exited * immediately. Clear helper_retaddr for next execution. */ - cpu_exit_tb_from_sighandler(cpu, old_set); + sigprocmask(SIG_SETMASK, old_set, NULL); + cpu_loop_exit_noexc(cpu); /* NORETURN */ default: g_assert_not_reached(); From patchwork Sat Sep 18 18:44:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503949 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB74CC433F5 for ; Sat, 18 Sep 2021 18:53:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 475FB610A6 for ; Sat, 18 Sep 2021 18:53:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 475FB610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:56928 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfT6-0002Gq-C8 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:53:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54096) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLF-0004yb-5y for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:37 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]:35550) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLC-0006iW-Ph for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:36 -0400 Received: by mail-pj1-x1030.google.com with SMTP id f3-20020a17090a638300b00199097ddf1aso12370427pjj.0 for ; Sat, 18 Sep 2021 11:45:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jNytvLeKtUgPrmZI/TBw9N43J3yDkQk24XcXM4krLhk=; b=xQ+e4HNflx/kFwy7DlYyzkV0zwhlsRq2X9B94zZoYQUnj46+cXRIX9rD955pR2e4Yc /XDfFyNr4/QdC+Rhttsy7c2DG6DvjN5weSrF+aVah5ZXyxIjFIfuzcQb4hrX57EBQxDP ZAI8Qkrkuf9Tv1/+AMP8yMciqdhQpEEwlnB2L8prjECrkqgfGGRyY3J/ubGTCvYlRL3K HUGAOO5ZryGNpYTIvbJClA1/frftoKZzhzrhWg6pK+cEKK8WIrAYwOjz2JNRIexBc+wC +FPCweNcqLKza0n3u8UiZZznNM7U1UAq/2rl8nXbNgI88zfvvHYC2m/W2f8HiEHbRyuy 5nfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jNytvLeKtUgPrmZI/TBw9N43J3yDkQk24XcXM4krLhk=; b=eSR7KzaPrLZ2mC4uZQG+JANsyi/EFe493+Ap9L1NfeGBP9Pe8YEBKb8Rj04SgSkiIm 4p500jF7otEPulgn4EzXyfTPJWVIx83pk2c3x4LVhj2/9YyS+5PQIpDzBK1YGamsARZV 5M7jybSfMRmK7fjbepIloibFx+m7grlPCKhkarqNNqwgbwe5JOq05q1BA7gDf1aybFdG K31IorPtDMBUPF4do7mZ0Jra3qYEoUASi/+W57A2ATIpcCXACkQ+qUlVTmnsjPcQOUif OwUy9Ki6shFvKhLjMazYBd1XsfDwXxAAIrV7WKx7N/5aInNn7DnEp/VNg/m6Ld45qk0f kYHw== X-Gm-Message-State: AOAM530GjB04d8pmg8xSbHVMFrdw4g7lcP4B/lG6EbpRATzf/U0JgJfA ngvAXNXtHhJkcnWEnviP/5767M79MvTBOw== X-Google-Smtp-Source: ABdhPJwwqNSwwOMc3eHJBfWQnqWx8rEo3V6rPQG1we/Fr8KZQnuw5LVG2fcpzZB+EX5M1rx/xfxujQ== X-Received: by 2002:a17:90b:1d02:: with SMTP id on2mr28136937pjb.21.1631990733547; Sat, 18 Sep 2021 11:45:33 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 05/41] configure: Merge riscv32 and riscv64 host architectures Date: Sat, 18 Sep 2021 11:44:51 -0700 Message-Id: <20210918184527.408540-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The existing code for safe-syscall.inc.S will compile without change for riscv32 and riscv64. We may also drop the meson.build stanza that merges them for tcg/. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- configure | 8 ++------ meson.build | 4 +--- linux-user/host/{riscv64 => riscv}/hostdep.h | 4 ++-- linux-user/host/riscv32/hostdep.h | 11 ----------- linux-user/host/{riscv64 => riscv}/safe-syscall.inc.S | 0 5 files changed, 5 insertions(+), 22 deletions(-) rename linux-user/host/{riscv64 => riscv}/hostdep.h (94%) delete mode 100644 linux-user/host/riscv32/hostdep.h rename linux-user/host/{riscv64 => riscv}/safe-syscall.inc.S (100%) diff --git a/configure b/configure index da2501489f..6ff037bac1 100755 --- a/configure +++ b/configure @@ -650,11 +650,7 @@ elif check_define __s390__ ; then cpu="s390" fi elif check_define __riscv ; then - if check_define _LP64 ; then - cpu="riscv64" - else - cpu="riscv32" - fi + cpu="riscv" elif check_define __arm__ ; then cpu="arm" elif check_define __aarch64__ ; then @@ -667,7 +663,7 @@ ARCH= # Normalise host CPU name and set ARCH. # Note that this case should only have supported host CPUs, not guests. case "$cpu" in - ppc|ppc64|s390x|sparc64|x32|riscv32|riscv64) + ppc|ppc64|s390x|sparc64|x32|riscv) ;; ppc64le) ARCH="ppc64" diff --git a/meson.build b/meson.build index 2711cbb789..c35a230bf0 100644 --- a/meson.build +++ b/meson.build @@ -56,7 +56,7 @@ have_block = have_system or have_tools python = import('python').find_installation() supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin', 'sunos', 'linux'] -supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv32', 'riscv64', 'x86', 'x86_64', +supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv', 'x86', 'x86_64', 'arm', 'aarch64', 'mips', 'mips64', 'sparc', 'sparc64'] cpu = host_machine.cpu_family() @@ -271,8 +271,6 @@ if not get_option('tcg').disabled() tcg_arch = 'i386' elif config_host['ARCH'] == 'ppc64' tcg_arch = 'ppc' - elif config_host['ARCH'] in ['riscv32', 'riscv64'] - tcg_arch = 'riscv' endif add_project_arguments('-iquote', meson.current_source_dir() / 'tcg' / tcg_arch, language: ['c', 'cpp', 'objc']) diff --git a/linux-user/host/riscv64/hostdep.h b/linux-user/host/riscv/hostdep.h similarity index 94% rename from linux-user/host/riscv64/hostdep.h rename to linux-user/host/riscv/hostdep.h index 865f0fb9ff..2ba07456ae 100644 --- a/linux-user/host/riscv64/hostdep.h +++ b/linux-user/host/riscv/hostdep.h @@ -5,8 +5,8 @@ * See the COPYING file in the top-level directory. */ -#ifndef RISCV64_HOSTDEP_H -#define RISCV64_HOSTDEP_H +#ifndef RISCV_HOSTDEP_H +#define RISCV_HOSTDEP_H /* We have a safe-syscall.inc.S */ #define HAVE_SAFE_SYSCALL diff --git a/linux-user/host/riscv32/hostdep.h b/linux-user/host/riscv32/hostdep.h deleted file mode 100644 index adf9edbf2d..0000000000 --- a/linux-user/host/riscv32/hostdep.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * hostdep.h : things which are dependent on the host architecture - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#ifndef RISCV32_HOSTDEP_H -#define RISCV32_HOSTDEP_H - -#endif diff --git a/linux-user/host/riscv64/safe-syscall.inc.S b/linux-user/host/riscv/safe-syscall.inc.S similarity index 100% rename from linux-user/host/riscv64/safe-syscall.inc.S rename to linux-user/host/riscv/safe-syscall.inc.S From patchwork Sat Sep 18 18:44:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DE95C433F5 for ; Sat, 18 Sep 2021 18:57:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0033561074 for ; Sat, 18 Sep 2021 18:57:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 0033561074 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:37296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfWu-00083I-1N for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:57:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54156) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLJ-0004zy-As for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:41 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]:33701) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLE-0006im-9B for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:40 -0400 Received: by mail-pg1-x531.google.com with SMTP id u18so13167733pgf.0 for ; Sat, 18 Sep 2021 11:45:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Augx9stmO3IWbkqJHhpPVeuGJjJAQUvm2M+qwyR3XuM=; b=CfhbSO8l9oF0LrOEatoJXmhnHcHCF8L5OXlC7qgKvHQcZtH38oKBthZuz1+9HhNl67 zfAQWZe5cZCiVRmD9pq005EBhsYJJrKKHv5VoYCYC2OxsNAXF1TNFmFm7Hi6BcvWKTSI 3pzA0AmcGZU8M8danxffrpZthPfGtkHBmhwGFSj5Ef24DPf7Cs0r4RcO15YqYS6qH65D FhkOa3Gx7MSxpM32cleqcVPDxnRooKLJrqINe1TTuyqFo46XjnapE9bv9fEqHlLFoiPY U5g0houf1pLi1gC3yufAQdgmaMFaZXCOCsGgAkLImVQpX+kxS4a+fVvb9ENeBTY4g5RG bj+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Augx9stmO3IWbkqJHhpPVeuGJjJAQUvm2M+qwyR3XuM=; b=zRdXIfrBGRO596nV/ugvywgKkXsbDjJ+GolKNx2SLV+vfqEQ7v3oM+D1NjgnVWqLUb MSd0UclXbX36BJC/7+5kJNXAspXKRdraWgd/V1MAawM0DUDa6VV9BpwOhdzfAEux7w13 0db2w1hShGXnM5xMD+btQpmYLrnqfqHW4mpfgrvW5Qpr4rVWKNIob5QzjPPhCHaG1FtP +ewW6mG8Sz89XOlHHMio8D0eGbIdIVlN+6ao2ZgLQp+rNnveoXqHff852mJWyUMaT3vt xg1uKSPT0H8c2nI6xBBy6lSwxdOPPbQkeJ39bXnZdSD5qJZc6v8TJ8z3BplwpsYyPZzf VQlA== X-Gm-Message-State: AOAM532enNkrIgEOuThTrxcqH1PGJuZR6Zk9ZBNlfOs5baqT/d5mh7RA OFJyW1nj4NObiCSlu9Xl4taJa/hA9MoGKw== X-Google-Smtp-Source: ABdhPJwIgCYCp/WpTqSPXEquUUHQhEThdMdZWsXxrcSFGp52C/YPm3cYJhUVophdfVjUOwHF98j5rg== X-Received: by 2002:a62:b615:0:b0:3f9:1c5a:2671 with SMTP id j21-20020a62b615000000b003f91c5a2671mr16904984pff.10.1631990734393; Sat, 18 Sep 2021 11:45:34 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 06/41] linux-user: Reorg handling for SIGSEGV Date: Sat, 18 Sep 2021 11:44:52 -0700 Message-Id: <20210918184527.408540-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add stub host-signal.h for all linux-user hosts. Add new code replacing cpu_signal_handler. Full migration will happen one host at a time. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Acked-by: Alistair Francis --- linux-user/host/aarch64/host-signal.h | 1 + linux-user/host/arm/host-signal.h | 1 + linux-user/host/i386/host-signal.h | 1 + linux-user/host/mips/host-signal.h | 1 + linux-user/host/ppc/host-signal.h | 1 + linux-user/host/ppc64/host-signal.h | 1 + linux-user/host/riscv/host-signal.h | 1 + linux-user/host/s390/host-signal.h | 1 + linux-user/host/s390x/host-signal.h | 1 + linux-user/host/sparc/host-signal.h | 1 + linux-user/host/sparc64/host-signal.h | 1 + linux-user/host/x32/host-signal.h | 1 + linux-user/host/x86_64/host-signal.h | 1 + linux-user/signal.c | 109 ++++++++++++++++++++++---- 14 files changed, 106 insertions(+), 16 deletions(-) create mode 100644 linux-user/host/aarch64/host-signal.h create mode 100644 linux-user/host/arm/host-signal.h create mode 100644 linux-user/host/i386/host-signal.h create mode 100644 linux-user/host/mips/host-signal.h create mode 100644 linux-user/host/ppc/host-signal.h create mode 100644 linux-user/host/ppc64/host-signal.h create mode 100644 linux-user/host/riscv/host-signal.h create mode 100644 linux-user/host/s390/host-signal.h create mode 100644 linux-user/host/s390x/host-signal.h create mode 100644 linux-user/host/sparc/host-signal.h create mode 100644 linux-user/host/sparc64/host-signal.h create mode 100644 linux-user/host/x32/host-signal.h create mode 100644 linux-user/host/x86_64/host-signal.h diff --git a/linux-user/host/aarch64/host-signal.h b/linux-user/host/aarch64/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/aarch64/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/arm/host-signal.h b/linux-user/host/arm/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/arm/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/i386/host-signal.h b/linux-user/host/i386/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/i386/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/mips/host-signal.h b/linux-user/host/mips/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/mips/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/ppc/host-signal.h b/linux-user/host/ppc/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/ppc/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/ppc64/host-signal.h b/linux-user/host/ppc64/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/ppc64/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/riscv/host-signal.h b/linux-user/host/riscv/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/riscv/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/s390/host-signal.h b/linux-user/host/s390/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/s390/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/s390x/host-signal.h b/linux-user/host/s390x/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/s390x/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/sparc/host-signal.h b/linux-user/host/sparc/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/sparc/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/sparc64/host-signal.h b/linux-user/host/sparc64/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/sparc64/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/x32/host-signal.h b/linux-user/host/x32/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/x32/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/host/x86_64/host-signal.h b/linux-user/host/x86_64/host-signal.h new file mode 100644 index 0000000000..f4b4d65031 --- /dev/null +++ b/linux-user/host/x86_64/host-signal.h @@ -0,0 +1 @@ +#define HOST_SIGNAL_PLACEHOLDER diff --git a/linux-user/signal.c b/linux-user/signal.c index 5ea8e4584a..6f953f10d4 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -18,12 +18,15 @@ */ #include "qemu/osdep.h" #include "qemu/bitops.h" +#include "hw/core/tcg-cpu-ops.h" + #include #include #include "qemu.h" #include "trace.h" #include "signal-common.h" +#include "host-signal.h" static struct target_sigaction sigact_table[TARGET_NSIG]; @@ -761,41 +764,115 @@ static inline void rewind_if_in_safe_syscall(void *puc) } #endif -static void host_signal_handler(int host_signum, siginfo_t *info, - void *puc) +static void host_signal_handler(int host_sig, siginfo_t *info, void *puc) { CPUArchState *env = thread_cpu->env_ptr; CPUState *cpu = env_cpu(env); TaskState *ts = cpu->opaque; - - int sig; target_siginfo_t tinfo; ucontext_t *uc = puc; struct emulated_sigtable *k; + int guest_sig; +#ifdef HOST_SIGNAL_PLACEHOLDER /* the CPU emulator uses some host signals to detect exceptions, we forward to it some signals */ - if ((host_signum == SIGSEGV || host_signum == SIGBUS) + if ((host_sig == SIGSEGV || host_sig == SIGBUS) && info->si_code > 0) { - if (cpu_signal_handler(host_signum, info, puc)) + if (cpu_signal_handler(host_sig, info, puc)) return; } +#else + uintptr_t pc = 0; + bool sync_sig = false; + + /* + * Non-spoofed SIGSEGV and SIGBUS are synchronous, and need special + * handling wrt signal blocking and unwinding. + */ + if ((host_sig == SIGSEGV || host_sig == SIGBUS) && info->si_code > 0) { + MMUAccessType access_type; + uintptr_t host_addr; + abi_ptr guest_addr; + bool is_write; + + host_addr = (uintptr_t)info->si_addr; + + /* + * Convert forcefully to guest address space: addresses outside + * reserved_va are still valid to report via SEGV_MAPERR. + */ + guest_addr = h2g_nocheck(host_addr); + + pc = host_signal_pc(uc); + is_write = host_signal_write(info, uc); + access_type = adjust_signal_pc(&pc, is_write); + + if (host_sig == SIGSEGV) { + const struct TCGCPUOps *tcg_ops; + + if (info->si_code == SEGV_ACCERR && h2g_valid(host_addr)) { + /* If this was a write to a TB protected page, restart. */ + if (is_write && + handle_sigsegv_accerr_write(cpu, &uc->uc_sigmask, + pc, guest_addr)) { + return; + } + + /* + * With reserved_va, the whole address space is PROT_NONE, + * which means that we may get ACCERR when we want MAPERR. + */ + if (page_get_flags(guest_addr) & PAGE_VALID) { + /* maperr = false; */ + } else { + info->si_code = SEGV_MAPERR; + } + } + + sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); + + tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + tcg_ops->tlb_fill(cpu, guest_addr, 0, access_type, + MMU_USER_IDX, false, pc); + g_assert_not_reached(); + } else { + sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); + } + + sync_sig = true; + } +#endif /* get target signal number */ - sig = host_to_target_signal(host_signum); - if (sig < 1 || sig > TARGET_NSIG) + guest_sig = host_to_target_signal(host_sig); + if (guest_sig < 1 || guest_sig > TARGET_NSIG) { return; - trace_user_host_signal(env, host_signum, sig); + } + trace_user_host_signal(env, host_sig, guest_sig); + + host_to_target_siginfo_noswap(&tinfo, info); + k = &ts->sigtab[guest_sig - 1]; + k->info = tinfo; + k->pending = guest_sig; + ts->signal_pending = 1; + +#ifndef HOST_SIGNAL_PLACEHOLDER + /* + * For synchronous signals, unwind the cpu state to the faulting + * insn and then exit back to the main loop so that the signal + * is delivered immediately. + */ + if (sync_sig) { + cpu->exception_index = EXCP_INTERRUPT; + cpu_loop_exit_restore(cpu, pc); + } +#endif rewind_if_in_safe_syscall(puc); - host_to_target_siginfo_noswap(&tinfo, info); - k = &ts->sigtab[sig - 1]; - k->info = tinfo; - k->pending = sig; - ts->signal_pending = 1; - - /* Block host signals until target signal handler entered. We + /* + * Block host signals until target signal handler entered. We * can't block SIGSEGV or SIGBUS while we're executing guest * code in case the guest code provokes one in the window between * now and it getting out to the main loop. Signals will be From patchwork Sat Sep 18 18:44:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503965 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 028AEC433F5 for ; Sat, 18 Sep 2021 19:00:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 53A4F611C8 for ; Sat, 18 Sep 2021 19:00:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 53A4F611C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:45568 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfa5-0005Dw-Bn for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:00:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54190) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLK-000524-EA for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]:56304) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLE-0006jk-Go for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:40 -0400 Received: by mail-pj1-x102d.google.com with SMTP id t20so9164754pju.5 for ; Sat, 18 Sep 2021 11:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eo69a6qpbSWMyVxfRxEgkjHG9EovPVD2b2o16GmRH3A=; b=tz26dHUzSgEaeloKdjrUtcC5Ka1F1/5+fS6P/FPNlrrLAxYILPReS5c04ALwMFA8Nc ZU3JAGjuHzoCGQb1GI3NcP/jT80p3xb0no5itXgBW/3F0uHlVfF38v7XjWjScPptDSWB sWdgH7pqTuXuu+0XaUtMvF0aRyJOaQvxhL6elWcK4yhZz5FlLIMUOrG1EgQlbDyrbdk8 uhVH2xEwTlTuBLTsBq8VY/Ikq0bWMXIb1/21C5yuZWlB2Dnn9FBFu/J4UltEKv9/AjVJ vakdAKoJgVLaDjOC8cYCfuMmeZoCTvfaEuvmGQ1jD4x5OXRNckCxWlpR0ki5rqdnoE8F D5KQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eo69a6qpbSWMyVxfRxEgkjHG9EovPVD2b2o16GmRH3A=; b=7H8c43dY0mx+r13seTiVSpNheUSVfPJQPqn4CVO0oEkNx687kvj7Ts4s+xOPmVgNS+ S1kFmgG4XGRvQPWstPSxAFb32TIc2hXqu9D/tDgKleJ5NjD4KVASa5xijFxJPG0GaPQ3 n5T/oNH2G1B9hT3XWHA4+Ao5KXwrtGAtX/f6QPYb9VzSGhuIlFs1aOSjUpls5p15US07 JCRWRUwKEvb2nJLoRWoHRgb6DwdWxYMTt6s1xlqUHbwqYhXWYT5zmKM7s/vDyY38N3MI zjVZuUs7EVHz06QvkXevqf0niJkjK3wlAiZt4XIx1Ma1dQhGnclcFA+0EJJdvmPlBMA3 8IvA== X-Gm-Message-State: AOAM532MU3ttSR09LfNHdV1fyjhfw3oM5bqLc/Cugd1q/to7X1mMr7Gx VA9oheR4ELa4UgiJr0BcWES3HSnJAIyfZg== X-Google-Smtp-Source: ABdhPJz6yQJ0WdlpTvXJqo14wYywFDzNhqadeZHYQRoTlOQxtLoLfhFkXBYZLs2AKHGX22rG8KlH8Q== X-Received: by 2002:a17:90a:7c42:: with SMTP id e2mr28208535pjl.132.1631990735185; Sat, 18 Sep 2021 11:45:35 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 07/41] linux-user/host/x86: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:53 -0700 Message-Id: <20210918184527.408540-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Drop the *BSD code, to be re-created under bsd-user/ later. Signed-off-by: Richard Henderson --- linux-user/host/i386/host-signal.h | 25 ++++- linux-user/host/x32/host-signal.h | 2 +- linux-user/host/x86_64/host-signal.h | 25 ++++- accel/tcg/user-exec.c | 136 +-------------------------- 4 files changed, 50 insertions(+), 138 deletions(-) diff --git a/linux-user/host/i386/host-signal.h b/linux-user/host/i386/host-signal.h index f4b4d65031..ccbbee5082 100644 --- a/linux-user/host/i386/host-signal.h +++ b/linux-user/host/i386/host-signal.h @@ -1 +1,24 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef I386_HOST_SIGNAL_H +#define I386_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.gregs[REG_EIP]; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + return uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe + && (uc->uc_mcontext.gregs[REG_ERR] & 0x2); +} + +#endif diff --git a/linux-user/host/x32/host-signal.h b/linux-user/host/x32/host-signal.h index f4b4d65031..26800591d3 100644 --- a/linux-user/host/x32/host-signal.h +++ b/linux-user/host/x32/host-signal.h @@ -1 +1 @@ -#define HOST_SIGNAL_PLACEHOLDER +#include "../x86_64/host-signal.h" diff --git a/linux-user/host/x86_64/host-signal.h b/linux-user/host/x86_64/host-signal.h index f4b4d65031..883d2fcf65 100644 --- a/linux-user/host/x86_64/host-signal.h +++ b/linux-user/host/x86_64/host-signal.h @@ -1 +1,24 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef X86_64_HOST_SIGNAL_H +#define X86_64_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.gregs[REG_RIP]; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + return uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe + && (uc->uc_mcontext.gregs[REG_ERR] & 0x2); +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index de4565f13e..b5d06183db 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -29,19 +29,6 @@ #include "trace/trace-root.h" #include "trace/mem.h" -#undef EAX -#undef ECX -#undef EDX -#undef EBX -#undef ESP -#undef EBP -#undef ESI -#undef EDI -#undef EIP -#ifdef __linux__ -#include -#endif - __thread uintptr_t helper_retaddr; //#define DEBUG_SIGNAL @@ -268,123 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__i386__) - -#if defined(__NetBSD__) -#include -#include - -#define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP]) -#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO]) -#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR]) -#define MASK_sig(context) ((context)->uc_sigmask) -#define PAGE_FAULT_TRAP T_PAGEFLT -#elif defined(__FreeBSD__) || defined(__DragonFly__) -#include -#include - -#define EIP_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_eip)) -#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno) -#define ERROR_sig(context) ((context)->uc_mcontext.mc_err) -#define MASK_sig(context) ((context)->uc_sigmask) -#define PAGE_FAULT_TRAP T_PAGEFLT -#elif defined(__OpenBSD__) -#include -#define EIP_sig(context) ((context)->sc_eip) -#define TRAP_sig(context) ((context)->sc_trapno) -#define ERROR_sig(context) ((context)->sc_err) -#define MASK_sig(context) ((context)->sc_mask) -#define PAGE_FAULT_TRAP T_PAGEFLT -#else -#define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP]) -#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO]) -#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR]) -#define MASK_sig(context) ((context)->uc_sigmask) -#define PAGE_FAULT_TRAP 0xe -#endif - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; -#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__) - ucontext_t *uc = puc; -#elif defined(__OpenBSD__) - struct sigcontext *uc = puc; -#else - ucontext_t *uc = puc; -#endif - unsigned long pc; - int trapno; - -#ifndef REG_EIP -/* for glibc 2.1 */ -#define REG_EIP EIP -#define REG_ERR ERR -#define REG_TRAPNO TRAPNO -#endif - pc = EIP_sig(uc); - trapno = TRAP_sig(uc); - return handle_cpu_signal(pc, info, - trapno == PAGE_FAULT_TRAP ? - (ERROR_sig(uc) >> 1) & 1 : 0, - &MASK_sig(uc)); -} - -#elif defined(__x86_64__) - -#ifdef __NetBSD__ -#include -#define PC_sig(context) _UC_MACHINE_PC(context) -#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO]) -#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR]) -#define MASK_sig(context) ((context)->uc_sigmask) -#define PAGE_FAULT_TRAP T_PAGEFLT -#elif defined(__OpenBSD__) -#include -#define PC_sig(context) ((context)->sc_rip) -#define TRAP_sig(context) ((context)->sc_trapno) -#define ERROR_sig(context) ((context)->sc_err) -#define MASK_sig(context) ((context)->sc_mask) -#define PAGE_FAULT_TRAP T_PAGEFLT -#elif defined(__FreeBSD__) || defined(__DragonFly__) -#include -#include - -#define PC_sig(context) (*((unsigned long *)&(context)->uc_mcontext.mc_rip)) -#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno) -#define ERROR_sig(context) ((context)->uc_mcontext.mc_err) -#define MASK_sig(context) ((context)->uc_sigmask) -#define PAGE_FAULT_TRAP T_PAGEFLT -#else -#define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP]) -#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO]) -#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR]) -#define MASK_sig(context) ((context)->uc_sigmask) -#define PAGE_FAULT_TRAP 0xe -#endif - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; - unsigned long pc; -#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__) - ucontext_t *uc = puc; -#elif defined(__OpenBSD__) - struct sigcontext *uc = puc; -#else - ucontext_t *uc = puc; -#endif - - pc = PC_sig(uc); - return handle_cpu_signal(pc, info, - TRAP_sig(uc) == PAGE_FAULT_TRAP ? - (ERROR_sig(uc) >> 1) & 1 : 0, - &MASK_sig(uc)); -} - -#elif defined(_ARCH_PPC) +#if defined(_ARCH_PPC) /*********************************************************************** * signal context platform-specific definitions @@ -895,11 +766,6 @@ int cpu_signal_handler(int host_signum, void *pinfo, return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); } - -#else - -#error host CPU specific signal handler needed - #endif /* The softmmu versions of these helpers are in cputlb.c. */ From patchwork Sat Sep 18 18:44:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503933 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1617C433F5 for ; Sat, 18 Sep 2021 18:48:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D9EE61179 for ; Sat, 18 Sep 2021 18:48:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6D9EE61179 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:39996 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfO4-0007rc-Aj for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:48:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54196) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLK-000526-I4 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]:39759) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLF-0006kj-CA for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: by mail-pf1-x434.google.com with SMTP id e16so12349759pfc.6 for ; Sat, 18 Sep 2021 11:45:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QHZIGAsKEZU6jgHWjM6GlNTI+lnbqqDGKIT8+9oO0ok=; b=ZM8Xb/RpdDj0khlx1dZap2im91hAMNYzu9BK6Uh1BWQdI91zWGTyKSNDTCbhBVuQmH WOMJqc02oCVqa7r7LlMZvQhERia/1iS5ZtrV1UV40Qp6Gnl+OozQOshRGUBoREQU6P+3 oAdZt3eNG8g7D1MekBqtpn9WI9+6mcZsdxpj2s7xKXg9ZBpD95vgvCtr8TfJUaVIgVDW 7qMTa1Hv2eAy6WUYZ8SAb5+ncwANgYl1Ejeo4MjME6Bd8SYvNM/Z+RMyVVK/x0AuT/aX zrk0L+yb9Ul+NH6iVBiWQvWoYoZaIVbD656M6Xm0s8oGbfRFGj8OW26hW7vBpT3amcvC LRNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QHZIGAsKEZU6jgHWjM6GlNTI+lnbqqDGKIT8+9oO0ok=; b=ER3QTWhoPQCy+5os0C75EYPow4r2ax4VZ36jAKsswK4eduqOSCGlekCaYOyZO21cTz 5NgWgIW6lVd3cw4bt7Lda35ivyf2oQlLUw6PYR7lEvyJfkwUZQZNhRqblCfjVGKAb06/ FipvI0ttyPv98INlbP7tta9UsZH1FE9o4qLh0zakVJJFRf0t++NUCDEC7koD7MkjGdbn LQLor8qne6XxlFhH1b+2dPmpNqnjHkvoWVDhyWOPRdJvWmTgJr4sFZ1uTnRPBBIWxVoO 0XIPSJUX80n1TTTcRnQR5Eduh+i3oC5/vV3xCkqNRinJWJp+ky6Q7V+d/7EEVbRY0517 zi/A== X-Gm-Message-State: AOAM531WEfsKmT3kt9gCaao6CwkZSxS3HEsLywioWSHJfr+BptPT6D0M 5H1ReTtqnJ25p3Q2NPKvHZm73biS4ZYe1A== X-Google-Smtp-Source: ABdhPJyMUawFv/u8h08SgvtEaAgZ1qoAd+yrtdU3+IvP7rKberSMcFBj2I1sYqyx/KDyJ6ctn8ds5g== X-Received: by 2002:a63:155d:: with SMTP id 29mr15965269pgv.118.1631990736018; Sat, 18 Sep 2021 11:45:36 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 08/41] linux-user/host/ppc: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:54 -0700 Message-Id: <20210918184527.408540-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Drop the *BSD code, to be re-created under bsd-user/ later. Signed-off-by: Richard Henderson Reviewed-by: Warner Losh --- linux-user/host/ppc/host-signal.h | 25 ++++++++- linux-user/host/ppc64/host-signal.h | 2 +- accel/tcg/user-exec.c | 79 +---------------------------- 3 files changed, 26 insertions(+), 80 deletions(-) diff --git a/linux-user/host/ppc/host-signal.h b/linux-user/host/ppc/host-signal.h index f4b4d65031..e09756c691 100644 --- a/linux-user/host/ppc/host-signal.h +++ b/linux-user/host/ppc/host-signal.h @@ -1 +1,24 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef PPC_HOST_SIGNAL_H +#define PPC_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.regs->nip; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + return uc->uc_mcontext.regs->trap != 0x400 + && (uc->uc_mcontext.regs->dsisr & 0x02000000); +} + +#endif diff --git a/linux-user/host/ppc64/host-signal.h b/linux-user/host/ppc64/host-signal.h index f4b4d65031..a353c22a90 100644 --- a/linux-user/host/ppc64/host-signal.h +++ b/linux-user/host/ppc64/host-signal.h @@ -1 +1 @@ -#define HOST_SIGNAL_PLACEHOLDER +#include "../ppc/host-signal.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index b5d06183db..e9e530e2e1 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,84 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(_ARCH_PPC) - -/*********************************************************************** - * signal context platform-specific definitions - * From Wine - */ -#ifdef linux -/* All Registers access - only for local access */ -#define REG_sig(reg_name, context) \ - ((context)->uc_mcontext.regs->reg_name) -/* Gpr Registers access */ -#define GPR_sig(reg_num, context) REG_sig(gpr[reg_num], context) -/* Program counter */ -#define IAR_sig(context) REG_sig(nip, context) -/* Machine State Register (Supervisor) */ -#define MSR_sig(context) REG_sig(msr, context) -/* Count register */ -#define CTR_sig(context) REG_sig(ctr, context) -/* User's integer exception register */ -#define XER_sig(context) REG_sig(xer, context) -/* Link register */ -#define LR_sig(context) REG_sig(link, context) -/* Condition register */ -#define CR_sig(context) REG_sig(ccr, context) - -/* Float Registers access */ -#define FLOAT_sig(reg_num, context) \ - (((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num]) -#define FPSCR_sig(context) \ - (*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4))) -/* Exception Registers access */ -#define DAR_sig(context) REG_sig(dar, context) -#define DSISR_sig(context) REG_sig(dsisr, context) -#define TRAP_sig(context) REG_sig(trap, context) -#endif /* linux */ - -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) -#include -#define IAR_sig(context) ((context)->uc_mcontext.mc_srr0) -#define MSR_sig(context) ((context)->uc_mcontext.mc_srr1) -#define CTR_sig(context) ((context)->uc_mcontext.mc_ctr) -#define XER_sig(context) ((context)->uc_mcontext.mc_xer) -#define LR_sig(context) ((context)->uc_mcontext.mc_lr) -#define CR_sig(context) ((context)->uc_mcontext.mc_cr) -/* Exception Registers access */ -#define DAR_sig(context) ((context)->uc_mcontext.mc_dar) -#define DSISR_sig(context) ((context)->uc_mcontext.mc_dsisr) -#define TRAP_sig(context) ((context)->uc_mcontext.mc_exc) -#endif /* __FreeBSD__|| __FreeBSD_kernel__ */ - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; -#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) - ucontext_t *uc = puc; -#else - ucontext_t *uc = puc; -#endif - unsigned long pc; - int is_write; - - pc = IAR_sig(uc); - is_write = 0; -#if 0 - /* ppc 4xx case */ - if (DSISR_sig(uc) & 0x00800000) { - is_write = 1; - } -#else - if (TRAP_sig(uc) != 0x400 && (DSISR_sig(uc) & 0x02000000)) { - is_write = 1; - } -#endif - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} - -#elif defined(__alpha__) +#if defined(__alpha__) int cpu_signal_handler(int host_signum, void *pinfo, void *puc) From patchwork Sat Sep 18 18:44:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9D0DC4332F for ; Sat, 18 Sep 2021 18:48:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7822460E94 for ; Sat, 18 Sep 2021 18:48:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7822460E94 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:40262 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfO6-000820-Gv for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:48:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54192) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLK-000525-Gl for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]:37445) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLG-0006kz-JE for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:41 -0400 Received: by mail-pl1-x630.google.com with SMTP id j14so1253770plx.4 for ; Sat, 18 Sep 2021 11:45:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9mBw19ydcFw0MZKZsGTXe7n/L8er4q9+1e7zu/IzZgY=; b=HpondtEe5NwcfhVEu9imHmo3xr4RITbfu4Qcj/JlV8uK+TOTYdHqbDj/UUqctHcBDq FrzfGgObJj+QuQ3LLwgx5A/j244swJ09O/PGg9/Cu9TGySnQS87N6aWhvy8ApdyET4Br BI4xNDEpzGLoX6XU7Q7YivK0LcWKMiReuxuq92PpnAYPcIyXOZRKnsCDt4iRgZu7Y+lp s2KuJ4nYySCzbhyY5AJxbQpPnX4h7rN5W4iWz2/L1u/rLmFVql4MQ6hfdRyWOcRvorc/ 0YTI8ib+BnNu8fbhBTC+pHZNaASsK9Sbwg1Y283jYB8UsCyjGph04F/7ib/q7R5mwoPF Z4mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9mBw19ydcFw0MZKZsGTXe7n/L8er4q9+1e7zu/IzZgY=; b=7fvLVkgyp7tDpuHQTuQIbEzNQl1lL+6Vq6d8Do3wlYuIa9+zW3TCdpjh4dYSudNfyM D6NgrtT1p7LX+e2ZtIUbDBClxkwuSPuQ3fyz0qDJ/zY7rmwT6JPi/V/qAdGntKCzd3Bk ZNqJwnmW+76aPoFfuOTqjGjk4r3Dmig+5RtWubMhyArBsIkNTGK1QQ/ed4CfScInGgyy mITI+Bfk5RWW0FbLB+jgo6I9DcG1LpJZL/ZkI0EOaanx3xRmCqrwWxEWHGCdadHrWE9g 6pADKYl/9sBpf7WKXcM7SY6peOoK39jqi6hIodUinIj9ZdXRHvLii+MtQ1qrJtPZRb2q C7iQ== X-Gm-Message-State: AOAM533mSZTkPqUlqnkwHYj0eUBgTUinwHs5l5JeaNyAA8JBFVbFRyub g5zLO+HRq3wVKqNZ8oJO2mhMLbjbH4jRsA== X-Google-Smtp-Source: ABdhPJym1YMK0fYWLVJd5kjBBjS/TqC2TrG11OH2PgaUrvkGs/aJLuYH1yEVYwG6k4wsQazMk1QZ1A== X-Received: by 2002:a17:90a:578e:: with SMTP id g14mr28897463pji.184.1631990736811; Sat, 18 Sep 2021 11:45:36 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 09/41] linux-user/host/alpha: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:55 -0700 Message-Id: <20210918184527.408540-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- linux-user/host/alpha/host-signal.h | 41 +++++++++++++++++++++++++++++ accel/tcg/user-exec.c | 31 +--------------------- 2 files changed, 42 insertions(+), 30 deletions(-) create mode 100644 linux-user/host/alpha/host-signal.h diff --git a/linux-user/host/alpha/host-signal.h b/linux-user/host/alpha/host-signal.h new file mode 100644 index 0000000000..b0b488e004 --- /dev/null +++ b/linux-user/host/alpha/host-signal.h @@ -0,0 +1,41 @@ +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef ALPHA_HOST_SIGNAL_H +#define ALPHA_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.sc_pc; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + uint32_t *pc = uc->uc_mcontext.sc_pc; + uint32_t insn = *pc; + + /* XXX: need kernel patch to get write flag faster */ + switch (insn >> 26) { + case 0x0d: /* stw */ + case 0x0e: /* stb */ + case 0x0f: /* stq_u */ + case 0x24: /* stf */ + case 0x25: /* stg */ + case 0x26: /* sts */ + case 0x27: /* stt */ + case 0x2c: /* stl */ + case 0x2d: /* stq */ + case 0x2e: /* stl_c */ + case 0x2f: /* stq_c */ + return true; + } + return false; +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index e9e530e2e1..b895b5c8bd 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,36 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__alpha__) - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; - ucontext_t *uc = puc; - uint32_t *pc = uc->uc_mcontext.sc_pc; - uint32_t insn = *pc; - int is_write = 0; - - /* XXX: need kernel patch to get write flag faster */ - switch (insn >> 26) { - case 0x0d: /* stw */ - case 0x0e: /* stb */ - case 0x0f: /* stq_u */ - case 0x24: /* stf */ - case 0x25: /* stg */ - case 0x26: /* sts */ - case 0x27: /* stt */ - case 0x2c: /* stl */ - case 0x2d: /* stq */ - case 0x2e: /* stl_c */ - case 0x2f: /* stq_c */ - is_write = 1; - } - - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} -#elif defined(__sparc__) +#if defined(__sparc__) int cpu_signal_handler(int host_signum, void *pinfo, void *puc) From patchwork Sat Sep 18 18:44:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D561C433F5 for ; Sat, 18 Sep 2021 18:57:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A4979610A6 for ; Sat, 18 Sep 2021 18:57:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org A4979610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:37086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfWp-0007vG-Oi for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:57:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54198) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLK-000527-JA for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]:54053) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLI-0006lk-1T for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: by mail-pj1-x1031.google.com with SMTP id j1so9165758pjv.3 for ; Sat, 18 Sep 2021 11:45:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SHk0L4QVJKHbdhHw2ZILrKhqMEpfB7Y/GR3loPVJEL4=; b=nTuFN6ExcAbB5kojnWNRP4ueLH1z9j+ADznJT0cxugPL4kQy0fjs2PwO/QasCivLxg cq3oYofK0lqddWQp2Oa3B6WuXFd8o1DBAkSNZNuoZVk2Wy5+miDf5NeH6byO6DkOyhXy g6/K4jEgqCYtPBFgI6w/vl0k7CqiSBxLQcarDVRXSd0dTtl8E2EUSXdjV+o3EpPst22r qdevtRtC0vZ5A72z63lE7rvQhPfGuyAKLwKRGKScGZYmERH6mzuw2e9oxep+5L3EaSXE UdlCXAfzlGTbnmOlyLf9YPi9xGMgxvfYSSK3u1Pwfb1Ld7+NxHPhk53qQ/yUx8i3+vty ufeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SHk0L4QVJKHbdhHw2ZILrKhqMEpfB7Y/GR3loPVJEL4=; b=nPWbRTKuP7WlHSRsX48X+jNV0XR4Q2go6FTmQbToJKEJtrrLo2CqP5Ou4Bn0xDuTAO kvGRZkRkgOxpIj7y3V5KkzyarPSDBBfNxSxYY892yTrx4PuOe5TqF3/KX+9tscGwPFor gIgzGpFWuIkoW+RxSifvdwuFKVO6n7UegFLQ4x03ZWS9yEUvtFUKrbsrruONdEL0tNNf BF4YLKKZeOTRzBYfikoZtdng74pwUu9jrPP5vm8Tr5v0eyo9gNZU3qMmzCfCDe0iUNNO 8J7kE1YRliVYQJg0tI/4cO+9Zyxo1+L1tlnYOT6LfneEiU0cqV+8FuE40jfzvzCgIrRH nqVw== X-Gm-Message-State: AOAM531bzvbjMphrQy4xUwHJstvfddMsY9hp7sRMqWDi5CkRKJuNn4yQ 3YOqUTtv6Vo28ah9cYlVg1Sg//SBVuL4zQ== X-Google-Smtp-Source: ABdhPJxfUmk1OQ4cG04DRf60D4/UFydvG9JKdxoE+eu0bcif+jl5U+NLmJOztqqd/bzEB7vfvV/9+Q== X-Received: by 2002:a17:90a:f002:: with SMTP id bt2mr28897766pjb.207.1631990737690; Sat, 18 Sep 2021 11:45:37 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 10/41] linux-user/host/sparc: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:56 -0700 Message-Id: <20210918184527.408540-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -1 X-Spam_score: -0.2 X-Spam_bar: / X-Spam_report: (-0.2 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Drop the *BSD code, to be re-created under bsd-user/ later. Drop the Solais code as completely unused. Signed-off-by: Richard Henderson --- linux-user/host/sparc/host-signal.h | 54 ++++++++++++++++++++++- linux-user/host/sparc64/host-signal.h | 2 +- accel/tcg/user-exec.c | 62 +-------------------------- 3 files changed, 55 insertions(+), 63 deletions(-) diff --git a/linux-user/host/sparc/host-signal.h b/linux-user/host/sparc/host-signal.h index f4b4d65031..232943a1db 100644 --- a/linux-user/host/sparc/host-signal.h +++ b/linux-user/host/sparc/host-signal.h @@ -1 +1,53 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef SPARC_HOST_SIGNAL_H +#define SPARC_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ +#ifdef __arch64__ + return uc->uc_mcontext.mc_gregs[MC_PC]; +#else + return uc->uc_mcontext.gregs[REG_PC]; +#endif +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + uint32_t insn = *(uint32_t *)host_signal_pc(uc); + + if ((insn >> 30) == 3) { + switch ((insn >> 19) & 0x3f) { + case 0x05: /* stb */ + case 0x15: /* stba */ + case 0x06: /* sth */ + case 0x16: /* stha */ + case 0x04: /* st */ + case 0x14: /* sta */ + case 0x07: /* std */ + case 0x17: /* stda */ + case 0x0e: /* stx */ + case 0x1e: /* stxa */ + case 0x24: /* stf */ + case 0x34: /* stfa */ + case 0x27: /* stdf */ + case 0x37: /* stdfa */ + case 0x26: /* stqf */ + case 0x36: /* stqfa */ + case 0x25: /* stfsr */ + case 0x3c: /* casa */ + case 0x3e: /* casxa */ + return true; + } + } + return false; +} + +#endif diff --git a/linux-user/host/sparc64/host-signal.h b/linux-user/host/sparc64/host-signal.h index f4b4d65031..1191fe2d40 100644 --- a/linux-user/host/sparc64/host-signal.h +++ b/linux-user/host/sparc64/host-signal.h @@ -1 +1 @@ -#define HOST_SIGNAL_PLACEHOLDER +#include "../sparc/host-signal.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index b895b5c8bd..c7d083db92 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,67 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__sparc__) - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; - int is_write; - uint32_t insn; -#if !defined(__arch64__) || defined(CONFIG_SOLARIS) - uint32_t *regs = (uint32_t *)(info + 1); - void *sigmask = (regs + 20); - /* XXX: is there a standard glibc define ? */ - unsigned long pc = regs[1]; -#else -#ifdef __linux__ - struct sigcontext *sc = puc; - unsigned long pc = sc->sigc_regs.tpc; - void *sigmask = (void *)sc->sigc_mask; -#elif defined(__OpenBSD__) - struct sigcontext *uc = puc; - unsigned long pc = uc->sc_pc; - void *sigmask = (void *)(long)uc->sc_mask; -#elif defined(__NetBSD__) - ucontext_t *uc = puc; - unsigned long pc = _UC_MACHINE_PC(uc); - void *sigmask = (void *)&uc->uc_sigmask; -#endif -#endif - - /* XXX: need kernel patch to get write flag faster */ - is_write = 0; - insn = *(uint32_t *)pc; - if ((insn >> 30) == 3) { - switch ((insn >> 19) & 0x3f) { - case 0x05: /* stb */ - case 0x15: /* stba */ - case 0x06: /* sth */ - case 0x16: /* stha */ - case 0x04: /* st */ - case 0x14: /* sta */ - case 0x07: /* std */ - case 0x17: /* stda */ - case 0x0e: /* stx */ - case 0x1e: /* stxa */ - case 0x24: /* stf */ - case 0x34: /* stfa */ - case 0x27: /* stdf */ - case 0x37: /* stdfa */ - case 0x26: /* stqf */ - case 0x36: /* stqfa */ - case 0x25: /* stfsr */ - case 0x3c: /* casa */ - case 0x3e: /* casxa */ - is_write = 1; - break; - } - } - return handle_cpu_signal(pc, info, is_write, sigmask); -} - -#elif defined(__arm__) +#if defined(__arm__) #if defined(__NetBSD__) #include From patchwork Sat Sep 18 18:44:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503967 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80C24C433EF for ; Sat, 18 Sep 2021 19:01:26 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 221D9610A6 for ; Sat, 18 Sep 2021 19:01:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 221D9610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:45816 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfaX-0005Ok-3R for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:01:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54204) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLK-00052Q-RL for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:43 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]:52172) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLI-0006m9-00 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:42 -0400 Received: by mail-pj1-x1036.google.com with SMTP id dw14so9179701pjb.1 for ; Sat, 18 Sep 2021 11:45:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sCS25t/S/07LT/4q9hu7ybFQaqd9aKvTlaQnlQkDGSw=; b=Vp2sGT18b2W/SP/8Cb+DZnoCgQy8OdRkWcjxnYVfJr5238XGvPSZPLJ9lC2m/fvZPn PDGkyeDMVzpxJvZXJFAR2tZHCLjoh75l8Alh+LHPLFgKIY/ZuDho0XwDvEfY90bcTwEu 3tBP3ZyAC2QTFKlFcUfDEUNeu56Uqtze42EN8z5pGE3nin3kQiSTlOA/tGJV6XfiMA4/ VXLPF2g2kmSEu1tnvk+INDqcxxrDynSjf7oC6p83eKcuirQzt3OuFQvLObPRwlyq/VYA V3oFRdgUR5Ax6j6i7f259gvO34znnxeRC0SVYw7gdARhWG6Se08dk3hCQvMKEOIDvee9 UoiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sCS25t/S/07LT/4q9hu7ybFQaqd9aKvTlaQnlQkDGSw=; b=0bTxqFFIdhlr7QyGoazalFQPGq1lAoE2DOxQsp0g9Mwyk+6wfmKsMhXrPE0oe1Z7aI 1KPulMbamm8EXCOuSnIhaQLl5vauMiplhWOdRihojpkbeZwDbzQJ41I10Hkd9vEeQFLg cZYvvr5+kWqHRu2v08pxwqAc5lCY1roKYdjCWIzvJXdIcgJ3R1gPofTl9InCVnxqs0rr Uj5aEQ99BMzb9jnPpcU1K5WHj4HBNzP4JHzSWqlQ+jDrv/ktOvyrvmuWum3Uy9O2g5G2 v7qfUrh6HjJRheCzGOk7x1I0WZ+IAC9CrCY1i3YucCyZTde/OeiFf8J0nzjIRL5oGC9X J60A== X-Gm-Message-State: AOAM530FAUP5h1BXviiYWrnBwPwQpR7Trqw/727/zvIdhku1aOiQixYZ mIAqqMPZYcsE6oXghqIEfd6koWyWDSxOJQ== X-Google-Smtp-Source: ABdhPJzZbN93aIOqQ/vZYR9u/3F8dH/AcxxDNPD1liwuSqCPoFv/HE3eqk/DBe2ttFflbRkjCFYZNg== X-Received: by 2002:a17:90b:4b52:: with SMTP id mi18mr19506767pjb.112.1631990738295; Sat, 18 Sep 2021 11:45:38 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 11/41] linux-user/host/arm: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:57 -0700 Message-Id: <20210918184527.408540-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Drop the *BSD code, to be re-created under bsd-user/ later. Signed-off-by: Richard Henderson --- linux-user/host/arm/host-signal.h | 30 ++++++++++++++++++++- accel/tcg/user-exec.c | 45 +------------------------------ 2 files changed, 30 insertions(+), 45 deletions(-) diff --git a/linux-user/host/arm/host-signal.h b/linux-user/host/arm/host-signal.h index f4b4d65031..6932224c1c 100644 --- a/linux-user/host/arm/host-signal.h +++ b/linux-user/host/arm/host-signal.h @@ -1 +1,29 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef ARM_HOST_SIGNAL_H +#define ARM_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.arm_pc; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + /* + * In the FSR, bit 11 is WnR, assuming a v6 or + * later processor. On v5 we will always report + * this as a read, which will fail later. + */ + uint32_t fsr = uc->uc_mcontext.error_code; + return extract32(fsr, 11, 1); +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index c7d083db92..e9c29f917d 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,50 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__arm__) - -#if defined(__NetBSD__) -#include -#include -#endif - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; -#if defined(__NetBSD__) - ucontext_t *uc = puc; - siginfo_t *si = pinfo; -#else - ucontext_t *uc = puc; -#endif - unsigned long pc; - uint32_t fsr; - int is_write; - -#if defined(__NetBSD__) - pc = uc->uc_mcontext.__gregs[_REG_R15]; -#elif defined(__GLIBC__) && (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ <= 3)) - pc = uc->uc_mcontext.gregs[R15]; -#else - pc = uc->uc_mcontext.arm_pc; -#endif - -#ifdef __NetBSD__ - fsr = si->si_trap; -#else - fsr = uc->uc_mcontext.error_code; -#endif - /* - * In the FSR, bit 11 is WnR, assuming a v6 or - * later processor. On v5 we will always report - * this as a read, which will fail later. - */ - is_write = extract32(fsr, 11, 1); - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} - -#elif defined(__aarch64__) +#if defined(__aarch64__) #if defined(__NetBSD__) From patchwork Sat Sep 18 18:44:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503983 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5873C433F5 for ; Sat, 18 Sep 2021 19:07:08 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1F30E60F23 for ; Sat, 18 Sep 2021 19:07:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1F30E60F23 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:33922 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfg3-000889-85 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:07:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54290) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLO-00057J-Fl for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:50 -0400 Received: from mail-pj1-x102e.google.com ([2607:f8b0:4864:20::102e]:56305) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLK-0006nA-7q for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:46 -0400 Received: by mail-pj1-x102e.google.com with SMTP id t20so9164818pju.5 for ; Sat, 18 Sep 2021 11:45:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xfI870gEd9IvWUORblCHYU3iuTigO27Yz4cJ6DbnRFo=; b=oUniL/9xNl8w1wiEjPGH3yHmb+yEFsfqNTHjbsBhln7vY1kPdc+m6HHY2rCDJ5/rGr ckb2SG52iLsCAge8nGkOgzgdhKzwznme3/Ehury1VRnlWOf6yah9Q6i/2/CXiVE4C7Or aDdaJRmDBHVve3AdoXxuxZgI/h6mjrZ+Z9waCGmZNggwona6FGQreyi2fagM4OXMsoZS wBKabZ76qK2TclszQH0CIJ7mZWzrW17rNsXHf6DOOt+RQVr/c+4baZ2AGlwwKA3bA/6D IYdWYv5aYEE5yDD79IjWEGlOSH1F5Y9otJDz4Xy3VHEZG5EnvrGmYGugSAUhI/zKwYm5 Zn+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xfI870gEd9IvWUORblCHYU3iuTigO27Yz4cJ6DbnRFo=; b=Xo7dM66OMsf6maot+9/hRmQScy3XPkw8AH8acNUxONZPcNuPO4s89aRJAQZkMxR3Vb RLKFC3nk2OFwMtH0zU/HcHu/MtZZUFjBis9xbIoVfT/1Uaka/1lHCOVIEWwKtppxlFSG EkZneVwJtVXEM+Wb2cRQ0YkDXCZqtb1uwuxK2qo6BAkdfGqBL4lkpCiwg9N7jbfsnWqv uiAGvrMEtRI7s6djfWGze+mnwos4HQ8FlDkRFoSLZgxob2u4VDUkycEb3TqExMpeHRZ9 AQ77KqEKe0SeVTafEiOPz+25ZOTbxBEcOJyrueeJWP9wqHHyVfBDMdN3QPSxh8voYmjA /UwQ== X-Gm-Message-State: AOAM5326mvVbNZCGPUbafsYNg/tqJzznhWaEGyAZ+qISmxTedqmToo2N XDIGBHikcVLUkZGER03fLnrq+zqse5MgOA== X-Google-Smtp-Source: ABdhPJweMc9Wj9Lvpm2TLXwJhJZrkKKNltvI7iEjZvS7/3aChfpjSCrWSDDku2YUAT7P4IGrfxCEDw== X-Received: by 2002:a17:90a:bd08:: with SMTP id y8mr19553097pjr.123.1631990739313; Sat, 18 Sep 2021 11:45:39 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 12/41] linux-user/host/aarch64: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:58 -0700 Message-Id: <20210918184527.408540-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Drop the *BSD code, to be re-created under bsd-user/ later. Signed-off-by: Richard Henderson --- linux-user/host/aarch64/host-signal.h | 74 ++++++++++++++++++++- accel/tcg/user-exec.c | 94 +-------------------------- 2 files changed, 74 insertions(+), 94 deletions(-) diff --git a/linux-user/host/aarch64/host-signal.h b/linux-user/host/aarch64/host-signal.h index f4b4d65031..02a55c3372 100644 --- a/linux-user/host/aarch64/host-signal.h +++ b/linux-user/host/aarch64/host-signal.h @@ -1 +1,73 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef AARCH64_HOST_SIGNAL_H +#define AARCH64_HOST_SIGNAL_H + +/* Pre-3.16 kernel headers don't have these, so provide fallback definitions */ +#ifndef ESR_MAGIC +#define ESR_MAGIC 0x45535201 +struct esr_context { + struct _aarch64_ctx head; + uint64_t esr; +}; +#endif + +static inline struct _aarch64_ctx *first_ctx(ucontext_t *uc) +{ + return (struct _aarch64_ctx *)&uc->uc_mcontext.__reserved; +} + +static inline struct _aarch64_ctx *next_ctx(struct _aarch64_ctx *hdr) +{ + return (struct _aarch64_ctx *)((char *)hdr + hdr->size); +} + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.pc; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + struct _aarch64_ctx *hdr; + uint32_t insn; + + /* Find the esr_context, which has the WnR bit in it */ + for (hdr = first_ctx(uc); hdr->magic; hdr = next_ctx(hdr)) { + if (hdr->magic == ESR_MAGIC) { + struct esr_context const *ec = (struct esr_context const *)hdr; + uint64_t esr = ec->esr; + + /* For data aborts ESR.EC is 0b10010x: then bit 6 is the WnR bit */ + return extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) == 1; + } + } + + /* + * Fall back to parsing instructions; will only be needed + * for really ancient (pre-3.16) kernels. + */ + insn = *(uint32_t *)host_signal_pc(uc); + + return (insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */ + || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */ + || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */ + || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */ + || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */ + || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */ + || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit */ + /* Ignore bits 10, 11 & 21, controlling indexing. */ + || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */ + || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit */ + /* Ignore bits 23 & 24, controlling indexing. */ + || (insn & 0x3a400000) == 0x28000000; /* C3.3.7,14-16 */ +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index e9c29f917d..8f4e788304 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,99 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__aarch64__) - -#if defined(__NetBSD__) - -#include -#include - -int cpu_signal_handler(int host_signum, void *pinfo, void *puc) -{ - ucontext_t *uc = puc; - siginfo_t *si = pinfo; - unsigned long pc; - int is_write; - uint32_t esr; - - pc = uc->uc_mcontext.__gregs[_REG_PC]; - esr = si->si_trap; - - /* - * siginfo_t::si_trap is the ESR value, for data aborts ESR.EC - * is 0b10010x: then bit 6 is the WnR bit - */ - is_write = extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) == 1; - return handle_cpu_signal(pc, si, is_write, &uc->uc_sigmask); -} - -#else - -#ifndef ESR_MAGIC -/* Pre-3.16 kernel headers don't have these, so provide fallback definitions */ -#define ESR_MAGIC 0x45535201 -struct esr_context { - struct _aarch64_ctx head; - uint64_t esr; -}; -#endif - -static inline struct _aarch64_ctx *first_ctx(ucontext_t *uc) -{ - return (struct _aarch64_ctx *)&uc->uc_mcontext.__reserved; -} - -static inline struct _aarch64_ctx *next_ctx(struct _aarch64_ctx *hdr) -{ - return (struct _aarch64_ctx *)((char *)hdr + hdr->size); -} - -int cpu_signal_handler(int host_signum, void *pinfo, void *puc) -{ - siginfo_t *info = pinfo; - ucontext_t *uc = puc; - uintptr_t pc = uc->uc_mcontext.pc; - bool is_write; - struct _aarch64_ctx *hdr; - struct esr_context const *esrctx = NULL; - - /* Find the esr_context, which has the WnR bit in it */ - for (hdr = first_ctx(uc); hdr->magic; hdr = next_ctx(hdr)) { - if (hdr->magic == ESR_MAGIC) { - esrctx = (struct esr_context const *)hdr; - break; - } - } - - if (esrctx) { - /* For data aborts ESR.EC is 0b10010x: then bit 6 is the WnR bit */ - uint64_t esr = esrctx->esr; - is_write = extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) == 1; - } else { - /* - * Fall back to parsing instructions; will only be needed - * for really ancient (pre-3.16) kernels. - */ - uint32_t insn = *(uint32_t *)pc; - - is_write = ((insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */ - || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */ - || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */ - || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */ - || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */ - || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */ - || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit */ - /* Ignore bits 10, 11 & 21, controlling indexing. */ - || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */ - || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit */ - /* Ignore bits 23 & 24, controlling indexing. */ - || (insn & 0x3a400000) == 0x28000000); /* C3.3.7,14-16 */ - } - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} -#endif - -#elif defined(__s390__) +#if defined(__s390__) int cpu_signal_handler(int host_signum, void *pinfo, void *puc) From patchwork Sat Sep 18 18:44:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503955 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B73A3C433EF for ; Sat, 18 Sep 2021 18:54:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 38DA2611C8 for ; Sat, 18 Sep 2021 18:54:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 38DA2611C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:57214 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfTc-0002TL-Tv for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:54:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54338) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLR-00057u-6L for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:54 -0400 Received: from mail-pg1-x52e.google.com ([2607:f8b0:4864:20::52e]:44784) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLK-0006nO-Hi for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:48 -0400 Received: by mail-pg1-x52e.google.com with SMTP id s11so13084896pgr.11 for ; Sat, 18 Sep 2021 11:45:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zsP+4M7jyqQgsIMdfJ1ZQMN2aE0h8mf2eX18qZMVb8g=; b=U5D26PN6TLgDamLuGf7Fb9mxGIYUro5zAQCpW2xGZIx5bO6ulDyhoz7B6/WycSquh+ zC1vQdyXc0LKvYKib3ffJC6Jygnsews1L9cnQm56PtpXkPB+MtZEynf+LAJ5m0IwZnhy QTT8cinaa/UNrjr/kxU2BdwQyMyuS9l/N2Gi7BXXW5hihMQRzgo5pWjJpt0eqNCcBMB2 roXqxZ6eh+IFx2OF6p9I3qj+PCAjEv9HXTHB2c27/m/PaVcb4uiBekHFxyr45XS6tMCN VHomsH1j+lHDlCzOAG16/d9riXJtH5f4z615MsLFOzSCnP6QVfErBpAvZgb5D3ZZOw4q WvlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zsP+4M7jyqQgsIMdfJ1ZQMN2aE0h8mf2eX18qZMVb8g=; b=Sf6wyu2BiKzPAFB9Yw5C0cUlofLJaB7u2BfuIlraaRO7T2EAfAQCFZXpe0kkOdeW6i pSZuupD5ZE9Y7eeSDBp1J7iLacR5r7lZCSANQfzzwewR6oXIQAj7kjJL3nthMTYlFwrV xPCmzYW9LsRWmGN1jSs+2Occ2DHUTE1BUQNFigUbJNltIGjOz6VEl4a03stxg8dkPBKk 0w6JbfGMKPgA6x7/ony89NVDKjTS/3ZfeQz9ElYia+M8ieM9M4tOj8h/xWUQKTWbfaYo EaiO4ThZ14wKoKXR6mfJAXAZSRjUKQ696NYGb+Qb0BhEnel71Y45e4uI5+wwCwajhvmP IiLQ== X-Gm-Message-State: AOAM5305a0URl/edDjVjZK7La2+1YNVh2sQjhtNXFlJhnLdzPivRumeV ayGluUC396JGKotPdXIXYhuR35tj+5G7yQ== X-Google-Smtp-Source: ABdhPJzr5RWbSWOwcfi1WrO3dbniKm5KTdg4JHZGNW3peDS81LuuI/zBA9/Gp9F4bNIAoGaXeAMdog== X-Received: by 2002:aa7:9433:0:b0:3f2:58c4:ca5e with SMTP id y19-20020aa79433000000b003f258c4ca5emr17136547pfo.27.1631990740095; Sat, 18 Sep 2021 11:45:40 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 13/41] linux-user/host/s390: Populate host_signal.h Date: Sat, 18 Sep 2021 11:44:59 -0700 Message-Id: <20210918184527.408540-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -1 X-Spam_score: -0.2 X-Spam_bar: / X-Spam_report: (-0.2 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- linux-user/host/s390/host-signal.h | 93 ++++++++++++++++++++++++++++- linux-user/host/s390x/host-signal.h | 2 +- accel/tcg/user-exec.c | 88 +-------------------------- 3 files changed, 94 insertions(+), 89 deletions(-) diff --git a/linux-user/host/s390/host-signal.h b/linux-user/host/s390/host-signal.h index f4b4d65031..21f59b612a 100644 --- a/linux-user/host/s390/host-signal.h +++ b/linux-user/host/s390/host-signal.h @@ -1 +1,92 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef S390_HOST_SIGNAL_H +#define S390_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.psw.addr; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + uint16_t *pinsn = (uint16_t *)host_signal_pc(uc); + + /* + * ??? On linux, the non-rt signal handler has 4 (!) arguments instead + * of the normal 2 arguments. The 4th argument contains the "Translation- + * Exception Identification for DAT Exceptions" from the hardware (aka + * "int_parm_long"), which does in fact contain the is_write value. + * The rt signal handler, as far as I can tell, does not give this value + * at all. Not that we could get to it from here even if it were. + * So fall back to parsing instructions. Treat read-modify-write ones as + * writes, which is not fully correct, but for tracking self-modifying code + * this is better than treating them as reads. Checking si_addr page flags + * might be a viable improvement, albeit a racy one. + */ + /* ??? This is not even close to complete. */ + switch (pinsn[0] >> 8) { + case 0x50: /* ST */ + case 0x42: /* STC */ + case 0x40: /* STH */ + case 0xba: /* CS */ + case 0xbb: /* CDS */ + return true; + case 0xc4: /* RIL format insns */ + switch (pinsn[0] & 0xf) { + case 0xf: /* STRL */ + case 0xb: /* STGRL */ + case 0x7: /* STHRL */ + return true; + } + break; + case 0xc8: /* SSF format insns */ + switch (pinsn[0] & 0xf) { + case 0x2: /* CSST */ + return true; + } + break; + case 0xe3: /* RXY format insns */ + switch (pinsn[2] & 0xff) { + case 0x50: /* STY */ + case 0x24: /* STG */ + case 0x72: /* STCY */ + case 0x70: /* STHY */ + case 0x8e: /* STPQ */ + case 0x3f: /* STRVH */ + case 0x3e: /* STRV */ + case 0x2f: /* STRVG */ + return true; + } + break; + case 0xeb: /* RSY format insns */ + switch (pinsn[2] & 0xff) { + case 0x14: /* CSY */ + case 0x30: /* CSG */ + case 0x31: /* CDSY */ + case 0x3e: /* CDSG */ + case 0xe4: /* LANG */ + case 0xe6: /* LAOG */ + case 0xe7: /* LAXG */ + case 0xe8: /* LAAG */ + case 0xea: /* LAALG */ + case 0xf4: /* LAN */ + case 0xf6: /* LAO */ + case 0xf7: /* LAX */ + case 0xfa: /* LAAL */ + case 0xf8: /* LAA */ + return true; + } + break; + } + return false; +} + +#endif diff --git a/linux-user/host/s390x/host-signal.h b/linux-user/host/s390x/host-signal.h index f4b4d65031..0e83f9358d 100644 --- a/linux-user/host/s390x/host-signal.h +++ b/linux-user/host/s390x/host-signal.h @@ -1 +1 @@ -#define HOST_SIGNAL_PLACEHOLDER +#include "../s390/host-signal.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 8f4e788304..0810b71ba0 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,93 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__s390__) - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; - ucontext_t *uc = puc; - unsigned long pc; - uint16_t *pinsn; - int is_write = 0; - - pc = uc->uc_mcontext.psw.addr; - - /* - * ??? On linux, the non-rt signal handler has 4 (!) arguments instead - * of the normal 2 arguments. The 4th argument contains the "Translation- - * Exception Identification for DAT Exceptions" from the hardware (aka - * "int_parm_long"), which does in fact contain the is_write value. - * The rt signal handler, as far as I can tell, does not give this value - * at all. Not that we could get to it from here even if it were. - * So fall back to parsing instructions. Treat read-modify-write ones as - * writes, which is not fully correct, but for tracking self-modifying code - * this is better than treating them as reads. Checking si_addr page flags - * might be a viable improvement, albeit a racy one. - */ - /* ??? This is not even close to complete. */ - pinsn = (uint16_t *)pc; - switch (pinsn[0] >> 8) { - case 0x50: /* ST */ - case 0x42: /* STC */ - case 0x40: /* STH */ - case 0xba: /* CS */ - case 0xbb: /* CDS */ - is_write = 1; - break; - case 0xc4: /* RIL format insns */ - switch (pinsn[0] & 0xf) { - case 0xf: /* STRL */ - case 0xb: /* STGRL */ - case 0x7: /* STHRL */ - is_write = 1; - } - break; - case 0xc8: /* SSF format insns */ - switch (pinsn[0] & 0xf) { - case 0x2: /* CSST */ - is_write = 1; - } - break; - case 0xe3: /* RXY format insns */ - switch (pinsn[2] & 0xff) { - case 0x50: /* STY */ - case 0x24: /* STG */ - case 0x72: /* STCY */ - case 0x70: /* STHY */ - case 0x8e: /* STPQ */ - case 0x3f: /* STRVH */ - case 0x3e: /* STRV */ - case 0x2f: /* STRVG */ - is_write = 1; - } - break; - case 0xeb: /* RSY format insns */ - switch (pinsn[2] & 0xff) { - case 0x14: /* CSY */ - case 0x30: /* CSG */ - case 0x31: /* CDSY */ - case 0x3e: /* CDSG */ - case 0xe4: /* LANG */ - case 0xe6: /* LAOG */ - case 0xe7: /* LAXG */ - case 0xe8: /* LAAG */ - case 0xea: /* LAALG */ - case 0xf4: /* LAN */ - case 0xf6: /* LAO */ - case 0xf7: /* LAX */ - case 0xfa: /* LAAL */ - case 0xf8: /* LAA */ - is_write = 1; - } - break; - } - - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} - -#elif defined(__mips__) +#if defined(__mips__) #if defined(__misp16) || defined(__mips_micromips) #error "Unsupported encoding" From patchwork Sat Sep 18 18:45:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503977 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57C0CC433F5 for ; Sat, 18 Sep 2021 19:04:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BB492610A6 for ; Sat, 18 Sep 2021 19:04:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BB492610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:54060 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfdN-0002fD-J3 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:04:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54262) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLN-00054T-9S for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:45 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]:41481) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLK-0006o1-72 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:44 -0400 Received: by mail-pg1-x529.google.com with SMTP id k24so13080993pgh.8 for ; Sat, 18 Sep 2021 11:45:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Zyf5KeX485BwSvF4JRLk5yqw2oK9iCIE3vprdtELuiE=; b=RsRs+0yNifRZ4c6yWFcgL9LZADuCnd/1NcTJwpId3sEL1M9WnqO50gmTGmsAlubFs3 z4L3aXVu0sAclPfC30TFQSZYpEgQPmtOSteMAUffh4gSvOorMHtDI/VEhGFkE1AjXcUa HItjcXTKgWIHFRTEV+oifWPBsZGH1X+eipn4l+yE8Topq6aHiKHEf2jW119nUv/pDihi AYm86cj2Y79t8l1zv5IqP77wYzPgly9iM3grP0xV1YwI49XHcbPbRw5FzNkcaiMVjA03 ZrjnfoC7HnHsRdaZuswlSTmhxaY1XRwpJvFFJhiZ2pl7IzLKk5GHI6Uu4rFFxbYkilEg m+IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Zyf5KeX485BwSvF4JRLk5yqw2oK9iCIE3vprdtELuiE=; b=kpItU6m0lnNloXHRHmNPAr/0EeFsBo/Lf5P8NZmwAyBhmDR5TFX2D7CsXEbfw+tPRa xBo1PBrkfrL3htA3m339GB5AnQzxASxd1fDZjaNPqrN8ETVGp2uz0NMrjcqgB1OHAPPH Mk5DSiVeHPu2xRMP30TFjEPwPgFub/yA0BdStDg5Axc/bAewHpRO8OkHNQRgxt8ye7gF +KZCb+p7WeavhHhBYDtPU91TEB0D4nFDOVoiaVIoVKMMhS67blLunZPAUcmGhvRPAWif CAPE/J685Nrzedo+LVU3LRmVbfx8GkQBdBQ7ZaJhHgZ1fmQH6x+PTNNiF2XdCxCqhjdX Wo6w== X-Gm-Message-State: AOAM533rsqQiooYy9L41XhmtD+iVSg26fLrWz5TlUSWcMy7BDW2qYyBA H+cN2epcVX+UL7nR5fxTl39DRmJI/+fTzQ== X-Google-Smtp-Source: ABdhPJzmcp1IpNSvtsZI2l6mqHqeW3DtO0WLSaC6mtJdqhMTdewSm2j5I4aZC9LN/GIADRnnsMbPzw== X-Received: by 2002:aa7:9ac2:0:b0:443:a477:6684 with SMTP id x2-20020aa79ac2000000b00443a4776684mr13446269pfp.25.1631990740927; Sat, 18 Sep 2021 11:45:40 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 14/41] linux-user/host/mips: Populate host_signal.h Date: Sat, 18 Sep 2021 11:45:00 -0700 Message-Id: <20210918184527.408540-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- linux-user/host/mips/host-signal.h | 62 +++++++++++++++++++++++++++++- accel/tcg/user-exec.c | 52 +------------------------ 2 files changed, 62 insertions(+), 52 deletions(-) diff --git a/linux-user/host/mips/host-signal.h b/linux-user/host/mips/host-signal.h index f4b4d65031..9c83e51130 100644 --- a/linux-user/host/mips/host-signal.h +++ b/linux-user/host/mips/host-signal.h @@ -1 +1,61 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef MIPS_HOST_SIGNAL_H +#define MIPS_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.pc; +} + +#if defined(__misp16) || defined(__mips_micromips) +#error "Unsupported encoding" +#endif + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + uint32_t insn = *(uint32_t *)host_signal_pc(uc); + + /* Detect all store instructions at program counter. */ + switch ((insn >> 26) & 077) { + case 050: /* SB */ + case 051: /* SH */ + case 052: /* SWL */ + case 053: /* SW */ + case 054: /* SDL */ + case 055: /* SDR */ + case 056: /* SWR */ + case 070: /* SC */ + case 071: /* SWC1 */ + case 074: /* SCD */ + case 075: /* SDC1 */ + case 077: /* SD */ +#if !defined(__mips_isa_rev) || __mips_isa_rev < 6 + case 072: /* SWC2 */ + case 076: /* SDC2 */ +#endif + return true; + case 023: /* COP1X */ + /* + * Required in all versions of MIPS64 since + * MIPS64r1 and subsequent versions of MIPS32r2. + */ + switch (insn & 077) { + case 010: /* SWXC1 */ + case 011: /* SDXC1 */ + case 015: /* SUXC1 */ + return true; + } + break; + } + return false; +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 0810b71ba0..42d1ad189b 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,57 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__mips__) - -#if defined(__misp16) || defined(__mips_micromips) -#error "Unsupported encoding" -#endif - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; - ucontext_t *uc = puc; - uintptr_t pc = uc->uc_mcontext.pc; - uint32_t insn = *(uint32_t *)pc; - int is_write = 0; - - /* Detect all store instructions at program counter. */ - switch((insn >> 26) & 077) { - case 050: /* SB */ - case 051: /* SH */ - case 052: /* SWL */ - case 053: /* SW */ - case 054: /* SDL */ - case 055: /* SDR */ - case 056: /* SWR */ - case 070: /* SC */ - case 071: /* SWC1 */ - case 074: /* SCD */ - case 075: /* SDC1 */ - case 077: /* SD */ -#if !defined(__mips_isa_rev) || __mips_isa_rev < 6 - case 072: /* SWC2 */ - case 076: /* SDC2 */ -#endif - is_write = 1; - break; - case 023: /* COP1X */ - /* Required in all versions of MIPS64 since - MIPS64r1 and subsequent versions of MIPS32r2. */ - switch (insn & 077) { - case 010: /* SWXC1 */ - case 011: /* SDXC1 */ - case 015: /* SUXC1 */ - is_write = 1; - } - break; - } - - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} - -#elif defined(__riscv) +#if defined(__riscv) int cpu_signal_handler(int host_signum, void *pinfo, void *puc) From patchwork Sat Sep 18 18:45:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29A91C433EF for ; Sat, 18 Sep 2021 19:09:28 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9966E610A6 for ; Sat, 18 Sep 2021 19:09:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9966E610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:43036 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfiI-0005gs-Or for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:09:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54332) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLQ-00057t-Pn for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:53 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]:35500) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLL-0006oE-C4 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:48 -0400 Received: by mail-pg1-x52d.google.com with SMTP id e7so13099145pgk.2 for ; Sat, 18 Sep 2021 11:45:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b88MeJ0VB21CqXeC9kfaVd7KTqjTS4pXJD2Bd6nXvIA=; b=LdR2CNYFfn+r1kbcWbDWOAIkh2kHJcp6BQGe+aDGcm5DVMhe5ygdAsn2O1vHbrQoIM 0YI+pGSVvdoFFwlrB1G40x2gWqEotTJtmGn9vi0YUdT1VjTOqsuNij3I5KUkDAdW972D u5ZpDcYyMegV9r81yi7lsvGibWUBaQTUrK6sHYuyaGhpSRqMVTxhv/jIYTL5IQO/0o6g uksGaSO1rP6BRuV5Pz3Jvkf+LN+HuR/AJNkNuNLnd4zMS4u4LvOhjRk86i5gKeSIv4Nm qfwvul+A26beSCR+JrYHyyxZ6x5IdaIbVZLa0GvxU5nbaqsz9Z2fRD/2qt/2rMbGMpZ5 /xgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b88MeJ0VB21CqXeC9kfaVd7KTqjTS4pXJD2Bd6nXvIA=; b=tUZH7St2Cp+k9coV0JKHARyjPwfYtI4igDG6nfkusz1Z98fSpRq5UPzlJmHXzLadfy lyntbmMz6hlADEJmrcqDX85ds8b2Pf0kaBM7crUzLHl45jHfPhAz63bakhSPClCJv6Tf w0B9Xl/W6IY7WylIWNGi+ElVDYU9UNSAID5kGeR9CWpTNkqKUPgULFuDtsvZmAnkkhBX ML2DYZVYxWstHKHOyaXDEIqqTw1JuMTSZqtw2w4bO+Dyx330wqkYJCD7OOuLSeXe4bf1 ffGce28mmhE3Po5dLqiJpqkiIx/R8PwQHVtfdd9DmwpmWS1zFvQVfLCBMfcj051KLPGw xYpw== X-Gm-Message-State: AOAM531mXMvG2JEx39UCbUBwLLDHF7k0ehslPjP/3wqsU+Ns1X62utCs WwWJlT2TyNGoKnOr1N/mK2URUlLF/jb58Q== X-Google-Smtp-Source: ABdhPJwaW/pYoc+X7R60tK44q+NJKSrRNavPa6fD177dLQKHyVAbJIpMyUw8OoVxBw55n1iE+VGUlA== X-Received: by 2002:aa7:953d:0:b0:438:c168:df09 with SMTP id c29-20020aa7953d000000b00438c168df09mr16913236pfp.59.1631990741766; Sat, 18 Sep 2021 11:45:41 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 15/41] linux-user/host/riscv: Populate host_signal.h Date: Sat, 18 Sep 2021 11:45:01 -0700 Message-Id: <20210918184527.408540-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Signed-off-by: Richard Henderson --- linux-user/host/riscv/host-signal.h | 85 +++++++++++++++++- accel/tcg/user-exec.c | 134 ---------------------------- 2 files changed, 84 insertions(+), 135 deletions(-) diff --git a/linux-user/host/riscv/host-signal.h b/linux-user/host/riscv/host-signal.h index f4b4d65031..5860dce7d7 100644 --- a/linux-user/host/riscv/host-signal.h +++ b/linux-user/host/riscv/host-signal.h @@ -1 +1,84 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef RISCV_HOST_SIGNAL_H +#define RISCV_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.__gregs[REG_PC]; +} + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + uint32_t insn = *(uint32_t *)host_signal_pc(uc); + + /* + * Detect store by reading the instruction at the program + * counter. Note: we currently only generate 32-bit + * instructions so we thus only detect 32-bit stores + */ + switch (((insn >> 0) & 0b11)) { + case 3: + switch (((insn >> 2) & 0b11111)) { + case 8: + switch (((insn >> 12) & 0b111)) { + case 0: /* sb */ + case 1: /* sh */ + case 2: /* sw */ + case 3: /* sd */ + case 4: /* sq */ + return true; + default: + break; + } + break; + case 9: + switch (((insn >> 12) & 0b111)) { + case 2: /* fsw */ + case 3: /* fsd */ + case 4: /* fsq */ + return true; + default: + break; + } + break; + default: + break; + } + } + + /* Check for compressed instructions */ + switch (((insn >> 13) & 0b111)) { + case 7: + switch (insn & 0b11) { + case 0: /*c.sd */ + case 2: /* c.sdsp */ + return true; + default: + break; + } + break; + case 6: + switch (insn & 0b11) { + case 0: /* c.sw */ + case 3: /* c.swsp */ + return true; + default: + break; + } + break; + default: + break; + } + + return false; +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 42d1ad189b..01e7e69e7f 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -139,64 +139,6 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, } } -/* - * 'pc' is the host PC at which the exception was raised. - * 'address' is the effective address of the memory exception. - * 'is_write' is 1 if a write caused the exception and otherwise 0. - * 'old_set' is the signal set which should be restored. - */ -static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, - int is_write, sigset_t *old_set) -{ - CPUState *cpu = current_cpu; - CPUClass *cc; - unsigned long host_addr = (unsigned long)info->si_addr; - MMUAccessType access_type = adjust_signal_pc(&pc, is_write); - abi_ptr guest_addr; - - /* For synchronous signals we expect to be coming from the vCPU - * thread (so current_cpu should be valid) and either from running - * code or during translation which can fault as we cross pages. - * - * If neither is true then something has gone wrong and we should - * abort rather than try and restart the vCPU execution. - */ - if (!cpu || !cpu->running) { - printf("qemu:%s received signal outside vCPU context @ pc=0x%" - PRIxPTR "\n", __func__, pc); - abort(); - } - -#if defined(DEBUG_SIGNAL) - printf("qemu: SIGSEGV pc=0x%08lx address=%08lx w=%d oldset=0x%08lx\n", - pc, host_addr, is_write, *(unsigned long *)old_set); -#endif - - /* Convert forcefully to guest address space, invalid addresses - are still valid segv ones */ - guest_addr = h2g_nocheck(host_addr); - - /* XXX: locking issue */ - if (is_write && - info->si_signo == SIGSEGV && - info->si_code == SEGV_ACCERR && - h2g_valid(host_addr) && - handle_sigsegv_accerr_write(cpu, old_set, pc, guest_addr)) { - return 1; - } - - /* - * There is no way the target can handle this other than raising - * an exception. Undo signal and retaddr state prior to longjmp. - */ - sigprocmask(SIG_SETMASK, old_set, NULL); - - cc = CPU_GET_CLASS(cpu); - cc->tcg_ops->tlb_fill(cpu, guest_addr, 0, access_type, - MMU_USER_IDX, false, pc); - g_assert_not_reached(); -} - static int probe_access_internal(CPUArchState *env, target_ulong addr, int fault_size, MMUAccessType access_type, bool nonfault, uintptr_t ra) @@ -255,82 +197,6 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__riscv) - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; - ucontext_t *uc = puc; - greg_t pc = uc->uc_mcontext.__gregs[REG_PC]; - uint32_t insn = *(uint32_t *)pc; - int is_write = 0; - - /* Detect store by reading the instruction at the program - counter. Note: we currently only generate 32-bit - instructions so we thus only detect 32-bit stores */ - switch (((insn >> 0) & 0b11)) { - case 3: - switch (((insn >> 2) & 0b11111)) { - case 8: - switch (((insn >> 12) & 0b111)) { - case 0: /* sb */ - case 1: /* sh */ - case 2: /* sw */ - case 3: /* sd */ - case 4: /* sq */ - is_write = 1; - break; - default: - break; - } - break; - case 9: - switch (((insn >> 12) & 0b111)) { - case 2: /* fsw */ - case 3: /* fsd */ - case 4: /* fsq */ - is_write = 1; - break; - default: - break; - } - break; - default: - break; - } - } - - /* Check for compressed instructions */ - switch (((insn >> 13) & 0b111)) { - case 7: - switch (insn & 0b11) { - case 0: /*c.sd */ - case 2: /* c.sdsp */ - is_write = 1; - break; - default: - break; - } - break; - case 6: - switch (insn & 0b11) { - case 0: /* c.sw */ - case 3: /* c.swsp */ - is_write = 1; - break; - default: - break; - } - break; - default: - break; - } - - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} -#endif - /* The softmmu versions of these helpers are in cputlb.c. */ uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr) From patchwork Sat Sep 18 18:45:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41803C433EF for ; Sat, 18 Sep 2021 19:09:20 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D3FBD60F23 for ; Sat, 18 Sep 2021 19:09:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D3FBD60F23 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:42402 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfiB-0005HH-2s for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:09:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54330) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLQ-00057s-NE for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:53 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]:52164) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLN-0006og-0K for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:47 -0400 Received: by mail-pj1-x102d.google.com with SMTP id dw14so9179761pjb.1 for ; Sat, 18 Sep 2021 11:45:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+vyWXP6Fx9Nim2ldoxF0eSsJbEhC7OEjuYcEJUYRKoA=; b=lSzfsfsCZSvKw/DRgMkbB3UFuKC3OC9O/n9STdBep8+NCfDHpq2SG4lRQTixcVHBaL gOrchSfrhmozVAylVdlcrRrS/VxcM54OTX2LCrTB35XOXWqk0dTmhqn8ShHO57A1t3YK Krxc21pdtuIMBfoutvTVLRUQzr2/aQR7equgmW4gLpEH3vYDCqW7NKCCnUDIRsIGg88T 9ut//V63ESvrPhTljEq48zSnRxsA4iF+IY8t9lB/3KL9kkLFqZV8JjuO/ELGc6a+oeUJ mR2R1ZXKe8MKeCzGswFi0QT2SLC9QP7svABPJPNQqwaa59vP++tbRPCmNptFH+hAnvOf kYqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+vyWXP6Fx9Nim2ldoxF0eSsJbEhC7OEjuYcEJUYRKoA=; b=q9wvsHfcK4M21vjoeM0aZ814He/lJ5iXQj43nCSt7Akec/ETyqqpTdS4hw9lFv79qc t2XF566OyEbcgR6jyJSjxG7V/WnDk29yAh7wB8cylXtsmsrHoDZB24r3abpBPwpCEJDC jRZtQLUIvc8xs7dGNDqnjEGDbZ0AhB1gPxxnj8wnalX3YLZqlSIrGXBfLwXLMeJU4uFg jFlCGOL9Sni133ITx1oca5r+sNwVuOv6S2nUToUSnquvq5OK6xPZvfbsOOhPHMeE7j3n aNnf1GRFZ/974SHayzOZdXIp/IRdUC88rAwuD3kNlA/tpWMHj4GqotPmN/bLLlfwUfyU doag== X-Gm-Message-State: AOAM530tj3Uj1Po99Jgw6tksuExCdEGMoH4YFxeZqdZTZJqNU1osAr1T /7+yyss7JQTfdm+AIw9Gn/ZwyXlYS1tfTQ== X-Google-Smtp-Source: ABdhPJz7GivWfYSqhStFuoEZvGSQ+GsSlvtMgl/vxn7nTYFhhK0AnmF8SWPT3BYOlFhB6k226N7/qg== X-Received: by 2002:a17:90a:428e:: with SMTP id p14mr28718674pjg.92.1631990742570; Sat, 18 Sep 2021 11:45:42 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 16/41] target/arm: Fixup comment re handle_cpu_signal Date: Sat, 18 Sep 2021 11:45:02 -0700 Message-Id: <20210918184527.408540-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The named function no longer exists. Refer to host_signal_handler instead. Signed-off-by: Richard Henderson --- target/arm/sve_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index dab5f1d1cd..07be55b7e1 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -6118,7 +6118,7 @@ DO_LDN_2(4, dd, MO_64) * linux-user/ in its get_user/put_user macros. * * TODO: Construct some helpers, written in assembly, that interact with - * handle_cpu_signal to produce memory ops which can properly report errors + * host_signal_handler to produce memory ops which can properly report errors * without racing. */ From patchwork Sat Sep 18 18:45:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503947 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46A56C4332F for ; Sat, 18 Sep 2021 18:51:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 13FC960F46 for ; Sat, 18 Sep 2021 18:51:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 13FC960F46 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:48680 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfR7-0005HK-81 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:51:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54360) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLS-00057y-4V for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:54 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]:34709) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLN-0006pp-2w for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:49 -0400 Received: by mail-pf1-x42b.google.com with SMTP id g14so12396080pfm.1 for ; Sat, 18 Sep 2021 11:45:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nMBhe6wRyQJffJfKqR3e4B4BjhzuFHvBY7lYZ6XbL2k=; b=gMJHG5IGY0Go92Rn8xQnpykiF+BXx9y5AoInPCg6RLWbaXuFJDSIfh4uu1YMBLHNdW fF/25L6w6/Vn9HajjwdyUsN26WysJxG/P4F3ZwyVUIuO7qano3f1Wl9zNWvHUFiqyh7q XC3gH0zOTxfWzMaoMeWnecv1yBxilgUSkZ368F0DGy1mrLX5NAjYNuCNguKY4/hwMaQ0 gAXQqqhdA9Ss9Lz+xVcXrgBtGB30fNY3e4Iw1d+w/bUKSdEQaDvknP/R60tvT/P9UIoJ B49GeUgOx8M1J6gwMNyQ2JJL+FcwaR+gAGp0rvhqz8SEYTfWNVBhTMcWgctVE79kQIlO Zv8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nMBhe6wRyQJffJfKqR3e4B4BjhzuFHvBY7lYZ6XbL2k=; b=LyR0p9JUhsqDt0mr6IAMxwf6BVVeoyEPzyQ2TuDd089UJ2b4IiWK9g9jvMKV/dbvF1 PtBTUiRiJ7uH2W+UT3QwujDWBQg0jr/qi7/dj97gVx1vToN88t4R/nQnjA7pRD9/ZaJO 1oHoKXCtSJSvuxWD+5U70Bt9gdk9+cD+/iRqy2qzlnYd7L1nptEA0mKslBIjp24tjQDk gK2BEMrxiiOc8ViGstB6Dqg3LvvkkFAWfJNo89SdUrhoKnqEY5NT4osVPsLoMKeqm144 sCuKGbfgSahz16WI43ZmhQhvYukFeRHaiLDoEOeZIQ2CQX46Oc/VaX1FX7oyIsENy1i5 X/TA== X-Gm-Message-State: AOAM5335xuIE0DJGQL5nC3XAdcoFV3af6i8zMy5sL0c3ylSOBdrNITj9 QgJCO1QvteWdbLAruDS3sqqg6/fXj+fonA== X-Google-Smtp-Source: ABdhPJylRsqv6Zoh4u7rWKpv11r8fMKBYD0C1OgCBT2cNEEjvVxl62kLIis7CcUzRqU39gnrxsduDA== X-Received: by 2002:aa7:9094:0:b0:42a:ea30:5509 with SMTP id i20-20020aa79094000000b0042aea305509mr17464303pfa.30.1631990743400; Sat, 18 Sep 2021 11:45:43 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 17/41] linux-user/host/riscv: Improve host_signal_write Date: Sat, 18 Sep 2021 11:45:03 -0700 Message-Id: <20210918184527.408540-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Do not read 4 bytes before we determine the size of the insn. Simplify triple switches in favor of checking major opcodes. Include the missing cases of compact fsd and fsdsp. Signed-off-by: Richard Henderson --- linux-user/host/riscv/host-signal.h | 83 ++++++++++------------------- 1 file changed, 28 insertions(+), 55 deletions(-) diff --git a/linux-user/host/riscv/host-signal.h b/linux-user/host/riscv/host-signal.h index 5860dce7d7..ab06d70964 100644 --- a/linux-user/host/riscv/host-signal.h +++ b/linux-user/host/riscv/host-signal.h @@ -17,65 +17,38 @@ static inline uintptr_t host_signal_pc(ucontext_t *uc) static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) { - uint32_t insn = *(uint32_t *)host_signal_pc(uc); - /* - * Detect store by reading the instruction at the program - * counter. Note: we currently only generate 32-bit - * instructions so we thus only detect 32-bit stores + * Detect store by reading the instruction at the program counter. + * Do not read more than 16 bits, because we have not yet determined + * the size of the instruction. */ - switch (((insn >> 0) & 0b11)) { - case 3: - switch (((insn >> 2) & 0b11111)) { - case 8: - switch (((insn >> 12) & 0b111)) { - case 0: /* sb */ - case 1: /* sh */ - case 2: /* sw */ - case 3: /* sd */ - case 4: /* sq */ - return true; - default: - break; - } - break; - case 9: - switch (((insn >> 12) & 0b111)) { - case 2: /* fsw */ - case 3: /* fsd */ - case 4: /* fsq */ - return true; - default: - break; - } - break; - default: - break; - } + const uint16_t *pinsn = (const uint16_t *)host_signal_pc(uc); + uint16_t insn = pinsn[0]; + + /* 16-bit instructions */ + switch (insn & 0xe003) { + case 0xa000: /* c.fsd */ + case 0xc000: /* c.sw */ + case 0xe000: /* c.sd (rv64) / c.fsw (rv32) */ + case 0xa002: /* c.fsdsp */ + case 0xc002: /* c.swsp */ + case 0xe002: /* c.sdsp (rv64) / c.fswsp (rv32) */ + return true; } - /* Check for compressed instructions */ - switch (((insn >> 13) & 0b111)) { - case 7: - switch (insn & 0b11) { - case 0: /*c.sd */ - case 2: /* c.sdsp */ - return true; - default: - break; - } - break; - case 6: - switch (insn & 0b11) { - case 0: /* c.sw */ - case 3: /* c.swsp */ - return true; - default: - break; - } - break; - default: - break; + /* 32-bit instructions, major opcodes */ + switch (insn & 0x7f) { + case 0x23: /* store */ + case 0x27: /* store-fp */ + return true; + case 0x2f: /* amo */ + /* + * The AMO function code is in bits 25-31, unread as yet. + * The AMO functions are LR (read), SC (write), and the + * rest are all read-modify-write. + */ + insn = pinsn[1]; + return (insn >> 11) != 2; /* LR */ } return false; From patchwork Sat Sep 18 18:45:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6CBAC433F5 for ; Sat, 18 Sep 2021 19:07:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8769D611C8 for ; Sat, 18 Sep 2021 19:07:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8769D611C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:34496 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfg9-0008Ve-Hd for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:07:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54328) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLQ-00057r-MY for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:53 -0400 Received: from mail-pj1-x102d.google.com ([2607:f8b0:4864:20::102d]:41768) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLN-0006qi-K6 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:47 -0400 Received: by mail-pj1-x102d.google.com with SMTP id m21-20020a17090a859500b00197688449c4so9813119pjn.0 for ; Sat, 18 Sep 2021 11:45:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mkpDyQi3PMKrFdlMQCQLbDcKXDWO1ARW+CoOrVOZKpc=; b=C08oYr/sxbSpb6AQYxQFXBxty12fy9N81y/zC20rgTXkfzyDq6pluJnlOC4zwqp4+t BRxoJEsIezBPfIJewy5xd7cBRuI3Z+4r69YyFCmTZnniMC18f0T1zGQ0UF0piFaXRGXg sJR1VPKBrqGaH5OKnLXZ0N4wS4Ox3shTDn8CDzjz94Ple3dr0hPKH0+GG8tWvtR/+Q6B NH1ZgKGKRIWyw4w44dAV+fJgv0kD5+e+P827s0iGefr6mly+tQSEZQVP4dD7AP8JjvbK qaG0d9+vK1CnEEiO5SD0svIe22YnlgH+Z6dXocl8jPJQsVxw0u2lQkuWwyOFWW08i1nq BwWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mkpDyQi3PMKrFdlMQCQLbDcKXDWO1ARW+CoOrVOZKpc=; b=EBOk6dH244ygYcaUQTiclqCU5RmIvoUV7ppVLWUl0mp4vStNwFOI2oeV39T0hqq7b/ oiOrA/1LUU/50yjABYrJEnwgpBwDRB/Waj8UZIuVbuXHw/L6MSmYcSwct7DIO00JYm0s kP5btGS8k9pWKkUOVRTLzl2OuiwI531e5wCOSqjF7sClvdorppq3htiInyf9KgeX4Tx3 cmuN3s2BIViWlky4Vq2Lik5HjfIIXb1BCGUduChi6YQHmHQvNg476kcqlkA3BCZGGZhv DZIB8Mh5aF3+HI6nW0vM57U4jd2aNpCmJWggENxgnRBw4rw7kl4gSaAf3O6GcCcIgi5S OmPw== X-Gm-Message-State: AOAM531SSGPxJfQc7QT+simDFxbfhocarFmAO0KV6Z3Qp0XcDItmsszU s2NjuIOfAdNv1YN00NfQ7CMApwFDln428A== X-Google-Smtp-Source: ABdhPJyR1tUmb/YNeif2lH7LrhODtn/XgtaooKxnuMrP0I/McwBiJ6URAVIBtAFMeYzrw1Kr2/5opg== X-Received: by 2002:a17:90a:191a:: with SMTP id 26mr19997917pjg.79.1631990743992; Sat, 18 Sep 2021 11:45:43 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 18/41] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Date: Sat, 18 Sep 2021 11:45:04 -0700 Message-Id: <20210918184527.408540-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Now that all of the linux-user hosts have been converted to host-signal.h, drop the compatibility code. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- include/exec/exec-all.h | 12 ------------ linux-user/signal.c | 13 ------------- 2 files changed, 25 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5f94d799aa..5dd663c153 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -685,18 +685,6 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, uintptr_t host_pc, abi_ptr guest_addr); -/** - * cpu_signal_handler - * @signum: host signal number - * @pinfo: host siginfo_t - * @puc: host ucontext_t - * - * To be called from the SIGBUS and SIGSEGV signal handler to inform the - * virtual cpu of exceptions. Returns true if the signal was handled by - * the virtual CPU. - */ -int cpu_signal_handler(int signum, void *pinfo, void *puc); - #else static inline void mmap_lock(void) {} static inline void mmap_unlock(void) {} diff --git a/linux-user/signal.c b/linux-user/signal.c index 6f953f10d4..e6531fdfa0 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -773,16 +773,6 @@ static void host_signal_handler(int host_sig, siginfo_t *info, void *puc) ucontext_t *uc = puc; struct emulated_sigtable *k; int guest_sig; - -#ifdef HOST_SIGNAL_PLACEHOLDER - /* the CPU emulator uses some host signals to detect exceptions, - we forward to it some signals */ - if ((host_sig == SIGSEGV || host_sig == SIGBUS) - && info->si_code > 0) { - if (cpu_signal_handler(host_sig, info, puc)) - return; - } -#else uintptr_t pc = 0; bool sync_sig = false; @@ -842,7 +832,6 @@ static void host_signal_handler(int host_sig, siginfo_t *info, void *puc) sync_sig = true; } -#endif /* get target signal number */ guest_sig = host_to_target_signal(host_sig); @@ -857,7 +846,6 @@ static void host_signal_handler(int host_sig, siginfo_t *info, void *puc) k->pending = guest_sig; ts->signal_pending = 1; -#ifndef HOST_SIGNAL_PLACEHOLDER /* * For synchronous signals, unwind the cpu state to the faulting * insn and then exit back to the main loop so that the signal @@ -867,7 +855,6 @@ static void host_signal_handler(int host_sig, siginfo_t *info, void *puc) cpu->exception_index = EXCP_INTERRUPT; cpu_loop_exit_restore(cpu, pc); } -#endif rewind_if_in_safe_syscall(puc); From patchwork Sat Sep 18 18:45:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48E4DC43217 for ; Sat, 18 Sep 2021 18:51:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0840460EC0 for ; Sat, 18 Sep 2021 18:51:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 0840460EC0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:48662 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfR7-0005GQ-69 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:51:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54430) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0005Bb-9q for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:00 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]:40626) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLN-0006qv-Sf for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:53 -0400 Received: by mail-pg1-x529.google.com with SMTP id h3so13086393pgb.7 for ; Sat, 18 Sep 2021 11:45:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nrD8E65gnfBNS6+ihjsgMJcAs7qIa3jYuvmEwiwusrE=; b=xzQZf8q0aioXJDqYBn2Hva+H5t5SIO5qSkagItq/E7Yd5xot92n0AcOwyqJapGf1NU IH9gKiFNJEiS2aZvBEKPALKxiOdofYKkQHeMNkPOt5oHdNIxLObA3lldX47h94+zdH4q FozT686IM7OUdnRbb1pptcMqlh/xBw24DMD8abpbaEAwKliTN7LJogEtJv5xSL6lwC4+ 3qO3U11h7mGx93ODo2VAAWdpYAcgOoYHY2z5qBuca1yiw5LroE8gRW2QgzALQqd3643w /od4Wz7wmME3ImSL9PvNrmrvnU5rV/3XvlPT7nuEWbZ8r45+lPtGE3B9zEdwdKLBpM7E 3+9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nrD8E65gnfBNS6+ihjsgMJcAs7qIa3jYuvmEwiwusrE=; b=BRO/gz535i2rUhfL0xxk0vjvIZTJSk5NvRp8l5GhhJ3y1lj09Ol/5ZgKcpgS66nhhZ PsFXQmcNvxWlTNX7vbW/yTJTzflnoRELefFD/C9teXAjP15utp7OqMr+wIFYj8fgwtTb QgE11sM/NdsOMtvbhTILbOcGE3fhtGPByUCTvdY917QCmY7c+5yGWZrr7BPLPQSbA3b0 wiUkPLHEOFE+xfZdZFWPz9V5p+zvQ+RG6lS/EFU+Nq7As9a6RtA24VMgduKpg5Dle6nD W2xluMw58Lk7lY8dctbRNTWWDIJipUuM1UO0uM920VOL+8Tob0h6YKRYtikB2JBfFFgl f+oA== X-Gm-Message-State: AOAM530XxHvWODhaPFurMJZ4YVs47aGZYseBvzdFx3r4Bo5dOwiku5EC WestgpapKwaGY9j1iX89ht5HFFNJ40wvZA== X-Google-Smtp-Source: ABdhPJyuU0hpn6UCFzTWIXeRrH3DEHok5ojAbFLjPu5k3ZXIj1i7xES5GSFH3V9xhYHy1o+e2E7ShQ== X-Received: by 2002:a62:194a:0:b0:43d:f06e:4f4a with SMTP id 71-20020a62194a000000b0043df06e4f4amr17025444pfz.20.1631990744594; Sat, 18 Sep 2021 11:45:44 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 19/41] hw/core: Add TCGCPUOps.record_sigsegv Date: Sat, 18 Sep 2021 11:45:05 -0700 Message-Id: <20210918184527.408540-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add a new user-only interface for updating cpu state before raising a signal. This will replace tlb_fill for user-only and should result in less boilerplate for each guest. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 4a4c4053e3..e229a40772 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -114,6 +114,32 @@ struct TCGCPUOps { */ bool (*io_recompile_replay_branch)(CPUState *cpu, const TranslationBlock *tb); +#else + /** + * record_sigsegv: + * @cpu: cpu context + * @addr: faulting guest address + * @access_type: access was read/write/execute + * @maperr: true for invalid page, false for permission fault + * @ra: host pc for unwinding + * + * We are about to raise SIGSEGV with si_code set for @maperr, + * and si_addr set for @addr. Record anything further needed + * for the signal ucontext_t. + * + * If the emulated kernel does not provide anything to the signal + * handler with anything besides the user context registers, and + * the siginfo_t, then this hook need do nothing and may be omitted. + * Otherwise, record the data and return; the caller will raise + * the signal, unwind the cpu state, and return to the main loop. + * + * If it is simpler to re-use the sysemu tlb_fill code, @ra is provided + * so that a "normal" cpu exception can be raised. In this case, + * the signal must be raised by the architecture cpu_loop. + */ + void (*record_sigsegv)(CPUState *cpu, vaddr addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra); #endif /* CONFIG_SOFTMMU */ #endif /* NEED_CPU_H */ From patchwork Sat Sep 18 18:45:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503963 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9757AC433EF for ; Sat, 18 Sep 2021 18:57:44 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1E0DF610A6 for ; Sat, 18 Sep 2021 18:57:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1E0DF610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:37666 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfWx-0008Kk-8o for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:57:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54504) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLf-0005Cz-PF for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:04 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]:41489) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLP-0006r8-LB for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:59 -0400 Received: by mail-pg1-x531.google.com with SMTP id k24so13081116pgh.8 for ; Sat, 18 Sep 2021 11:45:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bUABOOKdTsHd1I4YhOWD+WaOacOY2c/QLq79HLsoZBA=; b=xBJjH7Xq4e8UymD4tS49FIHDlu3ITrRgnX0MoCCaDJX9km+bpGD7H+nkVYJsyekaX3 5xXIVAnrVyP3vMQqDVSL8o/Rm+U81kpfLhVUUHT7SvG2p6AiV9mDjX9U4CWZu+ZgT/y5 1iCNIvK+jhn5nBadtwdUg0/rLrNiBTFlSbwOCQqx5j5JGxEMIZkfyQWqomZk62H1EwEl xGj7FO39MZBXoI3eRxnD3J8D3H6ky3HqFOAWE1DbB+2pmMCc+nTrS3+NPzi2UpH3CK27 loNxkt9tKZC4mrHrtwJ63X2QQseK+rcqqzSXyc4BblH9EBWkor1JTE+kdxJVMv2966DJ bpDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bUABOOKdTsHd1I4YhOWD+WaOacOY2c/QLq79HLsoZBA=; b=aoWYhbz5Kb2BOYyavEAFLHekDeLX4Kzb6vq7Ndxeme5o1lRNctOIoGfOA+6xQjcitW +i4LgHF1i0MxWeNGbqFmsFnPQ8h0EodNdBBhc++334M1UtC/JCU1zi30Y+oTb28Dlxuw qW0F1/5UN/RBppd71Gme1x6lI10ksZCbVwPz7T03BvIq683NUXOSiBWeux1pgKiAa1L2 q+OlOjtlnqgD9LftjbzbtXHIgHzF8Wn1wY21piSQ6DCotoTVS6gRZ0R30ERI5s+QfokP oUBDZpcZMtYB3FYXNRcpCY2mnCL58eAdSUvwE+rjYeun8wPX4BoaUCFd3t1N9rWSngsy JzIg== X-Gm-Message-State: AOAM533gLsd4PV2KGPDlFn/qTMpPtK34Vql9a8N1QZxCHrxG4HkZZkew 42vdaPLwEerjzKUwWq5h2FH105CchJJo8w== X-Google-Smtp-Source: ABdhPJxeOBF2sgv3UEzAGkbeijoohY7mF0PbnIHSKnbs0/oAAbDpPRsg1J+fN7GYGcCEfqgMa5p/7w== X-Received: by 2002:a62:2cd8:0:b0:43d:e6c0:1725 with SMTP id s207-20020a622cd8000000b0043de6c01725mr17193710pfs.55.1631990745424; Sat, 18 Sep 2021 11:45:45 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 20/41] linux-user: Add raise_sigsegv Date: Sat, 18 Sep 2021 11:45:06 -0700 Message-Id: <20210918184527.408540-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is a new interface to be provided by the os emulator for raising SIGSEGV on fault. Use the new record_sigsegv target hook. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- include/exec/exec-all.h | 15 +++++++++++++++ accel/tcg/user-exec.c | 33 ++++++++++++++++++--------------- linux-user/signal.c | 30 ++++++++++++++++++++++-------- 3 files changed, 55 insertions(+), 23 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5dd663c153..2091c1bf1a 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -685,6 +685,21 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, uintptr_t host_pc, abi_ptr guest_addr); +/** + * raise_sigsegv: + * @cpu: the cpu context + * @addr: the guest address of the fault + * @access_type: access was read/write/execute + * @maperr: true for invalid page, false for permission fault + * @ra: host pc for unwinding + * + * Use the TCGCPUOps hook to record cpu state, do guest operating system + * specific things to raise SIGSEGV, and jump to the main cpu loop. + */ +void QEMU_NORETURN raise_sigsegv(CPUState *cpu, target_ulong addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra); + #else static inline void mmap_lock(void) {} static inline void mmap_unlock(void) {} diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 01e7e69e7f..ab9cc6686d 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -143,35 +143,38 @@ static int probe_access_internal(CPUArchState *env, target_ulong addr, int fault_size, MMUAccessType access_type, bool nonfault, uintptr_t ra) { - int flags; + bool maperr = true; + int acc_flag; switch (access_type) { case MMU_DATA_STORE: - flags = PAGE_WRITE; + acc_flag = PAGE_WRITE_ORG; break; case MMU_DATA_LOAD: - flags = PAGE_READ; + acc_flag = PAGE_READ; break; case MMU_INST_FETCH: - flags = PAGE_EXEC; + acc_flag = PAGE_EXEC; break; default: g_assert_not_reached(); } - if (!guest_addr_valid_untagged(addr) || - page_check_range(addr, 1, flags) < 0) { - if (nonfault) { - return TLB_INVALID_MASK; - } else { - CPUState *cpu = env_cpu(env); - CPUClass *cc = CPU_GET_CLASS(cpu); - cc->tcg_ops->tlb_fill(cpu, addr, fault_size, access_type, - MMU_USER_IDX, false, ra); - g_assert_not_reached(); + if (guest_addr_valid_untagged(addr)) { + int page_flags = page_get_flags(addr); + if (page_flags & acc_flag) { + return 0; /* success */ + } + if (page_flags & PAGE_VALID) { + maperr = false; } } - return 0; + + if (nonfault) { + return TLB_INVALID_MASK; + } + + raise_sigsegv(env_cpu(env), addr, access_type, maperr, ra); } int probe_access_flags(CPUArchState *env, target_ulong addr, diff --git a/linux-user/signal.c b/linux-user/signal.c index e6531fdfa0..ae31b46be0 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -681,9 +681,27 @@ void force_sigsegv(int oldsig) } force_sig(TARGET_SIGSEGV); } - #endif +void raise_sigsegv(CPUState *cpu, target_ulong addr, + MMUAccessType access_type, bool maperr, uintptr_t ra) +{ + const struct TCGCPUOps *tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; + + if (tcg_ops->record_sigsegv) { + tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra); + } else if (tcg_ops->tlb_fill) { + tcg_ops->tlb_fill(cpu, addr, 0, access_type, MMU_USER_IDX, false, ra); + g_assert_not_reached(); + } + + force_sig_fault(TARGET_SIGSEGV, + maperr ? TARGET_SEGV_MAPERR : TARGET_SEGV_ACCERR, + addr); + cpu->exception_index = EXCP_INTERRUPT; + cpu_loop_exit_restore(cpu, ra); +} + /* abort execution with signal */ static void QEMU_NORETURN dump_core_and_abort(int target_sig) { @@ -799,7 +817,7 @@ static void host_signal_handler(int host_sig, siginfo_t *info, void *puc) access_type = adjust_signal_pc(&pc, is_write); if (host_sig == SIGSEGV) { - const struct TCGCPUOps *tcg_ops; + bool maperr = true; if (info->si_code == SEGV_ACCERR && h2g_valid(host_addr)) { /* If this was a write to a TB protected page, restart. */ @@ -814,18 +832,14 @@ static void host_signal_handler(int host_sig, siginfo_t *info, void *puc) * which means that we may get ACCERR when we want MAPERR. */ if (page_get_flags(guest_addr) & PAGE_VALID) { - /* maperr = false; */ + maperr = false; } else { info->si_code = SEGV_MAPERR; } } sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); - - tcg_ops = CPU_GET_CLASS(cpu)->tcg_ops; - tcg_ops->tlb_fill(cpu, guest_addr, 0, access_type, - MMU_USER_IDX, false, pc); - g_assert_not_reached(); + raise_sigsegv(cpu, guest_addr, access_type, maperr, pc); } else { sigprocmask(SIG_SETMASK, &uc->uc_sigmask, NULL); } From patchwork Sat Sep 18 18:45:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AD4AC433F5 for ; Sat, 18 Sep 2021 18:54:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E2218610A6 for ; Sat, 18 Sep 2021 18:54:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E2218610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:57274 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfTZ-0002VF-L7 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:54:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54428) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0005Ba-A0 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:00 -0400 Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]:33631) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLP-0006rs-LU for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:45:57 -0400 Received: by mail-pf1-x42b.google.com with SMTP id s16so4094002pfk.0 for ; Sat, 18 Sep 2021 11:45:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6Qr0OuX9QX9R8kKysHcFpFuFjKaNccsgQik+Lfl3HtE=; b=FEtv63qdtHpQXjwHldIR6HU0QERpSHEV/wrQ/k2i9kXSuvqbG9PVpC6ZuzTBwSILG4 bdw+q+IdFpIfFK5Db6UOVvo2Vc23Xi2EAX1MvORh9YazN6wrnRGvRh++dFRySuUN2AI7 Pe4eOb7Mxw/4IC+8tLvUjI+fG1rwkefw3+ka0ohDVNqfTDbjx1HTpVvTLbhyc9zXwvhK 9djmE8ZAiMS7m7n6snwHIkw39odafZHHR+i9C+exrl5udt8GflheJnWrLaTWj2l5DNJk TNtXGsDTZoPAPaTOm4pbr0+xc//SR351VC5kePPfhW6QeStSczaBnc9pGVmN5zA/ZZFs ikwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6Qr0OuX9QX9R8kKysHcFpFuFjKaNccsgQik+Lfl3HtE=; b=fmRJ/hKN+xCxZ1bBZNcZiWhsVT+Wn5uAz/vpvUN0BwDnL2g5kf0Eib2aQagknOk+AH q9BWsRS+2VQ43oosjenN7gyevWb6NFWfmZaMmaIAnbWSdt9qoms2oNf3wWPyK7HjrY7B tLCYHEZNWjd4wyd3u6oOQXUxAH5pA/KLaqH1ctEAeS5snWcxr3ZN18bhteAVSt75pcpn 2M6BShSVQ1pKYcOozo0NmRsjZp46lD/BfMHdwO/r3W+4dMhAoanGaZ+F1zITlOCiCF6c pEoJ35l2MlPXXla+DqXk0QMwjyZLNfipdgmJjG1o9hLCFEicISrLFVcPKRISv70aqELP 0W8g== X-Gm-Message-State: AOAM5330I/2uWVwkPfT8Y/qJJ3jgpLCC6/ZPe2rWNT23NCdBG83I1Mto 5uGBTKO7aG0jGC2z92mH6k8kEKqz2pvl+w== X-Google-Smtp-Source: ABdhPJzvmgNu+YZ0hZK1VEuf/LIF4Xh8GEsZYpTb8jEnC2e8Mn6t9My4dt7kWk1upv2rIDvzNgYfRg== X-Received: by 2002:a62:16cd:0:b0:440:5296:afab with SMTP id 196-20020a6216cd000000b004405296afabmr15965978pfw.4.1631990746285; Sat, 18 Sep 2021 11:45:46 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 21/41] target/alpha: Make alpha_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:07 -0700 Message-Id: <20210918184527.408540-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for alpha-linux-user. Remove the code from cpu_loop that handled EXCP_MMFAULT. Signed-off-by: Richard Henderson --- target/alpha/cpu.h | 7 ++++--- linux-user/alpha/cpu_loop.c | 8 -------- target/alpha/cpu.c | 2 +- target/alpha/helper.c | 13 +------------ 4 files changed, 6 insertions(+), 24 deletions(-) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index ce9ec32199..cbca4c369c 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -439,9 +439,6 @@ void alpha_translate_init(void); #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU void alpha_cpu_list(void); -bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int); void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t); @@ -449,12 +446,16 @@ uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env); void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val); uint64_t cpu_alpha_load_gr(CPUAlphaState *env, unsigned reg); void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val); + #ifndef CONFIG_USER_ONLY void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, MMUAccessType access_type, int mmu_idx, MemTxAttrs attrs, MemTxResult response, uintptr_t retaddr); +bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); #endif static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc, diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c index 7ce2461a02..60b650a827 100644 --- a/linux-user/alpha/cpu_loop.c +++ b/linux-user/alpha/cpu_loop.c @@ -52,14 +52,6 @@ void cpu_loop(CPUAlphaState *env) fprintf(stderr, "External interrupt. Exit\n"); exit(EXIT_FAILURE); break; - case EXCP_MMFAULT: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID - ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR); - info._sifields._sigfault._addr = env->trap_arg0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_UNALIGN: info.si_signo = TARGET_SIGBUS; info.si_errno = 0; diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 1ca601cac5..83c201d86a 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -220,10 +220,10 @@ static const struct SysemuCPUOps alpha_sysemu_ops = { static const struct TCGCPUOps alpha_tcg_ops = { .initialize = alpha_translate_init, - .tlb_fill = alpha_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = alpha_cpu_has_work, + .tlb_fill = alpha_cpu_tlb_fill, .cpu_exec_interrupt = alpha_cpu_exec_interrupt, .do_interrupt = alpha_cpu_do_interrupt, .do_transaction_failed = alpha_cpu_do_transaction_failed, diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 81550d9e2f..266d56ea73 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -119,18 +119,7 @@ void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val) *cpu_alpha_addr_gr(env, reg) = val; } -#if defined(CONFIG_USER_ONLY) -bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - AlphaCPU *cpu = ALPHA_CPU(cs); - - cs->exception_index = EXCP_MMFAULT; - cpu->env.trap_arg0 = address; - cpu_loop_exit_restore(cs, retaddr); -} -#else +#ifndef CONFIG_USER_ONLY /* Returns the OSF/1 entMM failure indication, or -1 on success. */ static int get_physical_address(CPUAlphaState *env, target_ulong addr, int prot_need, int mmu_idx, From patchwork Sat Sep 18 18:45:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503961 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6A9BC433F5 for ; Sat, 18 Sep 2021 18:57:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8B39C610A6 for ; Sat, 18 Sep 2021 18:57:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8B39C610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:37552 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfWw-0008E7-KG for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 14:57:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54542) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLj-0005Ea-23 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:08 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]:45822) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLQ-0006t2-Pz for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:02 -0400 Received: by mail-pl1-x635.google.com with SMTP id n2so5777437plk.12 for ; Sat, 18 Sep 2021 11:45:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DnPKZsYD4ZUYg+zokoIL0aqocBtGju8WD3IhYIaHRac=; b=yffMT/ZjFLfxgTY1cEQIo4KJSWtd8EXUzQkcHY5f071b97Hp70o8Ut8zWqC4KtrAMQ lnUsWQY6BkhgEClDKTjvMbMKD2opAQ5GsSBoXKHFzYMImNlcx1wO2WmT/fYCrtVFPZ80 0mfcVj/gOwXEQMSEplXa+2lzneBQN+Xp7f+sMibz9gprwv+Okhs7ermzjOao0eae5RH7 bpxzX9LbmsxkhMBSkr9LSflIbpQNPLtj2cmxr+ithqaJPl5cZAndQfQP2HipAi6sFmXk U9zuEtlWdu3aVpp6w0Nu4HWGGsnIJZnjSYZrTTJaNxh1ZwD4LJylnr9YgbYUKGUJRsg1 KD9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DnPKZsYD4ZUYg+zokoIL0aqocBtGju8WD3IhYIaHRac=; b=AOhreCzuHnccS/34nzdqPe3LGnVN1s2iwhpAY2fJV79XGXK58mMmNmC3TKDmI+Unda cZuhy9timjxIpCgNxWgkmNzTztbToWTy5F6KhNCNw/09eDclP/Nk+34GMMMcr7kwv2zb bOJdUFQiNa/zIAfmlf2JSj0+PzIg5qbov5QibdHv3uq7JnityGAX1I0YTnnKtsB3svVU GAIuPoKk4DVLzyysj0CHuB58xPsyltzbvkhHBCPjUyu7smX0007JrYD6zOixrWmB09i3 Elz0ztXIJRPOeqvukKBptYInN+6TtxKV+0Idqcigu7fz4Qfe4n5lihTSYI/QXKHNDyPG B45A== X-Gm-Message-State: AOAM531Mh4Vrt3VUMOjHnXK3R6HxVHusFxZTOEztGf5b5mZSbzauW+1G bcyD9NVLp9l3BCqeZ/yPA3zt4N6Wcb78oA== X-Google-Smtp-Source: ABdhPJzg5CIDogyNIg4nWBK+GxE4T2575hXJZkvcd4Appp0P6hR1K1Rh2Bhhg/uTCpfRpv36JKQuFw== X-Received: by 2002:a17:902:9a06:b0:13c:86d8:ce0b with SMTP id v6-20020a1709029a0600b0013c86d8ce0bmr15339135plp.51.1631990747074; Sat, 18 Sep 2021 11:45:47 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 22/41] target/arm: Use raise_sigsegv for mte tag lookup Date: Sat, 18 Sep 2021 11:45:08 -0700 Message-Id: <20210918184527.408540-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use the new os interface for raising the exception, rather than calling arm_cpu_tlb_fill directly. Signed-off-by: Richard Henderson --- target/arm/mte_helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c index 724175210b..2575e65860 100644 --- a/target/arm/mte_helper.c +++ b/target/arm/mte_helper.c @@ -84,10 +84,8 @@ static uint8_t *allocation_tag_mem(CPUARMState *env, int ptr_mmu_idx, uintptr_t index; if (!(flags & (ptr_access == MMU_DATA_STORE ? PAGE_WRITE_ORG : PAGE_READ))) { - /* SIGSEGV */ - arm_cpu_tlb_fill(env_cpu(env), ptr, ptr_size, ptr_access, - ptr_mmu_idx, false, ra); - g_assert_not_reached(); + raise_sigsegv(env_cpu(env), ptr, ptr_access, + !(flags & PAGE_VALID), ra); } /* Require both MAP_ANON and PROT_MTE for the page. */ From patchwork Sat Sep 18 18:45:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA967C433EF for ; Sat, 18 Sep 2021 19:01:41 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4311A600CD for ; Sat, 18 Sep 2021 19:01:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 4311A600CD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:46218 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfak-0005ep-Rc for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:01:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54544) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLj-0005Eb-2P for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:08 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]:41493) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLU-0006tG-DX for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:06 -0400 Received: by mail-pg1-x535.google.com with SMTP id k24so13081169pgh.8 for ; Sat, 18 Sep 2021 11:45:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+ACTRx2M3S4z/05kxGieMFxgHgCHNXfLhyJ3AhpLuew=; b=xCdM6xjQMJLP47IbmyIfhyHC1n6R9vqOD00J+JcDNAw6cTMIq926r8zR/78Am5BZPF uzT/IHXEe+zUMrVDmUqmLJOpyyfIslwyq0hgmR3SdB/SXzBA/5T/VYDpgdu2gGWDFp1s MtN+6FzwDJ33odnY2wHMpa0Uiw5XSlv13M9SGralQ0MQDknLJ1KIsTpnk86cVGN1gLow wlZc+kAUNHcy6q4pCJisxGHR0HR7EQYKf5TiAZMaenByuLi+rhecQ0+ulrXPoiJSsVYM tHB2PqrNIDY+qzqiR6XTICnxnwvcOuyTw3FuErfmWuy5VeerqDX/tTWTzTsppFJuoStf DBlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+ACTRx2M3S4z/05kxGieMFxgHgCHNXfLhyJ3AhpLuew=; b=XHtY2nM5KIQHMZEASrJKI2u+fDBSrSnlk7UbBw+mgt4TCfg8iMwm1o2A9oIEL9gF+W 6azQdClAs/Z+VdKocv89nBzArlY/AYo5jKCyvC2L0UdLZMt+F9RgM6xyIySZVYuWBeFW ff1cj3ME1Al269eEhudsw827U7TwgkxQo6AOqa2Pi1GSVY7Aa+jfAa8H7oesV1FkaLao IfgzLt+YUzefXiILR31TodERp/sFjXrbZWe1lCz0mwJOg16UIr61Pm1wP6VfK3yItExL 9EG+NBbjb3+YL6RyLF3Ji7Ucgz0anUscfta1GMg3fNpwGIpoAqawfE0lATgExILlgXuR s0wA== X-Gm-Message-State: AOAM530xuN8lxejsL4Bx4mhktV+Q8jqAtKusDx0cC1wQ7+lh8T0+T+Fu SuVYZNmCDu3srb8lMN642WM/+oaoucLJHg== X-Google-Smtp-Source: ABdhPJxffc64WJkGSVyIOHNp21Ydt8lQ2rtqxhxMOwpIWSjPi4i9oaunMtlFTpsC8FXjIB2kNmabgQ== X-Received: by 2002:a62:1b92:0:b0:3eb:3f92:724 with SMTP id b140-20020a621b92000000b003eb3f920724mr17218868pfb.3.1631990747875; Sat, 18 Sep 2021 11:45:47 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 23/41] target/arm: Implement arm_cpu_record_sigsegv Date: Sat, 18 Sep 2021 11:45:09 -0700 Message-Id: <20210918184527.408540-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Because of the complexity of setting ESR, continue to use arm_deliver_fault. This means we cannot remove the code within cpu_loop that decodes EXCP_DATA_ABORT and EXCP_PREFETCH_ABORT. But using the new hook means that we don't have to do the page_get_flags check manually, and we'll be able to restrict the tlb_fill hook to sysemu later. Signed-off-by: Richard Henderson --- target/arm/internals.h | 6 ++++++ target/arm/cpu.c | 6 ++++-- target/arm/cpu_tcg.c | 6 ++++-- target/arm/tlb_helper.c | 36 +++++++++++++++++++----------------- 4 files changed, 33 insertions(+), 21 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index cd2ea8a388..480145b382 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -544,9 +544,15 @@ static inline bool arm_extabort_type(MemTxResult result) return result != MEMTX_DECODE_ERROR; } +#ifdef CONFIG_USER_ONLY +void arm_cpu_record_sigsegv(CPUState *cpu, vaddr addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra); +#else bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); +#endif static inline int arm_to_core_mmu_idx(ARMMMUIdx mmu_idx) { diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e11aa625a5..4fc01768ab 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2016,10 +2016,12 @@ static const struct SysemuCPUOps arm_sysemu_ops = { static const struct TCGCPUOps arm_tcg_ops = { .initialize = arm_translate_init, .synchronize_from_tb = arm_cpu_synchronize_from_tb, - .tlb_fill = arm_cpu_tlb_fill, .debug_excp_handler = arm_debug_excp_handler, -#if !defined(CONFIG_USER_ONLY) +#ifdef CONFIG_USER_ONLY + .record_sigsegv = arm_cpu_record_sigsegv, +#else + .tlb_fill = arm_cpu_tlb_fill, .has_work = arm_cpu_has_work, .cpu_exec_interrupt = arm_cpu_exec_interrupt, .do_interrupt = arm_cpu_do_interrupt, diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index 0d5adccf1a..7b3bea2fbb 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -898,10 +898,12 @@ static void pxa270c5_initfn(Object *obj) static const struct TCGCPUOps arm_v7m_tcg_ops = { .initialize = arm_translate_init, .synchronize_from_tb = arm_cpu_synchronize_from_tb, - .tlb_fill = arm_cpu_tlb_fill, .debug_excp_handler = arm_debug_excp_handler, -#if !defined(CONFIG_USER_ONLY) +#ifdef CONFIG_USER_ONLY + .record_sigsegv = arm_cpu_record_sigsegv, +#else + .tlb_fill = arm_cpu_tlb_fill, .cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt, .do_interrupt = arm_v7m_cpu_do_interrupt, .do_transaction_failed = arm_cpu_do_transaction_failed, diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index 3107f9823e..dc5860180f 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -147,28 +147,12 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, arm_deliver_fault(cpu, addr, access_type, mmu_idx, &fi); } -#endif /* !defined(CONFIG_USER_ONLY) */ - bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr) { ARMCPU *cpu = ARM_CPU(cs); ARMMMUFaultInfo fi = {}; - -#ifdef CONFIG_USER_ONLY - int flags = page_get_flags(useronly_clean_ptr(address)); - if (flags & PAGE_VALID) { - fi.type = ARMFault_Permission; - } else { - fi.type = ARMFault_Translation; - } - fi.level = 3; - - /* now we have a real cpu fault */ - cpu_restore_state(cs, retaddr, true); - arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi); -#else hwaddr phys_addr; target_ulong page_size; int prot, ret; @@ -210,5 +194,23 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size, cpu_restore_state(cs, retaddr, true); arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi); } -#endif } +#else +void arm_cpu_record_sigsegv(CPUState *cs, vaddr addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra) +{ + ARMMMUFaultInfo fi = { + .type = maperr ? ARMFault_Translation : ARMFault_Permission, + .level = 3, + }; + ARMCPU *cpu = ARM_CPU(cs); + + /* + * We report both ESR and FAR to signal handlers. + * For now, it's easiest to deliver the fault normally. + */ + cpu_restore_state(cs, ra, true); + arm_deliver_fault(cpu, addr, access_type, MMU_USER_IDX, &fi); +} +#endif /* !defined(CONFIG_USER_ONLY) */ From patchwork Sat Sep 18 18:45:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABCF4C433F5 for ; Sat, 18 Sep 2021 19:12:42 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 39DBD610A6 for ; Sat, 18 Sep 2021 19:12:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 39DBD610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:51208 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRflR-0002nD-6f for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:12:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54506) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLf-0005D0-Q2 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:04 -0400 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]:37439) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLS-0006ts-Vi for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:00 -0400 Received: by mail-pg1-x536.google.com with SMTP id 17so13098847pgp.4 for ; Sat, 18 Sep 2021 11:45:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yhN8ow8bafB9lvcE0BZaSXFoylrPitNEFmmVqtlA/N4=; b=t28LFLBBoCwttS/Xsn/H8Z9+uNlnEzbRSDN3S0d9ZoOOEEi2AmnrupLxJTTYpyeG2q Rd6fCBIqZkbl15zwrzgNsB/kcvG1ytYlp/lpS2jDdh1A3s9uaaaSS5v7BZBMQEbrMdAM 7rl4sGMtQOOimiryyJ7aHmsHBDE8xJGwaNn19S5xBeflat+k0pGu7mEN3H2dvJPfWWTl /8idErSCwZ3w5K/Zs3EucKPtlKMD55ipH89m8u7nkasTX4+iVAVtVNvzuqpKh11y7UAz BuNyzNzMC9+1zWM6TMrMrUJ4Z07LoqcUkmQ+zXotlIEeX/7og/uPaZiDke/uiCodTNwz LJkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yhN8ow8bafB9lvcE0BZaSXFoylrPitNEFmmVqtlA/N4=; b=K0kkcaNKQEvfOQjdpUFg0xvDn07B/lC51sYUBIhCFkSAAOKctYU/Pbq04RWiNaofOL nfF/KilqLi9bpGN1amIzMPqsrMa9DWYUcLpVOReRAc+vl83E1aJVo6xJ5O17E1HyXLc1 7fOjoEwhX/Eled9fdIcYH/Gqmm23kjt6hFM8CnkiveBIv7CKXNT9YvfFu9hd6vjsJ/oq yXaI6bVvmX3IHgdq64sNqlJt/25w+sTG9B6TpduX8O8SV53O6Xb+gSOrfpcLyPhuPd17 NKl6G3iWrC214QiTKO84MN1dH73Slp04T1BYcZ3RxTMw6jMheWIk1bjH7J27NIxvcRt9 TQeA== X-Gm-Message-State: AOAM531P/R26LXymrPgMk2+nT1WcEnSkgGrw60VUbeb80Bw68JASnY3a M1ZDOmsWQD/u05Zgpu/IKjdQergBc1nwUQ== X-Google-Smtp-Source: ABdhPJxHDK4F1ckS2I/iGdTwZt6wgayV/88sJM6YYaFEMGOFE3bIVcgGvKXbQrO38KHgkYxYaEPx3w== X-Received: by 2002:a05:6a00:1481:b0:43d:275b:7ba4 with SMTP id v1-20020a056a00148100b0043d275b7ba4mr17032200pfu.63.1631990748685; Sat, 18 Sep 2021 11:45:48 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 24/41] target/cris: Make cris_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:10 -0700 Message-Id: <20210918184527.408540-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for cris-linux-user. Remove the code from cpu_loop that handled the unnamed 0xaa exception. This makes all of the code in helper.c sysemu only, so remove the ifdefs and move the file to cris_softmmu_ss. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/cris/cpu.h | 8 ++++---- linux-user/cris/cpu_loop.c | 10 ---------- target/cris/cpu.c | 4 ++-- target/cris/helper.c | 18 ------------------ target/cris/meson.build | 7 +++++-- 5 files changed, 11 insertions(+), 36 deletions(-) diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 6603565f83..b445b194ea 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -189,6 +189,10 @@ extern const VMStateDescription vmstate_cris_cpu; void cris_cpu_do_interrupt(CPUState *cpu); void crisv10_cpu_do_interrupt(CPUState *cpu); bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req); + +bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); #endif void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags); @@ -251,10 +255,6 @@ static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch) return !!(env->pregs[PR_CCS] & U_FLAG); } -bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); - /* Support function regs. */ #define SFR_RW_GC_CFG 0][0 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0 diff --git a/linux-user/cris/cpu_loop.c b/linux-user/cris/cpu_loop.c index 334edddd1e..0de941c0b4 100644 --- a/linux-user/cris/cpu_loop.c +++ b/linux-user/cris/cpu_loop.c @@ -35,16 +35,6 @@ void cpu_loop(CPUCRISState *env) process_queued_cpu_work(cs); switch (trapnr) { - case 0xaa: - { - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - /* XXX: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->pregs[PR_EDA]; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - break; case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; diff --git a/target/cris/cpu.c b/target/cris/cpu.c index b9f30ba58f..b8ac1b9f25 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -207,10 +207,10 @@ static const struct SysemuCPUOps cris_sysemu_ops = { static const struct TCGCPUOps crisv10_tcg_ops = { .initialize = cris_initialize_crisv10_tcg, - .tlb_fill = cris_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = cris_cpu_has_work, + .tlb_fill = cris_cpu_tlb_fill, .cpu_exec_interrupt = cris_cpu_exec_interrupt, .do_interrupt = crisv10_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ @@ -218,9 +218,9 @@ static const struct TCGCPUOps crisv10_tcg_ops = { static const struct TCGCPUOps crisv32_tcg_ops = { .initialize = cris_initialize_tcg, - .tlb_fill = cris_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY + .tlb_fill = cris_cpu_tlb_fill, .cpu_exec_interrupt = cris_cpu_exec_interrupt, .do_interrupt = cris_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ diff --git a/target/cris/helper.c b/target/cris/helper.c index 36926faf32..a0d6ecdcd3 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -39,22 +39,6 @@ #define D_LOG(...) do { } while (0) #endif -#if defined(CONFIG_USER_ONLY) - -bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - CRISCPU *cpu = CRIS_CPU(cs); - - cs->exception_index = 0xaa; - cpu->env.pregs[PR_EDA] = address; - cpu_loop_exit_restore(cs, retaddr); -} - -#else /* !CONFIG_USER_ONLY */ - - static void cris_shift_ccs(CPUCRISState *env) { uint32_t ccs; @@ -304,5 +288,3 @@ bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return ret; } - -#endif /* !CONFIG_USER_ONLY */ diff --git a/target/cris/meson.build b/target/cris/meson.build index 67c3793c85..c1e326d950 100644 --- a/target/cris/meson.build +++ b/target/cris/meson.build @@ -2,13 +2,16 @@ cris_ss = ss.source_set() cris_ss.add(files( 'cpu.c', 'gdbstub.c', - 'helper.c', 'op_helper.c', 'translate.c', )) cris_softmmu_ss = ss.source_set() -cris_softmmu_ss.add(files('mmu.c', 'machine.c')) +cris_softmmu_ss.add(files( + 'helper.c', + 'machine.c', + 'mmu.c', +)) target_arch += {'cris': cris_ss} target_softmmu_arch += {'cris': cris_softmmu_ss} From patchwork Sat Sep 18 18:45:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503969 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08E5FC433EF for ; Sat, 18 Sep 2021 19:01:33 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B6A9C61074 for ; Sat, 18 Sep 2021 19:01:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B6A9C61074 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:46088 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfad-0005ZT-Uv for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:01:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54574) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLk-0005FC-WA for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:09 -0400 Received: from mail-pg1-x52a.google.com ([2607:f8b0:4864:20::52a]:41483) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLZ-0006uv-9u for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:08 -0400 Received: by mail-pg1-x52a.google.com with SMTP id k24so13081200pgh.8 for ; Sat, 18 Sep 2021 11:45:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cte6pKzcMfKewPWftjin4gW1GIttpyjIUNnwyFMUyW8=; b=sLE8gW4PKxYcJCz+Yog9sjqdfn+aMf+Lm/+Pr8H5UU0EGFQiuxADYeJRldBpJT7fu5 r6U7GMwh0+h1UJSw0eTu8OFG/3QbTLTuao2AihKh89S4nEShvuZ4zurwIwvR0N8w431x jeVPl+UEbzXlDATtzPacWb+4QGGGiU8gBKgvIkEggv7+RRenLPc7df4ucgIGevoZx9Sj JjQju7pPCk73l9fPz73VWq4WthmhPX4yeOqvcqOckVqEaRPg+iB2ACbjofnLfEKC4lVR mZve0uCYJE1rIiZ25col2FRcBL/RmEHTLjuIZ829mIqbBPItqEbt/99RbkI19EG3126Y FHFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cte6pKzcMfKewPWftjin4gW1GIttpyjIUNnwyFMUyW8=; b=gEPkQDr9GiZMk6HJ79sUqn9BY4WKzjxF9z1w9rKaP1pqr4hX2yRptY6N9rYPkqU0B3 2R7MMCQ/T5tCe/wzu7K1msAkjtRi8ZPVQ1+qhj3oDYeZ2LJ9DmuVO8Jq8E9qSH19nT2u Zwon1U2ZleFxwUrm3ZGMZt+SmW2smdv4nqGYPXF5rdjZmWFZEN8rJiPPThIbXbU7Fonr NzDP9ZgSwxA6tLOsjZ1Qj3kqJLTjCav4JutsUwz70rVgaPRHa2SwOU85sc5D4Sfa9dOy 5SD8x6BXzHdnBlCukcA5v8NfwX2EVghRFl8mPDYFJkI1/soMYf6ZHTq2yiRIzBeAI7e3 avUg== X-Gm-Message-State: AOAM530SqcyKm5XrUHcX/3RQyBguukhkiccXeNCxElO7crVkXWSt3xvL MmpvUKJ4hza7z/qkZ762sX1JvHnjtn8EEw== X-Google-Smtp-Source: ABdhPJwWUTdG2bkoKUacU1dCPcVCzYqYWRhPGoj/5uBJ0sUseO6pV8bcEFNXOqh4sBWdxqN3gQBBSQ== X-Received: by 2002:a62:63c6:0:b0:43f:cbf9:4383 with SMTP id x189-20020a6263c6000000b0043fcbf94383mr17208135pfb.14.1631990749548; Sat, 18 Sep 2021 11:45:49 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 25/41] target/hexagon: Remove hexagon_cpu_tlb_fill Date: Sat, 18 Sep 2021 11:45:11 -0700 Message-Id: <20210918184527.408540-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for hexagon. Remove the code from cpu_loop that raises SIGSEGV. Signed-off-by: Richard Henderson --- linux-user/hexagon/cpu_loop.c | 24 +----------------------- target/hexagon/cpu.c | 23 ----------------------- 2 files changed, 1 insertion(+), 46 deletions(-) diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c index bc34f5d7c3..244917e27f 100644 --- a/linux-user/hexagon/cpu_loop.c +++ b/linux-user/hexagon/cpu_loop.c @@ -26,8 +26,7 @@ void cpu_loop(CPUHexagonState *env) { CPUState *cs = env_cpu(env); - int trapnr, signum, sigcode; - target_ulong sigaddr; + int trapnr; target_ulong syscallnum; target_ulong ret; @@ -37,10 +36,6 @@ void cpu_loop(CPUHexagonState *env) cpu_exec_end(cs); process_queued_cpu_work(cs); - signum = 0; - sigcode = 0; - sigaddr = 0; - switch (trapnr) { case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ @@ -63,12 +58,6 @@ void cpu_loop(CPUHexagonState *env) env->gpr[0] = ret; } break; - case HEX_EXCP_FETCH_NO_UPAGE: - case HEX_EXCP_PRIV_NO_UREAD: - case HEX_EXCP_PRIV_NO_UWRITE: - signum = TARGET_SIGSEGV; - sigcode = TARGET_SEGV_MAPERR; - break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); break; @@ -77,17 +66,6 @@ void cpu_loop(CPUHexagonState *env) trapnr); exit(EXIT_FAILURE); } - - if (signum) { - target_siginfo_t info = { - .si_signo = signum, - .si_errno = 0, - .si_code = sigcode, - ._sifields._sigfault._addr = sigaddr - }; - queue_signal(env, info.si_signo, QEMU_SI_KILL, &info); - } - process_pending_signals(env); } } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index aa01974807..96cd7db170 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -240,34 +240,11 @@ static void hexagon_cpu_init(Object *obj) qdev_property_add_static(DEVICE(obj), &hexagon_lldb_stack_adjust_property); } -static bool hexagon_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ -#ifdef CONFIG_USER_ONLY - switch (access_type) { - case MMU_INST_FETCH: - cs->exception_index = HEX_EXCP_FETCH_NO_UPAGE; - break; - case MMU_DATA_LOAD: - cs->exception_index = HEX_EXCP_PRIV_NO_UREAD; - break; - case MMU_DATA_STORE: - cs->exception_index = HEX_EXCP_PRIV_NO_UWRITE; - break; - } - cpu_loop_exit_restore(cs, retaddr); -#else -#error System mode not implemented for Hexagon -#endif -} - #include "hw/core/tcg-cpu-ops.h" static const struct TCGCPUOps hexagon_tcg_ops = { .initialize = hexagon_translate_init, .synchronize_from_tb = hexagon_cpu_synchronize_from_tb, - .tlb_fill = hexagon_tlb_fill, }; static void hexagon_cpu_class_init(ObjectClass *c, void *data) From patchwork Sat Sep 18 18:45:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504005 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0B2BC433F5 for ; Sat, 18 Sep 2021 19:17:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 40656610A6 for ; Sat, 18 Sep 2021 19:17:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 40656610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:34642 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfqV-0002Fh-Fp for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:17:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54546) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLj-0005Ec-3r for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:08 -0400 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]:56302) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLV-0006vh-Et for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:06 -0400 Received: by mail-pj1-x102a.google.com with SMTP id t20so9164991pju.5 for ; Sat, 18 Sep 2021 11:45:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZeJrnrGXbns19Ke8zIFiDiL715TP9FXdW45pYc4kaZA=; b=evgczxDMW6NoVmZJV9OG47gOO74RerBksVVmt67+5F78SCqFd8/NJpgPI6BuRv5ZQY eEW3/7AQuOFXsuKDGwLV7S48qmEmBLPXei3PWnq1XvEzuStvE0fs3fiU7GJwzOGUjmes smApN+o+qE+PVrDRInYhG/eUg1SKUNdkp7NhtD3r+Yg/QwsPb3KLKVwX4PR8xRYf1S4B DF3XO/30nBHrK87XTJD55w3GbKiEIeNUHDN/BQnccRfCP1H0abzplO2jYwrYUlMR/XwU 12jV/ihzpNCLMxQ9nm6dbf5XJujRxShnqXrVjGINHphpj1oHhdWOIAC16tja3jCAliJD SfOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZeJrnrGXbns19Ke8zIFiDiL715TP9FXdW45pYc4kaZA=; b=EJsbaBWb7Cyxk1dfGuynAUrf//3jFuCSkq2jbVH2YRAJA5k59LX4gM/fkNuBLFMere pJpeo67S0nIR3t8XcmfSc0ockojkD2YlK65RWjLd83T+i9eihm4L0IqF570wMAnii6z7 0HbLNi03Gjy9oTWuOG4NA4wuWEwyo9MT7S9BZDZY3US8+KX4Tm5gFdA76NVPSjE9usAs rTn6mC+sDxpqhZkWV6GQfIeuHETeIF+p1zRmZY0148JgwxucnJ44wYQMFV1OBhBhg8QI dVeJVTNsjAkqanLDG2AUV07QVPNvcBOJnCcBuTQg6QKnuNxSh1vEOB3+uET6tuCZB0Nd l9hQ== X-Gm-Message-State: AOAM530GV8+3h4XIiapaIir3Mmy54nGMQpc7hWYr3ywT5HfHQfXBEcff 3tlEsCFKZDBLJ+vy6dNp9SRrdLaI8omCIw== X-Google-Smtp-Source: ABdhPJweIvN0WqiwcioCWBctzwN1MlrgfezUSRX8T8SdG6dPTHPMqwhijg0yl7j5EjuAQDMqP5pl5g== X-Received: by 2002:a17:903:31c2:b0:13c:9de8:d314 with SMTP id v2-20020a17090331c200b0013c9de8d314mr15212452ple.1.1631990750138; Sat, 18 Sep 2021 11:45:50 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 26/41] target/hppa: Make hppa_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:12 -0700 Message-Id: <20210918184527.408540-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for hppa-linux-user. Remove the code from cpu_loop that raised SIGSEGV. This makes all of the code in mem_helper.c sysemu only, so remove the ifdefs and move the file to hppa_softmmu_ss. Signed-off-by: Richard Henderson --- target/hppa/cpu.h | 2 +- linux-user/hppa/cpu_loop.c | 16 ---------------- target/hppa/cpu.c | 2 +- target/hppa/mem_helper.c | 15 --------------- target/hppa/meson.build | 6 ++++-- 5 files changed, 6 insertions(+), 35 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index d3cb7a279f..294fd7297f 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -323,10 +323,10 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr); int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void hppa_cpu_dump_state(CPUState *cs, FILE *f, int); +#ifndef CONFIG_USER_ONLY bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); -#ifndef CONFIG_USER_ONLY void hppa_cpu_do_interrupt(CPUState *cpu); bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req); int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, diff --git a/linux-user/hppa/cpu_loop.c b/linux-user/hppa/cpu_loop.c index 82d8183821..a6122b3594 100644 --- a/linux-user/hppa/cpu_loop.c +++ b/linux-user/hppa/cpu_loop.c @@ -142,22 +142,6 @@ void cpu_loop(CPUHPPAState *env) env->iaoq_f = env->gr[31]; env->iaoq_b = env->gr[31] + 4; break; - case EXCP_ITLB_MISS: - case EXCP_DTLB_MISS: - case EXCP_NA_ITLB_MISS: - case EXCP_NA_DTLB_MISS: - case EXCP_IMP: - case EXCP_DMP: - case EXCP_DMB: - case EXCP_PAGE_REF: - case EXCP_DMAR: - case EXCP_DMPI: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - info.si_code = TARGET_SEGV_ACCERR; - info._sifields._sigfault._addr = env->cr[CR_IOR]; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_UNALIGN: info.si_signo = TARGET_SIGBUS; info.si_errno = 0; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index be940ae224..9b92e82af7 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -146,10 +146,10 @@ static const struct SysemuCPUOps hppa_sysemu_ops = { static const struct TCGCPUOps hppa_tcg_ops = { .initialize = hppa_translate_init, .synchronize_from_tb = hppa_cpu_synchronize_from_tb, - .tlb_fill = hppa_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = hppa_cpu_has_work, + .tlb_fill = hppa_cpu_tlb_fill, .cpu_exec_interrupt = hppa_cpu_exec_interrupt, .do_interrupt = hppa_cpu_do_interrupt, .do_unaligned_access = hppa_cpu_do_unaligned_access, diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index afc5b56c3e..bf07445cd1 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -24,20 +24,6 @@ #include "hw/core/cpu.h" #include "trace.h" -#ifdef CONFIG_USER_ONLY -bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - HPPACPU *cpu = HPPA_CPU(cs); - - /* ??? Test between data page fault and data memory protection trap, - which would affect si_code. */ - cs->exception_index = EXCP_DMP; - cpu->env.cr[CR_IOR] = address; - cpu_loop_exit_restore(cs, retaddr); -} -#else static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr) { int i; @@ -392,4 +378,3 @@ int hppa_artype_for_page(CPUHPPAState *env, target_ulong vaddr) hppa_tlb_entry *ent = hppa_find_tlb(env, vaddr); return ent ? ent->ar_type : -1; } -#endif /* CONFIG_USER_ONLY */ diff --git a/target/hppa/meson.build b/target/hppa/meson.build index 8a7ff82efc..021e42a2d0 100644 --- a/target/hppa/meson.build +++ b/target/hppa/meson.build @@ -7,13 +7,15 @@ hppa_ss.add(files( 'gdbstub.c', 'helper.c', 'int_helper.c', - 'mem_helper.c', 'op_helper.c', 'translate.c', )) hppa_softmmu_ss = ss.source_set() -hppa_softmmu_ss.add(files('machine.c')) +hppa_softmmu_ss.add(files( + 'machine.c', + 'mem_helper.c', +)) target_arch += {'hppa': hppa_ss} target_softmmu_arch += {'hppa': hppa_softmmu_ss} From patchwork Sat Sep 18 18:45:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4E10C433F5 for ; Sat, 18 Sep 2021 19:07:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 59AA960F23 for ; Sat, 18 Sep 2021 19:07:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 59AA960F23 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:34864 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfgO-0000Jj-Fc for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:07:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54628) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLm-0005Jr-TC for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:10 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]:52167) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0006vo-3l for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:10 -0400 Received: by mail-pj1-x1030.google.com with SMTP id dw14so9179892pjb.1 for ; Sat, 18 Sep 2021 11:45:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K0fQfQv3eI9fj5VVYuJMrdPgUOCZpzNCV/amqlAI9NY=; b=TNP/i4DymDyMMlS/4Zyqpp0V5kP+7O7ZgtbEH2vMsgIoZRqRWb5ahcqE+ae+KRFDxS 4YIMOdKBliEuXx60c4aTanWoTw+blhcHhCSX1PwR5SSvbWyRZC6W7YODXMB4Ff65Ik2x AZfVO7V6VKhMXSIM/ApTJOpSzrKU8JLTB3jW3QXwOGhoaN/rdy9zYlYuJOPxG2Ql6ZJn 8USTbO0REzYu5JSeRLQTb6TPKkedu3BbTNv7XLNFN6961TW5/sN7ZPgjkTbN/JJu1/Qk oT6NTL3SmpZUqTL651qmZxRohhOq9Pdz11CWQEiC/d1FEi7E2UjnUuObwnPNyounVX87 m+AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K0fQfQv3eI9fj5VVYuJMrdPgUOCZpzNCV/amqlAI9NY=; b=0SQnb2hYwBqa7HX/yjrKmfg5g7CIuh41y9waFid754XHAqNw7KVOqpaCdXgyXC25DF BPUmVlTEJ9rrz+gz19DcucrDYO6Tqpa3Z2WgzzIejaB2f+YGKPipCoYLXAc27Jby6rFQ WDgKWyPKbGBX99YiWd3tXwKn45QB+kDszjZPwuA0HwHIHJnBLCzI8IEy7oYF/fZlWPw0 0Xz5BoY3cRZA4DEms74UyEoPHlRaOFaZvX7mftWqcW0qXsuxF5vQ6NbUZuJmN1HrIsTx bGGRTHgfvGtLX3I8g+8HTQqw7YnhlnpbAxBdTm06gnHzCRCxKuVXPvDZpPppvw9fdkMf Atkw== X-Gm-Message-State: AOAM533JxIhfoUNu3AkGE1d/08qRDKFnZoEOn/X9v01NlUsghjpaQ3er I7kT4NIydHBpQ70JJ5M+TNm3BkFTvD41Ow== X-Google-Smtp-Source: ABdhPJxcElwmVsff5vSiCTtvqKdfjpiT5yFnoJVwmm6TX5QM9M4U9tkHEGvVhqHonCTZR3nMEuMi1A== X-Received: by 2002:a17:90b:1c92:: with SMTP id oo18mr28669688pjb.56.1631990751022; Sat, 18 Sep 2021 11:45:51 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 27/41] target/i386: Implement x86_cpu_record_sigsegv Date: Sat, 18 Sep 2021 11:45:13 -0700 Message-Id: <20210918184527.408540-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Record cr2, error_code, and exception_index. That last means that we must exit to cpu_loop ourselves, instead of letting exception_index being overwritten. Use the maperr parameter to properly set PG_ERROR_P_MASK. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/i386/tcg/helper-tcg.h | 6 ++++++ target/i386/tcg/tcg-cpu.c | 3 ++- target/i386/tcg/user/excp_helper.c | 23 +++++++++++++++++------ 3 files changed, 25 insertions(+), 7 deletions(-) diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h index 60ca09e95e..0a4401e917 100644 --- a/target/i386/tcg/helper-tcg.h +++ b/target/i386/tcg/helper-tcg.h @@ -43,9 +43,15 @@ bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); #endif /* helper.c */ +#ifdef CONFIG_USER_ONLY +void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra); +#else bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); +#endif void breakpoint_handler(CPUState *cs); diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index aef050d089..3fab3676b1 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -77,11 +77,12 @@ static const struct TCGCPUOps x86_tcg_ops = { .synchronize_from_tb = x86_cpu_synchronize_from_tb, .cpu_exec_enter = x86_cpu_exec_enter, .cpu_exec_exit = x86_cpu_exec_exit, - .tlb_fill = x86_cpu_tlb_fill, #ifdef CONFIG_USER_ONLY .fake_user_interrupt = x86_cpu_do_interrupt, + .record_sigsegv = x86_cpu_record_sigsegv, #else .has_work = x86_cpu_has_work, + .tlb_fill = x86_cpu_tlb_fill, .do_interrupt = x86_cpu_do_interrupt, .cpu_exec_interrupt = x86_cpu_exec_interrupt, .debug_excp_handler = breakpoint_handler, diff --git a/target/i386/tcg/user/excp_helper.c b/target/i386/tcg/user/excp_helper.c index a89b5228fd..cd507e2a1b 100644 --- a/target/i386/tcg/user/excp_helper.c +++ b/target/i386/tcg/user/excp_helper.c @@ -22,18 +22,29 @@ #include "exec/exec-all.h" #include "tcg/helper-tcg.h" -bool x86_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) +void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; + /* + * The error_code that hw reports as part of the exception frame + * is copied to linux sigcontext.err. The exception_index is + * copied to linux sigcontext.trapno. Short of inventing a new + * place to store the trapno, we cannot let our caller raise the + * signal and set exception_index to EXCP_INTERRUPT. + */ env->cr[2] = addr; - env->error_code = (access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT; - env->error_code |= PG_ERROR_U_MASK; + env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT) + | (maperr ? 0 : PG_ERROR_P_MASK) + | PG_ERROR_U_MASK; cs->exception_index = EXCP0E_PAGE; + + /* Disable do_interrupt_user. */ env->exception_is_int = 0; env->exception_next_eip = -1; - cpu_loop_exit_restore(cs, retaddr); + + cpu_loop_exit_restore(cs, ra); } From patchwork Sat Sep 18 18:45:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36C2DC433F5 for ; Sat, 18 Sep 2021 19:21:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C5AA060F70 for ; Sat, 18 Sep 2021 19:21:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C5AA060F70 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:42524 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfuN-0007jS-SK for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:21:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54584) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLl-0005Go-GD for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:09 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]:35388) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLW-0006wT-6h for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:09 -0400 Received: by mail-pl1-x630.google.com with SMTP id bb10so8391305plb.2 for ; Sat, 18 Sep 2021 11:45:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=J7hXQMffuuyXWpRCyuYJCpC7YHlZqNroGTBaJ0dICLY=; b=HmaQDaZ6OpxXZdCaSbmOznChge+x9N6Xx4Q/cATmhLf92uiWRSMFIshPAK3oYfVpsJ 7froXKEsUXT9bPzbXW+GgSGNvWZsT952zmVytnRDYDj7roxKGZLjUUysiztrxdN4/MNW /J4sroFSVX7kqfEXfilTbR1Y0vaes7ouYvNtmGucusrjDdSnexZrazew60xEXvYydbUG Uq9cC3w+UFC3hu88L9YVNs3tYuiuluqUY+FhSyB2/t/99WkDuzet6ozl+R/1kwWhD4t3 MdeTmqW5znUkW/7tAmgm5DIF5rNEbgXT0Vu10+rlN/iT5n6ZvlxOkgvE0PQtCFdzQ5jX scyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=J7hXQMffuuyXWpRCyuYJCpC7YHlZqNroGTBaJ0dICLY=; b=ohGms0BuY043sIapSLsuk7QEVern/lqsYRT4fsMjIR7s5KzqiZIFjAmWPq4Hh/mtET kvyd9jALiu7kPcnMf2K+uaqCORd02+VYl9gUTYhgYHt9xc/I0vWJUJEuxGwyeXz550on 4IexkMqMH2qN1GwJ4P4kDD0+gUEZ/++VGE0qz1M0CHwTYJg88hUuWPsNlr4JhOVc6UKR TfTUR7W0NX4Kuuo426REPPkyYrKBDIwRDiyb2Mc+IDwyQ6hjm96fZDKKRouEg9z3IYIl CD+ThcAH8hOVt2igDxNmCY8wdZG+LQ/Es7IdNP9RiEojqZ7/+RYmZXU+i6/+3lXTVuPV IR8A== X-Gm-Message-State: AOAM533IPe7mQJOHWQHQ3FjrBRhHXNgtXAHi3IeBgsPEfSs1vK95MAPc 2nLxQjiGk9VUAjSUol3ZT0t8Hay5HEXd9w== X-Google-Smtp-Source: ABdhPJzfuk2Jcc2LuEmau5l+/gm9fvlIJtgQUj1vdMlg7Vo/O9ESubg3su5pb3lY39jfoKT++OWKxw== X-Received: by 2002:a17:90b:3e84:: with SMTP id rj4mr14300361pjb.208.1631990751974; Sat, 18 Sep 2021 11:45:51 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 28/41] target/m68k: Make m68k_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:14 -0700 Message-Id: <20210918184527.408540-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for m68k-linux-user. Remove the code from cpu_loop that handled EXCP_ACCESS. Signed-off-by: Richard Henderson --- linux-user/m68k/cpu_loop.c | 10 ---------- target/m68k/cpu.c | 2 +- target/m68k/helper.c | 6 +----- 3 files changed, 2 insertions(+), 16 deletions(-) diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index c7a500b58c..7d106aa86e 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -88,16 +88,6 @@ void cpu_loop(CPUM68KState *env) case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; - case EXCP_ACCESS: - { - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - /* XXX: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->mmu.ar; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - break; case EXCP_DEBUG: info.si_signo = TARGET_SIGTRAP; info.si_errno = 0; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index ad5d26b5c9..94b7fc90e8 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -517,10 +517,10 @@ static const struct SysemuCPUOps m68k_sysemu_ops = { static const struct TCGCPUOps m68k_tcg_ops = { .initialize = m68k_tcg_init, - .tlb_fill = m68k_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = m68k_cpu_has_work, + .tlb_fill = m68k_cpu_tlb_fill, .cpu_exec_interrupt = m68k_cpu_exec_interrupt, .do_interrupt = m68k_cpu_do_interrupt, .do_transaction_failed = m68k_cpu_transaction_failed, diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 137a3e1a3d..5728e48585 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -978,16 +978,12 @@ void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector) } } -#endif - bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType qemu_access_type, int mmu_idx, bool probe, uintptr_t retaddr) { M68kCPU *cpu = M68K_CPU(cs); CPUM68KState *env = &cpu->env; - -#ifndef CONFIG_USER_ONLY hwaddr physical; int prot; int access_type; @@ -1051,12 +1047,12 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(access_type & ACCESS_STORE)) { env->mmu.ssw |= M68K_RW_040; } -#endif cs->exception_index = EXCP_ACCESS; env->mmu.ar = address; cpu_loop_exit_restore(cs, retaddr); } +#endif /* !CONFIG_USER_ONLY */ uint32_t HELPER(bitrev)(uint32_t x) { From patchwork Sat Sep 18 18:45:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAA9EC433F5 for ; Sat, 18 Sep 2021 19:19:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3FD03610A6 for ; Sat, 18 Sep 2021 19:19:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3FD03610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:38880 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfsS-00056S-Es for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:19:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54576) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLl-0005FJ-2P for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:09 -0400 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]:42517) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLe-0006wZ-BS for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:08 -0400 Received: by mail-pl1-x62d.google.com with SMTP id l6so3611895plh.9 for ; Sat, 18 Sep 2021 11:45:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vy3PmhKz8vrPuLguGAuScpJF3WUMXPHzvRxSKLuEp08=; b=Z//66kk5Co2E+DdUydRCtkHZRXfSEEyRO+ADyIOZwKbQ7iBs/sQ0QJJIS6fjv2xpI8 abZebf4q4HIl6PaFYFV78fOHuqQGZVJyTxmpFFt5FhYInNyjg79z7TLs6yR75MEUJ0mQ RevZz9aXJ6S7aRb8pSuI3M48MlY43steRDwSuajQ2QwSPWExxh4EREr+qxcgWy+kFepU Fg4fYt/ZwNoX23FwakvBNWVyH5mMQkE1Tj/yYke7mfVJwIzNSKeN1w8AYCzP7IqtHTi7 p1V/UyxIIw9xCztb7F1T6/GkFIGrNI6syyo6gfxVBlbbNpSnXHaz3hQ/qpkPYQ7Zdq0u wOdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vy3PmhKz8vrPuLguGAuScpJF3WUMXPHzvRxSKLuEp08=; b=67vSzpA6MJDqJpnhVIQT/e/AJUhGZCAxYxqvndwq4b+CBQS7xBioC9vl8GMxcEaPfB VqGThyvsxQbgXV+NxcGOZgH36YgfGLG4QS0Rp3yX6tSYOLwS26DYQ+Jr3Mgg2Nnn/Vtd vT8gEEORVX1XVS/R843S/1koIA/KI/GOQy8VH4nkb4ng+oa7u6OsracxIlxtySouVPVu 5X8HPdr8G8BdalAoaCZest+h0qEezZkR63PJ5g2bzBlW9gpgAEk5rbaCLOQSBxinc4z/ bbeUTqDyhiEPJVONFIhDb0G0djHJipu2El4OYyqiPE8xsrp4tG9uIC5KEqLtMcLvMILD Pw3Q== X-Gm-Message-State: AOAM530HLD9BlfngKgjKvAO5bNSijmQvvMZ5qUHwyfmB7MSxxXw3gPaV AkKd8Vqx3O0+cDo51r+nZrfUvsYiJ0SFwA== X-Google-Smtp-Source: ABdhPJxoeTbDygQbJLVOEMzj8ABSA0yLwAXWtPtk4puAASCdGz06W6uZQNfRVJYKmqV7vczsDWDUVw== X-Received: by 2002:a17:90a:ab90:: with SMTP id n16mr19530162pjq.157.1631990752811; Sat, 18 Sep 2021 11:45:52 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 29/41] target/microblaze: Make mb_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:15 -0700 Message-Id: <20210918184527.408540-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for mb linux-user. Remove the code from cpu_loop that handled the unnamed 0xaa exception. Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 8 ++++---- linux-user/microblaze/cpu_loop.c | 10 ---------- target/microblaze/cpu.c | 2 +- target/microblaze/helper.c | 13 +------------ 4 files changed, 6 insertions(+), 27 deletions(-) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 13ed3cd4dd..2f3075d902 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -394,10 +394,6 @@ void mb_tcg_init(void); #define MMU_USER_IDX 2 /* See NB_MMU_MODES further up the file. */ -bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); - typedef CPUMBState CPUArchState; typedef MicroBlazeCPU ArchCPU; @@ -415,6 +411,10 @@ static inline void cpu_get_tb_cpu_state(CPUMBState *env, target_ulong *pc, } #if !defined(CONFIG_USER_ONLY) +bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); + void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, MMUAccessType access_type, int mmu_idx, MemTxAttrs attrs, diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c index c3396a6e09..0b889a04a7 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -35,16 +35,6 @@ void cpu_loop(CPUMBState *env) process_queued_cpu_work(cs); switch (trapnr) { - case 0xaa: - { - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - /* XXX: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = 0; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - break; case EXCP_INTERRUPT: /* just indicate that signals should be handled asap */ break; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 36e6e54048..67a3b80512 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -366,10 +366,10 @@ static const struct SysemuCPUOps mb_sysemu_ops = { static const struct TCGCPUOps mb_tcg_ops = { .initialize = mb_tcg_init, .synchronize_from_tb = mb_cpu_synchronize_from_tb, - .tlb_fill = mb_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = mb_cpu_has_work, + .tlb_fill = mb_cpu_tlb_fill, .cpu_exec_interrupt = mb_cpu_exec_interrupt, .do_interrupt = mb_cpu_do_interrupt, .do_transaction_failed = mb_cpu_transaction_failed, diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index dd2aecd1d5..a607fe68e5 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -24,18 +24,7 @@ #include "qemu/host-utils.h" #include "exec/log.h" -#if defined(CONFIG_USER_ONLY) - -bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - cs->exception_index = 0xaa; - cpu_loop_exit_restore(cs, retaddr); -} - -#else /* !CONFIG_USER_ONLY */ - +#ifndef CONFIG_USER_ONLY static bool mb_cpu_access_is_secure(MicroBlazeCPU *cpu, MMUAccessType access_type) { From patchwork Sat Sep 18 18:45:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504001 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A37CC433F5 for ; Sat, 18 Sep 2021 19:14:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E70AF60F50 for ; Sat, 18 Sep 2021 19:14:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E70AF60F50 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:56760 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfmi-0006Ti-1k for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:14:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54564) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLj-0005Ef-Us for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:08 -0400 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]:35634) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0006wl-46 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:07 -0400 Received: by mail-pf1-x42f.google.com with SMTP id w14so1834155pfu.2 for ; Sat, 18 Sep 2021 11:45:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pdR7M5gTpnKqPa2u5ulNgoeIpoR7t4q0hOa5Vm4dJ50=; b=LHcNh9ZAkzWYLU64vOcEJxd/6BAGlz5Yp+/STJ8w3dcN2lEK8/JxpaDqlmlw8OxkYx +9Eck3J18nulkNMMbBvo8uWsQwoubL2EUZt+Qa9v9BJtnj8eyoQZaGhjFRekSdQpMGVX psSlHUQdlYvqjOWmF10IO4+qP+PbELgwkRhlZGaW1DJREKM56a4IaYlPcVjXNjbmnEBG MBR9m1BkGudcmEkrUpq5p6VKCV12BNkNY5GqHol1JV1lvYLXY6XyVZwg/p178m6cEb/z jAyaj88H6TFA3SidPrnWvXwiZI0MMrHTjj4K51ly4ciyNrme4bJ3X49/Ns6SxImYaCas 7O/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pdR7M5gTpnKqPa2u5ulNgoeIpoR7t4q0hOa5Vm4dJ50=; b=s7LNGTOibE9t1SyYMnDX68D1jKoXDoF0iVu4dApFqVBoZW8XdMIdSrHB9bZWVokiMp rrwYA61VsAh/Wx5bjdF17GLCGhDIRgFUUXKOCNnQzJZt5llMu7TXXlkVbZ+ZJsGrv0q5 XJuTi0t+vhkUdjzLEZr3Q+IH+GoM+tHTVAjp/HcE44ThDRx674lWggH6s3E7TSqT3mF6 eHCofmgIRVmW4g0PvTk4WCaTlUQV2BeNrnEID4QkmtBsPhU1f/Y3AYUmZbT7R9sZJNXT aPslugpGmSCs4I1NUgNuBPkfMZb41GD5eb+3pDTJtAKpzLxCekI7M4J0JNexas51Aeys yEzg== X-Gm-Message-State: AOAM5311ZN8qERpTW6TI85e0kJlhhtSRLUpr+IepJy/qqpewJVyOK3pV wsuHV/4AzMH9Z/NNpbHbZFNV38Qalz0Vmg== X-Google-Smtp-Source: ABdhPJwFC4bHcSst54eky4s0UbnpP5sf8lmtP2Lb5znL1/fw8qojRcz3cjaAq9SAh4adtSIreQI6nQ== X-Received: by 2002:a62:6246:0:b0:443:852a:2a2e with SMTP id w67-20020a626246000000b00443852a2a2emr13271843pfb.14.1631990753630; Sat, 18 Sep 2021 11:45:53 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 30/41] target/mips: Make mips_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:16 -0700 Message-Id: <20210918184527.408540-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for mips linux-user. This means we can remove tcg/user/tlb_helper.c entirely. Remove the code from cpu_loop that raised SIGSEGV. Signed-off-by: Richard Henderson --- target/mips/tcg/tcg-internal.h | 7 ++-- linux-user/mips/cpu_loop.c | 11 ------ target/mips/cpu.c | 2 +- target/mips/tcg/user/tlb_helper.c | 59 ------------------------------- target/mips/tcg/meson.build | 3 -- target/mips/tcg/user/meson.build | 3 -- 6 files changed, 5 insertions(+), 80 deletions(-) delete mode 100644 target/mips/tcg/user/tlb_helper.c delete mode 100644 target/mips/tcg/user/meson.build diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h index c7a77ddccd..8ba36a8ef8 100644 --- a/target/mips/tcg/tcg-internal.h +++ b/target/mips/tcg/tcg-internal.h @@ -18,9 +18,6 @@ void mips_tcg_init(void); void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb); -bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr); @@ -60,6 +57,10 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, MemTxResult response, uintptr_t retaddr); void cpu_mips_tlb_flush(CPUMIPSState *env); +bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); + #endif /* !CONFIG_USER_ONLY */ #endif diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 9d813ece4e..40825ca566 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -156,17 +156,6 @@ done_syscall: } env->active_tc.gpr[2] = ret; break; - case EXCP_TLBL: - case EXCP_TLBS: - case EXCP_AdEL: - case EXCP_AdES: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - /* XXX: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->CP0_BadVAddr; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_CpU: case EXCP_RI: info.si_signo = TARGET_SIGILL; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 3639c03f8e..439b2f1635 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -541,10 +541,10 @@ static const struct SysemuCPUOps mips_sysemu_ops = { static const struct TCGCPUOps mips_tcg_ops = { .initialize = mips_tcg_init, .synchronize_from_tb = mips_cpu_synchronize_from_tb, - .tlb_fill = mips_cpu_tlb_fill, #if !defined(CONFIG_USER_ONLY) .has_work = mips_cpu_has_work, + .tlb_fill = mips_cpu_tlb_fill, .cpu_exec_interrupt = mips_cpu_exec_interrupt, .do_interrupt = mips_cpu_do_interrupt, .do_transaction_failed = mips_cpu_do_transaction_failed, diff --git a/target/mips/tcg/user/tlb_helper.c b/target/mips/tcg/user/tlb_helper.c deleted file mode 100644 index 210c6d529e..0000000000 --- a/target/mips/tcg/user/tlb_helper.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * MIPS TLB (Translation lookaside buffer) helpers. - * - * Copyright (c) 2004-2005 Jocelyn Mayer - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ -#include "qemu/osdep.h" - -#include "cpu.h" -#include "exec/exec-all.h" -#include "internal.h" - -static void raise_mmu_exception(CPUMIPSState *env, target_ulong address, - MMUAccessType access_type) -{ - CPUState *cs = env_cpu(env); - - env->error_code = 0; - if (access_type == MMU_INST_FETCH) { - env->error_code |= EXCP_INST_NOTAVAIL; - } - - /* Reference to kernel address from user mode or supervisor mode */ - /* Reference to supervisor address from user mode */ - if (access_type == MMU_DATA_STORE) { - cs->exception_index = EXCP_AdES; - } else { - cs->exception_index = EXCP_AdEL; - } - - /* Raise exception */ - if (!(env->hflags & MIPS_HFLAG_DM)) { - env->CP0_BadVAddr = address; - } -} - -bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - MIPSCPU *cpu = MIPS_CPU(cs); - CPUMIPSState *env = &cpu->env; - - /* data access */ - raise_mmu_exception(env, address, access_type); - do_raise_exception_err(env, cs->exception_index, env->error_code, retaddr); -} diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index 8f6f7508b6..98003779ae 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -28,9 +28,6 @@ mips_ss.add(when: 'TARGET_MIPS64', if_true: files( 'mxu_translate.c', )) -if have_user - subdir('user') -endif if have_system subdir('sysemu') endif diff --git a/target/mips/tcg/user/meson.build b/target/mips/tcg/user/meson.build deleted file mode 100644 index 79badcd321..0000000000 --- a/target/mips/tcg/user/meson.build +++ /dev/null @@ -1,3 +0,0 @@ -mips_user_ss.add(files( - 'tlb_helper.c', -)) From patchwork Sat Sep 18 18:45:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C56AC433EF for ; Sat, 18 Sep 2021 19:09:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EEC9E610A6 for ; Sat, 18 Sep 2021 19:09:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org EEC9E610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:43778 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfiP-0006Bf-UL for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:09:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54662) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLp-0005O5-63 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:16 -0400 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]:46857) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0006wq-5V for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:12 -0400 Received: by mail-pl1-x632.google.com with SMTP id bg1so8343715plb.13 for ; Sat, 18 Sep 2021 11:45:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Hpn06mvL6ETEhh8XWYQF5SUad5wpeFGzI3BM48espBU=; b=Ln0D7kH7ZPEIRygcBy0ufx233wWlLEFZYKaNcSGT21GIaUc8JLD7D3FR8tj+jkmVoF qReb+fWeDR4jpnGRbRZ1IsWLnPyJxGgNUj5EVBO1HTmeph0IER+VzG1OnOE5SaH8aqPc S4vJbYU1tgYFQ8ummN6ZchCxYrEq8iPVMqt2NhLVAPmxs71gEKtLHaQce8TtQFgpt0QJ xeepViE2yL6aB/wM4079mM2tRft2Ie/IZSTSIPUFU74aZq6mhbLHatbqYyYmjR51n90a Ni5OJzSRw0WGQ2XM2UMqfU2tkXAGie/RMdE7QC7Y38Mi0Bn43a/I8ip6JscbB7niYcNL +qrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Hpn06mvL6ETEhh8XWYQF5SUad5wpeFGzI3BM48espBU=; b=kVVXcjJ3P1nggdmynwRuCt3SwDO4rVQGpbeFdngsoS3BQMcECqnCu/X2rn76/7oFFu ZmsdIHzoMLQemGWn5Ll0vI150R+QKfwZ6q4l9+tqTXdbhWUuKuJ8/2EvKDVAWtXTTj3g HBDMezfN4eSgTyUBk9pcX6sfYrlKBH7HJvOVHsAqhupubTWE4VHwtS0/RLkWnbBSUPDa kEuA0riW6tp3j1Z/OxJsZgBGiofhWSDN4NwbBkfZgJ3RXyyvse53jY17aTh2KLWiNlx6 E3sTfcezCk1C+j3aBkHhFdH4sPujS8ayETgT2yw5UGnG8/evxwwHcYH0n0V8MVVVOgVV Lrng== X-Gm-Message-State: AOAM531sCcmvGEYFbB52X9NSxtjkkQa+wPrXO1W0jtXxIP47UPpu/Yy3 k/3K2tkNahX84XPfGE4oQ1XYcxws1WwFiw== X-Google-Smtp-Source: ABdhPJy1fru7mLaONy7PH+8hudMe5lnzw2GPx58ptynIkKt93MKSN8earpS4bgPAYWs2NCYsDmNZKw== X-Received: by 2002:a17:902:9a04:b0:13a:1ae3:add2 with SMTP id v4-20020a1709029a0400b0013a1ae3add2mr15222515plp.28.1631990754444; Sat, 18 Sep 2021 11:45:54 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 31/41] target/nios2: Make nios2_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:17 -0700 Message-Id: <20210918184527.408540-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for nios2. Remove the code from cpu_loop that handled the unnamed 0xaa exception. Signed-off-by: Richard Henderson --- linux-user/nios2/cpu_loop.c | 10 ---------- target/nios2/cpu.c | 2 +- target/nios2/helper.c | 8 -------- 3 files changed, 1 insertion(+), 19 deletions(-) diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c index fd3f853ac2..c06fb6fabd 100644 --- a/linux-user/nios2/cpu_loop.c +++ b/linux-user/nios2/cpu_loop.c @@ -106,16 +106,6 @@ void cpu_loop(CPUNios2State *env) info.si_code = TARGET_TRAP_BRKPT; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; - case 0xaa: - { - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - /* TODO: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->regs[R_PC]; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - break; default: EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n", trapnr); diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 9938d7c291..b9f79b1bb2 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -222,10 +222,10 @@ static const struct SysemuCPUOps nios2_sysemu_ops = { static const struct TCGCPUOps nios2_tcg_ops = { .initialize = nios2_tcg_init, - .tlb_fill = nios2_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = nios2_cpu_has_work, + .tlb_fill = nios2_cpu_tlb_fill, .cpu_exec_interrupt = nios2_cpu_exec_interrupt, .do_interrupt = nios2_cpu_do_interrupt, .do_unaligned_access = nios2_cpu_do_unaligned_access, diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 53be8398e9..8b9b55ec67 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -38,14 +38,6 @@ void nios2_cpu_do_interrupt(CPUState *cs) env->regs[R_EA] = env->regs[R_PC] + 4; } -bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - cs->exception_index = 0xaa; - cpu_loop_exit_restore(cs, retaddr); -} - #else /* !CONFIG_USER_ONLY */ void nios2_cpu_do_interrupt(CPUState *cs) From patchwork Sat Sep 18 18:45:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07981C433F5 for ; Sat, 18 Sep 2021 19:04:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A0537610A6 for ; Sat, 18 Sep 2021 19:04:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org A0537610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:54718 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfdV-00036v-Qt for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:04:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54618) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLm-0005Ia-Dh for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:10 -0400 Received: from mail-pg1-x52c.google.com ([2607:f8b0:4864:20::52c]:47089) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0006ww-5H for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:10 -0400 Received: by mail-pg1-x52c.google.com with SMTP id m21so3884870pgu.13 for ; Sat, 18 Sep 2021 11:45:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MPeEJcgZH7TojaDG8K8aivb2xJIScpaxZoFZXE7a5sY=; b=S4JY2mStgSg8363Sq0kvbXKwnb2NR5+QabwRXj+5WKssNRzbI6i67hkzp6rDgWwvvc nzLXluddeGG+Y341TyCdea0z7DrY67mMI+ALF15VTgoYmb6az90n0u5GYoDC0lNMGH07 mbm7Cq4kp2Z82bCxfbVx2cjO9hoKyHdSSZPckA0CCuBZAQN+zh8MNFNdAhHPbHwJ42Uw 8RAB4POzXDyJvTpyt5uVD/yPzLwqxQn9rzTwfTIJc+F4S+Jv2T8HCvqR56++wj7i0gej T5a89iD8FvkqnQ69n9o+zUz5Vrb88fpaVb2qZbx5C+P4UkWZgHBHJ9Yn994NBGIrjtqf H0Dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MPeEJcgZH7TojaDG8K8aivb2xJIScpaxZoFZXE7a5sY=; b=RGQ+Skg5mmfJwN3mDCMyJROUSym8FGKHALObH7vrrTVunq2K1/JHBZi4q+CzK+Nvqk xetaohYe7AAroKGvyDcnNts0ToEo87kCTt6DvZ94wc+aqDYj90n9JKFrf08CvG3Qvayu wVphmljKU/+vaZaHt3GsEZDf/17boUR7X7lexBD/mtEMuqR28Vhc2W8y6oSJOgcaK53w DLb9LYgmFC31LChyJjb0lm/zFi4a+f+052I2aWbA2WCNP9SyRZC422SrrwgqTZ6TAlxc lA5pXZ20NE4xvLBByujqnYZjaCQma3jswfDv2lyvjNG3L1ny9/ptetilDKdeV4UfdVq7 XKNw== X-Gm-Message-State: AOAM533kixa2dr1bhzKefqTbASNBLqayH294eyaC4lLJiDRj9GysuIsh zuIf9B/SgVXiSfBRv+f7+EF8WY6vcmjZvA== X-Google-Smtp-Source: ABdhPJxKsWTtR0gusFON6WRH5WFBeYNaSKlXmionCB1ZmU18kypAiLV/N50LiGJ7swrvrNlTf1tQ6Q== X-Received: by 2002:a63:4d20:: with SMTP id a32mr15733094pgb.247.1631990755291; Sat, 18 Sep 2021 11:45:55 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 32/41] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE Date: Sat, 18 Sep 2021 11:45:18 -0700 Message-Id: <20210918184527.408540-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52c; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The kernel vectors both of these through unhandled_exception, which results in force_sig(SIGSEGV). This isn't very useful for userland when enabling overflow traps or fpu traps, but c'est la vie. Signed-off-by: Richard Henderson --- linux-user/openrisc/cpu_loop.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c index b33fa77718..314e7fba1e 100644 --- a/linux-user/openrisc/cpu_loop.c +++ b/linux-user/openrisc/cpu_loop.c @@ -21,6 +21,7 @@ #include "qemu-common.h" #include "qemu.h" #include "cpu_loop-common.h" +#include "signal-common.h" void cpu_loop(CPUOpenRISCState *env) { @@ -54,13 +55,17 @@ void cpu_loop(CPUOpenRISCState *env) break; case EXCP_DPF: case EXCP_IPF: - case EXCP_RANGE: info.si_signo = TARGET_SIGSEGV; info.si_errno = 0; info.si_code = TARGET_SEGV_MAPERR; info._sifields._sigfault._addr = env->pc; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; + case EXCP_RANGE: + case EXCP_FPE: + /* ??? The kernel vectors both of these to unhandled_exception. */ + force_sig(TARGET_SIGSEGV); + break; case EXCP_ALIGN: info.si_signo = TARGET_SIGBUS; info.si_errno = 0; @@ -75,13 +80,6 @@ void cpu_loop(CPUOpenRISCState *env) info._sifields._sigfault._addr = env->pc; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; - case EXCP_FPE: - info.si_signo = TARGET_SIGFPE; - info.si_errno = 0; - info.si_code = 0; - info._sifields._sigfault._addr = env->pc; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_INTERRUPT: /* We processed the pending cpu work above. */ break; From patchwork Sat Sep 18 18:45:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B51D6C433EF for ; Sat, 18 Sep 2021 19:07:36 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4807160F23 for ; Sat, 18 Sep 2021 19:07:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 4807160F23 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:35246 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfgV-0000Yk-F9 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:07:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54640) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLn-0005Lj-FH for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:11 -0400 Received: from mail-pf1-x431.google.com ([2607:f8b0:4864:20::431]:35636) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0006x0-3j for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:11 -0400 Received: by mail-pf1-x431.google.com with SMTP id w14so1834208pfu.2 for ; Sat, 18 Sep 2021 11:45:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b8i+4Ubm77XbfHdsRyJB5Dlng3rJ0jGxHde2wGc/RXc=; b=cFFXdP3kMGcgUkPMjkjvATamv+a9RM5y7Xk85Ul6//YBwxwZOzp+cmR9PMOWgxR+Z7 nC5qz6Mqj9zZk6q20aeMIXbbShQ/Ovsb1JuGcvyDOsszNO2F5UvhqbDFbpVn7SsztP9A 6b6Q1hF6guf7MH4fz4z8hqNjHxkSd1uIIcnTZnBF2cJcOBWHySiyjoAsdXoqqn88xCi8 6fZqQmFE/42jBkviCuq9dlGH0npgRGOAnJZohDrfnidMEFfP8CaNJdeH4Vq0lhpo0x+P jx4Sz+T8wgVmUAZQ62lg8IcIeFZy1NFajZFw/xjOwtTLFw/6ZEQKEikmonHSkqIiE3ds quWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b8i+4Ubm77XbfHdsRyJB5Dlng3rJ0jGxHde2wGc/RXc=; b=mvxkuAsiK35hqZfFknJ55FyCwa9j9K/4mVarLJynGVPVDEIj82bFfXOstvXblTZWFW +LA1IOSegQe1oAJ+V1sK0QbUCdGO9u8XSQDbtYhU2KWbA035L+4nvpDBnqHJ6CMBqf+4 ebMz8vIRPhSJYn8vSVlEk0UqaNpk1un4HykG4wk0f4A8GstkAt55pKeaEpNSYZXFuOmy edad33Fwyb3a2INgEXhS2XAOa9cVxmk9y4AVvldVFP27nrlrKQh7XizoMrYCVXTvyPFX 4jlwAynOCsBoWezQxAYXWKhnmGf0vmlgjU3IOw2Y5s9AvhD8kcOs2USLQ41MlziagPLm w6Iw== X-Gm-Message-State: AOAM5305/VRx0OOSesluJnDT0fiOXvGrExDkFLl9SZ77lChKJg26dCta g7/CDDC5nIU6AtcZRwugB5WsmuyLXqbLXQ== X-Google-Smtp-Source: ABdhPJwAtAXRRNNqyU+DXfRevZ+PWgx4T5mxa/2u1YK2PVxL3JQTs9gJmRf42HMEYQxDSuy56G87Tw== X-Received: by 2002:a62:7d45:0:b0:445:545b:4d0e with SMTP id y66-20020a627d45000000b00445545b4d0emr7615686pfc.1.1631990755883; Sat, 18 Sep 2021 11:45:55 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 33/41] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:19 -0700 Message-Id: <20210918184527.408540-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for openrisc. This makes all of the code in mmu.c sysemu only, so remove the ifdefs and move the file to openrisc_softmmu_ss. Remove the code from cpu_loop that handled EXCP_DPF. Signed-off-by: Richard Henderson --- target/openrisc/cpu.h | 7 ++++--- linux-user/openrisc/cpu_loop.c | 8 -------- target/openrisc/cpu.c | 2 +- target/openrisc/mmu.c | 8 -------- target/openrisc/meson.build | 2 +- 5 files changed, 6 insertions(+), 21 deletions(-) diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 187a4a114e..ee069b080c 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -317,14 +317,15 @@ hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void openrisc_translate_init(void); -bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); int print_insn_or1k(bfd_vma addr, disassemble_info *info); #define cpu_list cpu_openrisc_list #ifndef CONFIG_USER_ONLY +bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); + extern const VMStateDescription vmstate_openrisc_cpu; void openrisc_cpu_do_interrupt(CPUState *cpu); diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c index 314e7fba1e..5e50c0d743 100644 --- a/linux-user/openrisc/cpu_loop.c +++ b/linux-user/openrisc/cpu_loop.c @@ -53,14 +53,6 @@ void cpu_loop(CPUOpenRISCState *env) cpu_set_gpr(env, 11, ret); } break; - case EXCP_DPF: - case EXCP_IPF: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->pc; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_RANGE: case EXCP_FPE: /* ??? The kernel vectors both of these to unhandled_exception. */ diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 3c368a1bde..0092fc161d 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -188,10 +188,10 @@ static const struct SysemuCPUOps openrisc_sysemu_ops = { static const struct TCGCPUOps openrisc_tcg_ops = { .initialize = openrisc_translate_init, - .tlb_fill = openrisc_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = openrisc_cpu_has_work, + .tlb_fill = openrisc_cpu_tlb_fill, .cpu_exec_interrupt = openrisc_cpu_exec_interrupt, .do_interrupt = openrisc_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c index 94df8c7bef..91cedf4125 100644 --- a/target/openrisc/mmu.c +++ b/target/openrisc/mmu.c @@ -23,11 +23,8 @@ #include "exec/exec-all.h" #include "exec/gdbstub.h" #include "qemu/host-utils.h" -#ifndef CONFIG_USER_ONLY #include "hw/loader.h" -#endif -#ifndef CONFIG_USER_ONLY static inline void get_phys_nommu(hwaddr *phys_addr, int *prot, target_ulong address) { @@ -94,7 +91,6 @@ static int get_phys_mmu(OpenRISCCPU *cpu, hwaddr *phys_addr, int *prot, return need & PAGE_EXEC ? EXCP_ITLBMISS : EXCP_DTLBMISS; } } -#endif static void raise_mmu_exception(OpenRISCCPU *cpu, target_ulong address, int exception) @@ -113,7 +109,6 @@ bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, OpenRISCCPU *cpu = OPENRISC_CPU(cs); int excp = EXCP_DPF; -#ifndef CONFIG_USER_ONLY int prot; hwaddr phys_addr; @@ -138,13 +133,11 @@ bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, if (probe) { return false; } -#endif raise_mmu_exception(cpu, addr, excp); cpu_loop_exit_restore(cs, retaddr); } -#ifndef CONFIG_USER_ONLY hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { OpenRISCCPU *cpu = OPENRISC_CPU(cs); @@ -177,4 +170,3 @@ hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) return phys_addr; } } -#endif diff --git a/target/openrisc/meson.build b/target/openrisc/meson.build index e445dec4a0..84322086ec 100644 --- a/target/openrisc/meson.build +++ b/target/openrisc/meson.build @@ -10,7 +10,6 @@ openrisc_ss.add(files( 'fpu_helper.c', 'gdbstub.c', 'interrupt_helper.c', - 'mmu.c', 'sys_helper.c', 'translate.c', )) @@ -19,6 +18,7 @@ openrisc_softmmu_ss = ss.source_set() openrisc_softmmu_ss.add(files( 'interrupt.c', 'machine.c', + 'mmu.c', )) target_arch += {'openrisc': openrisc_ss} From patchwork Sat Sep 18 18:45:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504013 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44AECC433F5 for ; Sat, 18 Sep 2021 19:22:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B786A60F70 for ; Sat, 18 Sep 2021 19:22:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B786A60F70 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:45132 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfvL-00018w-T3 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:22:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54594) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLl-0005HN-Nk for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:09 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]:38524) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0006x6-4D for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:09 -0400 Received: by mail-pg1-x531.google.com with SMTP id w8so13086670pgf.5 for ; Sat, 18 Sep 2021 11:45:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Sn+LIrzqj+yUnZFtGLsVKMxQIhFnl26SyubeCGE6DkU=; b=B6MspZYAJYqgG6K/uTqQMn/Ddo9O0k4jTqPEQSTkZB0wtBiBJNsb+N6JBmV2P3bKIX tnK4mXr8M3V4vKpzOYK7fFHgmC04PcQfvgspqY3My2z3pDMLxzQjqkeMnEuX8QzxDGoK EQku/TjvUJ280cyj5z6oeCpVezJFnMeiHXafUS9qAzWF9NgxsV3YL1Ln0+M+ki1t4lYv ryMY262MWftOBIVWDyFmvkJ+LgfITyd4BKp0CVDHvwOfmNXFodJHxF5GNyCZiUGo/dx+ jRIvLbTRUD8DcsmR7dMeIdQEymXQOuMEwhN1peSdogEEEjGjX0Wkz0Qe2yOS6IFDR6zQ fOdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Sn+LIrzqj+yUnZFtGLsVKMxQIhFnl26SyubeCGE6DkU=; b=yN2MiSfXoY/1aUmklU/wlRH+6Nyh2hZJdZgnTPk5WxznlyxlqzXWp8f3/cr29qy6VL mpwIESH5ZgofEibo5WpII4H0XzTuM3rpU9Yx2MFGvk3jIBm85YXCw1Wf74YxIghzEvOp OLIQcJCvE6RUTQtccuzLKMrdwHDIxdUq1kJ4xUeCNff36Evy3mU19KD8wF7pcpSdsOa+ K1mpi6WwNC72M4S/WAkix0vig47u8YJKnFxM4Z9R6ruae4pDWaAtxrDvi5pd5HDEPm6G 1Io9LVVbznmiWQQK0c22ykVfRDhWTN6ibjw6cryJztrdsIlh3z8VqpLLDU1lrmRbTnFB i03A== X-Gm-Message-State: AOAM53209GFm00ceF8M6/RVKAXWlfsKgVFa2Q6yrwMXHClJSFuzVy3T9 tar6DuA9ei9O4iz6aLLW9zpBE6bVbjUXYg== X-Google-Smtp-Source: ABdhPJx5R0YyfirwCYXzyIqX0OTYpDHOYWFYKPLprgOPoxcwb+tRg/7d7OgsJ+37gRf3iItOuhMiCw== X-Received: by 2002:a62:e50c:0:b029:2f9:b9b1:d44f with SMTP id n12-20020a62e50c0000b02902f9b9b1d44fmr17619345pff.42.1631990756905; Sat, 18 Sep 2021 11:45:56 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 34/41] target/ppc: Implement ppc_cpu_record_sigsegv Date: Sat, 18 Sep 2021 11:45:20 -0700 Message-Id: <20210918184527.408540-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Record DAR, DSISR, and exception_index. That last means that we must exit to cpu_loop ourselves, instead of letting exception_index being overwritten. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/ppc/cpu.h | 3 --- target/ppc/internal.h | 9 +++++++++ target/ppc/cpu_init.c | 6 ++++-- target/ppc/user_only_helper.c | 15 +++++++++++---- 4 files changed, 24 insertions(+), 9 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 01d3773bc7..60d1117845 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1278,9 +1278,6 @@ extern const VMStateDescription vmstate_ppc_cpu; /*****************************************************************************/ void ppc_translate_init(void); -bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); #if !defined(CONFIG_USER_ONLY) void ppc_store_sdr1(CPUPPCState *env, target_ulong value); diff --git a/target/ppc/internal.h b/target/ppc/internal.h index b71406fa46..f3e5aa8fbc 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -283,5 +283,14 @@ static inline void pte_invalidate(target_ulong *pte0) #define PTE_PTEM_MASK 0x7FFFFFBF #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B) +#ifdef CONFIG_USER_ONLY +void ppc_cpu_record_sigsegv(CPUState *cs, vaddr addr, + MMUAccessType access_type, + bool maperr, uintptr_t ra); +#else +bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); +#endif #endif /* PPC_INTERNAL_H */ diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 5c134adeea..d56fde1215 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -9028,10 +9028,12 @@ static const struct SysemuCPUOps ppc_sysemu_ops = { static const struct TCGCPUOps ppc_tcg_ops = { .initialize = ppc_translate_init, - .tlb_fill = ppc_cpu_tlb_fill, -#ifndef CONFIG_USER_ONLY +#ifdef CONFIG_USER_ONLY + .record_sigsegv = ppc_cpu_record_sigsegv, +#else .has_work = ppc_cpu_has_work, + .tlb_fill = ppc_cpu_tlb_fill, .cpu_exec_interrupt = ppc_cpu_exec_interrupt, .do_interrupt = ppc_cpu_do_interrupt, .cpu_exec_enter = ppc_cpu_exec_enter, diff --git a/target/ppc/user_only_helper.c b/target/ppc/user_only_helper.c index aa3f867596..7ff76f7a06 100644 --- a/target/ppc/user_only_helper.c +++ b/target/ppc/user_only_helper.c @@ -21,16 +21,23 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "internal.h" - -bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) +void ppc_cpu_record_sigsegv(CPUState *cs, vaddr address, + MMUAccessType access_type, + bool maperr, uintptr_t retaddr) { PowerPCCPU *cpu = POWERPC_CPU(cs); CPUPPCState *env = &cpu->env; int exception, error_code; + /* + * Both DSISR and the "trap number" (exception vector offset, + * looked up from exception_index) are present in the linux-user + * signal frame. + * FIXME: we don't actually populate the trap number properly. + * It would be easiest to fill in an env->trap value now. + */ if (access_type == MMU_INST_FETCH) { exception = POWERPC_EXCP_ISI; error_code = 0x40000000; From patchwork Sat Sep 18 18:45:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7838FC433FE for ; Sat, 18 Sep 2021 19:04:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3B123610A6 for ; Sat, 18 Sep 2021 19:04:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3B123610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:54850 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfdX-0003CE-DZ for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:04:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54610) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLm-0005IP-7F for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:10 -0400 Received: from mail-pg1-x533.google.com ([2607:f8b0:4864:20::533]:35507) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLb-0006xA-3o for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:09 -0400 Received: by mail-pg1-x533.google.com with SMTP id e7so13099560pgk.2 for ; Sat, 18 Sep 2021 11:45:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yZsRnAbPNXmk9r6jQwi13vxXn5d80YjT3gRS7kzZYQg=; b=WmdVLLhxYmNfMaOGZHrEbsyNamF2DTSk/3y7jEKEvkeBqNWTBChMbaEnxeL/LG31Q4 kzSNkf0u2De/SXZovJwB3v9pRE1xPhRxIIpL3G3g3KGX+vXDd/OfzOqtR3BgR4NgqGEz OoJavbt3MbN+Pe+WCbpmxPs8s+U7VI2JIPLoFQf3Z/PISohBNJ+XD+ipVYK7MheaERit SMFGnUsKCnMx+1Fyq7VH/jjHGCAnSjLM9hDzbirgNi5nANlsXz2q01PplWmHwZF0s6+p q3Us/53glIJAnMXrDxd6twD7rBR9lVUlP7tjlEwQSEj/Br/hlsx6Tz7KIJ+LjNEMbvlq bl4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yZsRnAbPNXmk9r6jQwi13vxXn5d80YjT3gRS7kzZYQg=; b=zdVlJ8k/TKMoJUFn4jcZ7jT9tPyeV59C82k47VkDcqnu76CQZlnXIUoS6Z0F0gguGG N3rc9Htc2lFp3g9uaOL571BvqlVmqyKiahdLpJyMx3tjZ+JzQvmy8XH6gUxxNKkqnmYQ CFrCfVjBWCav1wWwvOOL43aiQEpKEBkw6GAtDzWRMos6382BihRLIf6a0OkW2wBr83cX JbgtEcS+7YLLDJIaJqcPHjwIoH6/UfYq0rK+xvvZSKBE9MVpVFrNBkIJ3L5IMrmfxlnj t5Vg9hqgp8r3IL2LP03+HaWRdryV1xKkQ6ExSxZPdvpqVdkzFXnP/13t/nxHTYaw8H61 UhQg== X-Gm-Message-State: AOAM531SIcFFki/EpXecStC4vUhAEOoCelwac0tkRKnP+D2QQorqxR/Q +9FYR6sBxWqgBLFgH0rOX9OhR4AaXMFZ4w== X-Google-Smtp-Source: ABdhPJyP63/PlolCk+wq/h13pIiqOmflNiENF5AnIHF5JvInlwxTu7OCAF3XXunVHnXgBHorf4acxQ== X-Received: by 2002:a62:1683:0:b0:3f3:814f:4367 with SMTP id 125-20020a621683000000b003f3814f4367mr17481629pfw.68.1631990757698; Sat, 18 Sep 2021 11:45:57 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 35/41] target/riscv: Make riscv_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:21 -0700 Message-Id: <20210918184527.408540-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for riscv. Remove the code from cpu_loop that raised SIGSEGV. Signed-off-by: Richard Henderson --- linux-user/riscv/cpu_loop.c | 7 ------- target/riscv/cpu.c | 2 +- target/riscv/cpu_helper.c | 21 +-------------------- 3 files changed, 2 insertions(+), 28 deletions(-) diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 74a9628dc9..49fa2209a7 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -85,13 +85,6 @@ void cpu_loop(CPURISCVState *env) sigcode = TARGET_TRAP_BRKPT; sigaddr = env->pc; break; - case RISCV_EXCP_INST_PAGE_FAULT: - case RISCV_EXCP_LOAD_PAGE_FAULT: - case RISCV_EXCP_STORE_PAGE_FAULT: - signum = TARGET_SIGSEGV; - sigcode = TARGET_SEGV_MAPERR; - sigaddr = env->badaddr; - break; case RISCV_EXCP_SEMIHOST: env->gpr[xA0] = do_common_semihosting(cs); env->pc += 4; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index abb555a8bd..830e5b568f 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -642,10 +642,10 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { static const struct TCGCPUOps riscv_tcg_ops = { .initialize = riscv_translate_init, .synchronize_from_tb = riscv_cpu_synchronize_from_tb, - .tlb_fill = riscv_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = riscv_cpu_has_work, + .tlb_fill = riscv_cpu_tlb_fill, .cpu_exec_interrupt = riscv_cpu_exec_interrupt, .do_interrupt = riscv_cpu_do_interrupt, .do_transaction_failed = riscv_cpu_do_transaction_failed, diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 701858d670..2260f95c79 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -747,7 +747,6 @@ void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr, riscv_cpu_two_stage_lookup(mmu_idx); riscv_raise_exception(env, cs->exception_index, retaddr); } -#endif /* !CONFIG_USER_ONLY */ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, @@ -755,7 +754,6 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; -#ifndef CONFIG_USER_ONLY vaddr im_address; hwaddr pa = 0; int prot, prot2, prot_pmp; @@ -887,25 +885,8 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } return true; - -#else - switch (access_type) { - case MMU_INST_FETCH: - cs->exception_index = RISCV_EXCP_INST_PAGE_FAULT; - break; - case MMU_DATA_LOAD: - cs->exception_index = RISCV_EXCP_LOAD_PAGE_FAULT; - break; - case MMU_DATA_STORE: - cs->exception_index = RISCV_EXCP_STORE_PAGE_FAULT; - break; - default: - g_assert_not_reached(); - } - env->badaddr = address; - cpu_loop_exit_restore(cs, retaddr); -#endif } +#endif /* !CONFIG_USER_ONLY */ /* * Handle Traps From patchwork Sat Sep 18 18:45:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 669CCC433EF for ; Sat, 18 Sep 2021 19:15:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D435610A6 for ; Sat, 18 Sep 2021 19:15:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1D435610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:59738 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfoO-0008Sz-75 for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:15:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54642) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLn-0005Lp-GJ for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:11 -0400 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]:37432) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLe-0006xF-Qy for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:11 -0400 Received: by mail-pg1-x52d.google.com with SMTP id 17so13099119pgp.4 for ; Sat, 18 Sep 2021 11:45:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gDQMWHvEjv12594lnZ03zCrTOpjiJ4+Ocs7aFLjDJuU=; b=r/2ntDRmBf5TGJNkoiPoWGAY9oJHnDO2yFUuRzcsxKqv9RDdACsKbbAZf0/vsRkTkC 85X9A7uzR35wTz2CMUF69pj7skYSM0mhOK8IHl+bHzSUEiOGmoBGJGFw7y30f2GVXK9E kBjucLi0ya/Xn8jKiegkleqaXmTKOJtlDXTLnU96SWJprMcwYjTiOxW0j+oZu4VJigma wqdNUJlv+Kb5wHbbInnj+oBDtSgPqhG0RErG/RLpmcXz3Srnt2jKeSTancrH6rjqw88p gg9If+1RCp2MwViBCxe+C3EN+nZPx6ThPFzrlhL2mcUTU+VLSPEaBTeQVOH7aVCPNbVt ouVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gDQMWHvEjv12594lnZ03zCrTOpjiJ4+Ocs7aFLjDJuU=; b=HQzR0uN5f8nBwoq7IX1fq71JMDExeKWwx8eJ7Avz8zisjAQ1ycQVrAodfULu4963pM iMKN4oSebclKwBfFyVHEKDHXKkVOCtaSaCoZG6RgQnMSTC7oLbGTzsjtfPpbMjp+x/9d NiW17QBl450Oo+I7f6uFKGQCZ/zry4Fii0LPTYU1SOKAs4kAaUkBSaIA5bFUym8zbxeA oJEypVSfVJvGJb600KvAMG+YpbDi3clp5DlXaLpLOJucO3DePzDiYheKbzX1db86Ky/n FgI9QHxLuPCy6itts56NdmLlDQqdRquePUaOcQHreezVrrpZE1bUt5SW0k27mCCQ9+Ur 9B1g== X-Gm-Message-State: AOAM533A/7WSjIYh1ZFQxIWtmiLQRyodYi6An7bM7NqWWEmdjsw7kcmM jsWtB/j1EGyPjfajqkSzvejfBMdSuDJZcA== X-Google-Smtp-Source: ABdhPJy+kNl/5Ts0AhgjUn08J0Mx9AeABUw621YtYeQRRIkBkwKkK2n/h4z1dtiTanCDJBC7pSpZsQ== X-Received: by 2002:a63:ea44:: with SMTP id l4mr15721455pgk.210.1631990758546; Sat, 18 Sep 2021 11:45:58 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 36/41] target/s390x: Use probe_access_flags in s390_probe_access Date: Sat, 18 Sep 2021 11:45:22 -0700 Message-Id: <20210918184527.408540-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Not sure why the user-only code wasn't rewritten to use probe_access_flags at the same time that the sysemu code was converted. For the purpose of user-only, this is an exact replacement. Signed-off-by: Richard Henderson --- target/s390x/tcg/mem_helper.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 0bf775a37d..596270e45d 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -142,20 +142,12 @@ static int s390_probe_access(CPUArchState *env, target_ulong addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t ra) { +#if defined(CONFIG_USER_ONLY) + return probe_access_flags(env, addr, access_type, mmu_idx, + nonfault, phost, ra); +#else int flags; -#if defined(CONFIG_USER_ONLY) - flags = page_get_flags(addr); - if (!(flags & (access_type == MMU_DATA_LOAD ? PAGE_READ : PAGE_WRITE_ORG))) { - env->__excp_addr = addr; - flags = (flags & PAGE_VALID) ? PGM_PROTECTION : PGM_ADDRESSING; - if (nonfault) { - return flags; - } - tcg_s390_program_interrupt(env, flags, ra); - } - *phost = g2h(env_cpu(env), addr); -#else /* * For !CONFIG_USER_ONLY, we cannot rely on TLB_INVALID_MASK or haddr==NULL * to detect if there was an exception during tlb_fill(). @@ -174,8 +166,8 @@ static int s390_probe_access(CPUArchState *env, target_ulong addr, int size, (access_type == MMU_DATA_STORE ? BP_MEM_WRITE : BP_MEM_READ), ra); } -#endif return 0; +#endif } static int access_prepare_nf(S390Access *access, CPUS390XState *env, From patchwork Sat Sep 18 18:45:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FDF1C433EF for ; Sat, 18 Sep 2021 19:24:43 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DD74660F70 for ; Sat, 18 Sep 2021 19:24:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org DD74660F70 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:47262 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfx4-0002YO-5o for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:24:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54654) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLo-0005Nj-1q for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:12 -0400 Received: from mail-pg1-x530.google.com ([2607:f8b0:4864:20::530]:39821) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLi-0006xc-3r for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:11 -0400 Received: by mail-pg1-x530.google.com with SMTP id g184so13086196pgc.6 for ; Sat, 18 Sep 2021 11:46:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ONHPGv0AvpF9KQATDBu+SfMWLuLooluHmc8c/gF2z5A=; b=c3DuABvMfWVFlJI6cwA3gmYr1DibOy/mj7gDlt0ge4O5y0piUKcR5vapFJhlg20g71 8qO4KVrkDJejclFl7kfoQtyJzVG+NNd4vJYM8UdhO3GWu8fzxJ0SACM0lq7yDWjgFMk2 WPRWPdWVhWS9gm1jNx0y4wsxcSFtzSYpSrzEDGP13QiHbkYxsew8skyhziioI819vkIG OYnLx/JBVOyIOIG5JlWr6YPiXDYM88AQ+lFlyjVHUGr4borXEh6Kd1alEtiZWIDfHOvE DnUcVnYOSR3f9/LfrHUI2orV9EoCFZjugGJXKq8LNssWttLkJLVsnD8tYQMBHZ67o2Zv ggdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ONHPGv0AvpF9KQATDBu+SfMWLuLooluHmc8c/gF2z5A=; b=Q2+J9ApHXmedH4NrhUUTBWxdp776JHkIkiJyiMayLru0mRsyGJXk9ZBgJles5OSy69 k92w9+OQBV6sezJ9Tl1f4atuwHcW3U0YNCsWyCr2z1OMBQNEbQ7lUxavq5Xh5167S2S3 SelXFFDsZrqLvJgmhuvxOsUvDxQXXg2ueG4DvIxob2QTKgGLDqbxM2pNifBJHKzUiZl1 V454pV3VcEEuTe+RoAiFkwdxhFegHolkKjIZwwKKMLudMW57sSnnn2ojRm6zFV1NW3eD IZ00D8zQXl9zuKI3xQ9T0pw6+H3YBphvJPFabTybotONWVjRLTvKFcsDKSSlcOUB0jO4 z/TQ== X-Gm-Message-State: AOAM5328PieuobR52vyzhg+GcZz0x7/TOmggSLQrICXpNlTeXNg4HpmX 46ayJs5++WjrLqU8FcfhJDhen65wdUDU5Q== X-Google-Smtp-Source: ABdhPJzb9jZBGNA0moF8m00o0vfaGDaXXxJl/U7ZTE6r9WXdol81ZYvZmWZL1mDwpn/L6wVUYVYZTg== X-Received: by 2002:a62:a11b:0:b0:444:64df:9f2 with SMTP id b27-20020a62a11b000000b0044464df09f2mr11759144pff.31.1631990759348; Sat, 18 Sep 2021 11:45:59 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 37/41] target/s390x: Implement s390_cpu_record_sigsegv Date: Sat, 18 Sep 2021 11:45:23 -0700 Message-Id: <20210918184527.408540-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move the masking of the address from cpu_loop into s390_cpu_record_sigsegv -- this is governed by hw, not linux. This does mean we have to raise our own exception, rather than return to the fallback. Use maperr to choose between PGM_PROTECTION and PGM_ADDRESSING. Use the appropriate si_code for each in cpu_loop. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/s390x/s390x-internal.h | 13 ++++++++++--- linux-user/s390x/cpu_loop.c | 14 +++++++------- target/s390x/cpu.c | 6 ++++-- target/s390x/tcg/excp_helper.c | 18 +++++++++++------- 4 files changed, 32 insertions(+), 19 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 7a6aa4dacc..2b6791a3a2 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -270,13 +270,20 @@ ObjectClass *s390_cpu_class_by_name(const char *name); void s390x_cpu_debug_excp_handler(CPUState *cs); void s390_cpu_do_interrupt(CPUState *cpu); bool s390_cpu_exec_interrupt(CPUState *cpu, int int_req); -bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr); +#ifdef CONFIG_USER_ONLY +void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, + MMUAccessType access_type, + bool maperr, uintptr_t retaddr); +#else +bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); +#endif + /* fpu_helper.c */ uint32_t set_cc_nz_f32(float32 v); diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.c index 6a69a6dd26..7a1d032227 100644 --- a/linux-user/s390x/cpu_loop.c +++ b/linux-user/s390x/cpu_loop.c @@ -21,9 +21,8 @@ #include "qemu-common.h" #include "qemu.h" #include "cpu_loop-common.h" +#include "signal-common.h" -/* s390x masks the fault address it reports in si_addr for SIGSEGV and SIGBUS */ -#define S390X_FAIL_ADDR_MASK -4096LL static int get_pgm_data_si_code(int dxc_code) { @@ -109,12 +108,13 @@ void cpu_loop(CPUS390XState *env) n = TARGET_ILL_ILLOPC; goto do_signal_pc; case PGM_PROTECTION: + force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_ACCERR, + env->__excp_addr); + break; case PGM_ADDRESSING: - sig = TARGET_SIGSEGV; - /* XXX: check env->error_code */ - n = TARGET_SEGV_MAPERR; - addr = env->__excp_addr & S390X_FAIL_ADDR_MASK; - goto do_signal; + force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR, + env->__excp_addr); + break; case PGM_EXECUTE: case PGM_SPECIFICATION: case PGM_SPECIAL_OP: diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index df8ade9021..fa999d586d 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -268,10 +268,12 @@ static void s390_cpu_reset_full(DeviceState *dev) static const struct TCGCPUOps s390_tcg_ops = { .initialize = s390x_translate_init, - .tlb_fill = s390_cpu_tlb_fill, -#if !defined(CONFIG_USER_ONLY) +#ifdef CONFIG_USER_ONLY + .record_sigsegv = s390_cpu_record_sigsegv, +#else .has_work = s390_cpu_has_work, + .tlb_fill = s390_cpu_tlb_fill, .cpu_exec_interrupt = s390_cpu_exec_interrupt, .do_interrupt = s390_cpu_do_interrupt, .debug_excp_handler = s390x_cpu_debug_excp_handler, diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index 3d6662a53c..b923d080fc 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -89,16 +89,20 @@ void s390_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } -bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) +void s390_cpu_record_sigsegv(CPUState *cs, vaddr address, + MMUAccessType access_type, + bool maperr, uintptr_t retaddr) { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); - /* On real machines this value is dropped into LowMem. Since this - is userland, simply put this someplace that cpu_loop can find it. */ - cpu->env.__excp_addr = address; + trigger_pgm_exception(&cpu->env, maperr ? PGM_ADDRESSING : PGM_PROTECTION); + /* + * On real machines this value is dropped into LowMem. Since this + * is userland, simply put this someplace that cpu_loop can find it. + * S390 only gives the page of the fault, not the exact address. + * C.f. the construction of TEC in mmu_translate(). + */ + cpu->env.__excp_addr = address & TARGET_PAGE_MASK; cpu_loop_exit_restore(cs, retaddr); } From patchwork Sat Sep 18 18:45:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 376CFC433F5 for ; Sat, 18 Sep 2021 19:27:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AB67661100 for ; Sat, 18 Sep 2021 19:27:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org AB67661100 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:51708 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRg0B-0005fS-Nc for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:27:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLp-0005O8-Qt for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:16 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:42813) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLi-0006ya-RG for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:13 -0400 Received: by mail-pj1-x1032.google.com with SMTP id p12-20020a17090adf8c00b0019c959bc795so4165128pjv.1 for ; Sat, 18 Sep 2021 11:46:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gr1Yuwax54Nh89kDqsASWK4djVgjs7rSxRSreX+dYpg=; b=kUeshxtZGZYrHMuYDZiehg4SmI4nXrIGdmK4B2c6hyJEYt9Spr5IDDHmyzACWH9Lyx 6QbH2g+7VMZrWXcZXSl5iNcnKD2edHrZEex0MREXodzXcp1wUJVyR8lfhc6murxotSRu 9ZkWbxHTiojkj6pBbVXkZl52yeEOt4Qo67kdYnJE65+A94/0gNJZDRw7pJpRW6DX+tc+ /oxZ/e82SgEKkOnFn8VQ5gqLDmz1RiXeKFRdX162ICjRA2jrhikrmxTQPFzAgfU9Z2Ie uo13NFIC4ZaX+DRSqBdjqkZNdHOYY9dRecbfGyBAfg1lPaRscR6GH8yZJLUKFqhgGB/5 JXEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gr1Yuwax54Nh89kDqsASWK4djVgjs7rSxRSreX+dYpg=; b=pROxxZ2yPpqw0MPHL8uHkayi/6sKETlFkFAAzXbe0ADi22Ps8xzYoWIzSfs1ZHUe2h W1CTw9LUzzoOiFElKipo9wa1ve+Gc3UtkTrs4URPLTutRY9vhP3CEE5gQVwdoop8Qp0V NRFkfJD5/A3jJqyzQyYBjPZ7dNuPO69VN0/TvypQ5sqtN8QtzDPKo9w7OTFSS/4aClr1 TPOp9dg6MXcOenFLz4vmn9VzguKt6xk2GMpkEoxRbhYmXr2/Ru3i+PwUbeb1WorBsgJ1 6f7bH4EFERuI37LtXlXUyg0EUTFXFOBoJTFBGrFvkR3WSrAfv8RJA22iAy6Hy6SUVyA/ YLEQ== X-Gm-Message-State: AOAM531q1mCXPf8t08o1uUO7/UQVm7tlmgmo4yPLG9fBitYi2i0NcMLe 8XvAJ/0vJ+1wHCYbVS+NbUsit72yXEcQAQ== X-Google-Smtp-Source: ABdhPJwBibxfZ5EUiu1ZsfaMPEEIEf0fwJ5H8RPKkEdA5uDkyaJYtUDJyTCT8qeYpd44AUDGFwRqug== X-Received: by 2002:a17:90a:d686:: with SMTP id x6mr19597660pju.227.1631990760060; Sat, 18 Sep 2021 11:46:00 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:24 -0700 Message-Id: <20210918184527.408540-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for sh4. Remove the code from cpu_loop that raised SIGSEGV. Signed-off-by: Richard Henderson --- target/sh4/cpu.h | 6 +++--- linux-user/sh4/cpu_loop.c | 8 -------- target/sh4/cpu.c | 2 +- target/sh4/helper.c | 9 +-------- 4 files changed, 5 insertions(+), 20 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 56f7c32df9..17458587a5 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -213,12 +213,12 @@ void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, int mmu_idx, uintptr_t retaddr); void sh4_translate_init(void); +void sh4_cpu_list(void); + +#if !defined(CONFIG_USER_ONLY) bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); - -void sh4_cpu_list(void); -#if !defined(CONFIG_USER_ONLY) void superh_cpu_do_interrupt(CPUState *cpu); bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); void cpu_sh4_invalidate_tlb(CPUSH4State *s); diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c index 222ed1c670..8408d0c42d 100644 --- a/linux-user/sh4/cpu_loop.c +++ b/linux-user/sh4/cpu_loop.c @@ -63,14 +63,6 @@ void cpu_loop(CPUSH4State *env) info.si_code = TARGET_TRAP_BRKPT; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; - case 0xa0: - case 0xc0: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->tea; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); arch_interrupt = false; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index fb2116dc52..0cc1542681 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -237,10 +237,10 @@ static const struct SysemuCPUOps sh4_sysemu_ops = { static const struct TCGCPUOps superh_tcg_ops = { .initialize = sh4_translate_init, .synchronize_from_tb = superh_cpu_synchronize_from_tb, - .tlb_fill = superh_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = superh_cpu_has_work, + .tlb_fill = superh_cpu_tlb_fill, .cpu_exec_interrupt = superh_cpu_exec_interrupt, .do_interrupt = superh_cpu_do_interrupt, .do_unaligned_access = superh_cpu_do_unaligned_access, diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 53cb9c3b63..6a620e36fc 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -796,8 +796,6 @@ bool superh_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } -#endif /* !CONFIG_USER_ONLY */ - bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr) @@ -806,11 +804,6 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUSH4State *env = &cpu->env; int ret; -#ifdef CONFIG_USER_ONLY - ret = (access_type == MMU_DATA_STORE ? MMU_DTLB_VIOLATION_WRITE : - access_type == MMU_INST_FETCH ? MMU_ITLB_VIOLATION : - MMU_DTLB_VIOLATION_READ); -#else target_ulong physical; int prot; @@ -829,7 +822,6 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (ret != MMU_DTLB_MULTIPLE && ret != MMU_ITLB_MULTIPLE) { env->pteh = (env->pteh & PTEH_ASID_MASK) | (address & PTEH_VPN_MASK); } -#endif env->tea = address; switch (ret) { @@ -868,3 +860,4 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } cpu_loop_exit_restore(cs, retaddr); } +#endif /* !CONFIG_USER_ONLY */ From patchwork Sat Sep 18 18:45:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504017 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08710C433EF for ; Sat, 18 Sep 2021 19:26:18 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7AA2661100 for ; Sat, 18 Sep 2021 19:26:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7AA2661100 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:49386 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfyZ-00042Q-Fe for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:26:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54660) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLo-0005O4-F2 for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:16 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]:34415) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLg-0006zV-Jr for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:12 -0400 Received: by mail-pl1-x629.google.com with SMTP id o8so8402702pll.1 for ; Sat, 18 Sep 2021 11:46:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mkkzYJUY8Ap6SXnhYvTgrVEh2l0oObcUDiO/BLDBzw0=; b=nlbammJFqlm9eVNMRbYzb5TJ20C9Zx4h/Jpcs4TWAs/rEUoqAPkVPH0F/ib/M0Rd1e MGIhFOqew9kS0LlIHY2gGl0THVmmdhdDRRsGLDizpQ1IN3/WVLILQnoTzzoZxJi8KzIM Gt7X0Pud1H7KyYpG4wJrf61PQBDSEsII4nhNcNGX21LEGSHrVJE/8FQ3hlZMUKQyZm9M h5PrzN71jqgNwyntA289XMIWu9BLkDP3lTDEasEhf4PEvdFKn2oe8Mk3pzptF+x1LcEN yjZPgTWphxgyAotJ8v6/ZpIw8CHMgDU8MawJTblHNHlVlGqGIxU+4HmnfzQRxr98r/Dj ftrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mkkzYJUY8Ap6SXnhYvTgrVEh2l0oObcUDiO/BLDBzw0=; b=BFssp2a40WqZwBvJYUqOvumFDE5FJB4kr7xQugKOr3r2QR9NVRO6tFCwY4jgBEt5sp 5Fo7+K3W2wTl2Jw4Ygbdh0C9k/YlbAoVNAHRyKwxLEK5fVHbC/iVoEFSW2RlYxpKoOra TvcikcD/pjtfKKge8zNxUv7rXV2TpKfTPfaMxW7jtWOTGlMXZj7jCraJGqLhQ9vwEMts CbRwbWicq1kBgh9GzbyctZGIRaeW8Caa787Lqg3UMpqKDNbncHH5FoiZ+tUElT6rrO0P LiAiTMICU2DCDVOKyM4b71TBv5NRn+Aca+jNxh1T0MCr/27u9g32t11s/REZd3CXCrCi adWQ== X-Gm-Message-State: AOAM530E7m370Lj0b/AWHhn8s3RplVHvXajHBBXqTmM2Ru/enNUIqAJN N7PCp3Nk1NGb1s+dkPrakF+Nl2V94n4w9Q== X-Google-Smtp-Source: ABdhPJy8wzim6Ec3dIvCY7BqqeavPb6i0fGIYdx1HnkyByth4sk5RP538nlbh1LITjcWj1OG+hl77A== X-Received: by 2002:a17:90a:e2cb:: with SMTP id fr11mr20336548pjb.1.1631990761058; Sat, 18 Sep 2021 11:46:01 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.46.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:46:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 39/41] target/sparc: Make sparc_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:25 -0700 Message-Id: <20210918184527.408540-40-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for sparc. This makes all of the code in mmu_helper.c sysemu only, so remove the ifdefs and move the file to sparc_softmmu_ss. Remove the code from cpu_loop that handled TT_DFAULT and TT_TFAULT. Signed-off-by: Richard Henderson --- linux-user/sparc/cpu_loop.c | 25 ------------------------- target/sparc/cpu.c | 2 +- target/sparc/mmu_helper.c | 25 ------------------------- target/sparc/meson.build | 2 +- 4 files changed, 2 insertions(+), 52 deletions(-) diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index 02532f198d..f5e0de7eaf 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -217,17 +217,6 @@ void cpu_loop (CPUSPARCState *env) case TT_WIN_UNF: /* window underflow */ restore_window(env); break; - case TT_TFAULT: - case TT_DFAULT: - { - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - /* XXX: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->mmuregs[4]; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - break; #else case TT_SPILL: /* window overflow */ save_window(env); @@ -235,20 +224,6 @@ void cpu_loop (CPUSPARCState *env) case TT_FILL: /* window underflow */ restore_window(env); break; - case TT_TFAULT: - case TT_DFAULT: - { - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - /* XXX: check env->error_code */ - info.si_code = TARGET_SEGV_MAPERR; - if (trapnr == TT_DFAULT) - info._sifields._sigfault._addr = env->dmmu.mmuregs[4]; - else - info._sifields._sigfault._addr = cpu_tsptr(env)->tpc; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - } - break; #ifndef TARGET_ABI32 case 0x16e: flush_windows(env); diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 4a63ed1264..c068ef98e3 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -866,10 +866,10 @@ static const struct SysemuCPUOps sparc_sysemu_ops = { static const struct TCGCPUOps sparc_tcg_ops = { .initialize = sparc_tcg_init, .synchronize_from_tb = sparc_cpu_synchronize_from_tb, - .tlb_fill = sparc_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = sparc_cpu_has_work, + .tlb_fill = sparc_cpu_tlb_fill, .cpu_exec_interrupt = sparc_cpu_exec_interrupt, .do_interrupt = sparc_cpu_do_interrupt, .do_transaction_failed = sparc_cpu_do_transaction_failed, diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index a44473a1c7..2ad47391d0 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -25,30 +25,6 @@ /* Sparc MMU emulation */ -#if defined(CONFIG_USER_ONLY) - -bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - SPARCCPU *cpu = SPARC_CPU(cs); - CPUSPARCState *env = &cpu->env; - - if (access_type == MMU_INST_FETCH) { - cs->exception_index = TT_TFAULT; - } else { - cs->exception_index = TT_DFAULT; -#ifdef TARGET_SPARC64 - env->dmmu.mmuregs[4] = address; -#else - env->mmuregs[4] = address; -#endif - } - cpu_loop_exit_restore(cs, retaddr); -} - -#else - #ifndef TARGET_SPARC64 /* * Sparc V8 Reference MMU (SRMMU) @@ -926,4 +902,3 @@ hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) } return phys_addr; } -#endif diff --git a/target/sparc/meson.build b/target/sparc/meson.build index a3638b9503..a801802ee2 100644 --- a/target/sparc/meson.build +++ b/target/sparc/meson.build @@ -6,7 +6,6 @@ sparc_ss.add(files( 'gdbstub.c', 'helper.c', 'ldst_helper.c', - 'mmu_helper.c', 'translate.c', 'win_helper.c', )) @@ -16,6 +15,7 @@ sparc_ss.add(when: 'TARGET_SPARC64', if_true: files('int64_helper.c', 'vis_helpe sparc_softmmu_ss = ss.source_set() sparc_softmmu_ss.add(files( 'machine.c', + 'mmu_helper.c', 'monitor.c', )) From patchwork Sat Sep 18 18:45:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12504007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5B04C433F5 for ; Sat, 18 Sep 2021 19:18:38 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 48A14610A6 for ; Sat, 18 Sep 2021 19:18:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 48A14610A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:36348 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfrB-0003PQ-Co for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:18:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55114) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfOb-00026a-Kq for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:49:05 -0400 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]:43776) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfOZ-0000Y1-Ti for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:49:05 -0400 Received: by mail-pg1-x535.google.com with SMTP id r2so13090825pgl.10 for ; Sat, 18 Sep 2021 11:49:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=evwYpaYtIeusJUHkEEt0rDRSAZ60QDEAx/EDgh8MFt8=; b=yd1OrPle+GMfowzsFnb2GpLny3itCxb1b1Fjs50fC6JIyetlNtQQBRGb7Y8cWGrEor 7T8KpI5djlt8zaJPhYx//iQRhi9wLLT+rZKLyFz047ytIAstoOttuU5fvAAfsig19ASY HlTpDWTjQZa4WstMWOyhriNUWg0gL0MBHgporCCnsngkjxkgP6Al5XYAVe3jPpwEBOr5 P3GhZQ1xurjtFpKCQJbCgjekW6Ob0F4VkKU8EGHLXnMcppYXB1CtCXlun7QDONrocJbT v0O6flus8sX2zWFHaPDFV/sQ2GOyVs0zS3tK09um/wh657iGvOTYMHsG9ZLgMHEzjaqs RnsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=evwYpaYtIeusJUHkEEt0rDRSAZ60QDEAx/EDgh8MFt8=; b=dtezWKDbN0PczRsaWLi4VUCp444NOM/DM6UMlyHQm5CXcdoKj1SJF2v17ccvoPoco4 mmZ7M8Q70jBldMQodygVKAg/MgtvhlRvmyimNJIcnlMZcWi2LzC+qtjbh7FUZI4HIbbb rwxmJEHDOKMl8nEpQjJTe0N2//YHd77ZhJkYLLFIMfoWJjSpsufb1p8NtB2pm1qsmaFH 4Bj05XH+dvslVB4ocT9sT8a6jKUzxiFIf/3qW6G7UwOHoxmDQMMGu3wmuZ59g6ukVEl/ BW1pPARLAp6AOXaJ+zzMdYu+8X7eJBSCfxnrYRfme/wjkpLLGWcajcuufg2BoyJNulA4 y53A== X-Gm-Message-State: AOAM530xkBwovwNBlLHOU1pWDcG8TlsEUq8QI3B59G56/ud1o9LDFtMf HmYMw1ABoGLmjedxlFtncAc+PMAVIApPLA== X-Google-Smtp-Source: ABdhPJwweo1dJJirzQMk1muAM9t9Pei2GS7JEolmt2l8gMQCQ9Z9l9/UGCI0yzEDVGNWU5g65a4ciw== X-Received: by 2002:a63:1914:: with SMTP id z20mr15963906pgl.87.1631990942447; Sat, 18 Sep 2021 11:49:02 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id p30sm9916522pfh.116.2021.09.18.11.49.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:49:01 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 40/41] target/xtensa: Make xtensa_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:26 -0700 Message-Id: <20210918184527.408540-41-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for xtensa. Remove the code from cpu_loop that raised SIGSEGV. Signed-off-by: Richard Henderson --- target/xtensa/cpu.h | 2 +- linux-user/xtensa/cpu_loop.c | 9 --------- target/xtensa/cpu.c | 2 +- target/xtensa/helper.c | 22 +--------------------- 4 files changed, 3 insertions(+), 32 deletions(-) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 646965f379..cf0fffbd26 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -563,10 +563,10 @@ struct XtensaCPU { }; +#ifndef CONFIG_USER_ONLY bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); -#ifndef CONFIG_USER_ONLY void xtensa_cpu_do_interrupt(CPUState *cpu); bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request); void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, diff --git a/linux-user/xtensa/cpu_loop.c b/linux-user/xtensa/cpu_loop.c index 64831c9199..b48781c6e8 100644 --- a/linux-user/xtensa/cpu_loop.c +++ b/linux-user/xtensa/cpu_loop.c @@ -224,15 +224,6 @@ void cpu_loop(CPUXtensaState *env) queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; - case LOAD_PROHIBITED_CAUSE: - case STORE_PROHIBITED_CAUSE: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - info.si_code = TARGET_SEGV_ACCERR; - info._sifields._sigfault._addr = env->sregs[EXCVADDR]; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; - default: fprintf(stderr, "exccause = %d\n", env->sregs[EXCCAUSE]); g_assert_not_reached(); diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 5cb19a8881..c289c4e679 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -192,11 +192,11 @@ static const struct SysemuCPUOps xtensa_sysemu_ops = { static const struct TCGCPUOps xtensa_tcg_ops = { .initialize = xtensa_translate_init, - .tlb_fill = xtensa_cpu_tlb_fill, .debug_excp_handler = xtensa_breakpoint_handler, #ifndef CONFIG_USER_ONLY .has_work = xtensa_cpu_has_work, + .tlb_fill = xtensa_cpu_tlb_fill, .cpu_exec_interrupt = xtensa_cpu_exec_interrupt, .do_interrupt = xtensa_cpu_do_interrupt, .do_transaction_failed = xtensa_cpu_do_transaction_failed, diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index f18ab383fd..29d216ec1b 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -242,27 +242,7 @@ void xtensa_cpu_list(void) } } -#ifdef CONFIG_USER_ONLY - -bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - XtensaCPU *cpu = XTENSA_CPU(cs); - CPUXtensaState *env = &cpu->env; - - qemu_log_mask(CPU_LOG_INT, - "%s: rw = %d, address = 0x%08" VADDR_PRIx ", size = %d\n", - __func__, access_type, address, size); - env->sregs[EXCVADDR] = address; - env->sregs[EXCCAUSE] = (access_type == MMU_DATA_STORE ? - STORE_PROHIBITED_CAUSE : LOAD_PROHIBITED_CAUSE); - cs->exception_index = EXC_USER; - cpu_loop_exit_restore(cs, retaddr); -} - -#else /* !CONFIG_USER_ONLY */ - +#ifndef CONFIG_USER_ONLY void xtensa_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) From patchwork Sat Sep 18 18:45:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 12503995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5121EC433EF for ; Sat, 18 Sep 2021 19:09:30 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07FE860F23 for ; Sat, 18 Sep 2021 19:09:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 07FE860F23 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:43314 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfiL-0005rw-0y for qemu-devel@archiver.kernel.org; Sat, 18 Sep 2021 15:09:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55118) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfOc-00028c-9P for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:49:07 -0400 Received: from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b]:42817) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfOa-0000YN-Ne for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:49:06 -0400 Received: by mail-pg1-x52b.google.com with SMTP id q68so13076548pga.9 for ; Sat, 18 Sep 2021 11:49:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=loPJ4fwu9tGHXBjISnsRpqTsfoBC8LJntmjmF4lGwE8=; b=aL+gt94Vb9+9BwTUJRN2W4P+jro2wkEzdTYq9+TQLx7wtNcNgWhS0iNngGjXeI+Xug 8IKjz7apG76IJeacSUXnBwD5Q7cpv/FbA5jg/qXXDtIA6lXJlI4gYCvar93xbdBjJHUZ vJssrWihnSveyxIquwJU8NzToYShdqUroHDAqzYxYK2+OxmZS2pPpCCVy4Ru5poEbHH7 lNJb48+EqiSSh5sZFgfpdXTAkb7CYX5wTBYbkK0A5U2sT3cVEjaGHCRgydsFWAH8xz8+ fOt1Q05rCJWdBOWfTgfuYsVK14P/E6OKeeeH9EcEbA/5X3c/bd4r7uh9YuLTVmhWDXj+ K9wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=loPJ4fwu9tGHXBjISnsRpqTsfoBC8LJntmjmF4lGwE8=; b=r2no62dWd6IL/ZnBV5AKWGfI+Ii6Xspv2z181qcyfNEFwcjckRv6kx3uEefUwT9mAL nHJpC03LQ1IqTi9Ossxc5/O4ZZqxA00DKDAteg4NkpIRBwTvxiL1btPRwypxGeAiN0+O 36cJOTo/uaeL2TVvBaI8QQW//nzCc7DChYWQqjiKrKzOJO/yTqdFODxSUBs91de3Yx1h tDAyD1sBYe4XNeX8IHN1tENOdFCU/rZmWvHxjyxd3SwN542MmtgZufFJl3LD+wZ80UPq EASg0SfjERFv/hRYQ+wDzk8c6KqRJNktaUjAL7qwznBEGrV4quJ2McIZFqNh6FXMEQt3 yJZw== X-Gm-Message-State: AOAM532PPYyd6+dEYQu/SMaMyHkaKXAV4bgGEh9kJ8zhTsc/piziuquc 8cwzofa44p1lX/nsKfqiAVFbHzJs5DxfQw== X-Google-Smtp-Source: ABdhPJzjATC2E9KX1FBnZ2BqYNXatViFDy/tIuXuJjTTZ/xBOBHHS0rhEpfoCyQ1dPNgICB+pQ55Jg== X-Received: by 2002:aa7:9823:0:b0:43c:6454:92b0 with SMTP id q3-20020aa79823000000b0043c645492b0mr17021396pfl.68.1631990943309; Sat, 18 Sep 2021 11:49:03 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id p30sm9916522pfh.116.2021.09.18.11.49.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:49:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 41/41] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Date: Sat, 18 Sep 2021 11:45:27 -0700 Message-Id: <20210918184527.408540-42-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We have replaced tlb_fill with record_sigsegv for user mod. Move the declaration to restrict it to system emulation. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 22 ++++++++++------------ linux-user/signal.c | 3 --- 2 files changed, 10 insertions(+), 15 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index e229a40772..988561e8d4 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -35,18 +35,6 @@ struct TCGCPUOps { void (*cpu_exec_enter)(CPUState *cpu); /** @cpu_exec_exit: Callback for cpu_exec cleanup */ void (*cpu_exec_exit)(CPUState *cpu); - /** - * @tlb_fill: Handle a softmmu tlb miss or user-only address fault - * - * For system mode, if the access is valid, call tlb_set_page - * and return true; if the access is invalid, and probe is - * true, return false; otherwise raise an exception and do - * not return. For user-only mode, always raise an exception - * and do not return. - */ - bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); /** @debug_excp_handler: Callback for handling debug exceptions */ void (*debug_excp_handler)(CPUState *cpu); @@ -72,6 +60,16 @@ struct TCGCPUOps { bool (*has_work)(CPUState *cpu); /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); + /** + * @tlb_fill: Handle a softmmu tlb miss + * + * If the access is valid, call tlb_set_page and return true; + * if the access is invalid and probe is true, return false; + * otherwise raise an exception and do not return. + */ + bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); /** * @do_transaction_failed: Callback for handling failed memory transactions * (ie bus faults or external aborts; not MMU faults) diff --git a/linux-user/signal.c b/linux-user/signal.c index ae31b46be0..4f4c919b23 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -690,9 +690,6 @@ void raise_sigsegv(CPUState *cpu, target_ulong addr, if (tcg_ops->record_sigsegv) { tcg_ops->record_sigsegv(cpu, addr, access_type, maperr, ra); - } else if (tcg_ops->tlb_fill) { - tcg_ops->tlb_fill(cpu, addr, 0, access_type, MMU_USER_IDX, false, ra); - g_assert_not_reached(); } force_sig_fault(TARGET_SIGSEGV,