From patchwork Sun Sep 19 02:42:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lai Jiangshan X-Patchwork-Id: 12504155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECBA9C433F5 for ; Sun, 19 Sep 2021 02:43:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CDC8461074 for ; Sun, 19 Sep 2021 02:43:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235943AbhISCoP (ORCPT ); Sat, 18 Sep 2021 22:44:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234631AbhISCoK (ORCPT ); Sat, 18 Sep 2021 22:44:10 -0400 Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC0C7C061574; Sat, 18 Sep 2021 19:42:45 -0700 (PDT) Received: by mail-pg1-x52a.google.com with SMTP id n18so13794728pgm.12; Sat, 18 Sep 2021 19:42:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Dsz4Z/SkO2CSryCRKr5MSIJu/NNw2pPVGkiWVqjErc4=; b=oKpVs0a3smWd0PWPYWNA4OKpFtq5OLYDnnEv2hWVG/7R7df/N+KB9BIRcwd4F/Dbb5 djuYb+J3z/b38llbxRrPZ5PJUFx0GIKR/CRixoyKI0ndnkX5JPRqctCocx3swEdUCGTe e2veqMF3SxvFluTmEgtdsH3lXeN/ZNQ0OxEi49kIuzKFQQrQvzerK+S1EmN/t6ohCRtg I6BiDI1G8tvmFP1T6mf4zDCSHVbHC794YXMmZ1vS2gM7cgXSwV6xtYQ92BuEIyLhQA4G 1+hgLFZu4DcWKihr8llBV4WgTVaVdq/W0+wbiNxbRzzZY4kTzUjywCSrDFEeTmSciZS+ RPuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Dsz4Z/SkO2CSryCRKr5MSIJu/NNw2pPVGkiWVqjErc4=; b=mpj3CSQfTtg+eKR2MS5R2jaNrdIsvqOWGsM3FvB0y5itbI2n/FTnwIdvjCkLmT/DoC zw3C7iyFyNLszeXQ3FAbNg23SDlpNtXEGXuAtwp+PBpL3o3HN4vd36rIZE0prsMJnczi ClyL5OoUeTa8SgvYxI5r6QyP2WnwA7kE8LJYLfvStDkQBTQp7a7+aGV4Fc6yrO45LdQn qEWGeUoRFe/n/wN0KnZeNJmXL36GmjGZfvQg5o4nYa5BW7NoRIzkklnFjeizJtVsCAoU HEsDYXKEHvbI6IDDOz/75P5Vj5iEbI0BmqQs2Ezi/+TSy+8914iHNuHokTuqj9Ws2Vgx hF8Q== X-Gm-Message-State: AOAM533DT1jEAmBzmNZUn5yDrMY48IAr0deDdszQ1ymEtE7GriRBW46a 1mbgLbizUabsWL+aMUQU9D/XWIGTlsaZwg== X-Google-Smtp-Source: ABdhPJz2L3APjUj3CIQM0mOnw8LR1v4bDJipvf1pVBQTj9HGRqeUQ9M0F5yPG6X3PYqRDGqjx39gJw== X-Received: by 2002:a62:4ecb:0:b0:447:a583:ce8f with SMTP id c194-20020a624ecb000000b00447a583ce8fmr1033540pfb.59.1632019365212; Sat, 18 Sep 2021 19:42:45 -0700 (PDT) Received: from localhost ([198.11.178.15]) by smtp.gmail.com with ESMTPSA id g140sm9757959pfb.100.2021.09.18.19.42.44 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 18 Sep 2021 19:42:44 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , kvm@vger.kernel.org, Lai Jiangshan , Wanpeng Li , Jim Mattson , Joerg Roedel , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" Subject: [PATCH 1/2] KVM: X86: Don't reset mmu context when X86_CR4_PCIDE 1->0 Date: Sun, 19 Sep 2021 10:42:45 +0800 Message-Id: <20210919024246.89230-2-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20210919024246.89230-1-jiangshanlai@gmail.com> References: <20210919024246.89230-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Lai Jiangshan X86_CR4_PCIDE doesn't participate in kvm_mmu_role, so the mmu context doesn't need to be reset. It is only required to flush all the guest tlb. Signed-off-by: Lai Jiangshan Reviewed-by: Sean Christopherson --- arch/x86/kvm/x86.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 86539c1686fa..7494ea0e7922 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -116,6 +116,7 @@ static void enter_smm(struct kvm_vcpu *vcpu); static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); static void store_regs(struct kvm_vcpu *vcpu); static int sync_regs(struct kvm_vcpu *vcpu); +static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu); static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2); static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2); @@ -1042,9 +1043,10 @@ EXPORT_SYMBOL_GPL(kvm_is_valid_cr4); void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4) { - if (((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) || - (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE))) + if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) kvm_mmu_reset_context(vcpu); + else if (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)) + kvm_vcpu_flush_tlb_guest(vcpu); } EXPORT_SYMBOL_GPL(kvm_post_set_cr4); From patchwork Sun Sep 19 02:42:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lai Jiangshan X-Patchwork-Id: 12504157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DCE6C433EF for ; Sun, 19 Sep 2021 02:43:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F409A61074 for ; Sun, 19 Sep 2021 02:43:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236097AbhISCoV (ORCPT ); Sat, 18 Sep 2021 22:44:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235890AbhISCoQ (ORCPT ); Sat, 18 Sep 2021 22:44:16 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7AED1C061574; Sat, 18 Sep 2021 19:42:51 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id k23-20020a17090a591700b001976d2db364so10206458pji.2; Sat, 18 Sep 2021 19:42:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fz3Dg8ANWjwbm87N+aD2ACzPe3MP9bGNtGAl5p9KClk=; b=YeI+KpvcdX5xyRlg0CgsG5JwjXUByuZQHG1LWBKllSDkyh6Yja4xzhPnmtQ/tk0CwD zxiCqXiYO0wU74qqRhIissbgsAS9HHwv1yeig36iPgZMOpj5pxbGEOsrYDSK/pVlshjt 5qv79lzqqB6vPG4lXXFWy+Awg3qHgzl6R3lN7Vxb6GiL+p8R9zERDxoGMyDIfwNjHpJS CAeyshqLx/i9mxnojMLGMTRTciT3DvrKFPCItf8dkSTWSxCDiHL5jRpGhMY8XC7x76Vv I5At/p+q2phCBgZEarT9hPyCnrVKTTNMoymw7ALKAW8euqxqqgkQRjdytiwSaVn9f3v9 iCLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fz3Dg8ANWjwbm87N+aD2ACzPe3MP9bGNtGAl5p9KClk=; b=Kreal0/W8/Ay5M6bmPxTr5nouHu3pt88Cx+M5swbo5K06a296aOj4U1lpw+WdjkCGf s/mXy7L7Enf9Q7BcaxlfjYQrAlMP+JyCSxiTRK/Bc73/bp5lo/HUMsiOpMYE4ILm1Gox iLzA/EgoGkX8ye7yV8TAZSbA/M6sRdxbTeJt//6kVCOEpnXoHaQ4y5oo70rAIh+22lOn LL0EwuT0QcwdhpkaescyGfZ7yiuMWfimlGXIdJZRS0WGFyumBBcA8XN0RRVAiZTyYoG4 wXjUmHU0BtANCzKajjw946dUH4NHBitndLrIea/Qo0JCEVjoRBdQ0ZWzemgTxfJKt7aV 1Sug== X-Gm-Message-State: AOAM530wP6hz91QIDmSN2d2RBe3dz/DF29Tq4jSUp2KnAlhHN5pNGYKk eCu4Wcsvi9srihvnreTglYFwZlxsu+/6Ag== X-Google-Smtp-Source: ABdhPJxJyA9ekbXcrsgCWnaP/lOFwltpVmetzNyOS80wTpOAmpLBxXBbkGMTFDrs3Jyn81GJnybKlA== X-Received: by 2002:a17:903:120e:b0:138:d732:3b01 with SMTP id l14-20020a170903120e00b00138d7323b01mr16470531plh.21.1632019370951; Sat, 18 Sep 2021 19:42:50 -0700 (PDT) Received: from localhost ([198.11.178.15]) by smtp.gmail.com with ESMTPSA id m7sm11025008pgn.32.2021.09.18.19.42.50 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Sat, 18 Sep 2021 19:42:50 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , kvm@vger.kernel.org, Lai Jiangshan , Wanpeng Li , Jim Mattson , Joerg Roedel , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" Subject: [PATCH 2/2] KVM: X86: Don't reset mmu context when toggling X86_CR4_PGE Date: Sun, 19 Sep 2021 10:42:46 +0800 Message-Id: <20210919024246.89230-3-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20210919024246.89230-1-jiangshanlai@gmail.com> References: <20210919024246.89230-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Lai Jiangshan X86_CR4_PGE doesn't participate in kvm_mmu_role, so the mmu context doesn't need to be reset. It is only required to flush all the guest tlb. It is also inconsistent that X86_CR4_PGE is in KVM_MMU_CR4_ROLE_BITS while kvm_mmu_role doesn't use X86_CR4_PGE. So X86_CR4_PGE is also removed from KVM_MMU_CR4_ROLE_BITS. Signed-off-by: Lai Jiangshan Reviewed-by: Sean Christopherson --- arch/x86/kvm/mmu.h | 5 ++--- arch/x86/kvm/x86.c | 3 ++- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index 75367af1a6d3..e53ef2ae958f 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -44,9 +44,8 @@ #define PT32_ROOT_LEVEL 2 #define PT32E_ROOT_LEVEL 3 -#define KVM_MMU_CR4_ROLE_BITS (X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | \ - X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE | \ - X86_CR4_LA57) +#define KVM_MMU_CR4_ROLE_BITS (X86_CR4_PSE | X86_CR4_PAE | X86_CR4_LA57 | \ + X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE) #define KVM_MMU_CR0_ROLE_BITS (X86_CR0_PG | X86_CR0_WP) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 7494ea0e7922..97772e37e8ee 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1045,7 +1045,8 @@ void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned lon { if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) kvm_mmu_reset_context(vcpu); - else if (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)) + else if (((cr4 ^ old_cr4) & X86_CR4_PGE) || + (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE))) kvm_vcpu_flush_tlb_guest(vcpu); } EXPORT_SYMBOL_GPL(kvm_post_set_cr4);