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Tue, 21 Sep 2021 06:28:02 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 21 Sep 2021 06:28:01 +0000 Received: from vdi.nvidia.com (172.20.187.5) by mail.nvidia.com (172.20.187.12) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 21 Sep 2021 06:27:59 +0000 From: Mark Zhang To: , CC: , , , , Mark Zhang Subject: [PATCH iproute2-next 1/3] rdma: Update uapi headers Date: Tue, 21 Sep 2021 09:27:24 +0300 Message-ID: <20210921062726.79973-2-markzhang@nvidia.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20210921062726.79973-1-markzhang@nvidia.com> References: <20210921062726.79973-1-markzhang@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7dd4411d-74e7-4f93-7586-08d97cc8f69b X-MS-TrafficTypeDiagnostic: DM4PR12MB5198: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:110; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Sep 2021 06:28:02.1303 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7dd4411d-74e7-4f93-7586-08d97cc8f69b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT062.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5198 Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org From: Neta Ostrovsky Update rdma_netlink.h file upto kernel commit Signed-off-by: Neta Ostrovsky Signed-off-by: Mark Zhang --- rdma/include/uapi/rdma/rdma_netlink.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/rdma/include/uapi/rdma/rdma_netlink.h b/rdma/include/uapi/rdma/rdma_netlink.h index 37f583ee..fd347bc7 100644 --- a/rdma/include/uapi/rdma/rdma_netlink.h +++ b/rdma/include/uapi/rdma/rdma_netlink.h @@ -549,6 +549,9 @@ enum rdma_nldev_attr { RDMA_NLDEV_SYS_ATTR_COPY_ON_FORK, /* u8 */ + RDMA_NLDEV_ATTR_STAT_HWCOUNTER_INDEX, /* u32 */ + RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC, /* u8 0 - disabled, 1 - enabled */ + /* * Always the end */ From patchwork Tue Sep 21 06:27:25 2021 Content-Type: text/plain; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Sep 2021 06:28:06.4333 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5ba6ccb4-c3ae-42e4-6a64-08d97cc8f92d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4901 Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org From: Neta Ostrovsky This patch introduces the "mode" command, which presents the enabled or supported (when the "supported" argument is available) optional counters. An optional counter is a vendor-specific counter that may be dynamically enabled/disabled. This enhancement of hwcounters allows exposing of counters which are for example mutual exclusive and cannot be enabled at the same time, counters that might degrades performance, optional debug counters, etc. Examples: To present currently enabled optional counters on link rocep8s0f0/1: $ rdma statistic mode link rocep8s0f0/1 link rocep8s0f0/1 optional-counters cc_rx_ce_pkts To present supported optional counters on link rocep8s0f0/1: $ rdma statistic mode supported link rocep8s0f0/1 link rocep8s0f0/1 supported optional-counters cc_rx_ce_pkts,cc_rx_cnp_pkts,cc_tx_cnp_pkts Signed-off-by: Neta Ostrovsky Signed-off-by: Mark Zhang --- man/man8/rdma-statistic.8 | 23 ++++++ rdma/stat.c | 164 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 187 insertions(+) diff --git a/man/man8/rdma-statistic.8 b/man/man8/rdma-statistic.8 index 7160bcdf..885769bc 100644 --- a/man/man8/rdma-statistic.8 +++ b/man/man8/rdma-statistic.8 @@ -58,6 +58,13 @@ rdma-statistic \- RDMA statistic counter configuration .RI "[ " COUNTER-ID " ]" .RI "[ " OBJECT-ID " ]" +.ti -8 +.B rdma statistic +.B mode +.B "[" supported "]" +.B link +.RI "[ " DEV/PORT_INDEX " ]" + .ti -8 .IR COUNTER_SCOPE " := " .RB "{ " link " | " dev " }" @@ -100,6 +107,10 @@ When unbound the statistics of this object are no longer available in this count - specifies the id of the counter to be bound. If this argument is omitted then a new counter will be allocated. +.SS rdma statistic mode - Display the enabled optional counters for each link. + +.SS rdma statistic mode supported - Display the supported optional counters for each link. + .SH "EXAMPLES" .PP rdma statistic show @@ -186,6 +197,16 @@ rdma statistic show mr mrn 6 .RS 4 Dump a specific MR statistics with mrn 6. Dumps nothing if does not exists. .RE +.PP +rdma statistic mode link mlx5_2/1 +.RS 4 +Display the optional counters that was enabled on mlx5_2/1. +.RE +.PP +rdma statistic mode supported link mlx5_2/1 +.RS 4 +Display the optional counters that mlx5_2/1 supports. +.RE .SH SEE ALSO .BR rdma (8), @@ -198,3 +219,5 @@ Dump a specific MR statistics with mrn 6. Dumps nothing if does not exists. Mark Zhang .br Erez Alfasi +.br +Neta Ostrovsky diff --git a/rdma/stat.c b/rdma/stat.c index 8edf7bf1..157b23bf 100644 --- a/rdma/stat.c +++ b/rdma/stat.c @@ -20,6 +20,8 @@ static int stat_help(struct rd *rd) pr_out(" %s statistic OBJECT unbind COUNTER_SCOPE [DEV/PORT_INDEX] [COUNTER-ID]\n", rd->filename); pr_out(" %s statistic show\n", rd->filename); pr_out(" %s statistic show link [ DEV/PORT_INDEX ]\n", rd->filename); + pr_out(" %s statistic mode [ supported ]\n", rd->filename); + pr_out(" %s statistic mode [ supported ] link [ DEV/PORT_INDEX ]\n", rd->filename); pr_out("where OBJECT: = { qp }\n"); pr_out(" CRITERIA : = { type }\n"); pr_out(" COUNTER_SCOPE: = { link | dev }\n"); @@ -37,6 +39,10 @@ static int stat_help(struct rd *rd) pr_out(" %s statistic qp unbind link mlx5_2/1 cntn 4 lqpn 178\n", rd->filename); pr_out(" %s statistic show\n", rd->filename); pr_out(" %s statistic show link mlx5_2/1\n", rd->filename); + pr_out(" %s statistic mode\n", rd->filename); + pr_out(" %s statistic mode link mlx5_2/1\n", rd->filename); + pr_out(" %s statistic mode supported\n", rd->filename); + pr_out(" %s statistic mode supported link mlx5_2/1\n", rd->filename); return 0; } @@ -715,6 +721,163 @@ static int stat_qp(struct rd *rd) return rd_exec_cmd(rd, cmds, "parameter"); } +static int do_stat_mode_parse_cb(const struct nlmsghdr *nlh, void *data, + bool supported) +{ + struct nlattr *tb[RDMA_NLDEV_ATTR_MAX] = {}; + struct nlattr *nla_entry; + const char *dev, *name; + struct rd *rd = data; + int enabled, err = 0; + bool isfirst = true; + uint32_t port; + + mnl_attr_parse(nlh, 0, rd_attr_cb, tb); + if (!tb[RDMA_NLDEV_ATTR_DEV_INDEX] || !tb[RDMA_NLDEV_ATTR_DEV_NAME] || + !tb[RDMA_NLDEV_ATTR_PORT_INDEX] || + !tb[RDMA_NLDEV_ATTR_STAT_HWCOUNTERS]) + return MNL_CB_ERROR; + + dev = mnl_attr_get_str(tb[RDMA_NLDEV_ATTR_DEV_NAME]); + port = mnl_attr_get_u32(tb[RDMA_NLDEV_ATTR_PORT_INDEX]); + + mnl_attr_for_each_nested(nla_entry, + tb[RDMA_NLDEV_ATTR_STAT_HWCOUNTERS]) { + struct nlattr *cnt[RDMA_NLDEV_ATTR_MAX] = {}; + + err = mnl_attr_parse_nested(nla_entry, rd_attr_cb, cnt); + if ((err != MNL_CB_OK) || + (!cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_ENTRY_NAME])) + return -EINVAL; + + if (!cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC]) + continue; + + enabled = mnl_attr_get_u8(cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC]); + name = mnl_attr_get_str(cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_ENTRY_NAME]); + if (supported || enabled) { + if (isfirst) { + open_json_object(NULL); + print_color_string(PRINT_ANY, COLOR_NONE, + "ifname", "link %s/", dev); + print_color_uint(PRINT_ANY, COLOR_NONE, "port", + "%u ", port); + if (supported) + open_json_array(PRINT_ANY, + "supported optional-counters"); + else + open_json_array(PRINT_ANY, + "optional-counters"); + print_color_string(PRINT_FP, COLOR_NONE, NULL, + " ", NULL); + isfirst = false; + } else { + print_color_string(PRINT_FP, COLOR_NONE, NULL, + ",", NULL); + } + if (rd->pretty_output && !rd->json_output) + newline_indent(rd); + + print_color_string(PRINT_ANY, COLOR_NONE, NULL, "%s", + name); + } + } + + if (!isfirst) { + close_json_array(PRINT_JSON, NULL); + newline(rd); + } + + return 0; +} + +static int stat_mode_parse_cb(const struct nlmsghdr *nlh, void *data) +{ + return do_stat_mode_parse_cb(nlh, data, false); +} + +static int stat_mode_parse_cb_supported(const struct nlmsghdr *nlh, void *data) +{ + return do_stat_mode_parse_cb(nlh, data, true); +} + +static int stat_one_link_get_status_req(struct rd *rd, uint32_t *seq) +{ + int flags = NLM_F_REQUEST | NLM_F_ACK; + + rd_prepare_msg(rd, RDMA_NLDEV_CMD_STAT_GET, seq, flags); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_DEV_INDEX, rd->dev_idx); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_PORT_INDEX, rd->port_idx); + mnl_attr_put_u8(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC, 1); + + return rd_send_msg(rd); +} + +static int stat_one_link_get_mode(struct rd *rd) +{ + uint32_t seq; + int err; + + if (!rd->port_idx) + return 0; + + err = stat_one_link_get_status_req(rd, &seq); + if (err) + return err; + + return rd_recv_msg(rd, stat_mode_parse_cb, rd, seq); +} + +static int stat_one_link_get_mode_supported(struct rd *rd) +{ + uint32_t seq; + int err; + + if (!rd->port_idx) + return 0; + + err = stat_one_link_get_status_req(rd, &seq); + if (err) + return err; + + return rd_recv_msg(rd, stat_mode_parse_cb_supported, rd, seq); +} + +static int stat_link_get_mode(struct rd *rd) +{ + return rd_exec_link(rd, stat_one_link_get_mode, false); +} + +static int stat_link_get_mode_supported(struct rd *rd) +{ + return rd_exec_link(rd, stat_one_link_get_mode_supported, false); +} + +static int stat_mode_supported(struct rd *rd) +{ + const struct rd_cmd cmds[] = { + { NULL, stat_link_get_mode_supported }, + { "link", stat_link_get_mode_supported }, + { "help", stat_help }, + { 0 }, + }; + return rd_exec_cmd(rd, cmds, "parameter"); +} + +static int stat_mode(struct rd *rd) +{ + const struct rd_cmd cmds[] = { + { NULL, stat_link_get_mode }, + { "link", stat_link_get_mode }, + { "show", stat_link_get_mode }, + { "supported", stat_mode_supported }, + { "help", stat_help }, + { 0 }, + }; + + return rd_exec_cmd(rd, cmds, "parameter"); +} + static int stat_show_parse_cb(const struct nlmsghdr *nlh, void *data) { struct nlattr *tb[RDMA_NLDEV_ATTR_MAX] = {}; @@ -786,6 +949,7 @@ int cmd_stat(struct rd *rd) { "help", stat_help }, { "qp", stat_qp }, { "mr", stat_mr }, + { "mode", stat_mode }, { 0 } }; From patchwork Tue Sep 21 06:27:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Zhang X-Patchwork-Id: 12507279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A480EC433EF for ; Tue, 21 Sep 2021 06:28:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 856776112F for ; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Sep 2021 06:28:10.5622 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 16fe5efb-a950-4452-c78e-08d97cc8fba5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT020.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3118 Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org From: Neta Ostrovsky This patch provides an extension to the rdma statistics tool that allows to set/unset optional counters set dynamically, using new netlink commands. Note that the optional counter statistic implementation is driver-specific and may impact the performance. Examples: To enable a set of optional counters on link rocep8s0f0/1: $ sudo rdma statistic set link rocep8s0f0/1 optional-counters cc_rx_ce_pkts,cc_rx_cnp_pkts To disable all optional counters on link rocep8s0f0/1: $ sudo rdma statistic unset link rocep8s0f0/1 optional-counters Signed-off-by: Neta Ostrovsky Signed-off-by: Mark Zhang --- man/man8/rdma-statistic.8 | 32 ++++++++ rdma/stat.c | 163 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 195 insertions(+) diff --git a/man/man8/rdma-statistic.8 b/man/man8/rdma-statistic.8 index 885769bc..198ce0bf 100644 --- a/man/man8/rdma-statistic.8 +++ b/man/man8/rdma-statistic.8 @@ -65,6 +65,21 @@ rdma-statistic \- RDMA statistic counter configuration .B link .RI "[ " DEV/PORT_INDEX " ]" +.ti -8 +.B rdma statistic +.B set +.B link +.RI "[ " DEV/PORT_INDEX " ]" +.B optional-counters +.RI "[ " OPTIONAL-COUNTERS " ]" + +.ti -8 +.B rdma statistic +.B unset +.B link +.RI "[ " DEV/PORT_INDEX " ]" +.B optional-counters + .ti -8 .IR COUNTER_SCOPE " := " .RB "{ " link " | " dev " }" @@ -111,6 +126,13 @@ If this argument is omitted then a new counter will be allocated. .SS rdma statistic mode supported - Display the supported optional counters for each link. +.SS rdma statistic set - Enable a set of optional counters for a specific device/port. + +.I "OPTIONAL-COUNTERS" +- specifies the name of the optional counters to enable. Optional counters that are not specified will be disabled. Note that optional counters are driver-specific. + +.SS rdma statistic unset - Disable all optional counters for a specific device/port. + .SH "EXAMPLES" .PP rdma statistic show @@ -207,6 +229,16 @@ rdma statistic mode supported link mlx5_2/1 .RS 4 Display the optional counters that mlx5_2/1 supports. .RE +.PP +rdma statistic set link mlx5_2/1 optional-counters cc-rx-ce-pkts,cc_rx_cnp_pkts +.RS 4 +Enable the cc-rx-ce-pkts,cc_rx_cnp_pkts counters on device mlx5_2 port 1. +.RE +.PP +rdma statistic unset link mlx5_2/1 optional-counters +.RS 4 +Disable all the optional counters on device mlx5_2 port 1. +.RE .SH SEE ALSO .BR rdma (8), diff --git a/rdma/stat.c b/rdma/stat.c index 157b23bf..b5d1a59f 100644 --- a/rdma/stat.c +++ b/rdma/stat.c @@ -22,6 +22,8 @@ static int stat_help(struct rd *rd) pr_out(" %s statistic show link [ DEV/PORT_INDEX ]\n", rd->filename); pr_out(" %s statistic mode [ supported ]\n", rd->filename); pr_out(" %s statistic mode [ supported ] link [ DEV/PORT_INDEX ]\n", rd->filename); + pr_out(" %s statistic set link [ DEV/PORT_INDEX ] optional-counters [ OPTIONAL-COUNTERS ]\n", rd->filename); + pr_out(" %s statistic unset link [ DEV/PORT_INDEX ] optional-counters\n", rd->filename); pr_out("where OBJECT: = { qp }\n"); pr_out(" CRITERIA : = { type }\n"); pr_out(" COUNTER_SCOPE: = { link | dev }\n"); @@ -43,6 +45,8 @@ static int stat_help(struct rd *rd) pr_out(" %s statistic mode link mlx5_2/1\n", rd->filename); pr_out(" %s statistic mode supported\n", rd->filename); pr_out(" %s statistic mode supported link mlx5_2/1\n", rd->filename); + pr_out(" %s statistic set link mlx5_2/1 optional-counters cc-rx-ce-pkts,cc_rx_cnp_pkts\n", rd->filename); + pr_out(" %s statistic unset link mlx5_2/1 optional-counters\n", rd->filename); return 0; } @@ -878,6 +882,163 @@ static int stat_mode(struct rd *rd) return rd_exec_cmd(rd, cmds, "parameter"); } +static int stat_one_set_link_opcounters(const struct nlmsghdr *nlh, void *data) +{ + struct nlattr *tb[RDMA_NLDEV_ATTR_MAX] = {}; + struct nlattr *nla_entry, *tb_set; + int flags = NLM_F_REQUEST | NLM_F_ACK; + struct rd *rd = data; + uint32_t seq; + char *opcnt; + bool found; + + mnl_attr_parse(nlh, 0, rd_attr_cb, tb); + if (!tb[RDMA_NLDEV_ATTR_STAT_HWCOUNTERS]) + return MNL_CB_ERROR; + + if (rd_no_arg(rd)) { + stat_help(rd); + return -EINVAL; + } + + if (strcmpx(rd_argv(rd), "optional-counters") != 0) { + pr_err("Unknown parameter '%s'.\n", rd_argv(rd)); + return -EINVAL; + } + + rd_arg_inc(rd); + if (rd_no_arg(rd)) { + stat_help(rd); + return -EINVAL; + } + + rd_prepare_msg(rd, RDMA_NLDEV_CMD_STAT_SET, &seq, flags); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_DEV_INDEX, + rd->dev_idx); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_PORT_INDEX, + rd->port_idx); + mnl_attr_put_u8(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC, 1); + + tb_set = mnl_attr_nest_start(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTERS); + + opcnt = strtok(rd_argv(rd), ","); + while (opcnt) { + found = false; + mnl_attr_for_each_nested(nla_entry, + tb[RDMA_NLDEV_ATTR_STAT_HWCOUNTERS]) { + struct nlattr *cnt[RDMA_NLDEV_ATTR_MAX] = {}, *nm, *id; + + if (mnl_attr_parse_nested(nla_entry, rd_attr_cb, + cnt) != MNL_CB_OK) + return -EINVAL; + + nm = cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_ENTRY_NAME]; + id = cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_INDEX]; + if (!nm || ! id) + return -EINVAL; + + if (!cnt[RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC]) + continue; + + if (strcmp(opcnt, mnl_attr_get_str(nm)) == 0) { + mnl_attr_put_u32(rd->nlh, + RDMA_NLDEV_ATTR_STAT_HWCOUNTER_INDEX, + mnl_attr_get_u32(id)); + found = true; + } + } + + if (!found) + return -EINVAL; + + opcnt = strtok(NULL, ","); + } + mnl_attr_nest_end(rd->nlh, tb_set); + + return rd_sendrecv_msg(rd, seq); +} + +static int stat_one_set_link(struct rd *rd) +{ + uint32_t seq; + int err; + + if (!rd->port_idx) + return 0; + + err = stat_one_link_get_status_req(rd, &seq); + if (err) + return err; + + return rd_recv_msg(rd, stat_one_set_link_opcounters, rd, seq); +} + +static int stat_set_link(struct rd *rd) +{ + return rd_exec_link(rd, stat_one_set_link, true); +} + +static int stat_set(struct rd *rd) +{ + const struct rd_cmd cmds[] = { + { NULL, stat_help }, + { "link", stat_set_link }, + { "help", stat_help }, + { 0 }, + }; + return rd_exec_cmd(rd, cmds, "parameter"); +} + +static int stat_one_unset_link_opcounters(struct rd *rd) +{ + int flags = NLM_F_REQUEST | NLM_F_ACK; + struct nlattr *tbl; + uint32_t seq; + + if (rd_no_arg(rd)) { + stat_help(rd); + return -EINVAL; + } + + if (strcmpx(rd_argv(rd), "optional-counters") != 0) { + pr_err("Unknown parameter '%s'.\n", rd_argv(rd)); + return -EINVAL; + } + + rd_prepare_msg(rd, RDMA_NLDEV_CMD_STAT_SET, &seq, flags); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_DEV_INDEX, + rd->dev_idx); + mnl_attr_put_u32(rd->nlh, RDMA_NLDEV_ATTR_PORT_INDEX, + rd->port_idx); + mnl_attr_put_u8(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTER_DYNAMIC, 1); + + tbl = mnl_attr_nest_start(rd->nlh, RDMA_NLDEV_ATTR_STAT_HWCOUNTERS); + mnl_attr_nest_end(rd->nlh, tbl); + + return rd_sendrecv_msg(rd, seq); +} + +static int stat_one_unset_link(struct rd *rd) +{ + return stat_one_unset_link_opcounters(rd); +} + +static int stat_unset_link(struct rd *rd) +{ + return rd_exec_link(rd, stat_one_unset_link, true); +} + +static int stat_unset(struct rd *rd) +{ + const struct rd_cmd cmds[] = { + { NULL, stat_help }, + { "link", stat_unset_link }, + { "help", stat_help }, + { 0 }, + }; + return rd_exec_cmd(rd, cmds, "parameter"); +} + static int stat_show_parse_cb(const struct nlmsghdr *nlh, void *data) { struct nlattr *tb[RDMA_NLDEV_ATTR_MAX] = {}; @@ -950,6 +1111,8 @@ int cmd_stat(struct rd *rd) { "qp", stat_qp }, { "mr", stat_mr }, { "mode", stat_mode }, + { "set", stat_set }, + { "unset", stat_unset }, { 0 } };