From patchwork Fri Sep 24 11:08:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12513985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.6 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEACFC433F5 for ; Fri, 24 Sep 2021 04:15:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DB4BF61267 for ; Fri, 24 Sep 2021 04:15:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240106AbhIXERW (ORCPT ); Fri, 24 Sep 2021 00:17:22 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:17497 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233203AbhIXERW (ORCPT ); Fri, 24 Sep 2021 00:17:22 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1632456949; x=1663992949; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Irgi2+TJMQerZX7EqkPUuDWs1A7MVoqrPiYuyiRsMys=; b=rUqnFtMB/Zppw+qKAGthWARTU8ijcpBSKjN4PZOl8p9WNTJvA9k8NE4d kEXVifHu8VL8Es0wPXe9IJNG0tSeJmaCZJ+sDOMoP7081exFrXhTihsw7 E9WkynrzNdDVly4MFpYrdZyWJC9+wKcEJmo6BWajlxGLTdZ7YuF+lZR2x VWE1i1YmudnvT0w9NnIKRRMKnTK0z9133g/O5fpbtnfVpOIjs3l44X6/N Fc9ZP3gTVYlPt14yximE4KXQe6DlOfWR/nMMyQlH1xKYahdoXMIbl+TFO Mzi9SvONJ6kf5FflxvXpseLchjNGzJKJSpJ3tUeJkMDfht36a2obuEThd g==; IronPort-SDR: 7vdSxeWexCzp11lnwozW0HzV34fU91gbXGihiTjXL6sSzRQgedlOnaeKC8hwHkxDlIb6IEupQ4 /0DstvOdWgN/N2vug+2i+RSj8QwIwYHsvSCKqIezcw4Zgy694FdPWgq405AGH6dczLdTrqHAaP fqS0PBNWUfxNr3WHWr8GLPaGH5/ULbMTQZETOE1Jo2dVpUuB8usDYmxw4w/Znd2M5hot+bmsur XYoqFVzwcHDYDcMULHi9YOXUJdNNrWCJ7EF9j/I8rM/HNRoW5YWvYAATVH0WoH7BTLpdXNewht 4hX++wF3wv0HgEq51+Fvwu1R X-IronPort-AV: E=Sophos;i="5.85,318,1624345200"; d="scan'208";a="70411604" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Sep 2021 21:15:49 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 23 Sep 2021 21:15:48 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 23 Sep 2021 21:15:48 -0700 From: To: , , , , CC: , Subject: [PATCH 1/5] PCI/switchtec: Error out MRPC execution when no GAS access Date: Fri, 24 Sep 2021 11:08:38 +0000 Message-ID: <20210924110842.6323-2-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210924110842.6323-1-kelvin.cao@microchip.com> References: <20210924110842.6323-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao After a firmware hard reset, MRPC command executions, which are based on the PCI BAR (which Microchip refers to as GAS) read/write, will hang indefinitely. This is because after a reset, the host will fail all GAS reads (get all 1s), in which case the driver won't get a valid MRPC status. Add a read check to GAS access when a MRPC command execution doesn't response timely, error out if the check fails. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 59 ++++++++++++++++++++++++++++++---- 1 file changed, 52 insertions(+), 7 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 0b301f8be9ed..092653487021 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -45,6 +45,7 @@ enum mrpc_state { MRPC_QUEUED, MRPC_RUNNING, MRPC_DONE, + MRPC_IO_ERROR, }; struct switchtec_user { @@ -66,6 +67,13 @@ struct switchtec_user { int event_cnt; }; +static int check_access(struct switchtec_dev *stdev) +{ + u32 device = ioread32(&stdev->mmio_sys_info->device_id); + + return stdev->pdev->device == device; +} + static struct switchtec_user *stuser_create(struct switchtec_dev *stdev) { struct switchtec_user *stuser; @@ -113,6 +121,7 @@ static void stuser_set_state(struct switchtec_user *stuser, [MRPC_QUEUED] = "QUEUED", [MRPC_RUNNING] = "RUNNING", [MRPC_DONE] = "DONE", + [MRPC_IO_ERROR] = "IO_ERROR", }; stuser->state = state; @@ -184,6 +193,21 @@ static int mrpc_queue_cmd(struct switchtec_user *stuser) return 0; } +static void mrpc_cleanup_cmd(struct switchtec_dev *stdev) +{ + /* requires the mrpc_mutex to already be held when called */ + struct switchtec_user *stuser = list_entry(stdev->mrpc_queue.next, + struct switchtec_user, list); + + stuser->cmd_done = true; + wake_up_interruptible(&stuser->cmd_comp); + list_del_init(&stuser->list); + stuser_put(stuser); + stdev->mrpc_busy = 0; + + mrpc_cmd_submit(stdev); +} + static void mrpc_complete_cmd(struct switchtec_dev *stdev) { /* requires the mrpc_mutex to already be held when called */ @@ -223,13 +247,7 @@ static void mrpc_complete_cmd(struct switchtec_dev *stdev) memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data, stuser->read_len); out: - stuser->cmd_done = true; - wake_up_interruptible(&stuser->cmd_comp); - list_del_init(&stuser->list); - stuser_put(stuser); - stdev->mrpc_busy = 0; - - mrpc_cmd_submit(stdev); + mrpc_cleanup_cmd(stdev); } static void mrpc_event_work(struct work_struct *work) @@ -246,6 +264,23 @@ static void mrpc_event_work(struct work_struct *work) mutex_unlock(&stdev->mrpc_mutex); } +static void mrpc_error_complete_cmd(struct switchtec_dev *stdev) +{ + /* requires the mrpc_mutex to already be held when called */ + + struct switchtec_user *stuser; + + if (list_empty(&stdev->mrpc_queue)) + return; + + stuser = list_entry(stdev->mrpc_queue.next, + struct switchtec_user, list); + + stuser_set_state(stuser, MRPC_IO_ERROR); + + mrpc_cleanup_cmd(stdev); +} + static void mrpc_timeout_work(struct work_struct *work) { struct switchtec_dev *stdev; @@ -257,6 +292,11 @@ static void mrpc_timeout_work(struct work_struct *work) mutex_lock(&stdev->mrpc_mutex); + if (!check_access(stdev)) { + mrpc_error_complete_cmd(stdev); + goto out; + } + if (stdev->dma_mrpc) status = stdev->dma_mrpc->status; else @@ -544,6 +584,11 @@ static ssize_t switchtec_dev_read(struct file *filp, char __user *data, if (rc) return rc; + if (stuser->state == MRPC_IO_ERROR) { + mutex_unlock(&stdev->mrpc_mutex); + return -EIO; + } + if (stuser->state != MRPC_DONE) { mutex_unlock(&stdev->mrpc_mutex); return -EBADE; From patchwork Fri Sep 24 11:08:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12513987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.6 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6601EC433FE for ; Fri, 24 Sep 2021 04:15:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3ACD6610D1 for ; Fri, 24 Sep 2021 04:15:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243461AbhIXERY (ORCPT ); Fri, 24 Sep 2021 00:17:24 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:17497 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236950AbhIXERX (ORCPT ); Fri, 24 Sep 2021 00:17:23 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1632456951; x=1663992951; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Gwi5VXcZto8n90lhV0i2U8ud4d67Xh9Y2IfSACApWno=; b=fLKK7UyU8qUs4m0gm73VzZyp9pgMWh+Z0/t6XuKN7mXzo0/O+QHwNYQH 84iWXYAXT8MdJwi+5OrrTh7AY3Y0FEcrG0PabgQRMzCyh2zpD6JpAd0oT VnzM+/xmIsceWYqNupPvM5cZaSHRJevOYwW66FbBYehxUAZNm4c+KrBEx Tc1zOva1uf2mzq7GgcfDV+Ldf9LkPKXwSzptcxJzjE9cBb+t4q0RvnNsa ax+iAOzD1LhcKcUKlLH/XpsW35OQbAm9FCb9Rkjk0NS8T3KWZpHnMcufn jN/HAbWecHQ9NT31b08LDjJQA7XhfJOUxRIYZDM2xycCF83MeuPlergw3 A==; IronPort-SDR: DwNtpqt56ARR2HoloGqTG/3R/cBHzp11YvLvtZ8xJS1baa46bl3RMT/qumCgx40t9/77So7JeW uDEXwwCBxQhRgyjxNwzh7aWSFp3SKzMWQ4T1lgp6JLU/ukrtaYe8gj/A9DXiQIIzc0bdiHuvlJ RZCzseKHNSTaGHW0posbhKH4ADe3zp6Gd5rTZXhuswmFGf9TuUW6psxql3XZ7nOPrj7R4cPteG CzDCs22iIbxrxv1jvFqr5d+4SNpZDzQ0gzFthgMDKxyDkEkn2D8FJrsPb1mpaqCTeudAvAh5S8 IMj+qHcGs/j8HsH1mtuGHl/S X-IronPort-AV: E=Sophos;i="5.85,318,1624345200"; d="scan'208";a="70411605" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Sep 2021 21:15:50 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 23 Sep 2021 21:15:50 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 23 Sep 2021 21:15:50 -0700 From: To: , , , , CC: , Subject: [PATCH 2/5] PCI/switchtec: Fix a MRPC error status handling issue Date: Fri, 24 Sep 2021 11:08:39 +0000 Message-ID: <20210924110842.6323-3-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210924110842.6323-1-kelvin.cao@microchip.com> References: <20210924110842.6323-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao If an error is encountered when executing a MRPC command, the firmware will set the status register to SWITCHTEC_MRPC_STATUS_ERROR and return the error code in the return value register. Add handling of SWITCHTEC_MRPC_STATUS_ERROR on status register when completing a MRPC command. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 092653487021..76f14ed15445 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -230,7 +230,8 @@ static void mrpc_complete_cmd(struct switchtec_dev *stdev) stuser_set_state(stuser, MRPC_DONE); stuser->return_code = 0; - if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE) + if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE && + stuser->status != SWITCHTEC_MRPC_STATUS_ERROR) goto out; if (stdev->dma_mrpc) @@ -614,7 +615,8 @@ static ssize_t switchtec_dev_read(struct file *filp, char __user *data, out: mutex_unlock(&stdev->mrpc_mutex); - if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE) + if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE || + stuser->status == SWITCHTEC_MRPC_STATUS_ERROR) return size; else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) return -ENXIO; From patchwork Fri Sep 24 11:08:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12513989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.6 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76074C4332F for ; Fri, 24 Sep 2021 04:15:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 56577610D1 for ; Fri, 24 Sep 2021 04:15:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244080AbhIXERZ (ORCPT ); Fri, 24 Sep 2021 00:17:25 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:3740 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244056AbhIXERY (ORCPT ); Fri, 24 Sep 2021 00:17:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1632456951; x=1663992951; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EEYOkUC0z0v7W7yWDZPlUNJfWbsPw8Zsm21yaRlvfIc=; b=R1xlAVPY7JghyAHt9/kkzeseJMnoxBnXmXGTILshkwwEc6JTELT5ew62 ROAgoywkhCmX8nEHFBv5ZyDkBxPQVhuy3Wx+1t4s/8IZYYWANErBt6oRt cAirsfc6fh3q8+xiLldtXhvqX8NL/wCrrB8FTBoP6WS3PLh/rfvR6kk5Q O5UJBG2wPRB68y66d6K5YLlz3esa/8vsPojigmmypE8RfyRj/i7jhlCZ4 0xCH/gktsKp8vRbSaxdpY5RKdwaaJmd4E/HqHaNtkZrZfAvEGt3Euxte2 RuACh6aVbJpJUT+mL8iZXLKCjvY6ffAV5hy5XsXXOlRHVhaO8WWG85J+I A==; IronPort-SDR: UgjGFEoN9KWaEl4Cengmt8HjZNwwKKYpEGDHt89BQb2tQT8DYKuz0MPHpmwmbIJ5WOy681A3qa FbrP4w0ZE/bQuy+Awg4bKZDbDLX+14HtgT0NOhep9TQ3Yhxq7eXjRw6I5PGFfAP6iiUma1mLJd ZQVv1noj4mpRTow8DVIbcNtC6krA6jbCkZeArp7VwT3jG+oPrwG0DMS9GHVr0FRiC6m73Bm3t3 gFwYMgk1m42zKTvVVGqFCi+QsEYj1+raz5w6f2c7Dcv1i0Vrh8nxYvvK+qzTDJk01JwijbECu/ mXoJErJxWO3ZRbau/uODpoKh X-IronPort-AV: E=Sophos;i="5.85,318,1624345200"; d="scan'208";a="130437088" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Sep 2021 21:15:51 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 23 Sep 2021 21:15:51 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 23 Sep 2021 21:15:51 -0700 From: To: , , , , CC: , Subject: [PATCH 3/5] PCI/switchtec: Update the way of getting management VEP instance ID Date: Fri, 24 Sep 2021 11:08:40 +0000 Message-ID: <20210924110842.6323-4-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210924110842.6323-1-kelvin.cao@microchip.com> References: <20210924110842.6323-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao Gen4 firmware adds DMA VEP and NVMe VEP support in VEP (virtual EP) instance ID register in addtion to management EP, update the way of getting management VEP instance ID. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 76f14ed15445..b76094e2c885 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -1125,7 +1125,7 @@ static int ioctl_pff_to_port(struct switchtec_dev *stdev, break; } - reg = ioread32(&pcfg->vep_pff_inst_id); + reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF; if (reg == p.pff) { p.port = SWITCHTEC_IOCTL_PFF_VEP; break; @@ -1171,7 +1171,7 @@ static int ioctl_port_to_pff(struct switchtec_dev *stdev, p.pff = ioread32(&pcfg->usp_pff_inst_id); break; case SWITCHTEC_IOCTL_PFF_VEP: - p.pff = ioread32(&pcfg->vep_pff_inst_id); + p.pff = ioread32(&pcfg->vep_pff_inst_id) & 0xFF; break; default: if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) @@ -1545,7 +1545,7 @@ static void init_pff(struct switchtec_dev *stdev) if (reg < stdev->pff_csr_count) stdev->pff_local[reg] = 1; - reg = ioread32(&pcfg->vep_pff_inst_id); + reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF; if (reg < stdev->pff_csr_count) stdev->pff_local[reg] = 1; From patchwork Fri Sep 24 11:08:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12513991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.6 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 813A5C433F5 for ; Fri, 24 Sep 2021 04:15:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 69B0361241 for ; Fri, 24 Sep 2021 04:15:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244100AbhIXER1 (ORCPT ); Fri, 24 Sep 2021 00:17:27 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:37322 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244087AbhIXER0 (ORCPT ); Fri, 24 Sep 2021 00:17:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1632456954; x=1663992954; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0aTSFNISN4uSkix2990dOEcIuhNMSwYIrid/JfMpyCQ=; b=1AoBO21dCO8l56gkiwRnChCKHWA9KSRiNftEPWBMR8SDTxf16a+9F+U5 OjZtfgew9NN3DeUFd6VIcmqqwXBcgQEfRJdCKQNFD6ybeu4ckP4z/YK6c yB/FOZGtaDELFa4QzDocurC0eC43h1F9hJI5HMon5aS0hWMglt1zBodib RTq7xLzta8WWNZSrdUZc6odtnj+AdN9/aXqzwhJGuStHie2YBc2aDgh+P QAbUs2Ue50KJH5vJzIBGmG1jAndI2J6UIYSggo47wgHatT1xoMB08UB+r 0TUF6CpSrvQflUqhgJ8rOKkCdHhg2KIxqnY5O7ATSpZdCsLt07VKuuTn4 g==; IronPort-SDR: qwzuOjahS8GgxhuZ5X27OJgHl62VhZYix9dl5sy3xfO1PnsMGKU8WJ/ep48bA416J8PPqlNgLl g7O67i2FTwiHMWDzBDoCiIsgTfvVbdlJRnNL25WOiSDmNGXOCluQKMeFGUNXbH3KdrmexMXItr V000vdzwT9AQVrUkf3a0omgrpBnSqwSH5C3LM8KTkWicamIhN83lZveGDlrSYRkzjL1TuXRm05 Q57ONJ3xi29kHBP5ZQyaMleUkrCA55Xyqx2yjuOCbQ+g3JRR1cEmKDc/xklOMr0WdZ4K3etTtM KwmJablWkHj53DVNCOXCW/fq X-IronPort-AV: E=Sophos;i="5.85,318,1624345200"; d="scan'208";a="145412348" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Sep 2021 21:15:53 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 23 Sep 2021 21:15:53 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 23 Sep 2021 21:15:52 -0700 From: To: , , , , CC: , Subject: [PATCH 4/5] PCI/switchtec: Replace ENOTSUPP with EOPNOTSUPP Date: Fri, 24 Sep 2021 11:08:41 +0000 Message-ID: <20210924110842.6323-5-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210924110842.6323-1-kelvin.cao@microchip.com> References: <20210924110842.6323-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao ENOTSUPP is not a SUSV4 error code, and the following checkpatch.pl warning will be given for new patches which still use ENOTSUPP. WARNING: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP See the link below for the discussion. Link: https://lore.kernel.org/netdev/20200511165319.2251678-1-kuba@kernel.org/ Replace ENOTSUPP with EOPNOTSUPP to align with future patches which will be using EOPNOTSUPP. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index b76094e2c885..20cec2367084 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -368,7 +368,7 @@ static ssize_t field ## _show(struct device *dev, \ return io_string_show(buf, &si->gen4.field, \ sizeof(si->gen4.field)); \ else \ - return -ENOTSUPP; \ + return -EOPNOTSUPP; \ } \ \ static DEVICE_ATTR_RO(field) @@ -660,7 +660,7 @@ static int ioctl_flash_info(struct switchtec_dev *stdev, info.flash_length = ioread32(&fi->gen4.flash_length); info.num_partitions = SWITCHTEC_NUM_PARTITIONS_GEN4; } else { - return -ENOTSUPP; + return -EOPNOTSUPP; } if (copy_to_user(uinfo, &info, sizeof(info))) @@ -868,7 +868,7 @@ static int ioctl_flash_part_info(struct switchtec_dev *stdev, if (ret) return ret; } else { - return -ENOTSUPP; + return -EOPNOTSUPP; } if (copy_to_user(uinfo, &info, sizeof(info))) @@ -1603,7 +1603,7 @@ static int switchtec_init_pci(struct switchtec_dev *stdev, else if (stdev->gen == SWITCHTEC_GEN4) part_id = &stdev->mmio_sys_info->gen4.partition_id; else - return -ENOTSUPP; + return -EOPNOTSUPP; stdev->partition = ioread8(part_id); stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count); From patchwork Fri Sep 24 11:08:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12513993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.6 required=3.0 tests=BAYES_00, DATE_IN_FUTURE_06_12,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F208DC433EF for ; Fri, 24 Sep 2021 04:16:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DA03E61241 for ; Fri, 24 Sep 2021 04:16:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244101AbhIXERe (ORCPT ); Fri, 24 Sep 2021 00:17:34 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:17512 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244133AbhIXERb (ORCPT ); Fri, 24 Sep 2021 00:17:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1632456958; x=1663992958; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2k79zXBKe+geEQxWRKze+mGukdAFu5VeVYDnouJpkdg=; b=WNORyVp0ps4vQZ4iffeZc6MiflqNauVSqImTvaus0oq7RCyzzWH1VUyr auJuU7+sRd2WrI5w3fc8keuOZHIV9/jeZ1Td2NzvHvMCx33B/qcd3aWQ3 uOo/mh+Snydddmj9MCiC1CJBUcMOZREnnVMRff1BoLDW5LqcJCue2CzzV NX6gACqrGwd+deipQqa7BFuX0ZzYNZ7xwtOnYfoljRelWo2FMh1MADKft jwbwNl+Kvb8c7Akk7aicTK0/ployY+ResNV7i1BIMtPCpQzJpn9OiSxDe CkU/7Yc0BRCopls2HUYt8h+mS88OveSYJ5nkBWgcnXphJsR+PKrfVaL9e Q==; IronPort-SDR: Q8tyVuWjAyH0PqpRvy5Qo+NShe+sejcA9B9uTl47yFkfPFy/jSWzDyJxlPp1TS9ymlvvVsoiRj cA45xuo+OdrymoSVKT62n7FkWgWROLW+aZX4YQ1g9AUiSOPb6Ucn7aHCfb0rtq4FR+SmFfLrIy MTmiZP0tthR/5yn45lt5KKGYIlme8ZlnJGKjAnGUWSJHEnUPfRt/lGm4X8E2TajJ5/ALBiOhvV K/pcfwJw+lKfqbu20P2yDtRbdvogd/tdxPp9aEhaDJ9EjYd1ZwKYUhUu8n17dXI0ZfO7w/yN4K cCiWL+bBxSopsMFKWrRZ2/KT X-IronPort-AV: E=Sophos;i="5.85,318,1624345200"; d="scan'208";a="70411614" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 23 Sep 2021 21:15:57 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 23 Sep 2021 21:15:54 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 23 Sep 2021 21:15:54 -0700 From: To: , , , , CC: , Subject: [PATCH 5/5] PCI/switchtec: Add check of event support Date: Fri, 24 Sep 2021 11:08:42 +0000 Message-ID: <20210924110842.6323-6-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210924110842.6323-1-kelvin.cao@microchip.com> References: <20210924110842.6323-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Logan Gunthorpe Not all events are supported by every gen/variant of the Switchtec firmware. To solve this, since Gen4, a new bit in each event header is introduced to indicate if an event is supported by the firmware. Signed-off-by: Logan Gunthorpe Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 8 +++++++- include/linux/switchtec.h | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 20cec2367084..739e063a6b85 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -1016,6 +1016,9 @@ static int event_ctl(struct switchtec_dev *stdev, return PTR_ERR(reg); hdr = ioread32(reg); + if (hdr & SWITCHTEC_EVENT_NOT_SUPP) + return -EOPNOTSUPP; + for (i = 0; i < ARRAY_SIZE(ctl->data); i++) ctl->data[i] = ioread32(®[i + 1]); @@ -1088,7 +1091,7 @@ static int ioctl_event_ctl(struct switchtec_dev *stdev, for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) { ctl.flags = event_flags; ret = event_ctl(stdev, &ctl); - if (ret < 0) + if (ret < 0 && ret != -EOPNOTSUPP) return ret; } } else { @@ -1395,6 +1398,9 @@ static int mask_event(struct switchtec_dev *stdev, int eid, int idx) hdr_reg = event_regs[eid].map_reg(stdev, off, idx); hdr = ioread32(hdr_reg); + if (hdr & SWITCHTEC_EVENT_NOT_SUPP) + return 0; + if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ)) return 0; diff --git a/include/linux/switchtec.h b/include/linux/switchtec.h index 082f1d51957a..be24056ac00f 100644 --- a/include/linux/switchtec.h +++ b/include/linux/switchtec.h @@ -19,6 +19,7 @@ #define SWITCHTEC_EVENT_EN_CLI BIT(2) #define SWITCHTEC_EVENT_EN_IRQ BIT(3) #define SWITCHTEC_EVENT_FATAL BIT(4) +#define SWITCHTEC_EVENT_NOT_SUPP BIT(31) #define SWITCHTEC_DMA_MRPC_EN BIT(0)