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Fri, 24 Sep 2021 06:28:58 -0700 (PDT) From: Pingfan Liu To: linux-arm-kernel@lists.infradead.org Cc: Pingfan Liu , Catalin Marinas , Will Deacon , Mark Rutland , Marc Zyngier , Joey Gouly , Sami Tolvanen , Julien Thierry , Thomas Gleixner , Yuichi Ito , linux-kernel@vger.kernel.org Subject: [PATCHv2 1/5] arm64/entry-common: push the judgement of nmi ahead Date: Fri, 24 Sep 2021 21:28:33 +0800 Message-Id: <20210924132837.45994-2-kernelfans@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210924132837.45994-1-kernelfans@gmail.com> References: <20210924132837.45994-1-kernelfans@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210924_062900_178054_8344FBE7 X-CRM114-Status: GOOD ( 16.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In enter_el1_irq_or_nmi(), it can be the case which NMI interrupts an irq, which makes the condition !interrupts_enabled(regs) fail to detect the NMI. This will cause a mistaken account for irq. Introducing two interfaces: handle_arch_nmi and interrupt_is_nmi to judge NMI at this stage. Signed-off-by: Pingfan Liu Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Marc Zyngier Cc: Joey Gouly Cc: Sami Tolvanen Cc: Julien Thierry Cc: Thomas Gleixner Cc: Yuichi Ito Cc: linux-kernel@vger.kernel.org To: linux-arm-kernel@lists.infradead.org --- arch/arm64/include/asm/irq.h | 5 ++++ arch/arm64/kernel/entry-common.c | 45 ++++++++++++++++++++++---------- arch/arm64/kernel/irq.c | 29 ++++++++++++++++++++ 3 files changed, 65 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h index fac08e18bcd5..a59b1745f458 100644 --- a/arch/arm64/include/asm/irq.h +++ b/arch/arm64/include/asm/irq.h @@ -12,6 +12,11 @@ int set_handle_irq(void (*handle_irq)(struct pt_regs *)); #define set_handle_irq set_handle_irq int set_handle_fiq(void (*handle_fiq)(struct pt_regs *)); +extern void (*handle_arch_irq)(struct pt_regs *regs); +extern void (*handle_arch_fiq)(struct pt_regs *regs); +extern void (*handle_arch_nmi)(struct pt_regs *regs); +extern bool (*interrupt_is_nmi)(void); + static inline int nr_legacy_irqs(void) { return 0; diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index 32f9796c4ffe..69a8cc082712 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -24,6 +24,7 @@ #include #include #include +#include /* * Handle IRQ/context state management when entering from kernel mode. @@ -219,17 +220,28 @@ static void noinstr arm64_exit_el1_dbg(struct pt_regs *regs) lockdep_hardirqs_on(CALLER_ADDR0); } -static void noinstr enter_el1_irq_or_nmi(struct pt_regs *regs) +static inline bool arm64_in_nmi(struct pt_regs *regs) { - if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !interrupts_enabled(regs)) + if (!interrupts_enabled(regs) || (*interrupt_is_nmi)()) + return true; + return false; +} + +/* return true if in irq, otherwise in nmi */ +static bool noinstr enter_el1_irq_or_nmi(struct pt_regs *regs) +{ + if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && arm64_in_nmi(regs)) { arm64_enter_nmi(regs); - else + return false; + } else { enter_from_kernel_mode(regs); + return true; + } } -static void noinstr exit_el1_irq_or_nmi(struct pt_regs *regs) +static void noinstr exit_el1_irq_or_nmi(struct pt_regs *regs, bool in_irq) { - if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !interrupts_enabled(regs)) + if (IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && !in_irq) arm64_exit_nmi(regs); else exit_to_kernel_mode(regs); @@ -269,9 +281,6 @@ static void do_interrupt_handler(struct pt_regs *regs, handler(regs); } -extern void (*handle_arch_irq)(struct pt_regs *); -extern void (*handle_arch_fiq)(struct pt_regs *); - static void noinstr __panic_unhandled(struct pt_regs *regs, const char *vector, unsigned int esr) { @@ -433,12 +442,20 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs) } static void noinstr el1_interrupt(struct pt_regs *regs, - void (*handler)(struct pt_regs *)) + void (*handler)(struct pt_regs *), + void (*nmi_handler)(struct pt_regs *)) { + bool in_irq; + void (*h)(struct pt_regs *regs); + write_sysreg(DAIF_PROCCTX_NOIRQ, daif); - enter_el1_irq_or_nmi(regs); - do_interrupt_handler(regs, handler); + in_irq = enter_el1_irq_or_nmi(regs); + if (in_irq) + h = handler; + else + h = nmi_handler; + do_interrupt_handler(regs, h); /* * Note: thread_info::preempt_count includes both thread_info::count @@ -449,17 +466,17 @@ static void noinstr el1_interrupt(struct pt_regs *regs, READ_ONCE(current_thread_info()->preempt_count) == 0) arm64_preempt_schedule_irq(); - exit_el1_irq_or_nmi(regs); + exit_el1_irq_or_nmi(regs, in_irq); } asmlinkage void noinstr el1h_64_irq_handler(struct pt_regs *regs) { - el1_interrupt(regs, handle_arch_irq); + el1_interrupt(regs, handle_arch_irq, handle_arch_nmi); } asmlinkage void noinstr el1h_64_fiq_handler(struct pt_regs *regs) { - el1_interrupt(regs, handle_arch_fiq); + el1_interrupt(regs, handle_arch_fiq, handle_arch_nmi); } asmlinkage void noinstr el1h_64_error_handler(struct pt_regs *regs) diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index bda49430c9ea..e67435eb4cba 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -81,8 +81,19 @@ static void default_handle_fiq(struct pt_regs *regs) panic("FIQ taken without a root FIQ handler\n"); } +static void default_handle_nmi(struct pt_regs *unused) +{ +} + +static bool default_nmi_discriminator(void) +{ + return false; +} + void (*handle_arch_irq)(struct pt_regs *) __ro_after_init = default_handle_irq; void (*handle_arch_fiq)(struct pt_regs *) __ro_after_init = default_handle_fiq; +void (*handle_arch_nmi)(struct pt_regs *) __ro_after_init = default_handle_nmi; +bool (*interrupt_is_nmi)(void) __ro_after_init = default_nmi_discriminator; int __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) { @@ -104,6 +115,24 @@ int __init set_handle_fiq(void (*handle_fiq)(struct pt_regs *)) return 0; } +int __init set_handle_nmi(void (*handle_nmi)(struct pt_regs *)) +{ + if (handle_arch_nmi != default_handle_nmi) + return -EBUSY; + + handle_arch_nmi = handle_nmi; + return 0; +} + +int __init set_nmi_discriminator(bool (*discriminator)(void)) +{ + if (interrupt_is_nmi != default_nmi_discriminator) + return -EBUSY; + + interrupt_is_nmi = discriminator; + return 0; +} + void __init init_IRQ(void) { init_irq_stacks(); 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Fri, 24 Sep 2021 06:29:06 -0700 (PDT) From: Pingfan Liu To: linux-arm-kernel@lists.infradead.org Cc: Pingfan Liu , Catalin Marinas , Will Deacon , Mark Rutland , Marc Zyngier , Joey Gouly , Sami Tolvanen , Julien Thierry , Thomas Gleixner , Yuichi Ito , linux-kernel@vger.kernel.org Subject: [PATCHv2 2/5] irqchip/GICv3: expose handle_nmi() directly Date: Fri, 24 Sep 2021 21:28:34 +0800 Message-Id: <20210924132837.45994-3-kernelfans@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210924132837.45994-1-kernelfans@gmail.com> References: <20210924132837.45994-1-kernelfans@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210924_062908_144206_AF59B731 X-CRM114-Status: GOOD ( 18.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org With the previous patch, the NMI should be dispatched at irqentry level. Accordingly adjust GICv3 to utilize the hooks, so NMI handler can be dispatched. Signed-off-by: Pingfan Liu Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Marc Zyngier Cc: Joey Gouly Cc: Sami Tolvanen Cc: Julien Thierry Cc: Thomas Gleixner Cc: Yuichi Ito Cc: linux-kernel@vger.kernel.org To: linux-arm-kernel@lists.infradead.org --- arch/arm64/include/asm/irq.h | 2 ++ drivers/irqchip/irq-gic-v3.c | 53 +++++++++++++++++++----------------- 2 files changed, 30 insertions(+), 25 deletions(-) diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h index a59b1745f458..c39627290a60 100644 --- a/arch/arm64/include/asm/irq.h +++ b/arch/arm64/include/asm/irq.h @@ -11,6 +11,8 @@ struct pt_regs; int set_handle_irq(void (*handle_irq)(struct pt_regs *)); #define set_handle_irq set_handle_irq int set_handle_fiq(void (*handle_fiq)(struct pt_regs *)); +int set_handle_nmi(void (*handle_nmi)(struct pt_regs *)); +int set_nmi_discriminator(bool (*discriminator)(void)); extern void (*handle_arch_irq)(struct pt_regs *regs); extern void (*handle_arch_fiq)(struct pt_regs *regs); diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index fd4e9a37fea6..89dcec902a82 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -644,28 +644,12 @@ static void gic_deactivate_unhandled(u32 irqnr) } } -static inline void gic_handle_nmi(u32 irqnr, struct pt_regs *regs) +static bool gic_is_in_nmi(void) { - bool irqs_enabled = interrupts_enabled(regs); - int err; - - if (irqs_enabled) - nmi_enter(); - - if (static_branch_likely(&supports_deactivate_key)) - gic_write_eoir(irqnr); - /* - * Leave the PSR.I bit set to prevent other NMIs to be - * received while handling this one. - * PSR.I will be restored when we ERET to the - * interrupted context. - */ - err = handle_domain_nmi(gic_data.domain, irqnr, regs); - if (err) - gic_deactivate_unhandled(irqnr); + if (gic_supports_nmi() && unlikely(gic_read_rpr() == GICD_INT_NMI_PRI)) + return true; - if (irqs_enabled) - nmi_exit(); + return false; } static u32 do_read_iar(struct pt_regs *regs) @@ -702,21 +686,38 @@ static u32 do_read_iar(struct pt_regs *regs) return iar; } -static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) +static void gic_handle_nmi(struct pt_regs *regs) { u32 irqnr; + int err; irqnr = do_read_iar(regs); /* Check for special IDs first */ if ((irqnr >= 1020 && irqnr <= 1023)) return; + if (static_branch_likely(&supports_deactivate_key)) + gic_write_eoir(irqnr); + /* + * Leave the PSR.I bit set to prevent other NMIs to be + * received while handling this one. + * PSR.I will be restored when we ERET to the + * interrupted context. + */ + err = handle_domain_nmi(gic_data.domain, irqnr, regs); + if (err) + gic_deactivate_unhandled(irqnr); +} - if (gic_supports_nmi() && - unlikely(gic_read_rpr() == GICD_INT_RPR_PRI(GICD_INT_NMI_PRI))) { - gic_handle_nmi(irqnr, regs); +static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) +{ + u32 irqnr; + + irqnr = do_read_iar(regs); + + /* Check for special IDs first */ + if ((irqnr >= 1020 && irqnr <= 1023)) return; - } if (gic_prio_masking_enabled()) { gic_pmr_mask_irqs(); @@ -1791,6 +1792,8 @@ static int __init gic_init_bases(void __iomem *dist_base, } set_handle_irq(gic_handle_irq); + set_handle_nmi(gic_handle_nmi); + set_nmi_discriminator(gic_is_in_nmi); gic_update_rdist_properties(); From patchwork Fri Sep 24 13:28:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pingfan Liu X-Patchwork-Id: 12515515 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C4CCC433F5 for ; Fri, 24 Sep 2021 13:33:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0283661029 for ; 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Fri, 24 Sep 2021 06:29:11 -0700 (PDT) From: Pingfan Liu To: linux-kernel@vger.kernel.org Cc: Pingfan Liu , Thomas Gleixner , Catalin Marinas , Will Deacon , Mark Rutland , Marc Zyngier , Joey Gouly , Sami Tolvanen , Julien Thierry , Yuichi Ito , linux-arm-kernel@lists.infradead.org Subject: [PATCHv2 3/5] kernel/irq: make irq_{enter, exit}() in handle_domain_irq() arch optional Date: Fri, 24 Sep 2021 21:28:35 +0800 Message-Id: <20210924132837.45994-4-kernelfans@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210924132837.45994-1-kernelfans@gmail.com> References: <20210924132837.45994-1-kernelfans@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210924_062912_683030_744063DC X-CRM114-Status: GOOD ( 11.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org handle_domain_irq() contains two major parts: -1. irq_enter()/irq_exit(), which serves as hooks for rcu and trace etc. -2. irq mapping and dispatching After the introduction of irqentry_enter()/irqentry_exit() and arch specific counterpart (e.g. arm64), roughly speaking, rcu_irq_enter() has already been called. Hence here comes requirement to move irq_enter/irq_exit out of handle_domain_irq(). And arches should handle about irq_enter_rcu()/irq_exit_rcu() by themself. Since there is still arches, which does not adopt irqentry_enter(), let irq_enter()/irq_exit() arch optional in handle_domain_irq(). Signed-off-by: Pingfan Liu Cc: Thomas Gleixner Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Marc Zyngier Cc: Joey Gouly Cc: Sami Tolvanen Cc: Julien Thierry Cc: Yuichi Ito Cc: linux-arm-kernel@lists.infradead.org To: linux-kernel@vger.kernel.org --- kernel/irq/Kconfig | 3 +++ kernel/irq/irqdesc.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig index fbc54c2a7f23..defa1db2d664 100644 --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -100,6 +100,9 @@ config IRQ_MSI_IOMMU config HANDLE_DOMAIN_IRQ bool +config HAVE_ARCH_IRQENTRY + bool + config IRQ_TIMINGS bool diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index 4e3c29bb603c..fd5dd9d278b5 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c @@ -693,7 +693,9 @@ int handle_domain_irq(struct irq_domain *domain, struct irq_desc *desc; int ret = 0; +#ifndef CONFIG_HAVE_ARCH_IRQENTRY irq_enter(); +#endif /* The irqdomain code provides boundary checks */ desc = irq_resolve_mapping(domain, hwirq); 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Fri, 24 Sep 2021 06:29:16 -0700 (PDT) From: Pingfan Liu To: linux-arm-kernel@lists.infradead.org Cc: Pingfan Liu , Catalin Marinas , Will Deacon , Mark Rutland , Marc Zyngier , Joey Gouly , Sami Tolvanen , Julien Thierry , Thomas Gleixner , Yuichi Ito , linux-kernel@vger.kernel.org Subject: [PATCHv2 4/5] irqchip/GICv3: let gic_handle_irq() utilize irqentry on arm64 Date: Fri, 24 Sep 2021 21:28:36 +0800 Message-Id: <20210924132837.45994-5-kernelfans@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210924132837.45994-1-kernelfans@gmail.com> References: <20210924132837.45994-1-kernelfans@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210924_062918_029666_7C8CE7F4 X-CRM114-Status: GOOD ( 11.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The call to rcu_irq_enter() originated from gic_handle_irq() is redundant now, since arm64 has enter_from_kernel_mode() akin to irqenter_entry(), which has already called rcu_irq_enter(). Based on code analysis, the redundant can raise some mistake, e.g. rcu_data->dynticks_nmi_nesting inc 2, which causes rcu_is_cpu_rrupt_from_idle() unexpected. So eliminate the call to irq_enter() in handle_domain_irq(). And accordingly supplementing irq_enter_rcu(). Signed-off-by: Pingfan Liu Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Marc Zyngier Cc: Joey Gouly Cc: Sami Tolvanen Cc: Julien Thierry Cc: Thomas Gleixner Cc: Yuichi Ito Cc: linux-kernel@vger.kernel.org To: linux-arm-kernel@lists.infradead.org --- arch/arm64/Kconfig | 1 + drivers/irqchip/irq-gic-v3.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5c7ae4c3954b..d29bae38a951 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -98,6 +98,7 @@ config ARM64 select ARCH_HAS_UBSAN_SANITIZE_ALL select ARM_AMBA select ARM_ARCH_TIMER + select HAVE_ARCH_IRQENTRY select ARM_GIC select AUDIT_ARCH_COMPAT_GENERIC select ARM_GIC_V2M if PCI diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 89dcec902a82..906538fa8771 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -729,10 +729,12 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs else isb(); 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Fri, 24 Sep 2021 06:29:21 -0700 (PDT) From: Pingfan Liu To: linux-arm-kernel@lists.infradead.org Cc: Pingfan Liu , Catalin Marinas , Will Deacon , Mark Rutland , Marc Zyngier , Joey Gouly , Sami Tolvanen , Julien Thierry , Thomas Gleixner , Yuichi Ito , linux-kernel@vger.kernel.org Subject: [PATCHv2 5/5] irqchip/GICv3: make reschedule-ipi light weight Date: Fri, 24 Sep 2021 21:28:37 +0800 Message-Id: <20210924132837.45994-6-kernelfans@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210924132837.45994-1-kernelfans@gmail.com> References: <20210924132837.45994-1-kernelfans@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210924_062923_437315_03819683 X-CRM114-Status: GOOD ( 12.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org To achieve the light weight as DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi) on x86, it had better treat irqnr differently at the frontend. And let IPI_RESCHEDULE call __irq_enter_raw() instead of irq_enter_rcu(). Signed-off-by: Pingfan Liu Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Marc Zyngier Cc: Joey Gouly Cc: Sami Tolvanen Cc: Julien Thierry Cc: Thomas Gleixner Cc: Yuichi Ito Cc: linux-kernel@vger.kernel.org To: linux-arm-kernel@lists.infradead.org --- drivers/irqchip/irq-gic-v3.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 906538fa8771..593d4539a209 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -709,6 +709,9 @@ static void gic_handle_nmi(struct pt_regs *regs) gic_deactivate_unhandled(irqnr); } +/* RESCHEDULE IPI hwirq nr is 0, and the only raw one */ +static unsigned long raw_interrupt_mask = 1; + static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) { u32 irqnr; @@ -729,12 +732,20 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs else isb(); - irq_enter_rcu(); + if (raw_interrupt_mask & 1 << irqnr) + __irq_enter_raw(); + else + irq_enter_rcu(); + if (handle_domain_irq(gic_data.domain, irqnr, regs)) { WARN_ONCE(true, "Unexpected interrupt received!\n"); gic_deactivate_unhandled(irqnr); } - irq_exit_rcu(); + + if (raw_interrupt_mask & 1 << irqnr) + __irq_exit_raw(); + else + irq_exit_rcu(); } static u32 gic_get_pribits(void)