From patchwork Tue Sep 28 18:21:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523405 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D9A6C433F5 for ; Tue, 28 Sep 2021 18:22:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 24C0E6135E for ; Tue, 28 Sep 2021 18:22:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241488AbhI1SYD (ORCPT ); Tue, 28 Sep 2021 14:24:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242150AbhI1SYD (ORCPT ); Tue, 28 Sep 2021 14:24:03 -0400 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1A24C06161C; Tue, 28 Sep 2021 11:22:23 -0700 (PDT) Received: by mail-pf1-x435.google.com with SMTP id s16so19697614pfk.0; Tue, 28 Sep 2021 11:22:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GyK23hCAo9rrYB5DytAMn+XEn6byxlXYhtxgWpFOWzk=; b=Hoy4HcV97uiRKlrKZ8mLkU5PvdCJfz+bpA0IIx93/v2A/84zOx3g9XBn0knqgZ36js Hq/B3hunA5byE1eIX67a122f9V6A3fRqAhPvMIecJt5jPG43buORW+JCAMBSS6Yagyu2 Oc3/qsqo6qoRyA7J8Q4CYozEslv8uBpaMAfBYT+9rJP3S/Z5DG9vkjte85EEVq0Varov PlagZ25JzmaloPZugg6nlLdfOGX3Y8RdAQZMHTdBsCeBkzlkJAMQsjUNQHcC66nRj/aO XugN6AIxQUDtYH2EMQAJcu2k4HhcZz6TxPW4SgD4U8qTgIaDXGobqZZO5NX/scr391u0 pjXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GyK23hCAo9rrYB5DytAMn+XEn6byxlXYhtxgWpFOWzk=; b=GRK8wkjEvxQkt9MHrdWBbRgnUUbYSM7CE1jpF2z2JHTqbCecE2kjjGucJd8VeRp4Gc 3evfqxoTqHTjsJAEeKIdLel3vo51tJ0gYbVhaF4G2UKOzQe5NQnQ+a9MIIb83npjf+O5 daTW/9CwHMceQdSctrikyyPm07zPnlyD6eI6oy9fvpj6foch+zn4P0/B0cEDy9CkW5X0 CDp+r/JF90EdsM4D9PflBFiYjMK+lh64loASEp6leXP+pF3aRQgJS1m6wqpIFFNifBPj lbEHgoSxWhK1uFNvw9Jur1dwegDZkCfyq+90/c4WCOEqX+LojOJP9nyyT2fK9/fev50z iUaQ== X-Gm-Message-State: AOAM533kNUnx5Wn453Bpt3eLFaU/fRFoKr0DHri8QmsmyxDUcBbqVoiu pSWdcxFJHnh1p4N0cVw2Fvu2NC6L6Fo= X-Google-Smtp-Source: ABdhPJxyxge4NVt6pGsy8e42QLleQv658qttZI6/lvxewzvQ6eD3yNOrWrjwbU0WyM3FBqN1mN1KJA== X-Received: by 2002:a63:9d0d:: with SMTP id i13mr5800357pgd.117.1632853342879; Tue, 28 Sep 2021 11:22:22 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:22 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Thomas Gleixner , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 01/14] MIPS: BMIPS: Remove use of irq_cpu_offline Date: Tue, 28 Sep 2021 11:21:26 -0700 Message-Id: <20210928182139.652896-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org irq_cpu_offline() is only used by MIPS and we should instead use irq_migrate_all_off_this_cpu(). This will be helpful in order to remove drivers/irqchip/irq-bcm7038-l1.c irq_cpu_offline callback which would have got in the way of making this driver modular. Suggested-by: Thomas Gleixner Signed-off-by: Florian Fainelli Acked-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 1 + arch/mips/kernel/smp-bmips.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 771ca53af06d..2c03b27cec02 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1782,6 +1782,7 @@ config CPU_BMIPS select CPU_HAS_PREFETCH select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c index b6ef5f7312cf..f5d7bfa3472a 100644 --- a/arch/mips/kernel/smp-bmips.c +++ b/arch/mips/kernel/smp-bmips.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -373,7 +374,7 @@ static int bmips_cpu_disable(void) set_cpu_online(cpu, false); calculate_cpu_foreign_map(); - irq_cpu_offline(); + irq_migrate_all_off_this_cpu(); clear_c0_status(IE_IRQ5); local_flush_tlb_all(); From patchwork Tue Sep 28 18:21:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84A0EC4332F for ; Tue, 28 Sep 2021 18:22:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7100561381 for ; Tue, 28 Sep 2021 18:22:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242188AbhI1SYF (ORCPT ); Tue, 28 Sep 2021 14:24:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242162AbhI1SYE (ORCPT ); Tue, 28 Sep 2021 14:24:04 -0400 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34C1AC06161C; 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Tue, 28 Sep 2021 11:22:24 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:23 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 02/14] irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline() Date: Tue, 28 Sep 2021 11:21:27 -0700 Message-Id: <20210928182139.652896-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org With arch/mips/kernel/smp-bmips.c having been migrated away from irq_cpu_offline() and use irq_migrate_all_off_this_cpu() instead, we no longer need to implement an .irq_cpu_offline() callback. This is a necessary change to facilitate the building of this driver as a module. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 30 ------------------------------ 1 file changed, 30 deletions(-) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index a035c385ca7a..750156217c82 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -221,33 +221,6 @@ static int bcm7038_l1_set_affinity(struct irq_data *d, return 0; } -#ifdef CONFIG_SMP -static void bcm7038_l1_cpu_offline(struct irq_data *d) -{ - struct cpumask *mask = irq_data_get_affinity_mask(d); - int cpu = smp_processor_id(); - cpumask_t new_affinity; - - /* This CPU was not on the affinity mask */ - if (!cpumask_test_cpu(cpu, mask)) - return; - - if (cpumask_weight(mask) > 1) { - /* - * Multiple CPU affinity, remove this CPU from the affinity - * mask - */ - cpumask_copy(&new_affinity, mask); - cpumask_clear_cpu(cpu, &new_affinity); - } else { - /* Only CPU, put on the lowest online CPU */ - cpumask_clear(&new_affinity); - cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity); - } - irq_set_affinity_locked(d, &new_affinity, false); -} -#endif - static int __init bcm7038_l1_init_one(struct device_node *dn, unsigned int idx, struct bcm7038_l1_chip *intc) @@ -396,9 +369,6 @@ static struct irq_chip bcm7038_l1_irq_chip = { .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, .irq_set_affinity = bcm7038_l1_set_affinity, -#ifdef CONFIG_SMP - .irq_cpu_offline = bcm7038_l1_cpu_offline, -#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake, #endif From patchwork Tue Sep 28 18:21:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3856C433FE for ; Tue, 28 Sep 2021 18:22:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9396060F70 for ; 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Tue, 28 Sep 2021 11:22:25 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 03/14] irqchip/irq-bcm7038-l1: Use irq_get_irq_data() Date: Tue, 28 Sep 2021 11:21:28 -0700 Message-Id: <20210928182139.652896-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Using irq_desc_get_irq_data(irq_to_desc()) to retrieve the irq_data structure from a virtual interrupt number is going to be problematic to make irq-bcm7038-l1 a module because irq_to_desc() is not exported, and there is no intent to export it to modules, see 64a1b95bb9fe ("genirq: Restrict export of irq_to_desc()"). Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 750156217c82..14caf32dc23e 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -386,7 +386,7 @@ static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq, irq_set_chip_and_handler(virq, &bcm7038_l1_irq_chip, handle_level_irq); irq_set_chip_data(virq, d->host_data); - irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq))); + irqd_set_single_target(irq_get_irq_data(virq)); return 0; } From patchwork Tue Sep 28 18:21:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 281DFC433EF for ; Tue, 28 Sep 2021 18:22:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 14D936137C for ; Tue, 28 Sep 2021 18:22:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242232AbhI1SYJ (ORCPT ); Tue, 28 Sep 2021 14:24:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242206AbhI1SYI (ORCPT ); Tue, 28 Sep 2021 14:24:08 -0400 Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [IPv6:2607:f8b0:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42404C06161C; Tue, 28 Sep 2021 11:22:28 -0700 (PDT) Received: by mail-pf1-x430.google.com with SMTP id y8so19619784pfa.7; Tue, 28 Sep 2021 11:22:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=G1RiT4GRKPcXSkOjyrks/jOWZL3DTQpMJtRhCsgVjY8=; b=DJQskZZ4po/z5W282K8NSiY/GLTaICYDm+aMHSuEiDYSmbTB3BATU5QOsexPRVblZh ZCJgXBVB4g65DDxrBtUJwnwXNuxhJ6KB6QI4d0p6h0FAxBWsp1su4g9ZQhZIf1fpOVVU kv+I7qlVpFsFnm1ITCr/04viuJxmu7RlnLOepmkaAIO4oTlIumxl3mwm0io75Rb8Ttcn 7W6BvZgg8QvPj2haenV1fq3yfNoYDmA5IR1ttIuqBx5YOtWkC4KJv5fGzR6ClxKoIIFS 3DdZPprqHsbT57s9YcLlZiqUIH1qDgz2soxZGTjlcQ4870QDuuBg6E0CibmOHty19GM7 qNFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=G1RiT4GRKPcXSkOjyrks/jOWZL3DTQpMJtRhCsgVjY8=; b=D6WZqhkQ0KYybhFAMcxXQkBQOCOMZ3Ut+VrMghA+xbkhwKC/CmGrK4FFlunPqCUU2B xhmVSGcYjPsmRFB0WxBq8TYMtW93v5rmuWuCKsakUUEwmAfuZnhI/y/rPjzc6+CSonM2 D+vYvSmFfgOcFGz39t8wvAl2VUnVNgQeQJ5UXWXnTPfS2396QU41sgccoFV8zMz4UfFs Ygr5GjWqxa6MV5EeBAl3MAEXzzb7mgPKoyogc7CKLLVOrbnN7vFZW426di3pnPlofrvs KiGOhcLkYOgtdHLrVKWpSby11iieeEAyhicRhL0wE2+PfzGv+i8KNMUBooeD80dagPRZ ptHA== X-Gm-Message-State: AOAM530EZLAgPR0APKaYgyieb1bo6ndNka1bh4wCaC56rdpc/YwFHVBm 8FzRBfiKInAFh64W1VqmXqnCEzHCDow= X-Google-Smtp-Source: ABdhPJwU+pmz/u0j54qGZGw+pklmbp0pUmxUzsiRS9pYuoRENNmRa1Na8U3PgjRc2FmlvaFYXVHf7g== X-Received: by 2002:a63:f80a:: with SMTP id n10mr5773602pgh.303.1632853347435; Tue, 28 Sep 2021 11:22:27 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:27 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 04/14] irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS Date: Tue, 28 Sep 2021 11:21:29 -0700 Message-Id: <20210928182139.652896-5-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The use of the cpu_logical_map[] array is only relevant for MIPS based platform where this driver is used as a first level interrupt controller and contains multiple register groups to map with an associated CPU. On ARM/ARM64 based systems this interrupt controller is present and used as a second level interrupt controller hanging off the ARM GIC. That copy of the interrupt controller contains a single group, resulting in the intc->cpus[] array to be of size 1. Things happened to work in that case because we install that interrupt controller as a chained handler which does not allow it to be affine to any CPU but the boot CPU which happens to be 0, therefore we never de-reference past intc->cpus[] but with the current code in place, we do leave a chance of de-referencing the array past its bounds. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 14caf32dc23e..3c4e348c661e 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -28,9 +28,6 @@ #include #include #include -#ifdef CONFIG_ARM -#include -#endif #define IRQS_PER_WORD 32 #define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 4) @@ -127,7 +124,7 @@ static void bcm7038_l1_irq_handle(struct irq_desc *desc) struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int idx; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) cpu = intc->cpus[cpu_logical_map(smp_processor_id())]; #else cpu = intc->cpus[0]; @@ -301,7 +298,7 @@ static int bcm7038_l1_suspend(void) u32 val; /* Wakeup interrupt should only come from the boot cpu */ -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) boot_cpu = cpu_logical_map(0); #else boot_cpu = 0; @@ -325,7 +322,7 @@ static void bcm7038_l1_resume(void) struct bcm7038_l1_chip *intc; int boot_cpu, word; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) boot_cpu = cpu_logical_map(0); #else boot_cpu = 0; From patchwork Tue Sep 28 18:21:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2911C433F5 for ; Tue, 28 Sep 2021 18:22:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D7D7C60F70 for ; Tue, 28 Sep 2021 18:22:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242241AbhI1SYX (ORCPT ); Tue, 28 Sep 2021 14:24:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242221AbhI1SYQ (ORCPT ); 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Tue, 28 Sep 2021 11:22:28 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 05/14] irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS Date: Tue, 28 Sep 2021 11:21:30 -0700 Message-Id: <20210928182139.652896-6-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Only MIPS based platforms using this interrupt controller as first level interrupt controller can actually change the affinity of interrupts by re-programming the affinity mask of the interrupt controller and use another word group to have another CPU process the interrupt. When this interrupt is used as a second level interrupt controller on ARM/ARM64 there is no way to change the interrupt affinity. This fixes a NULL pointer de-reference while trying to change the affinity since there is only a single word group in that case, and we would have been overruning the intc->cpus[] array. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 3c4e348c661e..357570dd8780 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d) raw_spin_unlock_irqrestore(&intc->lock, flags); } +#if defined(CONFIG_MIPS) && defined(CONFIG_SMP) static int bcm7038_l1_set_affinity(struct irq_data *d, const struct cpumask *dest, bool force) @@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d, return 0; } +#endif static int __init bcm7038_l1_init_one(struct device_node *dn, unsigned int idx, @@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = { .name = "bcm7038-l1", .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) .irq_set_affinity = bcm7038_l1_set_affinity, +#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake, #endif From patchwork Tue Sep 28 18:21:31 2021 Content-Type: text/plain; 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Tue, 28 Sep 2021 11:22:30 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:30 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 06/14] irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER Date: Tue, 28 Sep 2021 11:21:31 -0700 Message-Id: <20210928182139.652896-7-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot. Signed-off-by: Florian Fainelli --- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7038-l1.c | 6 +++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 4d5924e9f766..3022f6137096 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -115,7 +115,9 @@ config BCM6345_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7038_L1_IRQ - bool + tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN select GENERIC_IRQ_EFFECTIVE_AFF_MASK diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 357570dd8780..a62b96237b82 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -455,4 +455,8 @@ static int __init bcm7038_l1_of_init(struct device_node *dn, return ret; } -IRQCHIP_DECLARE(bcm7038_l1, "brcm,bcm7038-l1-intc", bcm7038_l1_of_init); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7038_l1) +IRQCHIP_MATCH("brcm,bcm7038-l1-intc", bcm7038_l1_of_init) +IRQCHIP_PLATFORM_DRIVER_END(bcm7038_l1) +MODULE_DESCRIPTION("Broadcom STB 7038-style L1/L2 interrupt controller"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Sep 28 18:21:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A44F6C433F5 for ; Tue, 28 Sep 2021 18:22:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9050460F70 for ; Tue, 28 Sep 2021 18:22:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242264AbhI1SY1 (ORCPT ); Tue, 28 Sep 2021 14:24:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241880AbhI1SYX (ORCPT ); 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Tue, 28 Sep 2021 11:22:31 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 07/14] genirq: Export irq_gc_{unmask_enable,mask_disable}_reg Date: Tue, 28 Sep 2021 11:21:32 -0700 Message-Id: <20210928182139.652896-8-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org In order to allow drivers/irqchip/irq-brcmstb-l2.c to be built as a module we need to export: irq_gc_unmask_enable_reg() and irq_gc_mask_disable_reg(). Signed-off-by: Florian Fainelli --- kernel/irq/generic-chip.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index cc7cdd26e23e..4c011c21bb1a 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -44,6 +44,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d) *ct->mask_cache &= ~mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_mask_disable_reg); /** * irq_gc_mask_set_bit - Mask chip via setting bit in mask register @@ -103,6 +104,7 @@ void irq_gc_unmask_enable_reg(struct irq_data *d) *ct->mask_cache |= mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_unmask_enable_reg); /** * irq_gc_ack_set_bit - Ack pending interrupt via setting bit From patchwork Tue Sep 28 18:21:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB9A1C433EF for ; Tue, 28 Sep 2021 18:22:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B84BE61373 for ; Tue, 28 Sep 2021 18:22:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242283AbhI1SY2 (ORCPT ); Tue, 28 Sep 2021 14:24:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242235AbhI1SYX (ORCPT ); Tue, 28 Sep 2021 14:24:23 -0400 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 063C8C061771; Tue, 28 Sep 2021 11:22:35 -0700 (PDT) Received: by mail-pl1-x62d.google.com with SMTP id j14so14795015plx.4; Tue, 28 Sep 2021 11:22:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9fJWAIDZMBnqyaJKloz+swm+vHzzjwQ8q/tXjCn73F0=; b=UXEXvsWOSOD9Rkz42uQQWztnY1ts7XJsOzEqnZCE2MckxsmUpkD60QeGaRYzm2USi/ cC0UKcT1jFejXeUXZvLgkXhLHL3BqVF8tAin6V38JlmX+W77dyCK7vryxfdKtY5BMCn9 vWQLajx33do8DgClL3taGH1kztupEaPHmrP3qusHga2Pwk5LFCnz2eDCBcQZJ+KY99+G hC6ECU4yzHZrcRcpSCZaV1U+kV+4dmnF+FzvZCgoKGsGC1fQvVGMizt2XjpzdzJstPEx ambD0C/fWfAcuSIf6o621SeMZMbZ3dhuVnXJ+vQqW5K4hiD9OLnyjGXzzk63R3/YcJdG 7umw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9fJWAIDZMBnqyaJKloz+swm+vHzzjwQ8q/tXjCn73F0=; b=GiggU1ac+vIwfsnfHMD31ZXR39hCEREbrjH/3RMyPfsN/2m7yw3yExc4VeZd2idrpt Mtq2SLdT55ldLVzNPIpiBgYbOeW/YIM6Edao5wCilYgyDCR3LD+YyyzOld76qK4y+Qv4 nlCZlSB3xw3xratiDSgA0Z0t0KkHPBT7uUetRUcw1uvjrtj0M3cT5oQe0+JOsQBnP2st W1HZdDj3WEiePkqzF+N5yVS+wv10D1ECmK6nWcHyOJVrM8b0C9GzTdxYEnaDol2JWw4Z ku3B46bczGWOMq4BR+xTqkxRUjWC/ibgbUkAgobPgf4TbsdyaY4oSKG/lgUhc9i8GmEN i3cA== X-Gm-Message-State: AOAM5309v6HmHBll8Xkb/Xm3Z+VvP7BbU2gJWDV0bFuBFhfXpBPPJUym uKEWx1JJs6gfQ2Yc+56/k0V/5BoqviU= X-Google-Smtp-Source: ABdhPJxwCFI4xny9h2gbQUvj4yk92qILQ/9rV46CpfqykWaxaqOZ5IE439UtP0Y+KLfNPFTKxEBl3A== X-Received: by 2002:a17:90b:102:: with SMTP id p2mr1502507pjz.222.1632853354215; Tue, 28 Sep 2021 11:22:34 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:33 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 08/14] irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER Date: Tue, 28 Sep 2021 11:21:33 -0700 Message-Id: <20210928182139.652896-9-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot. Signed-off-by: Florian Fainelli --- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-brcmstb-l2.c | 16 +++++++++------- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 3022f6137096..dfe54bf9b35f 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -128,7 +128,9 @@ config BCM7120_L2_IRQ select IRQ_DOMAIN config BRCMSTB_L2_IRQ - bool + tristate "Broadcom STB generic L2 interrupt controller driver" + depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index 8e0911561f2d..e4efc08ac594 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c @@ -275,16 +275,18 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, { return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init); } -IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc", - brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc", - brcmstb_l2_edge_intc_of_init); static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, struct device_node *parent) { return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init); } -IRQCHIP_DECLARE(bcm7271_l2_intc, "brcm,bcm7271-l2-intc", - brcmstb_l2_lvl_intc_of_init); + +IRQCHIP_PLATFORM_DRIVER_BEGIN(brcmstb_l2) +IRQCHIP_MATCH("brcm,l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,upg-aux-aon-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,bcm7271-l2-intc", brcmstb_l2_lvl_intc_of_init) +IRQCHIP_PLATFORM_DRIVER_END(brcmstb_l2) +MODULE_DESCRIPTION("Broadcom STB generic L2 interrupt controller"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Sep 28 18:21:34 2021 Content-Type: text/plain; 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Tue, 28 Sep 2021 11:22:35 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:35 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 09/14] irqchip: Provide platform_device to of_irq_init_cb_t Date: Tue, 28 Sep 2021 11:21:34 -0700 Message-Id: <20210928182139.652896-10-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Provide the platform device mapping to the interrupt controller node to the of_irq_init_cb_t callback such that drivers can make use of it. Signed-off-by: Florian Fainelli Reviewed-by: Rob Herring --- drivers/irqchip/irqchip.c | 2 +- drivers/of/irq.c | 2 +- include/linux/of_irq.h | 5 ++++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irqchip.c b/drivers/irqchip/irqchip.c index 3570f0a588c4..289784eefd00 100644 --- a/drivers/irqchip/irqchip.c +++ b/drivers/irqchip/irqchip.c @@ -55,6 +55,6 @@ int platform_irqchip_probe(struct platform_device *pdev) if (par_np && !irq_find_matching_host(par_np, DOMAIN_BUS_ANY)) return -EPROBE_DEFER; - return irq_init_cb(np, par_np); + return irq_init_cb(np, par_np, pdev); } EXPORT_SYMBOL_GPL(platform_irqchip_probe); diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 352e14b007e7..18f3f5c00c87 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -538,7 +538,7 @@ void __init of_irq_init(const struct of_device_id *matches) desc->dev, desc->dev, desc->interrupt_parent); ret = desc->irq_init_cb(desc->dev, - desc->interrupt_parent); + desc->interrupt_parent, NULL); if (ret) { of_node_clear_flag(desc->dev, OF_POPULATED); kfree(desc); diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index aaf219bd0354..89acc8b089f0 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -9,7 +9,10 @@ #include #include -typedef int (*of_irq_init_cb_t)(struct device_node *, struct device_node *); +struct platform_device; + +typedef int (*of_irq_init_cb_t)(struct device_node *, struct device_node *, + struct platform_device *); /* * Workarounds only applied to 32bit powermac machines From patchwork Tue Sep 28 18:21:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A421BC43219 for ; Tue, 28 Sep 2021 18:22:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E17260F70 for ; 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Tue, 28 Sep 2021 11:22:36 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 10/14] genirq: Export irq_gc_noop() Date: Tue, 28 Sep 2021 11:21:35 -0700 Message-Id: <20210928182139.652896-11-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org In order to build drivers/irqchip/irq-bcm7120-l2.c as a module which references irq_gc_noop(), we need to export it towards modules. Signed-off-by: Florian Fainelli --- kernel/irq/generic-chip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index 4c011c21bb1a..6f29bf4c8515 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -25,6 +25,7 @@ static DEFINE_RAW_SPINLOCK(gc_lock); void irq_gc_noop(struct irq_data *d) { } +EXPORT_SYMBOL_GPL(irq_gc_noop); /** * irq_gc_mask_disable_reg - Mask chip via disable register From patchwork Tue Sep 28 18:21:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67EA6C433EF for ; Tue, 28 Sep 2021 18:23:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 43FDB60F70 for ; Tue, 28 Sep 2021 18:23:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242343AbhI1SYl (ORCPT ); Tue, 28 Sep 2021 14:24:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242221AbhI1SYZ (ORCPT ); Tue, 28 Sep 2021 14:24:25 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 841DEC06177A; Tue, 28 Sep 2021 11:22:39 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id h12so5212279pjj.1; Tue, 28 Sep 2021 11:22:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=T+nuZjtMi8lifdnlhi4/+fNb2Wj4qKRZZKIw/UMDjOI=; b=G+o2xUh8M8NkfU8NT07HPrClNmOIZMSfAVG7yNAY2y3Wn59GiAHNpo1x731Ch5MfSn v1ir4r+zbPIQb6DQmz+oRF2YqZBsUlEDnGap5ajhB5oDQEBgtB15J0TQPtlP8tK3rYLc EH1WsMHJHEheeQm64Wc9m/Al+D4ViluDEE6/+Ml5TT0GoMwr8hffKG5Pz300dWuhgzOt O7ZjQx1o5Ls9jeyMHLutPbp/0ETqenPDVP5yAzfw87GvqkNeT5MWDRhl1QsLG7qL4ogG cSu5R/Y5BO/TnBp+UDCof3QgErs1PLmD0sZEDpl5EzRhZEp1ygM/GCUNWarCKfmvin+5 e4Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=T+nuZjtMi8lifdnlhi4/+fNb2Wj4qKRZZKIw/UMDjOI=; b=ziDuJ6bBa9+2sIxre+UQQLowpDbyHFYfxfBMPTAEF6bLaKCTvA86WEurZoonpEvlvc FXz4TJDslS1afzO3KLoaDNZWq3IFRvGUqil3a0iB4+N4q/WWsLmjy5f07UHAURPAde9Z /hUQFzy6cBsCQu6QM51/Y6g125Lm80XYR0d1P6a/TFaYXRKxmrqOUqDXgBUPoFU9As3e 0NfQ+uVwskq/CDKfDLzO2gNyDDhEORCIyKZ8Nk9psBNGdUovgU1wnoJu4sCdsoANz9Vu fE+NoYRV9ombRwjwRb8xDKWctM0DQFAOS3fCc1fQVkC4DnlaB+BdEtbV3umTQcsU3bj1 5gWA== X-Gm-Message-State: AOAM531TWvwobadUkf/sKdcuU3NqmzmFKjXNIHHdGZ6OOYDqGppd0rrf dxbWA3AM3ZM+enyHwrr2xtQX/eLLgJQ= X-Google-Smtp-Source: ABdhPJyK5lvwpIOD+t+3MtZZcxHZuqPusK5TwFvp3Y9TnVD2reoEB8HTRQ85YAUfTWG1t1tC4YWxZw== X-Received: by 2002:a17:902:6f01:b0:13b:7b8b:84a3 with SMTP id w1-20020a1709026f0100b0013b7b8b84a3mr6242105plk.40.1632853358738; Tue, 28 Sep 2021 11:22:38 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:38 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 11/14] irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER Date: Tue, 28 Sep 2021 11:21:36 -0700 Message-Id: <20210928182139.652896-12-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot. To avoid using of_irq_count() which is not exported towards module, switch the driver to use the platform_device provided by the irqchip platform driver code and resolve the number of interrupts using platform_irq_count(). Signed-off-by: Florian Fainelli --- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7120-l2.c | 28 ++++++++++++++++------------ 2 files changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index dfe54bf9b35f..c7320bed5668 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -123,7 +123,9 @@ config BCM7038_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7120_L2_IRQ - bool + tristate "Broadcom STB 7120-style L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c index f23d7651ea84..9b1edf7747fd 100644 --- a/drivers/irqchip/irq-bcm7120-l2.c +++ b/drivers/irqchip/irq-bcm7120-l2.c @@ -214,6 +214,7 @@ static int __init bcm7120_l2_intc_iomap_3380(struct device_node *dn, static int __init bcm7120_l2_intc_probe(struct device_node *dn, struct device_node *parent, + struct platform_device *pdev, int (*iomap_regs_fn)(struct device_node *, struct bcm7120_l2_intc_data *), const char *intc_name) @@ -230,7 +231,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, if (!data) return -ENOMEM; - data->num_parent_irqs = of_irq_count(dn); + data->num_parent_irqs = platform_irq_count(pdev); if (data->num_parent_irqs <= 0) { pr_err("invalid number of parent interrupts\n"); ret = -ENOMEM; @@ -334,21 +335,24 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, } static int __init bcm7120_l2_intc_probe_7120(struct device_node *dn, - struct device_node *parent) + struct device_node *parent, + struct platform_device *pdev) { - return bcm7120_l2_intc_probe(dn, parent, bcm7120_l2_intc_iomap_7120, - "BCM7120 L2"); + return bcm7120_l2_intc_probe(dn, parent, pdev, + bcm7120_l2_intc_iomap_7120, "BCM7120 L2"); } static int __init bcm7120_l2_intc_probe_3380(struct device_node *dn, - struct device_node *parent) + struct device_node *parent, + struct platform_device *pdev) { - return bcm7120_l2_intc_probe(dn, parent, bcm7120_l2_intc_iomap_3380, - "BCM3380 L2"); + return bcm7120_l2_intc_probe(dn, parent, pdev, + bcm7120_l2_intc_iomap_3380, "BCM3380 L2"); } -IRQCHIP_DECLARE(bcm7120_l2_intc, "brcm,bcm7120-l2-intc", - bcm7120_l2_intc_probe_7120); - -IRQCHIP_DECLARE(bcm3380_l2_intc, "brcm,bcm3380-l2-intc", - bcm7120_l2_intc_probe_3380); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7120_l2) +IRQCHIP_MATCH("brcm,bcm7120-l2-intc", bcm7120_l2_intc_probe_7120) +IRQCHIP_MATCH("brcm,bcm3380-l2-intc", bcm7120_l2_intc_probe_3380) +IRQCHIP_PLATFORM_DRIVER_END(bcm7120_l2) +MODULE_DESCRIPTION("Broadcom STB 7120-style L2 interrupt controller driver"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Sep 28 18:21:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B61C8C4321E for ; Tue, 28 Sep 2021 18:23:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A373C60F70 for ; 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Tue, 28 Sep 2021 11:22:39 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 12/14] arm64: broadcom: Removed forced select of interrupt controllers Date: Tue, 28 Sep 2021 11:21:37 -0700 Message-Id: <20210928182139.652896-13-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli --- arch/arm64/Kconfig.platforms | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index b0ce18d4cc98..2e9440f2da22 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -44,7 +44,6 @@ config ARCH_BCM2835 select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 - select BRCMSTB_L2_IRQ help This enables support for the Broadcom BCM2837 and BCM2711 SoC. These SoCs are used in the Raspberry Pi 3 and 4 devices. @@ -82,8 +81,6 @@ config ARCH_BITMAIN config ARCH_BRCMSTB bool "Broadcom Set-Top-Box SoCs" select ARCH_HAS_RESET_CONTROLLER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ select GENERIC_IRQ_CHIP select PINCTRL help From patchwork Tue Sep 28 18:21:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74A14C433FE for ; Tue, 28 Sep 2021 18:23:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 609EF61374 for ; Tue, 28 Sep 2021 18:23:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242270AbhI1SYk (ORCPT ); Tue, 28 Sep 2021 14:24:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242267AbhI1SY0 (ORCPT ); Tue, 28 Sep 2021 14:24:26 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 945BBC061749; Tue, 28 Sep 2021 11:22:42 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id y8so19620289pfa.7; Tue, 28 Sep 2021 11:22:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cvv2iZxij6FWrFEEKivGkcFAPGtCwuGKeJ0S/lB+6EU=; b=M60DBj5JGGyTdfa6TNjs3+dFtzjvLP46HZPcndTv52vLqBd8TuRmcqncQcP5js1ueV JZF9C8goAepNGU47poIvk242uS+8eo7FcK4gtQqzBS24XCVhWUs+p0CtVsfQiiMncqE9 +IWS5aAL6lf6FoLRojC4hHfM1ZAMf8JSObC/640cm8Y/rEUMqOSybiIin5rQ4wMzTBVS b4o3IKzHlwHqtwKS+pM2P43q14HBgF5B0AOjBM6fmvJyD+vHcXy+FHH/lQrg54W4BveR Uzelr367s+1kWFApR0eH5E+7LS6hCZUKHUV3AsLY6OQwmheMZSR/uTs4ueG7feMFCICW EEZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cvv2iZxij6FWrFEEKivGkcFAPGtCwuGKeJ0S/lB+6EU=; b=I8GLh1AHm9eIsqTamLZCfjtv3kC3nehYbwmQRfmojtdZPQBMyPSOHYfqf67BzTgxoV CJYshwG9jQCU1YZU92ZbMpmXVJ1rQhi1aPXt+/XWuehC5BrBYm+oIRa3ra+YTxOxHlyV lWt0s0eQ+lvrhw7dP80ZWYEfe9eLhH5K+1x1IlFscln7g6DIj41zTlv5Te/zbnqPEXmQ T3A1aAkrpR/lmC1qmZTEA/nvhmDgU3w6MjhzMaNny2jYmY7E/seTXbwZn1ecHmKwYyNF CF4Z0+4nelw/P9vkW8rIFpYNRwzt566/FKLet/OTJ2fTlW3ZeTyMpjErIpJ0eCX4wM2+ BKSw== X-Gm-Message-State: AOAM530IwG7LvSUxDX3A5SFtT4VkTgEOa69Sbdj4xDWPQ82TTiX3fGWz jje7DM5BKteSBYkkuDj7Ma2q8Tlr36g= X-Google-Smtp-Source: ABdhPJy09zpefjloqZzg0k0EEip8PmilCqhXjcR92DepO7vMmL9jP8rmuTM7q+/i+u2U8tBq31Jobg== X-Received: by 2002:aa7:9851:0:b0:44b:a36d:e0a2 with SMTP id n17-20020aa79851000000b0044ba36de0a2mr3594642pfq.1.1632853361772; Tue, 28 Sep 2021 11:22:41 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:41 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 13/14] ARM: bcm: Removed forced select of interrupt controllers Date: Tue, 28 Sep 2021 11:21:38 -0700 Message-Id: <20210928182139.652896-14-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli --- arch/arm/mach-bcm/Kconfig | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 2890e61b2b46..bd3f82788ebc 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -161,7 +161,6 @@ config ARCH_BCM2835 select ARM_TIMER_SP804 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 select BCM2835_TIMER - select BRCMSTB_L2_IRQ select PINCTRL select PINCTRL_BCM2835 select MFD_CORE @@ -209,9 +208,6 @@ config ARCH_BRCMSTB select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ - select BCM7120_L2_IRQ select ZONE_DMA if ARM_LPAE select SOC_BRCMSTB select SOC_BUS From patchwork Tue Sep 28 18:21:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12523425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29809C433EF for ; Tue, 28 Sep 2021 18:23:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0AB6760F70 for ; Tue, 28 Sep 2021 18:23:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242175AbhI1SYj (ORCPT ); Tue, 28 Sep 2021 14:24:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242230AbhI1SY0 (ORCPT ); Tue, 28 Sep 2021 14:24:26 -0400 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F3D0C06174E; Tue, 28 Sep 2021 11:22:44 -0700 (PDT) Received: by mail-pl1-x629.google.com with SMTP id bb10so14807836plb.2; Tue, 28 Sep 2021 11:22:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=T26BgQWn/9mqdmIjsWawB6f+e1Yr/GOlus2xPhKaou0=; b=RhuXW/WrvdSvfA58ICAu0BTKmIcI5wLVZB6iD8y8Wx+S1F5LwMRHCB0mieSVudR9U2 Hmdwdxke9QyW/2z9Amt1BKbC1E9JjfSKObvhoH2+eVGxShWx0iIb/gz0rE1NDsqMBxSO ufsONr358HP5fTCK2y1RQcSt33qerPulnSWUZBCcbibXBu/SHvEB9Tz2T6J0vHsmF8eO 0Te7SJIzgXGLLMz6PTIrTctBdVPmruGQ8WiZZJc+S6WGZ2LdxEFrVqJwhMFLRslqAWAR 7UbfA4eq9eECcKJ08qSwzxncTpug2P3x5HX4JE+nkK//p7fvNBHXazTfBNxK8v5OoVZj 0GSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=T26BgQWn/9mqdmIjsWawB6f+e1Yr/GOlus2xPhKaou0=; b=CUu0coJXG6DCNF7cvvBSK03iUrQioNpXy5X5rMa+hfK4QiLbJRuMLMUHy/jSNFjnSE +RflmStQipksT5XYI8r6Fo3Se5lt8tXMNrGGcjvsxldROddZV9Bmc0/jrxqI6c4zCqgS TMEoZI0H22KnYCLugbRVcHfUo4aoVIQKL/HbniT+2UlNZNz/XQJTvOSbHJsJ2qMwHfcE CepS5MEX+o/NnR23X9uOxY42ftykGUngYofWtC5fjEcF6Xu0s1AWliNoK/YhXRx+Z+xm E+xH3/Qxn/HgPpzEjtmlvyJqc7y/vpMoL4Fz0fOa+MM+B9ERVh2GVaUILlvN5jSE+avg na/Q== X-Gm-Message-State: AOAM531DniQyLiAUtSZTj2PmGRq/NTmXSFwmqTrPTFiXPo+O2Mwzlvem Hd5SjAAw4HMPKSV63/TIcL9jced+4+4= X-Google-Smtp-Source: ABdhPJyOgDfKEUX2wbPsA3GK0AJrY9DGZLrVCNUZ2532DUtclW4D9RAcuPdX7AkDmsWUn3PocI0sCA== X-Received: by 2002:a17:902:c3c5:b0:13d:efe4:c10a with SMTP id j5-20020a170902c3c500b0013defe4c10amr6402436plj.54.1632853363287; Tue, 28 Sep 2021 11:22:43 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x19sm20855288pfn.105.2021.09.28.11.22.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 11:22:42 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v3 14/14] irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE Date: Tue, 28 Sep 2021 11:21:39 -0700 Message-Id: <20210928182139.652896-15-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210928182139.652896-1-f.fainelli@gmail.com> References: <20210928182139.652896-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The documentation refers to "compstr" when we have the argument named "compat", fix the typo. Signed-off-by: Florian Fainelli --- include/linux/irqchip.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/irqchip.h b/include/linux/irqchip.h index 67351aac65ef..ccf32758ea85 100644 --- a/include/linux/irqchip.h +++ b/include/linux/irqchip.h @@ -23,7 +23,7 @@ * * @name: name that must be unique across all IRQCHIP_DECLARE of the * same file. - * @compstr: compatible string of the irqchip driver + * @compat: compatible string of the irqchip driver * @fn: initialization function */ #define IRQCHIP_DECLARE(name, compat, fn) OF_DECLARE_2(irqchip, name, compat, fn)