From patchwork Sun Oct 3 08:31:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54742C4167B for ; Sun, 3 Oct 2021 08:32:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2003A61B50 for ; Sun, 3 Oct 2021 08:32:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229916AbhJCIds (ORCPT ); Sun, 3 Oct 2021 04:33:48 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37914 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229875AbhJCIds (ORCPT ); Sun, 3 Oct 2021 04:33:48 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 5FA99C90EC; Sun, 3 Oct 2021 08:31:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249920; bh=zmfazeMicj6zMjUJKJReCRNKJm8RWvDgpzfVzDxY7O8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=rBRihO+oqeAxJC5HfS0CbqS7qaV/Dej4lQKdpixvPFx0i4bOSjCAbaQqDYFFxoVj7 F50xqCAChRmWMzvx4jl+ypPHAeQeIWjpLq3EORnfkvP93pV4y4t3ZvNQguw/6+yrs8 5kG/qlEEr7PqJbY2K4waH/m/D+pg7/dL8To3ZB0Q= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Konrad Dybcio , AngeloGioacchino Del Regno , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/11] clk: qcom: add select QCOM_GDSC for SM6350 Date: Sun, 3 Oct 2021 10:31:24 +0200 Message-Id: <20211003083141.613509-2-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org QCOM_GDSC is needed for the gcc driver to probe. Fixes: 131abae905df ("clk: qcom: Add SM6350 GCC driver") Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- drivers/clk/qcom/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 0a5596797b93..9ef007b3cf9b 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -564,6 +564,7 @@ config SM_GCC_6125 config SM_GCC_6350 tristate "SM6350 Global Clock Controller" + select QCOM_GDSC help Support for the global clock controller on SM6350 devices. Say Y if you want to use peripheral devices such as UART, From patchwork Sun Oct 3 08:31:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65D3EC4167D for ; Sun, 3 Oct 2021 08:32:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B30F61B50 for ; Sun, 3 Oct 2021 08:32:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229937AbhJCIdu (ORCPT ); Sun, 3 Oct 2021 04:33:50 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37924 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229885AbhJCIds (ORCPT ); Sun, 3 Oct 2021 04:33:48 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 5CB29C90F6; Sun, 3 Oct 2021 08:32:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249920; bh=cPDamchJW0mjeP0iNR4px+LzJKosMc9BhKEa6fAGkEw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=BgwdoVZK00Phlxx9j2cPArOU41IJLf+WuzAx8sBtrjmL6KL36eIkM0zvD0IibkcS+ QuDda7ArDPaIVwuIp2NwnWELPCOK3nQTCZvOlYaBySuTq8OxpBm4CAvfDJGJTEFHGD NPDkr6BBaHO5CzQKJz5okoqgNDjWivQhhnNLabaA= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Liam Girdwood , Mark Brown , Rob Herring , David Collins , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 02/11] dt-bindings: regulator: qcom,rpmh: Add compatible for PM6350 Date: Sun, 3 Oct 2021 10:31:25 +0200 Message-Id: <20211003083141.613509-3-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatible string for pm6350 used in sm6350 boards. Signed-off-by: Luca Weiss --- .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index 34de38377aa6..b959504e0ea4 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -35,6 +35,7 @@ description: | PMIC. Supported regulator node names are For PM6150, smps1 - smps5, ldo1 - ldo19 For PM6150L, smps1 - smps8, ldo1 - ldo11, bob + For PM6350, smps1 - smps5, ldo1 - ldo22 For PM7325, smps1 - smps8, ldo1 - ldo19 For PM8005, smps1 - smps4 For PM8009, smps1 - smps2, ldo1 - ldo7 @@ -52,6 +53,7 @@ properties: enum: - qcom,pm6150-rpmh-regulators - qcom,pm6150l-rpmh-regulators + - qcom,pm6350-rpmh-regulators - qcom,pm7325-rpmh-regulators - qcom,pm8005-rpmh-regulators - qcom,pm8009-rpmh-regulators From patchwork Sun Oct 3 08:31:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 056BFC433F5 for ; Sun, 3 Oct 2021 08:33:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E1E80619EC for ; Sun, 3 Oct 2021 08:33:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229960AbhJCIdw (ORCPT ); Sun, 3 Oct 2021 04:33:52 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37936 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229935AbhJCIdt (ORCPT ); Sun, 3 Oct 2021 04:33:49 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 43543C9102; Sun, 3 Oct 2021 08:32:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249922; bh=G17NOyGRQ5zv1zY+Q3IHyS6O/yOJu2ASjYm52OSRccs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=F9isygwMDoWwKRBfrrye/vE5j0Qy6uwjDmVw4v0tcsSJ6MScjgBLHrr1COAX60Sic YXYtcJKGecRE6dUUBt+drUqqIANzgZ7EgFjyfh7yr7veMjxThkBHqyOO0EGcSsJmr8 z/K7UlzoI+i0c0dEtE6MiCgsAsJYb1uJV6NNKthE= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Liam Girdwood , Mark Brown , linux-kernel@vger.kernel.org Subject: [PATCH 03/11] regulator: qcom-rpmh: Add PM6350 regulators Date: Sun, 3 Oct 2021 10:31:26 +0200 Message-Id: <20211003083141.613509-4-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the configuration for pm6350 regulators. The supplies are not known so use dummy ones for now. Additionally leave out configuration of smps3 - smps5 and ldo17 as these are not configured in the downstream kernel. Signed-off-by: Luca Weiss --- If anybody has a datasheet for pm6350 lying around, please double check if the configuration is correct, I'm relatively sure it is correct though as the driver doesn't probe when e.g. pldo instead of nldo is configured. drivers/regulator/qcom-rpmh-regulator.c | 32 +++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index 7f458d510483..6ea111bccadb 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -1047,6 +1047,34 @@ static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pm6350_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"), + /* smps3 - smps5 not configured */ + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3"), + RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), + RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5"), + RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6"), + RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7"), + RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l8"), + RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9"), + RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"), + RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11"), + RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, "vdd-l12"), + RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"), + RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l14"), + RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"), + RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l16"), + /* ldo17 not configured */ + RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l18"), + RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"), + RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"), + RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"), + RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, "vdd-l22"), +}; + static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"), @@ -1201,6 +1229,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { .compatible = "qcom,pm6150l-rpmh-regulators", .data = pm6150l_vreg_data, }, + { + .compatible = "qcom,pm6350-rpmh-regulators", + .data = pm6350_vreg_data, + }, { .compatible = "qcom,pmc8180-rpmh-regulators", .data = pm8150_vreg_data, From patchwork Sun Oct 3 08:31:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532629 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBC9EC433EF for ; Sun, 3 Oct 2021 08:33:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A349C619E9 for ; Sun, 3 Oct 2021 08:33:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229982AbhJCIdy (ORCPT ); Sun, 3 Oct 2021 04:33:54 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37948 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229809AbhJCIdv (ORCPT ); Sun, 3 Oct 2021 04:33:51 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 7371AC910E; Sun, 3 Oct 2021 08:32:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249923; bh=QweKY5MA+C4H7ytFhPQeyJb1i/Tq++4mbxAZu/ezFn4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Oo0/wB+xOkfYuocKVMuAWwWM+FyVtN7AWqOtAbZ8KRs3xGiMGOr8vPce5kmPO4Pft DWXqgJyy7Bm/oAI59iePjXnhG0gpkJzXOOc1o5YOPqhLeDcDA4AtClS6ZLJJsmAGNF ln3A7UePE+rYr4iajuF2z2juEbeV9SeLZ6uI0IOY= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/11] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for PM6350 Date: Sun, 3 Oct 2021 10:31:27 +0200 Message-Id: <20211003083141.613509-5-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pmic-gpio compatible string for pm6350 pmic. Signed-off-by: Luca Weiss --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 9bd01db37dcd..1e5153f10ca1 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -21,6 +21,7 @@ properties: - qcom,pm660l-gpio - qcom,pm6150-gpio - qcom,pm6150l-gpio + - qcom,pm6350-gpio - qcom,pm7325-gpio - qcom,pm8005-gpio - qcom,pm8008-gpio @@ -103,6 +104,7 @@ $defs: this subnode. Valid pins are - gpio1-gpio10 for pm6150 - gpio1-gpio12 for pm6150l + - gpio1-gpio9 for pm6350 - gpio1-gpio10 for pm7325 - gpio1-gpio4 for pm8005 - gpio1-gpio2 for pm8008 From patchwork Sun Oct 3 08:31:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8892C4332F for ; Sun, 3 Oct 2021 08:32:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1DFA61350 for ; Sun, 3 Oct 2021 08:32:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229967AbhJCIdw (ORCPT ); Sun, 3 Oct 2021 04:33:52 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37936 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229940AbhJCIdv (ORCPT ); Sun, 3 Oct 2021 04:33:51 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 4A762C9115; Sun, 3 Oct 2021 08:32:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249923; bh=Dnqi2pXbnY/JNzz6QlVr9FCTaGk42dEDlrk2dXM7fDo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ixe/6P/RXoBLCQNiexM1gGA3jlZKR6RMnA14fuv3xs+pS/xJF6omVwHD+TBVU1z9a Iw+xYKxSIqt1kIAUFivf6LmAVV1zfklXegeIWveXE8iAN2it1MhZQaxXfe9Ux0Df5h 8TvS15mmYhzc6rLfXh9NpG/xIJ4W3yHTW8EKzi2w= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Bjorn Andersson , Andy Gross , Linus Walleij , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/11] pinctrl: qcom: spmi-gpio: Add compatible for PM6350 Date: Sun, 3 Oct 2021 10:31:28 +0200 Message-Id: <20211003083141.613509-6-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for the GPIO controller in the pm6350 PMIC. Signed-off-by: Luca Weiss --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 98bf0e2a2a8d..55a9227a87fd 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1110,6 +1110,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pm660l-gpio", .data = (void *) 12 }, { .compatible = "qcom,pm6150-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm6150l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pm6350-gpio", .data = (void *) 9 }, { .compatible = "qcom,pm7325-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8005-gpio", .data = (void *) 4 }, { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, From patchwork Sun Oct 3 08:31:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE7F3C433EF for ; Sun, 3 Oct 2021 08:33:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 980D161B3E for ; Sun, 3 Oct 2021 08:33:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229948AbhJCIfN (ORCPT ); Sun, 3 Oct 2021 04:35:13 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37964 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229968AbhJCIdx (ORCPT ); Sun, 3 Oct 2021 04:33:53 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 385E8C910E; Sun, 3 Oct 2021 08:32:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249925; bh=5A+sleW25CkdHFJbndlf92vvIwLf7Sdoa5EtZ0V4lzo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ds6kdI+Pe3uhtp7jkL/JFyfj6agF4cPoTk77deqnTysYVfVC3TtOVFNq/YcQmkH+O AcLl+7e22UPrvvCTbXx9BqsPpjmwrQ4sXOdd7wzxK/CAEmIOsvcOHpu7+5cBODGenz jHBvyeQv13MHXuI7aOLmIHmrZxk83SswNI2oKLrY= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/11] arm64: dts: qcom: Add PM6350 PMIC Date: Sun, 3 Oct 2021 10:31:29 +0200 Message-Id: <20211003083141.613509-7-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PM6350 is used in SM6350 and provides similar functionality to other Qualcomm PMICs. Add the pon node with power & volume key and the gpios. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pm6350.dtsi | 54 ++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm6350.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm6350.dtsi b/arch/arm64/boot/dts/qcom/pm6350.dtsi new file mode 100644 index 000000000000..c5d85064562b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6350.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Luca Weiss + */ + +#include + +&spmi_bus { + pmic@0 { + compatible = "qcom,pm6350", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm6350_pon: pon@800 { + compatible = "qcom,pm8998-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pm6350_pwrkey: pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; + + pm6350_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; + }; + + pm6350_gpios: gpios@c000 { + compatible = "qcom,pm6350-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@1 { + compatible = "qcom,pm6350", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Sun Oct 3 08:31:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532635 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D612C4321E for ; Sun, 3 Oct 2021 08:33:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0AF6A61350 for ; Sun, 3 Oct 2021 08:33:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229985AbhJCIfO (ORCPT ); Sun, 3 Oct 2021 04:35:14 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37968 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229951AbhJCIdy (ORCPT ); Sun, 3 Oct 2021 04:33:54 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id E8C92C9101; Sun, 3 Oct 2021 08:32:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249926; bh=HG/XwGTM9gGLxOPy8XHZzg4WGcWzyHdCYnENX4HY7Wo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=gj/VDxYetLLRvgYF3jMILDN8F10iV3/NoG3O1heTtkttP58FnnI7d+1ZtrG33DNK2 njL13YsvrAIFdvjifPPG7JybdAXLV09wOWWwc9UjT2dulJs+dRNoDbJje5S6Bj6Jh2 JvF/F+LawSjymuYLdR7JDxP4E5vZwxb0mxAtBt98= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/11] arm64: dts: qcom: sm6350: add debug uart Date: Sun, 3 Oct 2021 10:31:30 +0200 Message-Id: <20211003083141.613509-8-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the necessary nodes for the debug uart on SM6350. Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 ++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 95e69d9f8657..630a76e740f8 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -445,6 +445,30 @@ opp-384000000 { }; }; + qupv3_id_1: geniqup@9c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x9c0000 0x0 0x2000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + #address-cells = <2>; + #size-cells = <2>; + iommus = <&apps_smmu 0x4c3 0x0>; + ranges; + status = "disabled"; + + uart2: serial@98c000 { + compatible = "qcom,geni-debug-uart"; + reg = <0 0x98c000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart2_default>; + interrupts = ; + status = "disabled"; + }; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -672,6 +696,13 @@ tlmm: pinctrl@f100000 { interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&tlmm 0 0 157>; + + qup_uart2_default: qup-uart2-default { + mux { + pins = "gpio25", "gpio26"; + function = "qup13_f2"; + }; + }; }; apps_smmu: iommu@15000000 { From patchwork Sun Oct 3 08:31:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FD1BC4332F for ; Sun, 3 Oct 2021 08:33:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8656D619E9 for ; Sun, 3 Oct 2021 08:33:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229989AbhJCIfP (ORCPT ); Sun, 3 Oct 2021 04:35:15 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37980 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229999AbhJCId4 (ORCPT ); Sun, 3 Oct 2021 04:33:56 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id DF373C9115; Sun, 3 Oct 2021 08:32:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249928; bh=X4Qneg2lzExo3bu3en8DYD1jCtqON6mIXHXBLOUGwvE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Cnvzqi51zafi6/EOgB7bZLu6ltQgSr+5n5CPZcZKQJyT7KWHZPqdf92D8vR648Es5 +kq5RcO/j7lEOm5f8OrZ22DPlRttrOtfhY1tj6nkMQvA4UaD1ocwCMYPBJr8KeaoLM 83iPBX7+THEZqGOqy0eFab4vvMdR5/j/EkZC5Tq4= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Rob Herring , Mark Brown , Viresh Kumar , Srinivas Kandagatla , Sebastian Reichel , Hector Martin , Sudeep Holla , Vinod Koul , Konrad Dybcio , Lorenzo Pieralisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/11] dt-bindings: arm: cpus: Add Kryo 570 CPUs Date: Sun, 3 Oct 2021 10:31:31 +0200 Message-Id: <20211003083141.613509-9-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document Kryo 570 CPUs found in Qualcomm Snapdragon 750G (SM7225). Signed-off-by: Luca Weiss --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 897eec887e5a..1e530391f355 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -172,6 +172,7 @@ properties: - qcom,kryo468 - qcom,kryo485 - qcom,kryo560 + - qcom,kryo570 - qcom,kryo685 - qcom,scorpion From patchwork Sun Oct 3 08:31:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 151FDC433F5 for ; Sun, 3 Oct 2021 08:33:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04684619EC for ; Sun, 3 Oct 2021 08:33:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230004AbhJCIfP (ORCPT ); Sun, 3 Oct 2021 04:35:15 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:37988 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230001AbhJCId5 (ORCPT ); Sun, 3 Oct 2021 04:33:57 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id CBAD1C9118; Sun, 3 Oct 2021 08:32:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249929; bh=RJQLF6oLD/LA6HJd8wF9mMr/P17NktfBH/lE5wJ42IE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=uatboYMRq7/13F9IO4U1y0wSY0pUrk4a0DkKGisupMOwCeWFkGml4GSNQmZ+omHgn SOi2EnQK7prA2lPwDZb5bgDe4LguRC2MVF3z8XhO+NuX1kITX1W0jbvcc7snn+W1ij evfYr/K/hlyKD+3Q1/IS350ZyLBes8lTMdegiK+c= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/11] dt-bindings: arm: qcom: Document sm7225 and fairphone,fp4 board Date: Sun, 3 Oct 2021 10:31:32 +0200 Message-Id: <20211003083141.613509-10-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add binding documentation for Fairphone 4 smartphone which is based on Snapdragon 750G (sm7225). Signed-off-by: Luca Weiss --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 880ddafc634e..540dfafa3418 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -44,6 +44,7 @@ description: | sdm660 sdm845 sdx55 + sm7225 sm8150 sm8250 sm8350 @@ -217,6 +218,11 @@ properties: - qcom,sa8155p-adp - const: qcom,sa8155p + - items: + - enum: + - fairphone,fp4 + - const: qcom,sm7225 + - items: - enum: - qcom,sm8150-mtp From patchwork Sun Oct 3 08:31:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532639 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F1A5C433FE for ; Sun, 3 Oct 2021 08:33:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 58235619EC for ; Sun, 3 Oct 2021 08:33:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229968AbhJCIfQ (ORCPT ); Sun, 3 Oct 2021 04:35:16 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:38004 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230009AbhJCId7 (ORCPT ); Sun, 3 Oct 2021 04:33:59 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id A19B8C911A; Sun, 3 Oct 2021 08:32:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249931; bh=iuveFepQM3H35Hh6TKbNGjzPwYLbYkZQYJ3iEvxp2fA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=iCGiEkbwSaMqFDq3bUzBC66sODhABMXKxOX/pQfzT+JDdLqe4tc1iLVDWJj9m/F4f yS2R6jbz02XWZiKiqFlZObR7oyLpV0/sk/FEAUZXG0jkWq6eotniFZWs04S+9jfOzq LYTXPl0v8SbthRUMOr0pz38hVQKULI4noBMp3bB4= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/11] arm64: dts: qcom: Add SM7225 device tree Date: Sun, 3 Oct 2021 10:31:33 +0200 Message-Id: <20211003083141.613509-11-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Snapdragon 750G (sm7225) is software-wise very similar to Snapdragon 690 (sm6350) with minor differences in clock speeds and as added here, it uses the Kryo 570 instead of Kryo 560. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm7225.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm7225.dtsi diff --git a/arch/arm64/boot/dts/qcom/sm7225.dtsi b/arch/arm64/boot/dts/qcom/sm7225.dtsi new file mode 100644 index 000000000000..7b2a002ca7ff --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7225.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Luca Weiss + */ + +#include "sm6350.dtsi" + +/* SM7225 uses Kryo 570 instead of Kryo 560 */ +&CPU0 { compatible = "qcom,kryo570"; }; +&CPU1 { compatible = "qcom,kryo570"; }; +&CPU2 { compatible = "qcom,kryo570"; }; +&CPU3 { compatible = "qcom,kryo570"; }; +&CPU4 { compatible = "qcom,kryo570"; }; +&CPU5 { compatible = "qcom,kryo570"; }; +&CPU6 { compatible = "qcom,kryo570"; }; +&CPU7 { compatible = "qcom,kryo570"; }; From patchwork Sun Oct 3 08:31:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12532627 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A070EC433EF for ; Sun, 3 Oct 2021 08:32:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8CB2461B45 for ; Sun, 3 Oct 2021 08:32:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229935AbhJCIeD (ORCPT ); Sun, 3 Oct 2021 04:34:03 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:38012 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230083AbhJCIeC (ORCPT ); Sun, 3 Oct 2021 04:34:02 -0400 Received: from g550jk.portal.nstrein.ns.nl (unknown [145.15.244.215]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id E9E4CC911C; Sun, 3 Oct 2021 08:32:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633249934; bh=xrjVmZaNGXmnKhnfR3B6j98mRtdc4nBRFLHvoMvZRSo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Vm11V5fGfVS0qMu5Xi5bHdgj1ik7bzxsNhJHwPDqEM2d5H43xuxKXYt/fBOJ0DIRI t+XKHPXB+bDCwO748jO7EvKMsQOSmucD89iKye0TocKMQ3leC++qnSbdfzY9a/XwAp PxiW81CE6yIOqK9RWaQqOp5YIPQgJ6XZ4uVaf9MY= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/11] arm64: dts: qcom: sm7225: Add device tree for Fairphone 4 Date: Sun, 3 Oct 2021 10:31:34 +0200 Message-Id: <20211003083141.613509-12-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003083141.613509-1-luca@z3ntu.xyz> References: <20211003083141.613509-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device tree for the Fairphone 4 smartphone which is based on Snapdragon 750G (sm7225) which is basically sm6350. Currently supported are UART, physical buttons (power & volume), screen (based on simple-framebuffer set up by the bootloader), regulators and USB. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sm7225-fairphone-fp4.dts | 322 ++++++++++++++++++ 2 files changed, 323 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 59ece83abad0..9ed189e9c197 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -85,6 +85,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-beryllium.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-microsoft-surface-duo.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts new file mode 100644 index 000000000000..6d509b2bdabe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Luca Weiss + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "sm7225.dtsi" +#include "pm6350.dtsi" + +/ { + model = "Fairphone 4"; + compatible = "fairphone,fp4", "qcom,sm7225"; + + /* required for bootloader to select correct board */ + qcom,msm-id = <434 0x10000>, <459 0x10000>; + qcom,board-id = <8 32>; + + aliases { + serial0 = &uart2; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + framebuffer0: framebuffer@a000000 { + compatible = "simple-framebuffer"; + reg = <0 0xa0000000 0 (2340 * 1080 * 4)>; + width = <1080>; + height = <2340>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pins>; + + volume-up { + label = "volume_up"; + linux,code = ; + gpios = <&pm6350_gpios 2 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&apps_rsc { + pm6350-rpmh-regulators { + compatible = "qcom,pm6350-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s1a: smps1 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; + }; + + vreg_s2a: smps2 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <2048000>; + }; + + vreg_l2a: ldo2 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l3a: ldo3 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l4a: ldo4 { + regulator-min-microvolt = <352000>; + regulator-max-microvolt = <801000>; + regulator-initial-mode = ; + }; + + vreg_l5a: ldo5 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l6a: ldo6 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l7a: ldo7 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l8a: ldo8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l9a: ldo9 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + vreg_l11a: ldo11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l12a: ldo12 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l13a: ldo13 { + regulator-min-microvolt = <570000>; + regulator-max-microvolt = <650000>; + regulator-initial-mode = ; + }; + + vreg_l14a: ldo14 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = ; + }; + + vreg_l15a: ldo15 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + vreg_l16a: ldo16 { + regulator-min-microvolt = <830000>; + regulator-max-microvolt = <921000>; + regulator-initial-mode = ; + }; + + vreg_l18a: ldo18 { + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <1049000>; + regulator-initial-mode = ; + }; + + vreg_l19a: ldo19 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + vreg_l20a: ldo20 { + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <801000>; + regulator-initial-mode = ; + }; + + vreg_l21a: ldo21 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <825000>; + regulator-initial-mode = ; + }; + + vreg_l22a: ldo22 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + }; + + pm6150l-rpmh-regulators { + compatible = "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_s8e: smps8 { + regulator-min-microvolt = <313000>; + regulator-max-microvolt = <1395000>; + }; + + vreg_l1e: ldo1 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l2e: ldo2 { + regulator-min-microvolt = <1170000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + vreg_l3e: ldo3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1299000>; + regulator-initial-mode = ; + }; + + vreg_l4e: ldo4 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l5e: ldo5 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l6e: ldo6 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l7e: ldo7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8e: ldo8 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l9e: ldo9 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l10e: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + vreg_l11e: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + vreg_bob: bob { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <5492000>; + regulator-initial-mode = ; + regulator-allow-bypass; + }; + }; +}; + +&pm6350_gpios { + gpio_keys_pins: gpio-keys-pins { + pinconf { + pins = "gpio2"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-pull-up; + input-enable; + power-source = <0>; + }; + }; +}; + +&pm6350_resin { + status = "okay"; + linux,code = ; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <13 4>, <56 2>; +}; + +&uart2 { + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + maximum-speed = "super-speed"; + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + status = "okay"; + + vdd-supply = <&vreg_l18a>; + vdda-pll-supply = <&vreg_l2a>; + vdda-phy-dpdm-supply = <&vreg_l3a>; +}; + +&usb_1_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l22a>; + vdda-pll-supply = <&vreg_l16a>; +};