From patchwork Tue Oct 5 03:25:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12535431 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B749C433EF for ; Tue, 5 Oct 2021 03:23:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7BD3561526 for ; Tue, 5 Oct 2021 03:23:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231651AbhJEDZl (ORCPT ); Mon, 4 Oct 2021 23:25:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231553AbhJEDZk (ORCPT ); Mon, 4 Oct 2021 23:25:40 -0400 Received: from mail-ot1-x331.google.com (mail-ot1-x331.google.com [IPv6:2607:f8b0:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA41FC061745 for ; Mon, 4 Oct 2021 20:23:50 -0700 (PDT) Received: by mail-ot1-x331.google.com with SMTP id 5-20020a9d0685000000b0054706d7b8e5so24239687otx.3 for ; Mon, 04 Oct 2021 20:23:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5F9P+rsu48FUbDV9TizntpJNt5FGTMagwmpzztCYYIw=; b=Vgnf2JNJ6OouXm7x/ldZOtSiEBU9yaIGBuePc25n9LYJz7oTjHqtLMbpOy+DiE8yIC +bCLgob2aVTyOTtF+ltOjjwjX0Nro3SOfDRrylKn17hldGv6KKiQIqacFJumID5GcZEN cjoX0u1fz/8xwfXhSSISiSmb/8YZIO2o9zcqU6QwgEPzSfnnMK6kalPihkksXoEyBdjq 0U+GG1xvEb89Q9uSNygFIdMIRKA8BX48trA5bdmoeXsOD8D+jHKmJ3z5gxQlLN4dgP+L bRmtdhiTa0mCO6vvbhL6mU4f53vxCvA6973/kQYNdgKqNQ7Dz5heVCyNOKtZYESt41Xn XCww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5F9P+rsu48FUbDV9TizntpJNt5FGTMagwmpzztCYYIw=; b=5UXUyYq/y3y7CqhI71fUmFEDRrGu76fa8AsBaPseeNovWOjZaXBTWRIsG9bkf0CtIa emjfHAM34TDeiMErsgrjuJh03+QLzxu6XSBuzMnzFwuHv14Q2Jt2YN5Mz5TVjb4i43M5 gVx48294RAKx65jLDcXcmkdzs1Ogbw5OA4rVQPpcTs5TKnR0dgkAs48GHHzddYCThPSW peUujwhKReRt13KL4YKygzBBHeQD5BmPDeRQiJoKWw5BPf1e11cYuv5tVgUDJ2j4kPHi 29PDxL8vAx90s1PHdb3OMpYDyjVHfll1AdgCRq3aFMQFkPhfDJnkUbN4O2UsAl8v2AnK K0Bg== X-Gm-Message-State: AOAM533cPaTzBDwOx5/fOEmfOVHUexGuqFsmzz0Clzw47vTp9nnG/VGI q5cuqaLBQZJhhRR0Ns3UPZAUjw== X-Google-Smtp-Source: ABdhPJwlAARTmLd3RxM8TmQEU67BvdMOr6403mm2vbc3R957cl9jAHBfr0HIn7uK4/BRRaB/LZkTEA== X-Received: by 2002:a05:6830:22d6:: with SMTP id q22mr11873976otc.344.1633404230029; Mon, 04 Oct 2021 20:23:50 -0700 (PDT) Received: from localhost.localdomain ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id j4sm3111955oia.56.2021.10.04.20.23.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 20:23:49 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Thara Gopinath , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/4] dt-bindings: thermal: qcom: add HC variant of adc-thermal monitor bindings Date: Mon, 4 Oct 2021 20:25:28 -0700 Message-Id: <20211005032531.2251928-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20211005032531.2251928-1-bjorn.andersson@linaro.org> References: <20211005032531.2251928-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The HC generation of the ADC Thermal Monitor is quite similar to the 5th generation, but differs in valid values for a few properties. Create a new binding for the HC version of the hardware, rather than sprinkle conditionals throughout the existing binding. Signed-off-by: Bjorn Andersson Reviewed-by: Rob Herring --- Changes since v2: - None .../bindings/thermal/qcom-spmi-adc-tm-hc.yaml | 149 ++++++++++++++++++ 1 file changed, 149 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml new file mode 100644 index 000000000000..8273ac55b63f --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml @@ -0,0 +1,149 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm's SPMI PMIC ADC HC Thermal Monitoring +maintainers: + - Dmitry Baryshkov + +properties: + compatible: + const: qcom,spmi-adc-tm-hc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#thermal-sensor-cells": + const: 1 + description: + Number of cells required to uniquely identify the thermal sensors. Since + we have multiple sensors this is set to 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + qcom,avg-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of samples to be used for measurement. + enum: + - 1 + - 2 + - 4 + - 8 + - 16 + default: 1 + + qcom,decimation: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This parameter is used to decrease ADC sampling rate. + Quicker measurements can be made by reducing decimation ratio. + enum: + - 256 + - 512 + - 1024 + default: 1024 + +patternProperties: + "^([-a-z0-9]*)@[0-7]$": + type: object + description: + Represent one thermal sensor. + + properties: + reg: + description: Specify the sensor channel. There are 8 channels in PMIC5's ADC TM + minimum: 0 + maximum: 7 + + io-channels: + description: + From common IIO binding. Used to pipe PMIC ADC channel to thermal monitor + + qcom,ratiometric: + $ref: /schemas/types.yaml#/definitions/flag + description: + Channel calibration type. + If this property is specified VADC will use the VDD reference + (1.875V) and GND for channel calibration. If property is not found, + channel will be calibrated with 0V and 1.25V reference channels, + also known as absolute calibration. + + qcom,hw-settle-time-us: + description: Time between AMUX getting configured and the ADC starting conversion. + enum: [0, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, 6000, 8000, 10000] + + qcom,pre-scaling: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: Used for scaling the channel input signal before the + signal is fed to VADC. The configuration for this node is to know the + pre-determined ratio and use it for post scaling. It is a pair of + integers, denoting the numerator and denominator of the fraction by + which input signal is multiplied. For example, <1 3> indicates the + signal is scaled down to 1/3 of its value before ADC measurement. If + property is not found default value depending on chip will be used. + items: + - const: 1 + - enum: [ 1, 3, 4, 6, 20, 8, 10 ] + + required: + - reg + - io-channels + + additionalProperties: + false + +required: + - compatible + - reg + - interrupts + - "#address-cells" + - "#size-cells" + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include + #include + spmi_bus { + #address-cells = <1>; + #size-cells = <0>; + pm8998_adc: adc@3100 { + reg = <0x3100>; + compatible = "qcom,spmi-adc-rev2"; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + /* Other propreties are omitted */ + adc-chan@4c { + reg = ; + }; + }; + + pm8998_adc_tm: adc-tm@3400 { + compatible = "qcom,spmi-adc-tm-hc"; + reg = <0x3400>; + interrupts = <0x2 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + thermistor@1 { + reg = <1>; + io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + }; + }; +... From patchwork Tue Oct 5 03:25:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12535433 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE5C4C433F5 for ; Tue, 5 Oct 2021 03:23:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C354461504 for ; Tue, 5 Oct 2021 03:23:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231688AbhJEDZm (ORCPT ); Mon, 4 Oct 2021 23:25:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231649AbhJEDZl (ORCPT ); Mon, 4 Oct 2021 23:25:41 -0400 Received: from mail-ot1-x32e.google.com (mail-ot1-x32e.google.com [IPv6:2607:f8b0:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3AEBC061755 for ; Mon, 4 Oct 2021 20:23:51 -0700 (PDT) Received: by mail-ot1-x32e.google.com with SMTP id c6-20020a9d2786000000b005471981d559so24167143otb.5 for ; Mon, 04 Oct 2021 20:23:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SvFCR87aiu5ds1ai63pEGRyATYSJy34i9VrTijqqATk=; b=vXNxhAPVm30L6Xwd7l1KDcxjU3BcId0umPpRZ+QRXrcRF/NNweADvP03yj3W16MmqC t+TU6TUsj3/p6FhOBj1Ywr8CI3d/EnJjW+QbRZMUlrT/JHQLY/rPw0Cp0oPoVfc0qIxy 5ysF0+II44twkSwSjQ66eJNFuNcWHhtnJ8l35QnrHCVgZ/rPxk2+Tr2/zwRDQ7xbQMJx tNqwefRDwAFJDYTxHxDNlfP/piepyb/GlMnhZjlirSC5ZkkOciIZfv1hJeDU8/gxCffQ rfXb2a+B2ICQYVYGQaAEtBNTF7rO0B8cOd41MeBZSmWHgMbBq0i+o28Nxn5wug6vdv6N S3IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SvFCR87aiu5ds1ai63pEGRyATYSJy34i9VrTijqqATk=; b=2HXlXwxvBkLiAC1+gQKrRrWQOvqSmzIgpQ08LCWQfsmzKeBAnobfA2/6VOIk5smBVC 3fLTzB56xOJH3AISJ2UdgfSyKsoPqJf3YcIIq09wPahq6siB3Kn0Tg4ygxoZEuzzYtM1 bpizmI5d6sUN+TptD9bebp9uoxiqtnzDSWOjznQbVjXeKkbfTM3K6hAQq4+rLKAeHCxE DZK+cib6ZLJtrqIeRHbQpeg6Jl6/vWXXg7U3RDSBS9Yj9LYyakYf/au9IvIEl2vsqMTh ulHR/JVJoQq7GJZbJkV8m5zgra+gOF2E7I2xG4GNQMowyHrEfd/BjrFFT7EyFSJMVveZ IfIw== X-Gm-Message-State: AOAM5310nrmLbUuJEytSBD3HKlKLY1fmdykncZHWC1hZ3z58EDGZ1ozi 6Ha8xzEMqPuh/eU9U/tPgaoqdA== X-Google-Smtp-Source: ABdhPJxSSslvoW0rwWInaRPbH4TQYAA0/DWTIUmmyUTD8TNYQ48VnwLlvqg+BiZluVnaq9t2DjPRdQ== X-Received: by 2002:a05:6830:793:: with SMTP id w19mr11859830ots.23.1633404231018; Mon, 04 Oct 2021 20:23:51 -0700 (PDT) Received: from localhost.localdomain ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id j4sm3111955oia.56.2021.10.04.20.23.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 20:23:50 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Thara Gopinath , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] thermal/drivers/qcom/spmi-adc-tm5: Add support for HC variant Date: Mon, 4 Oct 2021 20:25:29 -0700 Message-Id: <20211005032531.2251928-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20211005032531.2251928-1-bjorn.andersson@linaro.org> References: <20211005032531.2251928-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The variant of the ADC Thermal Monitor block found in e.g. PM8998 is "HC", add support for this variant to the ADC TM5 driver in order to support using VADC channels as thermal_zones on SDM845 et al. Signed-off-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov --- Changes since v2: - Dropped conditional return ret right before unconditionatl return ret; drivers/thermal/qcom/qcom-spmi-adc-tm5.c | 41 +++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c index 8494cc04aa21..824671cf494a 100644 --- a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c +++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c @@ -82,6 +82,7 @@ struct adc_tm5_data { const u32 full_scale_code_volt; unsigned int *decimation; unsigned int *hw_settle; + bool is_hc; }; enum adc_tm5_cal_method { @@ -146,6 +147,14 @@ static const struct adc_tm5_data adc_tm5_data_pmic = { 64000, 128000 }, }; +static const struct adc_tm5_data adc_tm_hc_data_pmic = { + .full_scale_code_volt = 0x70e4, + .decimation = (unsigned int []) { 256, 512, 1024 }, + .hw_settle = (unsigned int []) { 0, 100, 200, 300, 400, 500, 600, 700, + 1000, 2000, 4000, 6000, 8000, 10000 }, + .is_hc = true, +}; + static int adc_tm5_read(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len) { return regmap_bulk_read(adc_tm->regmap, adc_tm->base + offset, data, len); @@ -375,6 +384,29 @@ static int adc_tm5_register_tzd(struct adc_tm5_chip *adc_tm) return 0; } +static int adc_tm_hc_init(struct adc_tm5_chip *chip) +{ + unsigned int i; + u8 buf[2]; + int ret; + + for (i = 0; i < chip->nchannels; i++) { + if (chip->channels[i].channel >= ADC_TM5_NUM_CHANNELS) { + dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel); + return -EINVAL; + } + } + + buf[0] = chip->decimation; + buf[1] = chip->avg_samples | ADC_TM5_FAST_AVG_EN; + + ret = adc_tm5_write(chip, ADC_TM5_ADC_DIG_PARAM, buf, sizeof(buf)); + if (ret) + dev_err(chip->dev, "block write failed: %d\n", ret); + + return ret; +} + static int adc_tm5_init(struct adc_tm5_chip *chip) { u8 buf[4], channels_available; @@ -591,7 +623,10 @@ static int adc_tm5_probe(struct platform_device *pdev) return ret; } - ret = adc_tm5_init(adc_tm); + if (adc_tm->data->is_hc) + ret = adc_tm_hc_init(adc_tm); + else + ret = adc_tm5_init(adc_tm); if (ret) { dev_err(dev, "adc-tm init failed\n"); return ret; @@ -612,6 +647,10 @@ static const struct of_device_id adc_tm5_match_table[] = { .compatible = "qcom,spmi-adc-tm5", .data = &adc_tm5_data_pmic, }, + { + .compatible = "qcom,spmi-adc-tm-hc", + .data = &adc_tm_hc_data_pmic, + }, { } }; MODULE_DEVICE_TABLE(of, adc_tm5_match_table); From patchwork Tue Oct 5 03:25:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12535435 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DDC1C433F5 for ; Tue, 5 Oct 2021 03:23:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EA0CD615A3 for ; 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Mon, 04 Oct 2021 20:23:51 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Thara Gopinath , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/4] arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node Date: Mon, 4 Oct 2021 20:25:30 -0700 Message-Id: <20211005032531.2251928-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20211005032531.2251928-1-bjorn.andersson@linaro.org> References: <20211005032531.2251928-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add a node for the ADC Thermal Monitor found in the PM8998 PMIC. This is used to connect thermal zones with ADC channels. Signed-off-by: Bjorn Andersson Reviewed-by: Vinod Koul --- Changes since v2: - None arch/arm64/boot/dts/qcom/pm8998.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm8998.dtsi b/arch/arm64/boot/dts/qcom/pm8998.dtsi index 6f5bb6b37ec2..d09f2954b6f9 100644 --- a/arch/arm64/boot/dts/qcom/pm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8998.dtsi @@ -84,6 +84,16 @@ adc-chan@6 { }; }; + pm8998_adc_tm: adc-tm@3400 { + compatible = "qcom,spmi-adc-tm-hc"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + rtc@6000 { compatible = "qcom,pm8941-rtc"; reg = <0x6000>, <0x6100>; From patchwork Tue Oct 5 03:25:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 12535437 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBCB0C4332F for ; Tue, 5 Oct 2021 03:24:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C705D619E0 for ; Tue, 5 Oct 2021 03:24:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231649AbhJEDZt (ORCPT ); Mon, 4 Oct 2021 23:25:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231791AbhJEDZn (ORCPT ); Mon, 4 Oct 2021 23:25:43 -0400 Received: from mail-ot1-x335.google.com (mail-ot1-x335.google.com [IPv6:2607:f8b0:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E7B5C061760 for ; Mon, 4 Oct 2021 20:23:53 -0700 (PDT) Received: by mail-ot1-x335.google.com with SMTP id h9-20020a9d2f09000000b005453f95356cso24206365otb.11 for ; Mon, 04 Oct 2021 20:23:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=M3NkAo4ipnsswFd7+bb6gh6i4/0zZCNYqzmzcXc1S2E=; b=uFy5Lbzdcs1mvU8Xy0XTdLp0Vm6MJS1W8fN46g+3N9sR6JBS1O6wgZNF265dwpgeMm Xhd1eXFIcB4DI6zxgCWu8tT8j94Wmb21RQRERzKkALcOYUWZGILlORlmaTwedRBnXNEZ TGpWSckGdau3g5uhG//nK1g43jjvFmkjFCT8w44SALnvsr+Wt+lQXaC7QQ6raaArEG1J vWrKYe9fP7DpjErgZM8KtNPWC3ldmYFXXNqSn3gt7Zg1ZLGHRuyylwYcOUEO5kCNywzx g48mwjcAsb19mV3yOwRIJMkLJSim79LDlDQydu84ALS3DScY8VQ4gEjKxIqQnmZmoOnF uO/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=M3NkAo4ipnsswFd7+bb6gh6i4/0zZCNYqzmzcXc1S2E=; b=Q8EYR0vdCJtx3mUk4ZLJjsDBphWsMlEUbeVGcXVUpy8VIIezb5NA/p81NgJZCFxuYP 1mEAK2wLqdjpRvcWIY6yxl21rhwio8Wsa6YtdFFTWutqnV+lHNYdqzRh8/kqo0uq9Cwd i+uzrhoivbSSdX0u7ETrnO4uflhBWCTxS2Bj8/wTxq5F/u+iaahYesuXkFnH3S6h45YG O3M5Btrehp85Iuc/6A0cs0PUAQ8KbR8wbK0lZMCsnIMccQ7OV5KIxUmhnYiwtUzrzZCd 91MpFeIFWk6YtwKt86VRWzPf5wxrLwxGcOfw7MVUk9KyLIN7/2UkplNvhkv8MLYONMuQ UrYg== X-Gm-Message-State: AOAM530+L807L7Hx3tdBUcQ9d8Zdl9juDolyiU5ZjrkoV0POLHYUmogX TiXVNkd39jA1pkliATbB1VtUXw== X-Google-Smtp-Source: ABdhPJxuDS9IV4ItxFNGGCcxhc3uf20xc9kw5e45MlPkQsi0Y/yMX84fwjbn7f0aE4U+5x0m7VqOuA== X-Received: by 2002:a9d:6a50:: with SMTP id h16mr12335629otn.314.1633404232776; Mon, 04 Oct 2021 20:23:52 -0700 (PDT) Received: from localhost.localdomain ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id j4sm3111955oia.56.2021.10.04.20.23.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Oct 2021 20:23:52 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Amit Kucheria , Rob Herring , Thara Gopinath , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/4] arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones Date: Mon, 4 Oct 2021 20:25:31 -0700 Message-Id: <20211005032531.2251928-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20211005032531.2251928-1-bjorn.andersson@linaro.org> References: <20211005032531.2251928-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by: Bjorn Andersson Reviewed-by: Vinod Koul --- Changes since v2: - Added missing qcom,ratiometric and qcom,hw-settle-time-us from the ADC channels arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 140 ++++++++++++++++++++++++ 1 file changed, 140 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 52dd7a858231..9aa21399b7ee 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -10,6 +10,8 @@ #include #include #include "sdm845.dtsi" +#include "pm8998.dtsi" +#include "pmi8998.dtsi" / { model = "Qualcomm Technologies, Inc. SDM845 MTP"; @@ -46,6 +48,68 @@ vreg_s4a_1p8: pm8998-smps4 { vin-supply = <&vph_pwr>; }; + + thermal-zones { + xo_thermal: xo-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 1>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + + msm_thermal: msm-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 2>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + + pa_thermal: pa-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 3>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + + quiet_thermal: quiet-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = <&pm8998_adc_tm 4>; + + trips { + trip-point { + temperature = <125000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + }; + }; }; &adsp_pas { @@ -469,6 +533,82 @@ &mss_pil { firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; }; +&pm8998_adc { + adc-chan@4c { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@4d { + reg = ; + label = "msm_therm"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@4f { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@51 { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@83 { + reg = ; + label = "vph_pwr"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + adc-chan@85 { + reg = ; + label = "vcoin"; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + +&pm8998_adc_tm { + status = "okay"; + + xo-thermistor@1 { + reg = <1>; + io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + msm-thermistor@2 { + reg = <2>; + io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + pa-thermistor@3 { + reg = <3>; + io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + quiet-thermistor@4 { + reg = <4>; + io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; +}; + &qupv3_id_1 { status = "okay"; };